CN113630097A - Transistor amplifier for combining and cancelling differential mode signals - Google Patents
Transistor amplifier for combining and cancelling differential mode signals Download PDFInfo
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- CN113630097A CN113630097A CN202110947189.5A CN202110947189A CN113630097A CN 113630097 A CN113630097 A CN 113630097A CN 202110947189 A CN202110947189 A CN 202110947189A CN 113630097 A CN113630097 A CN 113630097A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
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Abstract
The invention discloses a transistor amplifier for combining and cancelling differential mode signals, which comprises a transistor amplifier and a differential common emitter structure amplifier, wherein the transistor amplifier comprises a differential common emitter structure amplifier (1) and a differential common base structure amplifier (2), the in-phase input end (3) of the differential common emitter structure amplifier (1) is connected with the in-phase input end of the differential common base structure amplifier (2), the reverse phase input end (4) is connected with the reverse phase input end of the differential common base structure amplifier, the in-phase output end (5) of the differential common emitter structure amplifier (1) is connected with the in-phase output end of the differential common base amplifier (2), and the reverse phase output end (6) is connected with the reverse phase output end of the differential common base structure amplifier (2); the differential common-emitter amplifier and the differential common-base amplifier are connected in a parallel and staggered mode, differential mode signal power synthesis and common mode signal power offset are achieved, and the differential common-emitter amplifier and the differential common-base amplifier have excellent performance which cannot be achieved by a traditional structure.
Description
Technical Field
The invention relates to a novel transistor amplifier topological structure, in particular to an amplifier structure which is manufactured by adopting a semiconductor integrated circuit process and uses a transistor to amplify radio frequency signals so as to improve the indexes of the amplifier such as bandwidth, gain, input matching, common mode rejection, harmonic rejection, isolation, stability and the like.
Background
The radio frequency amplifier is one of the core modules of a radio frequency circuit system, and the performance of the radio frequency amplifier directly affects the detection capability of a military radar system, the communication quality of a modern communication system, the detection range of radio astronomy and the working performance of radio frequency instrument equipment. With the further development of radio technology, the frequency band covered by the current radio frequency technology has been from a low frequency band, covering to a millimeter wave frequency band, and is evolving to a terahertz frequency band. The millimeter wave and terahertz frequency band is wider in frequency band and can be used for transmitting higher speed, so that higher communication capacity is obtained, more and more applications including wireless local area networks, terahertz imaging, millimeter wave vehicle-mounted radars, spectroscopy, remote sensing and the like have emerged to the millimeter wave and terahertz frequency band internationally, and a large number of frequency bands are not developed and utilized yet, so that the requirements on radio frequency amplifiers are higher and higher due to the applications.
However, with the increase of frequency, the performance of the rf amplifier is rapidly reduced, and for all the millimeter wave and terahertz systems, the design of the high-performance rf amplifier has been a difficult point.
The traditional amplifier adopts three structures of common-emitter (source), common-base (grid) and common-collector (drain), or three structures are used in cascade (such as a common-emitter common-base Cascode structure), but due to the physical characteristics of the transistor and the influence of parasitic parameters, the three structures can not provide indexes such as large bandwidth, high gain, high common-mode rejection, high isolation and the like at the same time, and a complex peripheral structure must be introduced and part of performances must be sacrificed to realize some points in the indexes.
Therefore, it is necessary to invent a transistor amplifier structure capable of greatly reducing the influence of parasitic parameters of transistors and compensating the physical characteristics of transistors, so as to be applied to various radio frequency signal amplification circuits, thereby solving the problem of mutual restriction among indexes in the conventional structure.
Disclosure of Invention
The technical problem is as follows: the invention aims to provide a transistor amplifier for combining and cancelling differential mode signals and common mode signals, in particular to a novel transistor amplifier structure which is manufactured by adopting a semiconductor integrated circuit process and adopts a transistor to amplify signals so as to improve indexes such as bandwidth, gain, input matching, common mode rejection, harmonic rejection, isolation, stability and the like of the amplifier.
The technical scheme is as follows: the invention relates to a transistor amplifier for combining and cancelling differential mode signals, which comprises a path of differential common emitter structure amplifier and a path of differential common base structure amplifier, wherein the in-phase input end of the differential common emitter structure amplifier (1) is connected with the in-phase input end of the differential common base structure amplifier, the reverse phase input end of the differential common emitter structure amplifier is connected with the reverse phase input end of the differential common base structure amplifier, the in-phase output end of the differential common emitter structure amplifier is connected with the in-phase output end of the differential common base amplifier, and the reverse phase output end of the differential common emitter structure amplifier is connected with the reverse phase output end of the differential common base structure amplifier;
four current paths between collector of common emitter structure amplifier and emitter of common base structure amplifier to provide bias current I of transistor1Bias current I2Bias current I3Bias current I4Two voltage paths between the base of the amplifier and the emitter of the common emitter amplifier in a common base configuration to provide a bias voltage V for the transistorbias,bBias voltage Vbias,eDifferential input port V at the base of the amplifier (1) in common emitter configuration or at the emitter of the amplifier in common base configurationin+, differential input port VinDifferential output port V at the collector of the amplifier in common emitter configuration or at the collector of the amplifier in common base configurationout+, differential output port Vout-。
The differential common emitter structure amplifier is composed of a third transistor and a fourth transistor common emitter, wherein the base electrode of the third transistor is connected with a differential input port VinThe base of the fourth transistor is connected to the differential input port VinThe collector of the third transistor is connected with a differential output port VoutThe collector of the fourth transistor is connected with a differential output port Vout-。
The differential common base structure amplifier is composed of a first transistor and a second transistorBase electrode, emitter electrode of the first transistor connected with differential input port VinThe emitter of the second transistor is connected to the differential input port VinThe collector of the first transistor is connected with a differential output port VoutThe collector of the second transistor is connected with a differential output port Vout-。
The first transistor, the second transistor, the third transistor and the fourth transistor are bipolar junction transistors BJTs, metal oxide semiconductor field effect transistors MOSFETs or high electron mobility transistors HEMTs.
When the first transistor, the second transistor, the third transistor and the fourth transistor are Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) or High Electron Mobility Transistors (HEMTs), the electrodes of the transistors are named differently, and the emitter, the base and the collector are correspondingly a source, a gate and a drain.
The two bases of the differential common emitter amplifier and the two emitters of the differential common base amplifier are respectively connected with the non-inverting input end and the inverting input end through connecting wires or are in alternating current connection through a capacitor or other circuit elements; the two collectors of the differential common emitter structure amplifier and the two collectors of the differential common base structure amplifier are respectively connected with the in-phase output end and the anti-phase output end through connecting wires or are in alternating current connection through a capacitor or other elements.
The bias current I of the transistor positioned in the four current paths of the collector of the differential common emitter structure amplifier and the emitter of the differential common base structure amplifier1Bias current I2Bias current I3Bias current I4By resistors, inductors, transmission lines, transformers, baluns or elements that can provide voltage or current bias.
The bias voltage V of the two voltage paths of the base electrode of the differential common base electrode structure amplifier and the emitter electrode of the differential common emitter structure amplifierbias,bBias voltage Vbias,eBy resistors, inductors, transmission lines, transformers, baluns or elements that can provide voltage or current bias.
Has the advantages that:
1) the bandwidth, gain, input matching, common mode rejection, harmonic rejection, isolation, and stability performance of the transistor amplifier are greatly improved.
2) There is no special requirement for the transistor, and various types of transistors such as a Bipolar Junction Transistor (BJT), a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), a High Electron Mobility Transistor (HEMT), and the like can be selected.
3) It is suitable for various amplifier application occasions such as radio frequency receiver, radar, radio telescope, radio frequency instrument, etc.
Drawings
FIG. 1(a) is a schematic diagram of a transistor amplifier topology (using bipolar junction transistors) for combining and canceling differential mode signals in the present invention; FIG. 1(b) is a schematic diagram of a transistor amplifier topology (using NMOS or HEMT transistors) for differential mode signal combination and cancellation of common mode signals in the present invention;
FIG. 2 is a schematic diagram of a circuit employing the present invention in a wideband differential amplifier and using a balun to provide current bias;
fig. 3 is a comparison of the performance index of a conventional cascode amplifier and a conventional cascode amplifier under the same bias, with the index applied to a wideband differential amplifier. Wherein (a) is an input matching S11 parameter, (b) is a reverse isolation S12 parameter, (c) is a forward gain S21 parameter, (d) is an output matching S22 parameter, (e) is a stability factor K parameter, and (f) is a common mode stability factor KCMParameters, (g) maximum gain MaxGain parameters, (h) results of input matching S11 and output matching S22 in the Smith chart. Each index is far superior or similar to the traditional amplifier structure.
The figure shows that: a differential common emitter structure amplifier 1, a differential common base structure amplifier 2, a non-inverting input terminal 3 of the differential common emitter structure amplifier, an inverting input terminal 4 of the differential common emitter structure amplifier, a non-inverting output terminal 5 of the differential common emitter structure amplifier, an inverting output terminal 6 of the differential common emitter structure amplifier, a bias current I17. DeflectionCurrent setting I28. Bias current I39. Bias current I410. Bias voltage V bias,b11. Bias voltage V bias,e12. Differential input port Vin+13 differential input port Vin-14, differential output port Vout+15, differential output port Vout-16; a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4; collector c of the first transistor1Collector c of the second transistor2A collector c of the third transistor3Collector c of fourth transistor M44。
Detailed Description
The invention will be further described with reference to the accompanying drawings
The basic structure of the present invention is a transistor amplifier topology where the differential mode signals are combined and cancelled out with the common mode signals, as shown in fig. 1 (a). In the figure, the upper first transistor M1 and the second transistor M2 form a differential common-base amplifier structure, the lower third transistor M3 and the lower fourth transistor M4 form a differential common-emitter amplifier structure, the non-inverting input end 3 of the differential common-emitter structure amplifier 1 is connected with the non-inverting input end of the differential common-base structure amplifier 2, the inverting input end 4 of the differential common-emitter structure amplifier 1 is connected with the inverting input end of the differential common-base structure amplifier, the non-inverting output end 5 of the differential common-emitter structure amplifier 1 is connected with the non-inverting output end of the differential common-base amplifier 2, the inverting output end 6 of the differential common-emitter structure amplifier 1 is connected with the inverting output end of the differential common-base structure amplifier 2, and four current paths, namely bias current I, are positioned at the collector of the common-emitter amplifier and the emitter of the common-base amplifier17. Bias current I 28. Bias current I39. Bias current I410 providing a bias current for the transistor, a bias voltage V being a two-way voltage path between the base of the common base amplifier and the emitter of the common emitter amplifier bias,b11. Bias voltage V bias,e12 to provide a bias voltage for the transistor, a differential input port V at the base of the common emitter amplifier or at the emitter of the common base amplifierin+13 differential input port Vin-14 differential output port V forming a differential input port, located at the collector of the common emitter amplifier or at the collector of the common base amplifierout+15, differential output port Vout-16 constitute a differential output port.
As shown in fig. 1(b), when the transistor used is not a BJT, the BJT in fig. 1(a) can be replaced by a corresponding transistor (e.g., an nmos or hemt); when the first transistor M1, the second transistor M2, the third transistor M3, and the fourth transistor M4 are MOSFETs or HEMTs, the electrodes of the transistors are named differently, and the emitter, the base, and the collector are correspondingly a source, a gate, and a drain.
FIG. 2 is a schematic diagram of a circuit for applying the present invention in a wideband differential amplifier, which also uses a method of providing current bias via a balun;
fig. 3 is a comparison of the performance index of a conventional cascode amplifier and a conventional cascode amplifier under the same bias, with the index applied to a wideband differential amplifier. As can be seen from fig. 3(a), after the present invention is used, the input matching S11 of the amplifier is lower than-35 dB in the full frequency band, which is far better than the conventional common-emitter structure and the conventional common-base structure; in fig. 3(b), the reverse isolation S12 of the amplifier is the lowest in the full band, which is far better than the conventional cascode structure and the conventional cascode structure; in fig. 3(c), the forward gain S21 of the amplifier is highest in the full band, which is much better than the conventional cascode structure and the conventional cascode structure; in fig. 3(d), the output matching S22 of the amplifier is the lowest in the full band, which is far better than the conventional cascode structure and the conventional cascode structure; in fig. 3(e), the stability factor K of the amplifier is greater than 1 in the full band, which is much better than the conventional cascode structure and the conventional common-emitter structure; in FIG. 3(f), the common mode stability factor K of the amplifierCMThe full frequency band is far larger than 1, and is far superior to the traditional common-emitter structure and the traditional common-base structure; in fig. 3(g), the maximum gain of the amplifier MaxGain is equivalent to the conventional cascode structure in the full band and the conventional cascode structure; in FIG. 3(h), the input of the amplifier is matched S11 at allThe frequency bands are all located in the center of the Smith circle, and the bandwidth reaches the full frequency band.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.
Claims (8)
1. The transistor amplifier is characterized by comprising a differential common emitter structure amplifier (1) and a differential common base structure amplifier (2), wherein the non-inverting input end (3) of the differential common emitter structure amplifier (1) is connected with the non-inverting input end of the differential common base structure amplifier (2), the inverting input end (4) of the differential common emitter structure amplifier (1) is connected with the inverting input end of the differential common base structure amplifier, the non-inverting output end (5) of the differential common emitter structure amplifier (1) is connected with the non-inverting output end of the differential common base structure amplifier (2), and the inverting output end (6) of the differential common emitter structure amplifier (1) is connected with the inverting output end of the differential common base structure amplifier (2);
four current paths between collector of common emitter configuration amplifier (1) and emitter of common base configuration amplifier (2) to provide bias current I for the transistor1(7) Bias current I2(8) Bias current I3(9) Bias current I4(10) Two voltage paths between the base of the common base structure amplifier (2) and the emitter of the common emitter amplifier (1) for providing a bias voltage V of the transistorbias,b(11) Bias voltage Vbias,e(12) A differential input port V positioned at the base of the common emitter structure amplifier (1) or the emitter of the common base structure amplifier (2)in+ (13) differential input port Vin- (14) a differential output port V at the collector of the amplifier (1) or at the collector of the amplifier (2) of common emitter configurationout+ (15) differential output port Vout-(16)。
2. The method of claim 1The differential mode signal is combined with the common mode signal to cancel the common mode signal, the differential common emitter structure amplifier (1) is composed of a third transistor (M3) and a fourth transistor (M4) which are connected with the common emitters, and the base electrode of the third transistor (M3) is connected with the differential input port Vin- (14), the base of the fourth transistor (M4) being connected to the differential input port Vin+ (13), collector of third transistor (c)3) Is connected with a differential output port Vout+ (15), collector (c) of fourth transistor (M4)4) Is connected with a differential output port Vout-(16)。
3. The differential-mode signal and common-mode signal cancellation transistor amplifier according to claim 1, wherein the differential common-base structure amplifier (2) is composed of a first transistor (M1) and a second transistor (M2) with common bases, and an emitter of the first transistor (M1) is connected to the differential input port Vin- (14), the emitter of the second transistor (M2) being connected to the differential input port Vin+ (13), collector of first transistor (c)1) Is connected with a differential output port Vout+ (15), collector of second transistor (c)2) Is connected with a differential output port Vout-(16)。
4. The differential-mode signal combining and cancelling common-mode signal transistor amplifier of claim 2 or 3, wherein the first transistor (M1), the second transistor (M2), the third transistor (M3), and the fourth transistor (M4) are Bipolar Junction Transistors (BJTs), Metal Oxide Semiconductor Field Effect Transistors (MOSFETs), or High Electron Mobility Transistors (HEMTs).
5. The differential-mode signal combining and cancelling common-mode signal transistor amplifier of claim 4, wherein when the first transistor (M1), the second transistor (M2), the third transistor (M3) and the fourth transistor (M4) are Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) or High Electron Mobility Transistors (HEMTs), the emitter, the base and the collector are named differently for the electrodes of the transistors, and the emitter, the base and the collector are the source, the gate and the drain.
6. The differential-mode signal and common-mode signal combining and canceling transistor amplifier according to claim 1, wherein the two bases of the differential common-emitter amplifier (1) and the two emitters of the differential common-base amplifier (2) are respectively connected with the non-inverting input terminal (3) and the inverting input terminal (4) through wires, or are in alternating current connection through a capacitor or other circuit elements; two collectors of the differential common emitter structure amplifier (1) and two collectors of the differential common base structure amplifier (2) are respectively connected with the in-phase output end (5) and the anti-phase output end (6) through connecting wires or are in alternating current connection through a capacitor or other elements.
7. Transistor amplifier for the summation and cancellation of differential and common mode signals according to claim 1, characterized by the bias current I of the transistor in the four current paths of the differential common emitter structure amplifier (1) collector and the differential common base structure amplifier (2) emitter1(7) Bias current I2(8) Bias current I3(9) Bias current I4(10) By resistors, inductors, transmission lines, transformers, baluns or elements that can provide voltage or current bias.
8. Transistor amplifier for the summation and cancellation of differential and common mode signals according to claim 1, characterized by the bias voltage V of the two voltage paths at the base of the differential common base configuration amplifier (2) and the emitter of the differential common emitter configuration amplifier (1)bias,b(11) Bias voltage Vbias,e(12) By resistors, inductors, transmission lines, transformers, baluns or elements that can provide voltage or current bias.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105634426A (en) * | 2015-12-18 | 2016-06-01 | 天津工业大学 | Power amplifier for UHF (Ultra High Frequency) RFID (Radio Frequency Identification Device) reader |
| CN105720942A (en) * | 2016-01-22 | 2016-06-29 | 西安电子科技大学 | Ultra-wide-band low-noise high-balance on-chip active Balun |
| CN112311340A (en) * | 2020-11-06 | 2021-02-02 | 南京迈矽科微电子科技有限公司 | Millimeter wave variable gain power amplifier based on switch capacitor array regulation |
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- 2021-08-18 CN CN202110947189.5A patent/CN113630097B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105634426A (en) * | 2015-12-18 | 2016-06-01 | 天津工业大学 | Power amplifier for UHF (Ultra High Frequency) RFID (Radio Frequency Identification Device) reader |
| CN105720942A (en) * | 2016-01-22 | 2016-06-29 | 西安电子科技大学 | Ultra-wide-band low-noise high-balance on-chip active Balun |
| CN112311340A (en) * | 2020-11-06 | 2021-02-02 | 南京迈矽科微电子科技有限公司 | Millimeter wave variable gain power amplifier based on switch capacitor array regulation |
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