CN113625678B

CN113625678B - Automatic simulation test method for port impedance

Info

Publication number: CN113625678B
Application number: CN202110721203.XA
Authority: CN
Inventors: 徐伟; 杨依衡; 赵洋; 孙俊阳; 谢霞明; 韩业华
Original assignee: Shanghai Institute of Space Power Sources
Current assignee: Shanghai Institute of Space Power Sources
Priority date: 2021-06-28
Filing date: 2021-06-28
Publication date: 2022-08-12
Anticipated expiration: 2041-06-28
Also published as: CN113625678A

Abstract

The invention discloses an automatic simulation test method for port impedance, which applies voltage to each port of a tested circuit in sequence to obtain corresponding port current, and then calculates the equivalent impedance of each port according to ohm's law. The port impedance automatic simulation test method is characterized in that an active device in a tested circuit is set to zero, and unique and fixed network identification numbers are distributed to all terminals of the tested circuit. Then, according to the test requirements, the test sequences are listed. Furthermore, an independent voltage source special for measuring the impedance of a circuit port is introduced into the circuit simulation diagram, and network identification numbers are distributed to the positive terminal and the negative terminal of the circuit simulation diagram according to a test sequence. The independent voltage source terminal is electrically connected with the network identification number of the tested circuit terminal through matching. The invention improves the efficiency of obtaining the impedance value. Meanwhile, errors caused by manual analysis or calculation errors are avoided, and the accuracy of the acquired port impedance value is improved.

Description

Automatic simulation test method for port impedance

Technical Field

The invention belongs to the technical field of aerospace power supplies, and particularly relates to an automatic simulation test method for port impedance.

Background

In the function test of the aerospace power supply controller, before power is applied, whether a fault exists in a circuit is usually judged by measuring the impedance of a circuit port. When using this method, first a theoretical value of the port impedance is calculated. On the basis, the measured value is compared with the theoretical value to find out the abnormal value. The traditional method for acquiring the theoretical value of the port impedance comprises the following steps: and by utilizing the circuit principle knowledge, taking each port as an input port in sequence, manually analyzing the equivalent circuit seen from each port, and further calculating the equivalent impedance of each port. The method is long in time consumption, and when the circuit is complex, the condition that the calculation analysis is incorrect is easy to occur.

Disclosure of Invention

The technical problem solved by the invention is as follows: the method overcomes the defects of the prior art, provides the automatic simulation test method of the port impedance, automatically obtains the impedance value of each port in the circuit, and improves the efficiency of obtaining the impedance value. Meanwhile, errors caused by manual analysis or calculation errors are avoided, and the accuracy of the acquired port impedance value is improved.

The purpose of the invention is realized by the following technical scheme: an automatic simulation test method for port impedance, comprising the following steps: step 1: setting all active devices in a tested circuit to zero; step 2: sequentially distributing unique and fixed network identification numbers to all terminals in a tested circuit; and 3, step 3: using the label of two terminal networks in the tested circuit to represent a port, and formulating a port impedance test sequence; and 4, step 4: adding an independent voltage source Vs specially used for measuring the impedance of a circuit port, and respectively allocating network identification numbers Ni and Nj to positive and negative terminals of the independent voltage source so that (Ni, Nj) is Tu, wherein u represents the serial number of the port needing to be tested currently; and 5: recording the port voltage Ui, j and the port current Ii, j of the independent voltage source Vs in real time, and calculating the equivalent impedance Zi, j of the ports formed by two terminals Ni and Nj in the tested circuit in real time; step 6: judging whether the value of the equivalent impedance Zi, j of the ports formed by two terminals Ni and Nj in the tested circuit meets the convergence condition in real time; if the equivalent impedance Zi, j is not converged, returning to the step 5, and if the equivalent impedance Zi, j is converged, executing the step 7; and 7: recording Zi, j calculated at the current moment as the equivalent impedance of the tested port corresponding to the impedance test serial number Tu of the u-th port; and 8: judging whether the port impedance test sequence is executed, namely whether u is equal to n; if u is equal to n, it indicates that the execution is finished, and the test is finished.

The method for automatically simulating and testing the port impedance further comprises the following steps: if u is not equal to n, let u be u +1, and change the values of independent voltage source terminals Ni and Nj so that (Ni, Nj) is Tu.

In the method for automatically simulating and testing the port impedance, in step 1, all active devices in the tested circuit are set to zero, namely all voltage sources are short-circuited and all current sources are open-circuited.

In the above method for automatically simulating and testing port impedance, in step 2, the network identification number of the kth terminal is marked as Nk.

In the method for automatically simulating and testing the port impedance, in step 3, the port impedance test sequence is TS ═ { T1 ═ Na, Nb, ((Nc, Nd) —, T2 ═ Nc, Nd), …, Tn ═ Np, Nq }, where n is the total number of ports to be tested, T1 is the impedance test serial number of the 1 st port, Na is the network identification number of the a-th terminal, Nb is the network identification number of the b-th terminal, T2 is the impedance test serial number of the 2 Nd port, Nc is the network identification number of the c-th terminal, Nd is the network identification number of the d-th terminal, Tn is the impedance test serial number of the n-th port, Np is the network identification number of the p-th terminal, and Nq is the network identification number of the q-th terminal.

In the automatic simulation test method for the port impedance, in step 5, the equivalent impedance Zi, j of the port formed by two terminals Ni and Nj in the tested circuit is obtained by the following formula: zi, j ═ Ui, j/Ii, j.

In the above method for testing port impedance by automatic simulation, in step 6, the convergence condition is: when the change rate of Zi, j is less than a preset constant delta or the simulation time is greater than or equal to a preset time T0, Zi, j is considered to be converged, otherwise, Zi, j is considered to be not converged.

Compared with the prior art, the invention has the following beneficial effects:

(1) the invention achieves the following effects through the

steps

1, 2, 4 and 5: calculating the equivalent impedance of each port by means of a 'pressurizing and flow-solving' method in circuit principle;

(2) through the steps 2 and 3, the invention achieves the following effects: effectively distinguishing and positioning each terminal and port of the circuit to be tested;

(3) through the steps 2 and 4, the invention achieves the following effects: in simulation software, an independent voltage source Vs for measuring the impedance of a circuit port is electrically connected with a port to be measured;

(4) according to the invention, through the step 3, the effects are as follows: enumerating all ports to be tested to form a test sequence. On one hand, the test ports are convenient to be automatically switched subsequently; on the other hand, the test items are convenient to check and verify, and omission is avoided.

(5) Through the steps 3, 4, 8 and 9, the invention achieves the following effects: after completing the impedance measurement of a certain port, automatically measuring the impedance of the next port until completing the test of all the ports;

(6) according to the invention, through the step 5, the effects are as follows: monitoring the port impedance measured value in real time to obtain the dynamic change process of the port impedance measured value;

(7) through the steps 6 and 7, the invention achieves the following effects: when capacitive and inductive elements exist in the circuit to be tested, the impedance value measured in the dynamic process of the circuit is abandoned, and the impedance value measured after the circuit reaches a steady state is used as the port impedance, so that the consistency of the port impedance in multiple measurements is ensured.

(8) According to the invention, through the step 6, the effects are as follows: the simulation test time for a certain port is prevented from being too long, when the time exceeds an acceptable limit, the port is stopped from being continuously tested, and the time consumption for completing the test sequence is further ensured to be controllable.

Drawings

Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:

FIG. 1 is a schematic diagram of a simulation test circuit according to an embodiment of the present invention;

FIG. 2 is a flowchart illustrating steps executed by the method for automatically simulating and testing port impedance according to the embodiment of the present invention;

fig. 3 is a simulation test circuit drawn in MATLAB provided by an embodiment of the present invention.

Detailed Description

Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art. It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict. The present invention will be described in detail below with reference to the embodiments with reference to the attached drawings.

The embodiment provides an automatic simulation test method for port impedance, which comprises the following steps:

step 1: zero all active devices in the circuit under test, i.e.: all voltage sources are short-circuited, and all current sources are open-circuited;

step 2: in the simulation file, allocating unique and fixed network identification numbers to all terminals in a tested circuit in sequence, wherein the network identification number of the kth terminal is marked as Nk;

and step 3: the method comprises the steps of representing one port by using two terminal network labels in a tested circuit, and setting a port test sequence TS (T1) (Na, Nb)) and T2 (Nc, Nd, … and Tn (Np, Nq) according to test requirements, wherein n is the total number of ports to be tested.

And 4, step 4: in the simulation file, an independent voltage source Vs dedicated for measuring the impedance of a circuit port is added, and network identification numbers Ni and Nj are respectively assigned to the positive terminal and the negative terminal of the independent voltage source Vs, so that (Ni, Nj) is Tu, where u denotes the port serial number currently required to be tested, and u is 1.

And 5: simulating, recording the port voltage Ui, j and the port current Ii, j of the independent voltage source Vs in real time, calculating the equivalent impedance of the port formed by two terminals Ni and Nj in the tested circuit according to a formula Zi, j, Ui, j/Ii, j on the basis of the principle of pressurizing and flow-solving in circuit principle to calculate the port impedance;

step 6: and judging whether the values of Zi and j meet the convergence condition in real time. The convergence criteria include, but are not limited to, the following: when the change rate of Zi, j is less than a certain constant delta or the simulation time is equal to or greater than a certain time T0, Zi, j is considered to have converged, otherwise, it is considered to have not converged.

If Zi, j does not converge, returning to step 5 to continue the simulation, and if Zi, j has converged, executing step 7;

and 7: recording Zi, j calculated at the current moment as the equivalent impedance of the tested port corresponding to Tu;

and 8: it is determined whether the port impedance test sequence has been executed, i.e., whether u is equal to n. If u is equal to n, the execution is finished, the test is ended, otherwise, the execution is not finished, and the step 9 is executed;

and step 9: let u be u +1, change the values of the independent source terminals Ni, Nj so that (Ni, Nj) is Tu.

The circuit diagram shown in fig. 2 is drawn in MATLAB/Simulink according to the circuit connection illustrated in fig. 1. During drawing, initial network identification numbers are distributed to the positive terminal and the negative terminal of the independent source for impedance measurement, and meanwhile, a unique and fixed network identification number is distributed to each terminal of the tested circuit. The "simout" block shown in fig. 2 is used to record the output voltage and current of the independent source.

On this basis, an m-script driving the test procedure was programmed in MATLAB according to fig. 3, wherein the voltage-current data for calculating the port impedance was obtained from the data derived from the "simout" module.

The invention calculates the equivalent impedance of each port by means of a 'pressurization flow-solving' method in the circuit principle. The invention effectively distinguishes and positions each terminal and port of the circuit to be tested. The invention realizes the electrical connection between the independent voltage source Vs for measuring the impedance of the circuit port and the port to be measured; the invention enumerates all ports to be tested to form a test sequence, thereby facilitating the subsequent automatic switching of the test ports on one hand; on the other hand, the test items are convenient to check and verify, and omission is avoided. After the impedance measurement of a certain port is completed, the impedance of the next port is automatically measured until the test of all the ports is completed. The invention monitors the impedance measured value of the port in real time and obtains the dynamic change process of the port. When capacitive and inductive elements exist in the tested circuit, the impedance value measured in the dynamic process of the circuit is abandoned, and the impedance value measured after the circuit reaches a steady state is taken as the port impedance, so that the consistency of the port impedance in multiple measurements is ensured. The invention avoids that the simulation test time for a certain port is too long, and when the time exceeds the acceptable limit, the continuous test for the port is stopped, thereby ensuring that the time for completing the test sequence is controllable.

Although the present invention has been described with reference to the preferred embodiments, it is not intended to limit the present invention, and those skilled in the art can make possible variations and modifications of the present invention using the method and the technical contents disclosed above without departing from the spirit and scope of the present invention, and therefore, any simple modifications, equivalent changes and modifications made to the above embodiments according to the technical essence of the present invention are all within the scope of the present invention.

Claims

1. An automatic simulation test method for port impedance is characterized by comprising the following steps:

step 1: setting all active devices in a tested circuit to zero;

and 2, step: sequentially distributing unique and fixed network identification numbers to all terminals in a tested circuit;

and step 3: using the network labels of two terminals in the tested circuit to represent a port, and formulating a port impedance test sequence;

and 4, step 4: adding an independent voltage source Vs specially used for measuring the impedance of a circuit port, and respectively allocating network identification numbers Ni and Nj to positive and negative terminals of the independent voltage source so that (Ni, Nj) is Tu, wherein u represents the serial number of the port needing to be tested currently;

and 5: recording the port voltage Ui, j and the port current Ii, j of the independent voltage source Vs in real time, and calculating the equivalent impedance Zi, j of the ports formed by two terminals Ni and Nj in the tested circuit in real time;

step 6: judging whether the value of the equivalent impedance Zi, j of the ports formed by two terminals Ni and Nj in the tested circuit meets the convergence condition in real time;

if the equivalent impedance Zi, j is not converged, returning to the step 5, and if the equivalent impedance Zi, j is converged, executing the step 7; in step 6, the convergence condition is as follows: when the change rate of Zi, j is less than a preset constant delta or the simulation time is greater than or equal to a preset time T0, considering that Zi, j is converged, otherwise, considering that the Zi, j is not converged;

and 7: recording Zi, j calculated at the current moment as the equivalent impedance of the tested port corresponding to the impedance test serial number Tu of the u-th port;

and step 8: judging whether the port impedance test sequence is executed, namely whether u is equal to n; if u is equal to n, the execution is finished, and the test is finished; wherein n is the total number of the ports to be tested.

2. The method for automatically simulating and testing the port impedance as claimed in claim 1, further comprising: if u is not equal to n, let u be u +1, and change the values of independent voltage source terminals Ni and Nj so that (Ni, Nj) is Tu.

3. The method for automatically simulating and testing port impedance of claim 1, wherein: in step 1, all active devices in the circuit under test are zeroed out with all voltage sources shorted and all current sources open.

4. The method for automatically simulating and testing port impedance of claim 1, wherein: in step 2, the network identification number of the kth terminal is denoted as Nk.

5. The method for automatically simulating and testing the port impedance according to claim 1, wherein: in step 3, the port impedance test sequence is TS ═ { T1 ═ (Na, Nb), T2 ═ Nc, Nd), …, Tn ═ Np, Nq }; n is the total number of the ports to be tested, T1 is the impedance test serial number of the 1 st port, Na is the network identification number of the a-th terminal, Nb is the network identification number of the b-th terminal, T2 is the impedance test serial number of the 2 Nd port, Nc is the network identification number of the c-th terminal, Nd is the network identification number of the d-th terminal, Tn is the impedance test serial number of the n-th port, Np is the network identification number of the p-th terminal, and Nq is the network identification number of the q-th terminal.

6. The method for automatically simulating and testing port impedance of claim 1, wherein: in step 5, the equivalent impedance Zi, j of the two terminal composition ports of Ni, Nj in the circuit to be tested is obtained by the following formula: zi, j ═ Ui, j/Ii, j.