CN113595053B - Low-power consumption sensing chip without clock standby - Google Patents
Low-power consumption sensing chip without clock standby Download PDFInfo
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- CN113595053B CN113595053B CN202110966699.7A CN202110966699A CN113595053B CN 113595053 B CN113595053 B CN 113595053B CN 202110966699 A CN202110966699 A CN 202110966699A CN 113595053 B CN113595053 B CN 113595053B
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Abstract
The invention discloses a clock-free standby low-power consumption sensing chip, which relates to the field of chips, wherein a power domain is divided in the low-power consumption sensing chip, a power management circuit and a communication register circuit are placed in a normally open power domain, and other circuits including a clock circuit are placed in a controllable power domain controlled by the power management circuit, so that the low-power consumption sensing chip can realize external communication and register configuration without requesting any on-chip clock in a standby mode. Because the turnover rate of the logic is very low, the dynamic power consumption only occupies a small part of the total power consumption, the improvement of the dynamic power consumption is smaller than the saved leakage power consumption of the voltage stabilizer, and the final total power consumption is reduced.
Description
Technical Field
The invention relates to the field of chips, in particular to a low-power consumption sensing chip without clock standby.
Background
Sensing chips such as infrared proximity and ambient light level sensing chips have been increasingly used in mobile phones, televisions or portable devices, and as the functions of the chips are continuously extended, the power consumption of the high-performance chips is large, which results in the problems of weak endurance and serious heat generation of the whole device, so that it is an important point in the design process of the sensing chips to reduce the overall power consumption of the sensing chips and prolong the service life of the system.
Disclosure of Invention
The inventor provides a low-power consumption sensing chip without clock standby aiming at the problems and the technical requirements, and the technical scheme of the invention is as follows:
A low power consumption sensing chip for clock-less standby, the low power consumption sensing chip comprising: the device comprises a power management circuit, a communication register circuit, a sensing analog circuit, a digital control circuit, a clock circuit and a fuse circuit, wherein the communication register circuit is connected with a communication pin, the communication register circuit is connected with the power management circuit, the digital control circuit and the fuse circuit, the digital control circuit is connected with the sensing analog circuit, and the clock circuit is used for providing an on-chip clock;
The power management circuit and the communication register circuit are powered by a normally open power supply of a normally open power supply domain, the sensing analog circuit, the digital control circuit, the clock circuit and the fuse circuit are powered by a power supply of a controllable power supply domain, and the on-off of the power supply of the controllable power supply domain is controlled by the power management circuit;
when the low-power consumption sensing chip is in a standby mode, the power management circuit controls the power supply of the controllable power domain to be disconnected, and the low-power consumption sensing chip performs external communication and/or register configuration by using a communication pin through the communication register circuit on the basis of no on-chip clock.
The controllable power domain comprises a fuse power domain and a main power domain, the fuse circuit is powered by the fuse power of the fuse power domain, the sensing analog circuit, the digital control circuit and the clock circuit are powered by the main power of the main power domain, the power management circuit respectively controls the on-off of the fuse power and the main power, and when the low-power consumption sensing chip is in a standby mode, the power management circuit controls the fuse power and the main power to be disconnected.
When the low-power consumption sensing chip is in a fuse mode, the power management circuit controls the fuse power supply and the main power supply to be conducted, the clock circuit provides an on-chip clock for the fuse circuit, and the fuse circuit burns or reads fuse data;
when the low-power consumption sensing chip is in the sensing mode, the power management circuit controls the fuse power supply to be disconnected and the main power supply to be conducted, and the low-power consumption sensing chip executes sensing operation.
The further technical scheme is that the low-power consumption sensing chip is powered on and then enters a fuse mode to read fuse data, and the fuse data is switched between a standby mode and a sensing mode according to an external switching instruction received through a communication register circuit after being read.
The further technical scheme is that the voltage of the fuse power supply is equal to that of the normally open power supply, and the fuse circuit comprises a fuse controller and a fuse device, wherein the fuse controller is respectively connected with the communication register circuit and the fuse device.
The main power supply of the main power supply domain comprises a first power supply and a second power supply which have the same on-off state, the voltage of the first power supply is equal to that of the normally-open power supply, and the voltage of the second power supply is lower than that of the normally-open power supply, so that the low-power consumption sensing chip further comprises a linear voltage stabilizer working in the main power supply domain, and the linear voltage stabilizer is used for converting the first power supply into the second power supply;
The sensing analog circuit includes a high voltage analog circuit and a low voltage analog circuit connected, the high voltage analog circuit being powered by a first power supply of the main power domain, the low voltage analog circuit, the digital control circuit, and the clock circuit being powered by a second power supply of the main power domain.
The low-power consumption sensing chip further comprises an interrupt control circuit powered by a second power supply of the main power domain, wherein the interrupt control circuit is connected with the communication register circuit and the digital control circuit, and the interrupt control circuit is also connected with an interrupt pin.
The communication register circuit is constructed based on a high threshold transistor.
The communication register circuit comprises an I2C interface and a register which are connected, wherein the I2C interface is connected with a communication pin, the communication pin comprises an SCL pin and an SDA pin of an I2C bus, and when the low-power consumption sensing chip is in a standby mode, the power management circuit and the communication register circuit work by means of an SCL clock of the I2C bus.
The beneficial technical effects of the invention are as follows:
the application discloses a clock-free standby low-power consumption sensing chip, which is internally divided into power domains, a power management circuit and a communication register circuit are placed in a normally-open power domain, and other circuits including a clock circuit are placed in a controllable power domain controlled by the power management circuit, so that the low-power consumption sensing chip can realize external communication and register configuration without requesting any on-chip clock in a standby mode, and the power consumption is effectively reduced.
Meanwhile, unlike the conventional method that all digital logic is placed in a low-voltage domain by a chip, a part of digital logic comprising a power management circuit and a communication register circuit is placed in a high-voltage domain, so that the part of digital logic does not need to be used for a voltage stabilizer, and leakage power consumption of the voltage stabilizer cannot be generated. Because the turnover rate of the logic is very low, the dynamic power consumption only occupies a small part of the total power consumption, the improvement of the dynamic power consumption is smaller than the saved leakage power consumption of the voltage stabilizer, and the final total power consumption is reduced.
Furthermore, the HVT transistor is adopted to realize the digital logic of the high-voltage domain, so that the leakage power consumption can be reduced on the basis of not influencing the operation of the chip, and finally, the power consumption of the digital logic of the high-voltage domain can be further reduced.
The controllable power domain can be further divided into a fuse power domain and a main power domain, and the fuse power domain can be completely powered off after the fuse circuit access is finished so as to achieve the effect of 0 power consumption. When the main power domain is powered on and enters a sensing mode, the fuse circuit is kept powered off, and the fuse circuit can be switched back to a standby mode from the sensing mode in time, so that the power consumption can be effectively reduced compared with a traditional chip.
Drawings
Fig. 1 is a schematic diagram of an internal structure of a low power consumption sensing chip of the present application.
Detailed Description
The following describes the embodiments of the present invention further with reference to the drawings.
The application discloses a low-power consumption sensing chip without clock standby, please refer to fig. 1, the low-power consumption sensing chip comprises: power management circuitry, communication register circuitry, sensing analog circuitry, digital control circuitry, clock circuitry, and fuse circuitry. The communication register circuit is connected with the communication pin, the communication register circuit is connected with the power management circuit, the digital control circuit and the fuse circuit, and the digital control circuit is connected with the sensing analog circuit. The low-power consumption sensing chip further comprises an interrupt control circuit, wherein the interrupt control circuit is connected with the communication register circuit and the digital control circuit, and the interrupt control circuit is further connected with the interrupt pin INT. Wherein:
(1) The communication register circuit comprises an I2C interface and a register which are connected, the I2C interface is connected with a communication pin, and the communication pin comprises an SCL pin and an SDA pin of an I2C bus. The I2C interface is used for external communication, and the register is used for storing configuration and state information.
(2) The sensing analog circuit mainly comprises a photodiode, an analog-to-digital converter and an LED driver, so that the sensing chip is realized as an infrared approaching and ambient light brightness sensing chip. The sensing analog circuit comprises a high-voltage analog circuit and a low-voltage analog circuit which are connected, wherein the high-voltage analog circuit mainly comprises an LED driver, and possibly further comprises an IO pin, a band-gap reference power supply and the like, and the low-voltage analog circuit mainly comprises a photodiode and an analog-to-digital converter.
(3) The digital control circuit comprises a state machine and corresponding control logic, and is used for managing the sensing analog circuit, the control data feedback and the like.
(4) The clock circuit is used for providing an on-chip clock and mainly comprises an oscillator and a clock controller, wherein the oscillator is used for generating the on-chip clock, and the clock controller is responsible for branching, starting/stopping, frequency division and generating reset signals of the on-chip clock.
(5) The fuse circuit includes a fuse controller and a fuse device, and the fuse controller is connected to the communication register circuit and the fuse device, respectively. The fuse device is only written once for storing the correction data, and the fuse controller generates an interface read-write signal timing of the fuse.
(6) The interrupt control circuit is used for generating interrupt signals at proper time and notifying an external microcontroller to perform corresponding processing through the interrupt pin INT.
The power management circuit and the communication register circuit are powered by a normally open power supply of the normally open power domain PD0, the sensing analog circuit, the digital control circuit, the clock circuit and the fuse circuit are powered by a power supply of the controllable power domain, and the on-off of the power supply of the controllable power domain is controlled by the power management circuit.
When the low-power consumption sensing chip is completely powered off, the normally open power supply of the normally open power supply domain PD0 and the power supply of the controllable power supply domain are powered off, and the normally open power supply domain PD0 is a high-voltage power supply domain, and is a 3.3V power supply domain in a typical mode. When the low-power consumption sensing chip supplies power normally, a normally open power supply of the normally open power supply domain PD0 is always started, the power management circuit controls the power supply of the controllable power supply domain to be disconnected, so that the low-power consumption sensing chip is in a standby mode, at the moment, other circuit structures except the communication registering circuit and the power management circuit are powered off, all logic is static and not turned over, a clock is static, and power consumption is reduced. But the low power consumption sensing chip performs external communication and/or register configuration by using a communication pin through a communication register circuit on the basis of no on-chip clock. That is, the low power consumption sensing chip can normally receive external instructions and register configuration processes in the standby mode without requesting any on-chip clock, and the power management circuit and the communication register circuit operate by means of the SCL clock of the I2C bus.
Further, the communication register circuit is constructed based on a high threshold (HVT) transistor, and since the communication register circuit operates at a very low frequency (< 10 MHz), the relatively slow speed of the HVT transistor cannot affect the chip, and the use of the HVT transistor can reduce leakage power consumption. In addition, the communication registering circuit and the power management circuit do not need to use a voltage stabilizer, so that leakage power consumption of the voltage stabilizer cannot be generated, the dynamic power consumption only occupies a small part of the total power consumption due to the fact that the turnover rate of the communication registering circuit and the power management circuit is low, the improvement of the dynamic power consumption is smaller than the saved leakage power consumption of the voltage stabilizer, and the total power consumption is reduced finally. Therefore, in the standby mode, the low-power consumption sensing chip can basically realize 0 dynamic power consumption and minimum leakage power consumption when no external access exists, and compared with the traditional operation mode, the power consumption is greatly reduced, and the power consumption can be reduced by more than 90% through actual measurement.
Further, the controllable power domains include a fuse power domain PD1 and a main power domain PD2, the fuse circuit is powered by the fuse power of the fuse power domain PD1, and the sensing analog circuit, the digital control circuit, the clock circuit, and the interrupt control circuit are powered by the main power of the main power domain PD 2. The voltage of the fuse power supply is equal to that of the normally open power supply and is also a high-voltage power supply domain, namely the 3.3V power supply domain. The main power supply of the main power supply domain comprises a first power supply and a second power supply which are in the same on-off state, the voltage of the first power supply is equal to that of the normally open power supply and is also a high-voltage power domain, and the voltage of the second power supply is lower than that of the normally open power supply and is a low-voltage power domain, so that the low-power consumption sensing chip further comprises a linear voltage stabilizer working in the main power supply domain, and the linear voltage stabilizer is used for converting the first power supply into the second power supply, such as a typical normally open power supply, a fuse power supply and the first power supply, wherein the voltage of the first power supply is 3.3V, and the voltage of the second power supply is 1.6V. The high voltage analog circuitry is powered by a first power supply of the main power domain, and the low voltage analog circuitry, the digital control circuitry, the clock circuitry, and the interrupt control circuitry are powered by a second power supply of the main power domain.
The power management circuit controls the on-off of the fuse power supply and the main power supply respectively, so that the working states of the fuse circuit and other circuits can be independently controlled. When the low-power consumption sensing chip is in a standby mode, the power management circuit controls the fuse power supply and the main power supply to be disconnected, so that the controllable power supply domain is disconnected. Since the fuse power domain PD1 and the main power domain PD2 can be independently controlled to operate, further, the low power consumption sensing chip further includes a fuse mode and a sensing mode:
When the low-power consumption sensing chip is in the fuse mode, the power management circuit controls the fuse power supply and the main power supply to be conducted, and the clock circuit working on the main power supply provides an on-chip clock for the fuse circuit at the moment, and the fuse circuit burns or reads fuse data. The fuse data is generally written only once in the production process, and is used for storing the fuse data and writing correction data. Reading fuse data is typically performed on chip power up, and calibration data is read. After the access to the fuse circuit is finished, the fuse power supply can be completely powered off to achieve the effect of 0 power consumption.
When the low-power consumption sensing chip is in the sensing mode, the power management circuit controls the fuse power supply to be disconnected and the main power supply to be conducted, all the circuits working in the main power supply domain PD2 work normally, and the low-power consumption sensing chip performs sensing operation, namely enters a normal working state.
Therefore, the low-power consumption sensing chip comprises four working modes: shut down mode, fuse mode, standby mode, and sense mode: in the off mode, the external power supply is turned off, and the normally open power domain PD0, the fuse power domain PD1, and the main power domain PD2 are all turned off. In the fuse mode, external power is turned on, and the normally-open power domain PD0, the fuse power domain PD1, and the main power domain PD2 are all turned on. In the standby mode, the external power supply is turned on, the normally open power domain PD0 is turned on, and both the fuse power domain PD1 and the main power domain PD2 are turned off. In the sensing mode, the external power is turned on, the normally open power domain PD0 and the main power domain PD2 are turned on, and the fuse power domain PD1 is kept turned off. Please refer to the following table.
When the low-power consumption sensing chip actually works, the low-power consumption sensing chip is in a closing mode when the low-power consumption sensing chip is completely powered off, and after normal power-on, the low-power consumption sensing chip generally enters a fuse mode to read fuse data. After the fuse data is read, the standby mode and the sensing mode are switched according to an external switching instruction received through the communication register circuit. In general, after the fuse data is read, the standby mode is first entered. The sensing mode is entered when an external switching instruction received through the communication registering circuit instructs to start sensing. And when the external switching instruction received by the communication register circuit indicates that the sensing is finished, the standby mode is re-entered in time to reduce the power consumption, so that the cycle is performed. And returning to the off mode until the low-power consumption sensing chip is powered down.
The above is only a preferred embodiment of the present application, and the present application is not limited to the above examples. It is to be understood that other modifications and variations which may be directly derived or contemplated by those skilled in the art without departing from the spirit and concepts of the present application are deemed to be included within the scope of the present application.
Claims (9)
1. A low power consumption sensing chip for clock-less standby, the low power consumption sensing chip comprising: the device comprises a power management circuit, a communication register circuit, a sensing analog circuit, a digital control circuit, a clock circuit and a fuse circuit, wherein the communication register circuit is connected with a communication pin, the communication register circuit is connected with the power management circuit, the digital control circuit and the fuse circuit, the digital control circuit is connected with the sensing analog circuit, and the clock circuit is used for providing an on-chip clock;
The sensing analog circuit, the digital control circuit, the clock circuit and the fuse circuit are powered by the power supply of the controllable power domain, and the on-off of the power supply of the controllable power domain is controlled by the power management circuit;
when the low-power consumption sensing chip is in a standby mode, the power management circuit controls the power supply of the controllable power domain to be disconnected, other circuit structures except the communication register circuit and the power management circuit in the low-power consumption sensing chip are powered off, and the low-power consumption sensing chip performs external communication and/or register configuration by utilizing the communication pins through the communication register circuit on the basis of no on-chip clock.
2. The low power consumption sensing chip of claim 1, wherein the controllable power domain comprises a fuse power domain and a main power domain, the fuse circuit is powered by a fuse power of the fuse power domain, the sensing analog circuit, the digital control circuit and the clock circuit are powered by a main power of the main power domain, the power management circuit controls on-off of the fuse power and the main power respectively, and when the low power consumption sensing chip is in a standby mode, the power management circuit controls both the fuse power and the main power to be turned off.
3. The low power consumption sensing chip of claim 2, wherein,
When the low-power consumption sensing chip is in a fuse mode, the power management circuit controls the fuse power supply and the main power supply to be conducted, the clock circuit provides an on-chip clock for the fuse circuit, and the fuse circuit burns or reads fuse data;
When the low-power consumption sensing chip is in a sensing mode, the power management circuit controls the fuse power supply to be disconnected and the main power supply to be conducted, and the low-power consumption sensing chip executes sensing operation.
4. The low power consumption sensing chip of claim 3, wherein the low power consumption sensing chip enters a fuse mode to read fuse data after power-up, and switches between a standby mode and a sensing mode according to an external switching instruction received through the communication register circuit after the fuse data is read.
5. The low power consumption sensing chip of claim 2, wherein the fuse power supply has a voltage equal to the normally open power supply, the fuse circuit including a fuse controller and a fuse device, the fuse controller being connected to the communication register circuit and the fuse device, respectively.
6. The low power consumption sensing chip according to claim 2, wherein the main power supply of the main power supply domain comprises a first power supply and a second power supply with the same on-off state, the voltage of the first power supply is equal to the normally open power supply, the voltage of the second power supply is lower than the normally open power supply, and the low power consumption sensing chip further comprises a linear voltage stabilizer working in the main power supply domain, wherein the linear voltage stabilizer is used for converting the first power supply into the second power supply;
the sensing analog circuit includes a high voltage analog circuit and a low voltage analog circuit connected, the high voltage analog circuit being powered by a first power supply of the main power domain, the low voltage analog circuit, the digital control circuit, and the clock circuit being powered by a second power supply of the main power domain.
7. The low power consumption sensing chip of claim 6, further comprising an interrupt control circuit powered by the second power supply of the main power domain, the interrupt control circuit connecting the communication registering circuit and the digital control circuit, the interrupt control circuit further connecting an interrupt pin.
8. The low power consumption sensing chip according to any one of claims 1-7, wherein the communication registering circuit is constructed based on a high threshold transistor.
9. The low power consumption sensing chip according to any one of claims 1-7, wherein the communication registering circuit comprises an I2C interface and a register connected, the I2C interface is connected to the communication pin, the communication pin comprises an SCL pin and an SDA pin of an I2C bus, and the power management circuit and the communication registering circuit operate on an SCL clock of the I2C bus when the low power consumption sensing chip is in a standby mode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110966699.7A CN113595053B (en) | 2021-08-23 | Low-power consumption sensing chip without clock standby |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110966699.7A CN113595053B (en) | 2021-08-23 | Low-power consumption sensing chip without clock standby |
Publications (2)
| Publication Number | Publication Date |
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| CN113595053A CN113595053A (en) | 2021-11-02 |
| CN113595053B true CN113595053B (en) | 2024-07-02 |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102902350A (en) * | 2012-11-13 | 2013-01-30 | 江苏东大集成电路系统工程技术有限公司 | Chip extra-low in standby power consumption |
| JP2020119187A (en) * | 2019-01-23 | 2020-08-06 | ルネサスエレクトロニクス株式会社 | Semiconductor device and semiconductor system |
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102902350A (en) * | 2012-11-13 | 2013-01-30 | 江苏东大集成电路系统工程技术有限公司 | Chip extra-low in standby power consumption |
| JP2020119187A (en) * | 2019-01-23 | 2020-08-06 | ルネサスエレクトロニクス株式会社 | Semiconductor device and semiconductor system |
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