CN113594317B - Ultraviolet light emitting diode epitaxial wafer capable of reducing working voltage and preparation method thereof - Google Patents

Abstract

The present disclosure provides an ultraviolet light emitting diode epitaxial wafer with reduced operating voltage and a preparation method thereof, belonging to the technical field of light emitting diodes. A p-type composite contact layer is added between the p-type AlGaN layer and the indium tin oxide layer. The p-type composite contact layer includes a Mg contact sublayer, a MgN sublayer, a p-type GaN sublayer and a p-type AlGaN layer sequentially stacked on the p-type AlGaN layer. type InGaN sublayer. The Mg contact sublayer reduces resistance and increases hole concentration. The MgN sublayer has higher hole concentration and lower overall resistance. The MgN sublayer transitions to the p-type GaN sublayer and the p-type InGaN sublayer, and the resistance decreases. The overall bulk resistance of the light emitting diode epitaxial wafer is reduced, thereby reducing the working voltage of the finally obtained ultraviolet light emitting diode chip, and improving the service life of the ultraviolet light emitting diode chip.

Description

Ultraviolet light-emitting diode epitaxial wafer with reduced operating voltage and preparation method thereof

technical field

The present disclosure relates to the technical field of light-emitting diodes, and in particular, to an ultraviolet light-emitting diode epitaxial wafer with reduced operating voltage and a preparation method thereof.

Background technique

Ultraviolet light emitting diode is a light-emitting product used for light curing. It is often used for sterilization and disinfection, curing of food sealing materials, curing of medical glue, etc. Ultraviolet light emitting diode epitaxial wafers are the basic structure for preparing ultraviolet light emitting diodes. Ultraviolet light emitting diode epitaxial wafers generally include a substrate and an n-type AlGaN layer, a multiple quantum well layer, a p-type AlGaN layer, a p-type GaN contact layer and an indium tin oxide layer grown on the substrate.

In the process of preparing the UV light emitting diode epitaxial wafer into a UV light emitting diode chip, a p electrode needs to be prepared on the surface of the p-type contact layer, and the p electrode conducts the current to the indium tin oxide layer and the p-type GaN contact layer to realize current conduction and The pn junction emits light. However, the ohmic contact between the p-type GaN contact layer and the indium tin oxide layer is relatively high, which will increase the overall bulk resistance of the UV LED chip. The increase of the working voltage reduces the service life of the UV light emitting diode chip.

SUMMARY OF THE INVENTION

The embodiments of the present disclosure provide an ultraviolet light emitting diode epitaxial wafer with reduced working voltage and a preparation method thereof, which can reduce the working voltage of the ultraviolet light emitting diode chip and improve the service life of the ultraviolet light emitting diode chip. The technical solution is as follows:

Embodiments of the present disclosure provide an ultraviolet light emitting diode epitaxial wafer capable of reducing operating voltage. The ultraviolet light emitting diode epitaxial wafer with reduced operating voltage includes a substrate, an n-type AlGaN layer, a multiple quantum well layer stacked on the substrate in sequence layer, p-type AlGaN layer, p-type composite contact layer and indium tin oxide layer,

The p-type composite contact layer includes a Mg contact sub-layer, a MgN sub-layer, a p-type GaN sub-layer and a p-type InGaN sub-layer that are sequentially stacked on the p-type AlGaN layer, and the Mg contact sub-layer includes a plurality of mutual Mg metal islands spaced apart and stacked on the p-type AlGaN layer;

An indium tin oxide layer is grown on the p-type composite contact layer.

Optionally, the ratio of the thickness of the Mg contact sublayer to the thickness of the MgN sublayer is 1:1 to 1:2.

Optionally, the thickness of the Mg contact sub-layer is 10-50 nm, and the thickness of the MgN sub-layer is 20-50 nm.

Optionally, the distance between two adjacent Mg metal islands is 0.5-3 nm.

Optionally, the thickness of the MgN sublayer is less than or equal to the thickness of the p-type GaN sublayer.

Optionally, the thickness of the p-type GaN sublayer is smaller than the thickness of the p-type InGaN sublayer.

Optionally, the thickness of the p-type GaN sub-layer is 20-50 nm, and the thickness of the p-type InGaN sub-layer is 50-100 nm.

Optionally, the p-type impurities in the p-type GaN sub-layer and the p-type InGaN sub-layer are both Mg, and the doping concentration of Mg in the p-type GaN sub-layer is smaller than that in the p-type InGaN sub-layer. Mg doping concentration.

Embodiments of the present disclosure provide a method for preparing a UV light emitting diode epitaxial wafer with reduced operating voltage, and the method for preparing an ultraviolet light emitting diode epitaxial wafer with reduced operating voltage includes:

providing a substrate;

growing an n-type AlGaN layer on the substrate;

growing a multiple quantum well layer on the n-type AlGaN layer;

growing a p-type AlGaN layer on the multiple quantum well layer;

A p-type composite contact layer is grown on the p-type AlGaN layer, and the material of the p-type composite contact layer includes a Mg contact sub-layer, a MgN sub-layer, and a p-type GaN sub-layer sequentially stacked on the p-type AlGaN layer with a p-type InGaN sublayer, the Mg contact sublayer includes a plurality of Mg metal islands spaced apart from each other and stacked on the p-type AlGaN layer;

An indium tin oxide layer is grown on the p-type composite contact layer.

Optionally, growing a p-type composite contact layer on the p-type AlGaN layer, including:

Passing a Mg source with a flow rate of 100-600 sccm for 10-60 s into the reaction chamber to form a plurality of mutually spaced Mg metal islands on the p-type AlGaN layer to obtain the Mg contact sublayer;

A MgN sub-layer, a p-type GaN sub-layer and a p-type InGaN sub-layer are sequentially grown on the Mg metal sub-layer.

The beneficial effects brought by the technical solutions provided by the embodiments of the present disclosure include:

A p-type composite contact layer is added between the p-type AlGaN layer and the indium tin oxide layer. The p-type composite contact layer includes a Mg contact sublayer, a MgN sublayer, a p-type GaN sublayer and a p-type AlGaN layer sequentially stacked on the p-type AlGaN layer. type InGaN sublayer. The Mg contact sublayer on the p-type AlGaN layer includes a plurality of Mg metal islands spaced from each other and stacked on the p-type AlGaN layer. The Mg metal islands have the effect of reducing resistance, and the Mg in the Mg metal islands can penetrate into the p-type AlGaN layer. , play a role in increasing the hole concentration. The MgN sublayer on the Mg contact sublayer can achieve a good transition with the Mg contact sublayer, and the material properties of the MgN sublayer also make the MgN sublayer have a higher hole concentration and lower overall resistance. The transition from the MgN sub-layer to the p-type GaN sub-layer and the p-type InGaN sub-layer in turn can ensure the quality of the p-type GaN sub-layer and the p-type InGaN sub-layer grown on the MgN sub-layer. Having In element can improve the degree of lattice matching with the indium tin oxide layer to improve the quality of the indium tin oxide layer grown on the p-type InGaN sublayer. In addition, the ohmic contact between the p-type InGaN sublayer and the indium tin oxide layer is small, and the resistance of the ohmic contact between the p-type InGaN sublayer and the indium tin oxide layer is also reduced. The overall quality of the p-type composite contact layer is good, the overall hole concentration is high, and the resistance of the ohmic contact between the p-type InGaN sublayer and the indium tin oxide layer is reduced, which can make the overall bulk resistance of the light-emitting diode epitaxial wafer. lowering, thereby reducing the working voltage of the finally obtained ultraviolet light emitting diode chip, and improving the service life of the ultraviolet light emitting diode chip.

Description of drawings

In order to illustrate the technical solutions in the embodiments of the present disclosure more clearly, the following briefly introduces the accompanying drawings used in the description of the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present disclosure. For those of ordinary skill in the art, other drawings can also be obtained from these drawings without creative effort.

1 is a schematic structural diagram of an ultraviolet light emitting diode epitaxial wafer with reduced operating voltage provided by an embodiment of the present disclosure;

2 is a schematic structural diagram of another UV light emitting diode epitaxial wafer with reduced operating voltage provided by an embodiment of the present disclosure;

3 is a flow chart of a method for preparing a UV light emitting diode epitaxial wafer with reduced operating voltage provided by an embodiment of the present disclosure;

FIG. 4 is a flowchart of another method for fabricating an ultraviolet light emitting diode epitaxial wafer with reduced operating voltage provided by an embodiment of the present disclosure.

Detailed ways

In order to make the objectives, technical solutions and advantages of the present disclosure clearer, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.

FIG. 1 is a schematic structural diagram of an ultraviolet light emitting diode epitaxial wafer with reduced operating voltage provided by an embodiment of the present disclosure. As shown in FIG. 1 , an embodiment of the present disclosure provides an ultraviolet light emitting diode epitaxial wafer with reduced operating voltage, which reduces the operating voltage. The voltage ultraviolet light emitting diode epitaxial wafer includes a substrate 1 and an n-type AlGaN layer 2, a multiple quantum well layer 3, a p-type AlGaN layer 4, a p-type composite contact layer 5 and an indium tin oxide layer 6 stacked on the substrate 1 in sequence. .

The p-type composite contact layer 5 includes a Mg contact sub-layer 51 , a MgN sub-layer 52 , a p-type GaN sub-layer 53 and a p-type InGaN sub-layer 54 sequentially stacked on the p-type AlGaN layer 4 , and the Mg contact sub-layer 51 includes a plurality of Mg metal islands 511 spaced from each other and stacked on the p-type AlGaN layer 4 .

A p-type composite contact layer 5 is added between the p-type AlGaN layer 4 and the indium tin oxide layer 6. The p-type composite contact layer 5 includes a Mg contact sublayer 51, a MgN sublayer 52, The p-type GaN sublayer 53 and the p-type InGaN sublayer 54 . The Mg contact sublayer 51 on the p-type AlGaN layer 4 includes a plurality of Mg metal islands 511 spaced from each other and stacked on the p-type AlGaN layer 4 , the Mg metal islands 511 have the effect of reducing resistance, and the Mg metal islands 511 in the Mg metal islands 511 It can infiltrate into the p-type AlGaN layer 4 to increase the hole concentration. The MgN sublayer 52 on the Mg contact sublayer 51 can achieve a good transition with the Mg contact sublayer 51, and the characteristics of the material itself of the MgN sublayer 52 also make the MgN sublayer 52 have a higher hole concentration and Overall resistance is low. From the MgN sublayer 52 to the p-type GaN sublayer 53 and the p-type InGaN sublayer 54, the quality of the p-type GaN sublayer 53 and the p-type InGaN sublayer 54 grown on the MgN sublayer 52 can be guaranteed, while the Having In element in the p-type InGaN sub-layer 54 can improve the lattice matching degree with the indium tin oxide layer 6 to improve the quality of the indium tin oxide layer 6 grown on the p-type InGaN sub-layer 54 . In addition, the ohmic contact between the p-type InGaN sub-layer 54 and the indium tin oxide layer 6 is small, and the resistance of the ohmic contact between the p-type InGaN sub-layer 54 and the indium tin oxide layer 6 is also reduced. The overall quality of the p-type composite contact layer 5 is good, the overall hole concentration is high, and the resistance of the ohmic contact between the p-type InGaN sublayer 54 and the indium tin oxide layer 6 is reduced, all of which can make the light-emitting diode epitaxial wafer as a whole. The volume resistance of the ultraviolet light emitting diode chip is reduced, thereby reducing the working voltage of the finally obtained ultraviolet light emitting diode chip, and improving the service life of the ultraviolet light emitting diode chip. In fact, the increase of the plurality of Mg metal islands 511 can increase the roughness of the surface of the p-type AlGaN layer 4 to a certain extent, so as to improve the possible diffuse reflection of light on the surface of the p-type AlGaN layer 4, and reduce the light in the p-type AlGaN layer 4. The total reflection of the surface of the AlGaN layer 4 increases the luminous efficiency of the ultraviolet light emitting diode chip.

It should be noted that if the overall quality of the p-type composite contact layer 5 is good, the defects existing in the p-type composite contact layer 5 will be small, and the possibility of the defects trapping carriers is low, so the carrier flow velocity is affected by the defects. The influence of , the increase of the carrier flow velocity is equivalent to the decrease of the resistance to a certain extent, and the carriers include electrons and holes. The increase of hole concentration can also reduce the resistance to some extent.

Optionally, the distance between two adjacent Mg metal islands 511 is 0.5˜3 nm.

When the distance between the two adjacent Mg metal islands 511 is within the above range, the Mg metal islands 511 in the Mg contact sub-layer 51 have a better roughening effect on the surface of the p-type AlGaN layer 4, which can effectively improve the ultraviolet Luminous efficiency of light-emitting diode epitaxial wafers. In addition, the bulk resistance of the p-type AlGaN layer 4 and the p-type composite contact layer 5 can be effectively reduced.

It should be noted that the distance between two adjacent Mg metal islands 511 is the distance between the two closest points on the two adjacent Mg metal islands 511 .

Exemplarily, the ratio of the thickness of the Mg contact sub-layer 51 to the thickness of the MgN sub-layer 52 is 1:1˜1:2.

When the ratio of the thickness of the Mg contact sub-layer 51 to the thickness of the MgN sub-layer 52 is within the above range, it can be ensured that the Mg contact sub-layer 51 can effectively transition to the MgN sub-layer 52, and the quality of the MgN sub-layer 52 itself is good, so that the It is ensured that the quality of the finally obtained p-type composite contact layer 5 is good.

Illustratively, the thickness of the MgN sublayer 52 is less than or equal to the thickness of the p-type GaN sublayer 53 .

The thickness of the MgN sub-layer 52 is less than or equal to the thickness of the p-type GaN sub-layer 53, so that the transition from the MgN sub-layer 52 to the p-type GaN sub-layer 53 can ensure that the quality of the p-type GaN sub-layer 53 itself is good, and p The thickness of the p-type GaN sub-layer 53 is relatively thick, which can ensure the quality of the p-type InGaN sub-layer 54 grown on the p-type GaN sub-layer 53 .

Optionally, the thickness of the Mg contact sub-layer 51 is 10-50 nm, and the thickness of the MgN sub-layer 52 is 20-50 nm.

When the thickness of the Mg contact sub-layer 51 and the thickness of the MgN sub-layer 52 are respectively within the above ranges, the quality of the Mg contact sub-layer 51 and the MgN sub-layer 52 themselves are good, and the MgN sub-layer 52 can also be the subsequent p-type GaN The growth of the sublayer 53 provides a good growth basis to ensure that the quality of the p-type composite contact layer 5 finally obtained is good.

Illustratively, the thickness of the p-type GaN sublayer 53 is smaller than the thickness of the p-type InGaN sublayer 54 .

After the p-type GaN sub-layer 53 plays a transitional role, a p-type InGaN sub-layer 54 with a larger thickness is grown on the p-type GaN sub-layer 53. On the one hand, the cost control is reasonable, and on the other hand, the p-type InGaN with a larger thickness is grown. The quality of the sub-layer 54 itself is good, and the p-type InGaN sub-layer 54 can also achieve good transition and matching with the indium tin oxide layer 6 .

Optionally, the thickness of the p-type GaN sub-layer 53 is 20-50 nm, and the thickness of the p-type InGaN sub-layer 54 is 50-100 nm.

When the thickness of the p-type GaN sub-layer 53 and the thickness of the p-type InGaN sub-layer 54 are respectively within the above ranges, it can meet the fabrication specifications of most ultraviolet light emitting diode epitaxial wafers, and the p-type GaN sub-layer 53 and the p-type InGaN sub-layer 54 itself is of better quality.

Optionally, the p-type impurities in the p-type GaN sub-layer 53 and the p-type InGaN sub-layer 54 are both Mg, and the doping concentration of Mg in the p-type GaN sub-layer 53 is smaller than the doping concentration of Mg in the p-type InGaN sub-layer 54 concentration.

The doping concentration of Mg in the p-type GaN sub-layer 53 and the doping concentration of Mg in the p-type InGaN sub-layer 54 conform to the magnitude relationship in the previous paragraph, which can ensure that the gap between the p-type GaN sub-layer 53 and the p-type InGaN sub-layer 54 is guaranteed. The matching degree is good, and it can also promote the movement of holes toward the multiple quantum well layer 3, and improve the luminous efficiency of the finally obtained ultraviolet light emitting diode chip.

Exemplarily, the doping concentration of Mg in the p-type GaN sublayer 53 is 1×E21˜1×E22 cm ⁻³ , and the doping concentration of Mg in the p-type InGaN sublayer 54 is 1×E21˜1×E22 cm ⁻³ .

The doping concentration of Mg in the p-type GaN sub-layer 53 and the doping concentration of Mg in the p-type InGaN sub-layer 54 are respectively within the above ranges, which can ensure the matching between the p-type GaN sub-layer 53 and the p-type InGaN sub-layer 54 The quality of the p-type GaN sub-layer 53 and the p-type InGaN sub-layer 54 is good, and it can also promote the movement of a large number of holes toward the multiple quantum well layer 3, thereby improving the luminous efficiency of the final UV LED chip. .

Optionally, the composition of In in the p-type InGaN sublayer 54 is 2˜3×E2 cm ⁻³ .

When the composition of In in the p-type InGaN sub-layer 54 is within the above range, the p-type InGaN sub-layer 54 can achieve good matching and contact with the indium tin oxide layer 6, thereby improving the final p-type InGaN sub-layer 54 and The quality of the indium tin oxide layer 6 can also reduce the contact resistance between the p-type InGaN sub-layer 54 and the indium tin oxide layer 6 .

Exemplarily, the thickness of the indium tin oxide layer 6 is 10˜20 nm.

When the thickness of the indium tin oxide layer 6 is within the above range, the quality of the obtained light-emitting diode epitaxial wafer is good, and the preparation cost of the indium tin oxide layer 6 itself is relatively low.

FIG. 2 is a schematic structural diagram of another ultraviolet light emitting diode epitaxial wafer with reduced operating voltage provided by the embodiment of the present disclosure. Referring to FIG. 2, it can be seen that in another implementation manner provided by the embodiment of the present disclosure, the ultraviolet light emitting diode epitaxial wafer can be It includes a substrate 1 and a buffer layer 7, an undoped AlGaN layer 8, an n-type AlGaN layer 2, a multiple quantum well layer 3, an electron blocking layer 9, a p-type AlGaN layer 4, and a p-type composite layer stacked on the substrate 1 in sequence. Contact layer 5 and indium tin oxide layer 6 .

It should be noted that the structure of the p-type composite contact layer 5 and the structure of the indium tin oxide layer 6 in FIG. 2 are respectively the same as the structure of the p-type composite contact layer 5 and the structure of the indium tin oxide layer 6 shown in FIG. 1 . are the same, so they are not repeated here.

Illustratively, the buffer layer 7 is an AlN layer. The lattice mismatch between the substrate 1 and the structure after the buffer layer 7 can be effectively alleviated.

Optionally, the thickness of the buffer layer 7 is 15-35 nm. The lattice mismatch can be effectively alleviated without excessively increasing the fabrication cost.

Alternatively, the thickness of the undoped AlGaN layer 8 may be 0.1 to 3.0 microns.

The thickness of the undoped AlGaN layer 8 is appropriate, the cost is reasonable, and the quality of the ultraviolet light emitting diode can be effectively improved.

Optionally, the thickness of the n-type AlGaN layer 2 may be between 1.5 and 3.5 microns.

The n-type AlGaN layer 2 can reasonably provide carriers, and the quality of the n-type AlGaN layer 2 itself is also good.

Exemplarily, the n-type element doped in the n-type AlGaN layer 2 may be Si element.

Illustratively, the multiple quantum well layer 3 may be a multiple quantum well structure. The multiple quantum well layer 3 includes alternately stacked GaN layers 31 and AlxGa1-xN layers 32, where 0<x<0.3. The luminous efficiency is better.

The number of layers of the GaN layer 31 and the AlxGa1-xN layer 32 may be the same, and the number of layers may be 4 to 12. The quality of the obtained multiple quantum well layer 3 is good, and the cost is also reasonable.

Optionally, the thickness of the GaN layer 31 may be about 3 nm, and the thickness of the AlxGa1-xN layer 32 may be between 8 nm and 20 nm. Carriers can be efficiently captured and emitted.

Exemplarily, the electron blocking layer 9 may be a P-type _{AlyGa1 -yN} layer 0.2<y<0.5, and the thickness of the P-type _{AlyGa1 -yN} layer may be between 15 nm and 60 nm. The effect of blocking electrons is better.

Optionally, the thickness of the p-type AlGaN layer 4 is 50-300 nm. The overall quality of the obtained p-type AlGaN layer 4 is good.

Compared with the UV light emitting diode epitaxial wafer shown in FIG. 1 , the UV light emitting diode epitaxial wafer shown in FIG. 2 is added with a buffer layer 7 , an undoped AlGaN layer 8 , and an electron blocking layer 9 and other hierarchical structures, and finally obtained UV light emission The quality of the diode can be further improved.

FIG. 2 is only an implementation manner of the ultraviolet light emitting diode provided by the embodiment of the present disclosure. In other implementation manners provided by the present disclosure, the ultraviolet light emitting diode may also be other forms of ultraviolet light emitting diodes including a reflective layer. The present disclosure There is no restriction on this.

3 is a flowchart of a method for preparing a UV light emitting diode epitaxial wafer with reduced operating voltage provided by an embodiment of the present disclosure. As shown in FIG. 3 , the method for preparing an ultraviolet light emitting diode epitaxial wafer with reduced operating voltage includes:

S101: Provide a substrate.

S102: growing an n-type AlGaN layer on the substrate.

S103 : growing a multiple quantum well layer on the n-type AlGaN layer.

S104: A p-type AlGaN layer is grown on the multiple quantum well layer.

S105 : growing a p-type composite contact layer on the p-type AlGaN layer, the material of the p-type composite contact layer includes a Mg contact sublayer, a MgN sublayer, a p-type GaN sublayer and a p-type InGaN layer stacked on the p-type AlGaN layer in sequence The sublayer, the Mg contact sublayer includes a plurality of Mg metal islands spaced from each other and stacked on a p-type AlGaN layer.

S106 : growing an indium tin oxide layer on the p-type composite contact layer.

The technical effect of the preparation method of the UV light emitting diode epitaxial wafer with reduced operating voltage shown in FIG. 3 is the same as the technical effect corresponding to the structure of the UV light emitting diode epitaxial wafer with reduced operating voltage shown in FIG. 1 . Therefore, as shown in FIG. 3 The technical effect of the preparation method can refer to the technical effect shown in FIG. 1 , which will not be repeated here.

Exemplarily, in step S105, growing a p-type composite contact layer on the p-type AlGaN layer, including:

Passing a Mg source with a flow rate of 100-600 sccm for 10-60 s into the reaction chamber to form a plurality of mutually spaced Mg metal islands on the p-type AlGaN layer to obtain a Mg contact sub-layer; grow sequentially on the Mg metal sub-layer MgN sublayer, p-type GaN sublayer, and p-type InGaN sublayer.

Passing a Mg source with a flow rate of 100-600 sccm for 10-60 s into the reaction chamber can obtain Mg metal islands with better quality and stable shape, and the quality of the Mg contact sublayer is also better, which can ensure the stability of the subsequent structure. grow.

Optionally, the growth temperature and growth pressure of the p-type composite contact layer are 1100-1300° C. and 100-200 torr, respectively.

The overall growth of the p-type composite contact layer is carried out under the condition of high temperature and low pressure. On the one hand, the growth efficiency and growth quality of the p-type composite contact layer itself can be guaranteed. Both p-type impurities and In atoms in the p-type InGaN sublayer can better penetrate into the unit cell of the level, improve the final p-type composite contact layer and ensure the hole concentration in the p-type composite contact layer. Matching of the indium tin oxide layer.

It should be noted that, the MgN sublayer, the p-type GaN sublayer and the p-type InGaN sublayer in the p-type composite contact layer can be grown by feeding the relevant reaction gas and metal organic source into the reaction chamber.

FIG. 4 is a flowchart of another method for preparing a UV light emitting diode epitaxial wafer with reduced working voltage provided by an embodiment of the present disclosure. As shown in FIG. 4 , the preparation method of the UV light emitting diode epitaxial wafer with reduced working voltage includes:

S201: Provide a substrate.

Alternatively, the substrate may be a sapphire substrate.

S202 : growing a buffer layer on the substrate, and the buffer layer is an AlN layer.

The AlN layer in step S202 can be obtained by magnetron sputtering,

Optionally, the sputtering temperature of the AlN layer is 400˜700° C., the sputtering power is 3000˜5000 W, and the pressure is 1˜10 torr. A better quality buffer layer can be obtained.

Optionally, step S202 further includes: performing in-situ annealing treatment on the buffer layer at a temperature of 1000°C to 1200°C, a pressure range of 150 Torr to 500 Torr, and a time between 5 minutes and 10 minutes. The crystal quality of the buffer layer can be further improved.

S203 : growing an undoped AlGaN layer on the buffer layer.

Optionally, the growth temperature of the undoped AlGaN layer is 1000° C.-1200° C., and the pressure is 50-200 torr. The quality of the obtained undoped AlGaN layer is better, and the crystal quality of the finally obtained ultraviolet light emitting diode can be improved.

Optionally, the undoped AlGaN layer is grown to a thickness between 0.1 and 3.0 microns. The crystal quality of the finally obtained ultraviolet light emitting diode can be improved.

S204: growing an n-type AlGaN layer on the undoped AlGaN layer.

Optionally, the n-type layer is a Si-doped n-type AlGaN layer. Easy to prepare and obtain.

Optionally, the growth temperature of the n-type AlGaN layer is 1000°C-1200°C, and the pressure is 50-200 torr. The quality of the obtained n-type AlGaN layer is better, and the crystal quality of the finally obtained ultraviolet light emitting diode can be improved.

Illustratively, the n-type AlGaN layer is grown to a thickness of between 1 and 4.0 microns. The crystal quality of the finally obtained ultraviolet light emitting diode can be improved.

Exemplarily, in the n-type AlGaN layer, the Si doping concentration is between 10 ¹⁸ cm ⁻³ and 10 ²⁰ cm ⁻³ .

S205 : growing a multiple quantum well layer on the n-type AlGaN layer.

Alternatively, the multiple quantum well layer may include a multiple quantum well structure. The multiple quantum well layer includes a plurality of alternately stacked GaN layers and AlxGa1 _{- xN} layers 0<x<0.3.

Exemplarily, the growth temperature of the GaN layer is in the range of 850°C to 950°C, and the pressure is in the range of 100 Torr to 300 Torr; the growth temperature of the AlxGa1 _{- xN} layer is in the range of 900°C to 1000°C, and the growth pressure is in the range of 50 Torr. between 200 Torr. A multiple quantum well layer with better quality can be obtained.

Optionally, the thickness of the well of the GaN layer is about 3 nm, and the thickness of the barrier is between 8 nm and 20 nm. The quality of the obtained multiple quantum well layer is good and the cost is reasonable.

S206: growing an electron blocking layer on the multiple quantum well layer.

Alternatively, the electron blocking layer may be a p-type _{AlyGa1 -yN} layer 0.2<y<0.5.

Optionally, the growth temperature of the p-type _{AlyGa1 -yN} layer is 900°C-1050°C, and the pressure is 50-200 torr. The quality of the obtained p-type doped AlGaN layer is better, and the crystal quality of the finally obtained ultraviolet light emitting diode can be improved.

Exemplarily, the p-type doped AlGaN layer is grown to a thickness between 15 and 60 nanometers. The crystal quality of the finally obtained ultraviolet light emitting diode can be improved.

S207: A p-type AlGaN layer is grown on the electron blocking layer.

Optionally, the growth temperature of the p-type AlGaN layer is 850° C.-1050° C., and the pressure is 50-200 torr. The quality of the obtained p-type AlGaN layer is better, and the crystal quality of the finally obtained ultraviolet light emitting diode can be improved.

Exemplarily, the p-type AlGaN layer is grown to a thickness between 100 and 300 nanometers. The crystal quality of the finally obtained ultraviolet light emitting diode can be improved.

S208: growing a p-type composite contact layer on the p-type AlGaN layer.

For step S208, reference may be made to step S105 in FIG. 3 , so the description of step S208 will not be repeated here.

S209 : growing an indium tin oxide layer on the p-type composite contact layer.

The growth temperature and growth pressure of the indium tin oxide layer can be respectively 650-700° C. and 200-250 Torr. A better quality indium tin oxide layer can be obtained.

The structure of the UV light emitting diode epitaxial wafer with reduced operating voltage after step S209 is performed can be seen in FIG. 2 .

It should be noted that, in the embodiments of the present disclosure, a VeecoK 465i or C4 or RB MOCVD (MetalOrganic Chemical Vapor Deposition, metal organic compound chemical vapor deposition) equipment is used to realize the LED growth method. Use high-purity _H2 (hydrogen) or high-purity _N2 (nitrogen) or a mixture of high-purity _H2 and high-purity _N2 as carrier gas, high-purity _NH3 as N source, trimethylgallium (TMGa) and trimethylgallium Ethyl gallium (TEGa) as the gallium source, trimethylindium (TMIn) as the indium source, silane (SiH4) as the N-type dopant, trimethylaluminum (TMAl) as the aluminum source, and dicocene (CP ₂ Mg) ) as a P-type dopant.

The above is not intended to limit the present disclosure in any form. Although the present disclosure has been disclosed as above through the examples, it is not intended to limit the present disclosure. Any person skilled in the art, without departing from the scope of the technical solutions of the present disclosure, can The technical contents disclosed above are used to make some changes or modifications to equivalent embodiments with equivalent changes, but any simple modifications and equivalent changes made to the above embodiments according to the technical essence of the present disclosure without departing from the content of the technical solutions of the present disclosure and modification, all still belong to the scope of the technical solution of the present disclosure.

Claims (10)

1. The ultraviolet light-emitting diode epitaxial wafer for reducing the working voltage is characterized by comprising a substrate, and an n-type AlGaN layer, a multi-quantum well layer, a p-type AlGaN layer, a p-type composite contact layer and an indium tin oxide layer which are sequentially laminated on the substrate,

the p-type composite contact layer comprises an Mg contact sublayer, an MgN sublayer, a p-type GaN sublayer and a p-type InGaN sublayer which are sequentially stacked on the p-type AlGaN layer, and the Mg contact sublayer comprises a plurality of Mg metal islands which are spaced from each other and stacked on the p-type AlGaN layer.

2. The ultraviolet light-emitting diode epitaxial wafer as claimed in claim 1, wherein the ratio of the thickness of the Mg contact sub-layer to the thickness of the MgN sub-layer is 1: 1-1: 2.

3. The ultraviolet light-emitting diode epitaxial wafer as claimed in claim 1, wherein the thickness of the Mg contact sub-layer is 10-50 nm, and the thickness of the MgN sub-layer is 20-50 nm.

4. The ultraviolet light-emitting diode epitaxial wafer as claimed in any one of claims 1 to 3, wherein the distance between two adjacent Mg metal islands is 0.5 to 3 nm.

5. The ultraviolet light emitting diode epitaxial wafer as claimed in any one of claims 1 to 3, wherein the thickness of the MgN sub-layer is less than or equal to that of the p-type GaN sub-layer.

6. The ultraviolet light emitting diode epitaxial wafer as claimed in any one of claims 1 to 3, wherein the thickness of the p-type GaN sub-layer is smaller than that of the p-type InGaN sub-layer.

7. The ultraviolet light emitting diode epitaxial wafer according to any one of claims 1 to 3, wherein the thickness of the p-type GaN sub-layer is 20 to 50nm, and the thickness of the p-type InGaN sub-layer is 50to 100 nm.

8. The ultraviolet light emitting diode epitaxial wafer as claimed in any one of claims 1 to 3, wherein both p-type impurities in the p-type GaN sub-layer and the p-type InGaN sub-layer are Mg, and the doping concentration of Mg in the p-type GaN sub-layer is less than that of Mg in the p-type InGaN sub-layer.

9. The preparation method of the ultraviolet light emitting diode epitaxial wafer capable of reducing the working voltage is characterized by comprising the following steps of:

providing a substrate;

growing an n-type AlGaN layer on the substrate;

growing a multi-quantum well layer on the n-type AlGaN layer;

growing a p-type AlGaN layer on the multi-quantum well layer;

growing a p-type composite contact layer on the p-type AlGaN layer, wherein the p-type composite contact layer is made of a material comprising a Mg contact sub-layer, a MgN sub-layer, a p-type GaN sub-layer and a p-type InGaN sub-layer which are sequentially stacked on the p-type AlGaN layer, and the Mg contact sub-layer comprises a plurality of Mg metal islands which are spaced from each other and stacked on the p-type AlGaN layer;

and growing an indium tin oxide layer on the p-type composite contact layer.

10. The method of claim 9, wherein growing a p-type composite contact layer on the p-type AlGaN layer comprises:

introducing an Mg source with the flow rate of 100-600 sccm for 10-60 s into the reaction cavity to form a plurality of spaced Mg metal islands on the p-type AlGaN layer to obtain the Mg contact sub-layer;

and sequentially growing an MgN sublayer, a p-type GaN sublayer and a p-type InGaN sublayer on the Mg metal sublayer.

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