CN113541720A - Radio frequency input overpower protection method and system based on tuning function - Google Patents
Radio frequency input overpower protection method and system based on tuning function Download PDFInfo
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- CN113541720A CN113541720A CN202110689549.6A CN202110689549A CN113541720A CN 113541720 A CN113541720 A CN 113541720A CN 202110689549 A CN202110689549 A CN 202110689549A CN 113541720 A CN113541720 A CN 113541720A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
- H02H3/42—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to product of voltage and current
Abstract
The invention relates to a radio frequency input overpower protection method and a system based on a tuning function, wherein the method comprises the steps of S1, detecting whether the preset partial pressure of rectified output voltage exceeds an upper limit judgment threshold value; if yes, executing S2-S3; if not, executing S4-S6; s2, adjusting the impedance of the RF front end to reduce the impedance matching degree between the RF front end and the antenna; s3, detecting whether the preset divided voltage of the rectified output voltage does not exceed an upper limit judgment threshold value; if not, go to S2; s4, adjusting the impedance of the radio frequency front end to increase the impedance matching degree between the radio frequency front end and the antenna; s5, detecting whether the preset divided voltage of the rectified output voltage exceeds an upper limit judgment threshold value, if so, returning to execute S2, and if not, executing S6; s6 detects whether the rectified output voltage rises relative to that before regulation. The invention blocks the over-power energy out of the radio frequency front end through power detection and tuning, thereby preventing the over-power energy from entering potential danger and interference of the radio frequency front end and avoiding the problem of radio frequency waveform signal integrity.
Description
Technical Field
The invention relates to the field of passive radio frequency, in particular to a radio frequency input over-power protection method and system based on a tuning function.
Background
With the continuous development and interaction of network communication technology, big data technology, sensing technology and integrated circuit technology and the coupled development of system technology, chip technology and antenna integration technology, the applicable scene of the label for the internet of things node is continuously expanded, and from the logistics field, anti-counterfeiting traceability field and intelligent traffic field in recent years, along with the further fusion with communication technology, data technology and sensing technology, the application in the fields of smart farms, smart homes, environment monitoring, medical health and the like is gradually developed. The internet of things node chip usually adopts radio frequency passive power supply, such as a passive RFID chip and a passive RF-sensor, and under the condition that nodes are distributed near a power source or the transmitting power is enhanced, the radio frequency power entering the chip is too strong, and if the nodes are not properly protected, the chip is damaged or even fails.
At present, the conventional over-power protection adopts a system as shown in fig. 1, which adopts a mode that a radio frequency front end interface is connected with a limiting protection module (a limiting protection mode) or a rectification output leakage protection module (a leakage protection mode). For the leakage protection mode, when excessive radio frequency input power occurs, a large leakage load mode in the radio frequency front end of the chip is started for protection, and at the moment, the excessive radio frequency input power enters the radio frequency front end of the chip, so that potential dangers such as surge current and the like and interference on a rear-stage circuit of the chip still exist; for the amplitude limiting protection mode, the amplitude limiting protection module at the front end of the radio frequency has an overpower peak-eliminating phenomenon, which can cause the signal integrity problem of the radio frequency modulation waveform, especially the shallow amplitude modulation waveform.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a radio frequency input overpower protection method and system based on a tuning function, wherein overpower energy is blocked outside a radio frequency front end through power detection and tuning, so that potential danger and interference of the overpower energy entering the radio frequency front end are prevented, and the problem of radio frequency waveform signal integrity caused by a traditional on-chip radio frequency front end amplitude limiting protection module is also prevented.
The technical scheme for solving the technical problems is as follows: a radio frequency input over-power protection method based on a tuning function comprises the following steps,
s1, detecting whether the preset divided voltage of the rectified output voltage output by the radio frequency front end exceeds an upper limit judgment threshold value; if yes, sequentially executing S2-S3 in a circulating manner; if not, sequentially executing S4-S6 in a circulating manner;
s2, gradually adjusting the impedance of the radio frequency front end to reduce the impedance matching degree between the radio frequency front end and the antenna;
s3, after the impedance of the radio frequency front end is adjusted each time, whether the preset divided voltage of the rectified output voltage does not exceed an upper limit judgment threshold value is detected; if not, returning to execute the S2; if yes, finishing the adjustment;
s4, gradually adjusting the impedance of the radio frequency front end to increase the impedance matching degree between the radio frequency front end and the antenna;
s5, after the impedance of the radio frequency front end is adjusted each time, detecting whether the preset divided voltage of the rectified output voltage exceeds an upper limit judgment threshold value, if so, returning to execute the S2, and if not, executing S6;
and S6, detecting whether the rectified output voltage rises relative to the rectified output voltage before adjustment, if so, returning to execute the S4, and if not, ending the adjustment.
On the basis of the technical scheme, the invention can be further improved as follows.
Further, before the step of S1, the method further comprises the following steps,
s0, detecting whether the rectified output voltage output by the radio frequency front end is stable; if not, continuously detecting the rectified output voltage output by the radio frequency front end until the rectified output voltage output by the radio frequency front end is detected to be stable; if yes, the process goes to S1.
Based on the radio frequency input overpower protection method based on the tuning function, the invention also provides a radio frequency input overpower protection system based on the tuning function.
A radio frequency input overpower protection system based on a tuning function comprises a radio frequency front end, an overpower detection module and a tuning module, wherein the radio frequency front end is provided with a capacitor array used for changing impedance;
the radio frequency front end is used for rectifying radio frequency signals sent by the antenna and outputting rectified output voltage;
the over-power detection module is used for outputting an over-power marking signal according to the rectified output voltage output by the radio frequency front end;
the tuning module is used for controlling the on-off of the unit capacitor in the capacitor array according to the rectified output voltage output by the radio frequency front end and the over-power marking signal output by the over-power detection module, so that the impedance matching degree between the radio frequency front end and the antenna is adjusted, and the power entering the radio frequency front end is kept within a preset input power range.
On the basis of the technical scheme, the invention can be further improved as follows.
Further, the over-power detection module comprises a voltage reference circuit and a comparison and judgment unit; the output of the voltage reference circuit and the output of the radio frequency front end are both connected to the input of the comparison and judgment unit, and the output of the comparison and judgment unit is connected with the tuning module;
the voltage reference circuit is used for generating a reference voltage representing an upper limit judgment threshold value and is connected to the comparison judgment unit;
the comparison judgment unit is used for comparing the preset divided voltage of the rectified output voltage with the reference voltage; when the preset divided voltage of the rectified output voltage is larger than the reference voltage value, outputting an overpower marking signal with Vtop equal to 1 to the tuning module; and when the preset divided voltage of the rectified output voltage is smaller than or equal to the reference voltage value, outputting an overpower marking signal with Vtop equal to 0 to the tuning module.
Further, the antenna is specifically a differential antenna, the capacitor array is specifically a CTC structure switched capacitor array, the CTC structure switched capacitor array includes a plurality of stages of CTC structure switched capacitors, and each stage of the CTC structure switched capacitors includes a first unit capacitor, a second unit capacitor, and a switching tube; in any stage of the CTC structure switched capacitor, one end of the first unit capacitor is connected to one output port of the differential antenna, the other end of the first unit capacitor is connected to a drain of the switching tube, a source of the switching tube is connected to one end of the second unit capacitor, the other end of the second unit capacitor is connected to the other output port of the differential antenna, and a gate of the switching tube is connected to the tuning module.
Further, each stage of the CTC structure switched capacitor further includes a bleeder tube, and in any stage of the CTC structure switched capacitor, a gate of the switching tube is connected to the impedance adaptive adjustment module through the bleeder tube; specifically, in any stage of the CTC structure switched capacitor, a gate of the switching tube is connected to a source of the discharging tube, a drain of the discharging tube is grounded, and the gate of the discharging tube is connected to the impedance adaptive adjustment module;
in any stage of the CTC structure switch capacitor, a grid electrode of the switch tube is respectively connected with a grid electrode of the first bias tube and a grid electrode of the second bias tube, a drain electrode of the first bias tube and a drain electrode of the second bias tube are respectively and correspondingly connected with a source electrode and a drain electrode of the switch tube, and a source electrode of the first bias tube and a source electrode of the second bias tube are both grounded.
Further, the capacitance values of a first unit capacitor and a second unit capacitor in the CTC structure switch capacitor of any stage are equal; the capacitance values of a first unit capacitor and a second unit capacitor in each stage of the CTC structure switch capacitor are increased progressively according to a binary system;
the gate widths of the switch tube, the first bias tube and the second bias tube in the CTC structure switch capacitor of each stage are increased in a binary mode.
Further, the tuning module is specifically configured to,
when the over-power detection module outputs an over-power marking signal with Vtop being 1, outputting a multi-bit binary control signal to control a switching tube in the CTC structure switched capacitor array to be closed;
after one switching tube in the CTC structure switched capacitor array is controlled to be closed, if the overpower detection module outputs an overpower mark signal with Vtop equal to 1, a multi-bit binary control signal is continuously output to control the next switching tube in the CTC structure switched capacitor array to be closed; if the over-power detection module outputs an over-power marking signal with Vtop equal to 0, locking the output multi-bit binary control signal;
the tuning module is also particularly adapted to,
when the over-power detection module outputs an over-power marking signal with Vtop being 0, outputting a multi-bit binary control signal to control one switching tube in the CTC structure switched capacitor array to be opened;
after one switching tube in the CTC structure switched capacitor array is controlled to be opened, if the overpower detection module outputs an overpower mark signal with Vtop equal to 1, a multi-bit binary control signal is output to control one switching tube in the CTC structure switched capacitor array to be closed; if the over-power detection module outputs an over-power flag signal with Vtop ═ 0, detecting whether the rectified output voltage rises relatively before adjustment; if the rectified output voltage rises relatively before adjustment, outputting a multi-bit binary control signal to control the opening of the next switch tube in the CTC structure switch capacitor array; and if the rectified output voltage does not rise relatively before adjustment, locking the output multi-bit binary control signal.
Further, the tuning module is further configured to detect whether the rectified output voltage output by the radio frequency front end is stable, and generate an enable signal VEN1 to control the over-power detection module to turn on after the rectified output voltage output by the radio frequency front end is stable; and simultaneously, an enabling signal VEN2 is also generated to control all switch tubes in the CTC structure switch capacitor array to be closed.
Further, the antenna is specifically a differential antenna, and the radio frequency front end comprises a differential rectifying circuit; the differential rectifying circuit comprises a plurality of stages of four-tube differential pairs, and each stage of the four-tube differential pairs is connected with two output ports of the differential antenna; any stage of the four-tube differential pair comprises a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a first capacitor C11 and a second capacitor C12; in any stage of the four-transistor differential pair, the drain of the first transistor M1, the drain of the third transistor M3, the gate of the second transistor M2, and the gate of the fourth transistor M4 are connected together and then connected to one output port of the differential antenna through the first capacitor C11, and the gate of the first transistor M1, the gate of the third transistor M3, the drain of the second transistor M2, and the drain of the fourth transistor M4 are connected together and then connected to the other output port of the differential antenna through the second capacitor C12; in two adjacent four-tube differential pairs, the source electrode of the third transistor M3 and the source electrode of the fourth transistor M4 in the four-tube differential pair at the previous stage are connected together, and the source electrode of the first transistor M1 and the source electrode of the second transistor M2 in the four-tube differential pair at the next stage are connected together; in the four-tube differential pair of the first stage, the source electrode of the first transistor M1 and the source electrode of the second transistor M2 are grounded; in the last stage of the four-transistor differential pair, the source of the third transistor M3 and the source of the fourth transistor M4 output the rectified output voltage in common.
The invention has the beneficial effects that: the radio frequency input overpower protection method and system based on the tuning function block overpower energy outside a radio frequency front end through power detection and tuning, so that potential danger and interference of the overpower energy entering the radio frequency front end are prevented, and the problem of radio frequency waveform signal integrity caused by a traditional on-chip radio frequency front end amplitude limiting protection module is also prevented. The invention can block the radio frequency input overpower outside the radio frequency front end, and can not cause the signal integrity problem.
Drawings
FIG. 1 is a block diagram of a RF front end for conventional RF input over-power protection;
FIG. 2 is a flow chart of a radio frequency input over-power protection method based on a tuning function according to the present invention;
FIG. 3 is a block diagram of an RF input over-power protection system based on tuning function according to the present invention;
FIG. 4 is a schematic diagram of a switched capacitor array of a CTC architecture;
fig. 5 is a schematic diagram of a differential rectifier circuit.
Detailed Description
The principles and features of this invention are described below in conjunction with the following drawings, which are set forth by way of illustration only and are not intended to limit the scope of the invention.
As shown in fig. 2, a method for protecting an rf input from over-power based on a tuning function includes the following steps,
s0, detecting whether the rectified output voltage output by the radio frequency front end is stable; if not, continuously detecting the rectified output voltage output by the radio frequency front end until the rectified output voltage output by the radio frequency front end is detected to be stable; if yes, executing the step S1;
s1, detecting whether the preset divided voltage of the rectified output voltage output by the radio frequency front end exceeds an upper limit judgment threshold value; if yes, sequentially executing S2-S3 in a circulating manner; if not, sequentially executing S4-S6 in a circulating manner;
s2, gradually adjusting the impedance of the radio frequency front end to reduce the impedance matching degree between the radio frequency front end and the antenna;
s3, after the impedance of the radio frequency front end is adjusted each time, whether the preset divided voltage of the rectified output voltage does not exceed an upper limit judgment threshold value is detected; if not, returning to execute the S2; if yes, finishing the adjustment;
s4, gradually adjusting the impedance of the radio frequency front end to increase the impedance matching degree between the radio frequency front end and the antenna;
s5, after the impedance of the radio frequency front end is adjusted each time, detecting whether the preset divided voltage of the rectified output voltage exceeds an upper limit judgment threshold value, if so, returning to execute the S2, and if not, executing S6;
and S6, detecting whether the rectified output voltage rises relative to the rectified output voltage before adjustment, if so, returning to execute the S4, and if not, ending the adjustment.
In the system power-on process, the rectified output voltage output by the radio frequency front end is unstable, so the input power is also unstable; and after the rectification output is stable, whether the power is over-power is judged, so that the judgment accuracy can be ensured, and the misadjustment is avoided.
The invention has the advantages that for the over-power protection of the radio frequency input, the method is different from the traditional method for carrying out the leakage protection on the large leakage load in the radio frequency front end of the chip, the tuning value is adjusted by judging whether the rectified level exceeds the threshold voltage or not through the power detection and tuning adjustment technology innovatively, the matching degree between the radio frequency front end and the antenna is controlled, the power entering the radio frequency front end is kept in the normal input power range, the over-power energy is blocked outside the traditional radio frequency front end, the potential danger and the interference of the over-power energy entering the radio frequency front end are prevented, and the signal integrity problem of the radio frequency modulation waveform, particularly the shallow amplitude modulation waveform, caused by the over-power peak eliminating phenomenon of the amplitude limiting module of the traditional radio frequency front end is also prevented. The invention can block the radio frequency input overpower outside the radio frequency front end, and can not cause the signal integrity problem.
Based on the radio frequency input overpower protection method based on the tuning function, the invention also provides a radio frequency input overpower protection system based on the tuning function.
As shown in fig. 3, a radio frequency input overpower protection system based on a tuning function includes a radio frequency front end, an overpower detection module, and a tuning module, where the radio frequency front end is equipped with a capacitor array for changing impedance;
the radio frequency front end is used for rectifying a radio frequency signal sent by an antenna and outputting a rectified output voltage (Vrect);
the over-power detection module is used for outputting an over-power marking signal (Vtop) according to the rectified output voltage output by the radio frequency front end;
the tuning module is used for controlling the on-off of the unit capacitor in the capacitor array according to the rectified output voltage output by the radio frequency front end and the over-power marking signal output by the over-power detection module, so that the impedance matching degree between the radio frequency front end and the antenna is adjusted, and the power entering the radio frequency front end is kept within a preset input power range.
In this particular embodiment: the over-power detection module comprises a voltage reference circuit and a comparison and judgment unit; the output of the voltage reference circuit and the output of the radio frequency front end are both connected to the input of the comparison and judgment unit, and the output of the comparison and judgment unit is connected with the tuning module; the voltage reference circuit is used for generating a reference voltage (V) representing an upper decision thresholdREF) And is connected to the comparison and decision unit (the voltage reference circuit is powered by the rectified output voltage to generate a reference voltage); the comparison judgment unit is used for comparing the preset divided voltage of the rectified output voltage with the reference voltage; when the preset divided voltage of the rectified output voltage is larger than the reference voltage value, outputting an overpower marking signal with Vtop equal to 1 to the tuning module; and when the preset divided voltage of the rectified output voltage is smaller than or equal to the reference voltage value, outputting an overpower marking signal with Vtop equal to 0 to the tuning module.
The overpower detection module changes the tuning value of the tuning module according to whether the preset divided voltage of the rectified output voltage reaches an upper limit judgment threshold value or not, and automatically adjusts the number of unit capacitors of the CTC structure switch capacitor array, so that the input power marked by the rectified output is in an allowable input upper limit power range, and the excessive radio frequency input power is blocked outside the radio frequency front end of the chip, thereby realizing the radio frequency input overpower protection function.
In this particular embodiment: the antenna is specifically a differential antenna, the capacitor array is specifically a CTC structure switch capacitor array, the main principle of the CTC structure switch capacitor array is that a unit capacitor-MOS switch tube-unit capacitor with a symmetrical structure forms the capacitor array with a CTC structure, the switching on and off of the MOS tube is controlled through a switch signal added on the grid of the MOS switch tube, and then whether the unit capacitor is added into the circuit or not is controlled, so that the impedance of the circuit is changed. The CTC structure switch capacitor array comprises a plurality of stages of CTC structure switch capacitors, and each stage of the CTC structure switch capacitors comprises a first unit capacitor, a second unit capacitor and a switch tube; in any stage of the CTC structure switched capacitor, one end of the first unit capacitor is connected to one output port of the differential antenna, the other end of the first unit capacitor is connected to a drain of the switching tube, a source of the switching tube is connected to one end of the second unit capacitor, the other end of the second unit capacitor is connected to the other output port of the differential antenna, and a gate of the switching tube is connected to the tuning module.
Preferably, each stage of the CTC structure switched capacitor further includes a bleeder tube, and in any stage of the CTC structure switched capacitor, a gate of the switching tube is connected to the impedance adaptive adjustment module through the bleeder tube; specifically, in any stage of the CTC structure switched capacitor, a gate of the switching tube is connected to a source of the discharging tube, a drain of the discharging tube is grounded, and the gate of the discharging tube is connected to the impedance adaptive adjustment module; in any stage of the CTC structure switch capacitor, a grid electrode of the switch tube is respectively connected with a grid electrode of the first bias tube and a grid electrode of the second bias tube, a drain electrode of the first bias tube and a drain electrode of the second bias tube are respectively and correspondingly connected with a source electrode and a drain electrode of the switch tube, and a source electrode of the first bias tube and a source electrode of the second bias tube are both grounded.
Preferably, the capacitance values of the first unit capacitor and the second unit capacitor in the CTC structure switch capacitor of any stage are equal; the capacitance values of a first unit capacitor and a second unit capacitor in each stage of the CTC structure switch capacitor are increased progressively according to a binary system; the gate widths of the switch tube, the first bias tube and the second bias tube in the CTC structure switch capacitor of each stage are increased in a binary mode.
Further specifically, the first unit capacitor and the second unit capacitor are both MOM capacitors, the switching tubes are NMOS switching tubes, the first bias tube and the second bias tube are both NMOS bias tubes, and the drain tube is a PMOS drain tube. The bias tube is used for balancing the voltage of the source and the drain of the switch tube, keeping the direct current levels of the two ends consistent and playing a role in balancing voltage for the floating differential structure; the bleeder tube is used for relieving the voltage coupled with the grid electrode of the switch tube, and ensures that all the switch tubes are closed in the electrifying process. The CTC structure switch capacitor in the CTC structure switch capacitor array is provided with multiple stages, the frequency of impedance adjustment is adjustable, the adjustment frequency is multiple, the adjustment precision is high, and the adjustable range is large.
The PMOS bleeder tube is mainly used for ensuring that alternating voltage cannot be coupled to the grid of the CTC structure switch capacitor array in the power-on process, and is closed when the tuning module starts to work, namely a reference enabling signal arrives, so that the CTC structure switch capacitor array is controlled by the tuning module.
In this embodiment, as shown in fig. 4, the CTC structure switched capacitor array includes five stages of CTC structure switched capacitors (in other embodiments, the number of stages of the CTC structure switched capacitors in the CTC structure switched capacitor array may be set to a numerical value, such as six stages, seven stages, etc., which are reasonably set according to actual needs). In the first stage CTC structure switched capacitor: the first unit capacitor and the second unit capacitor are both Cap, the switch tube is M11, the first bias tube is M12, the second bias tube is M13, and the discharge tube is M14. In the second stage CTC structure switched capacitor: the first unit capacitor and the second unit capacitor are both 2-Cap, the switching tube is M21, the first bias tube is M22, the second bias tube is M23, and the discharge tube is M24. In the third stage CTC structure switched capacitor: the first unit capacitor and the second unit capacitor are both 4-Cap, the switching tube is M31, the first bias tube is M32, the second bias tube is M33, and the discharge tube is M34. In the fourth stage CTC structure switched capacitor: the first unit capacitor and the second unit capacitor are both 8-Cap, the switching tube is M41, the first bias tube is M42, the second bias tube is M43, and the discharge tube is M44. In the fifth stage CTC structure switched capacitor: the first unit capacitor and the second unit capacitor are both 16-Cap, the switching tube is M51, the first bias tube is M52, the second bias tube is M53, and the discharge tube is M54. In fig. 4, ANT1 and ANT2 are used to connect to two output ports of a differential antenna, respectively.
The first unit capacitor and the second unit capacitor are MOM capacitors with the same-layer metal inserted finger type structure, can be very small and are suitable for high-precision adjustment of high-sensitivity labels; according to the invention, analysis is carried out according to the impedance adjustment range of the tag chip, and finally the capacitance value of the unit capacitor is determined to be 5fF, namely the capacitance of the Cap in FIG. 4 is 5fF, and the capacitance value of each stage is increased in a binary manner, namely 1 × Cap, 2 × Cap, 4 × Cap, 8 × Cap and 16 × Cap are sequentially shown in FIG. 4, so that five-bit binary adjustment can be met, and the adjustment can be carried out for 32 times; the unit capacitance is designed to be binary weighted to minimize the number of branches. With binary weighted unit capacitors, in order to maintain the same Q factor, the gate widths of the switching and bias transistors also need to be binary weighted to maintain a constant switching speed. The W/L sizes of the switch tube and the bias tube (including the first bias tube and the second bias tube) are doubled step by step, for the size of the switch tube, for the impedance adjustment of the high-Q collator, the first stage finger of the size of the switch tube is 6, the highest stage finger is 96, the problem of overlarge size exists, the half size is tried to be reduced, the CTC structure switch capacitor of the first stage is simulated independently, and the Q value when the first stage is opened is found to be reduced, which is about 50. And finally, the first stage finger can be replaced by 4, the size of the last stage is reduced as much as possible, and the phenomenon that the Q value is too low to cause large insertion loss on the effect of the differential rectifier is avoided.
The discharge tube mainly ensures that the grid potential of the CTC structure switch capacitor array is maintained in a low potential state in the electrifying process of the tag chip, namely all switch tubes and bias tubes are closed, all unit capacitors are not added into a circuit, the problem of floating gate stress of the unit capacitors is mainly solved, and through a large amount of simulation analysis, the MOS tube is found to have a circuit with a similar rectification effect, so that when an alternating current signal is accessed, voltage can be accumulated on the grid electrode of the NMOS switch tube, the voltage on the grid electrode of the NMOS switch tube cannot be discharged, and the voltage is increased all the time. Because the output end of the counting output unit is connected with the grid electrode and the output is the output of the phase inverter of the standard MOS tube, the input and the power supply voltage of the phase inverter are very low in the system starting stage, and the voltage on the grid electrode cannot be leaked by the phase inverter of the standard MOS tube when the circuit is started. Based on the analysis, the source electrode of the PMOS release pipe is connected to the grid electrode of the multi-stage CTC structure switch capacitor array, the drain electrode of the PMOS release pipe is grounded, the tuning module is connected to the grid electrode of the PMOS release pipe, before the tuning module works, the voltage on the grid electrode is pulled to the ground through the PMOS release pipe, when the enabling signal is inverted to be a high level, the tuning module starts to work, and the voltage on the grid electrode of the NMOS switch pipe can be charged and discharged through the phase inverter of the tuning module, so that the unit capacitor array is adjusted.
In this particular embodiment: the tuning module is particularly adapted to,
when the over-power detection module outputs an over-power marking signal with Vtop being 1, outputting a multi-bit binary control signal to control a switching tube in the CTC structure switched capacitor array to be closed;
after one switching tube in the CTC structure switched capacitor array is controlled to be closed, if the overpower detection module outputs an overpower mark signal with Vtop equal to 1, a multi-bit binary control signal is continuously output to control the next switching tube in the CTC structure switched capacitor array to be closed; if the over-power detection module outputs an over-power marking signal with Vtop equal to 0, locking the output multi-bit binary control signal;
the tuning module is also particularly adapted to,
when the over-power detection module outputs an over-power marking signal with Vtop being 0, outputting a multi-bit binary control signal to control one switching tube in the CTC structure switched capacitor array to be opened;
after one switching tube in the CTC structure switched capacitor array is controlled to be opened, if the overpower detection module outputs an overpower mark signal with Vtop equal to 1, a multi-bit binary control signal is output to control one switching tube in the CTC structure switched capacitor array to be closed; if the over-power detection module outputs an over-power flag signal with Vtop ═ 0, detecting whether the rectified output voltage rises relatively before adjustment; if the rectified output voltage rises relatively before adjustment, outputting a multi-bit binary control signal to control the opening of the next switch tube in the CTC structure switch capacitor array; and if the rectified output voltage does not rise relatively before adjustment, locking the output multi-bit binary control signal.
In this particular embodiment: the tuning module is further configured to detect whether the rectified output voltage output by the radio frequency front end is stable, and generate an enable signal VEN1 to control the over-power detection module to be turned on after the rectified output voltage output by the radio frequency front end is stable; and meanwhile, an enable signal VEN2 is also generated to control all switch tubes in the CTC structure switch capacitor array to be closed, so that all unit capacitors are not added with circuits before the over-power detection module does not work.
In this particular embodiment: the antenna is specifically a differential antenna, the radio frequency front end comprises a differential rectifying circuit, and the differential rectifying circuit is used for converting two alternating current signals sent by the differential antenna into direct current signals and outputting rectified output voltage. The differential rectifier is specifically a four-tube differential rectifier, which mainly comprises two PMOS tubes and two NMOS tubes, and mainly adopts the principle that the differential rectifier is composed of multi-stage four-tube differential pairs, and each stage of the four-tube differential pairs forms a structure similar to diode rectification. The specific structure of the differential rectification circuit is shown in fig. 5, and the differential rectification circuit comprises a plurality of stages of four-tube differential pairs, wherein each stage of the four-tube differential pairs is connected with two output ports of the differential antenna; any stage of the four-tube differential pair comprises a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a first capacitor C11 and a second capacitor C12; in any stage of the four-transistor differential pair, the drain of the first transistor M1, the drain of the third transistor M3, the gate of the second transistor M2, and the gate of the fourth transistor M4 are connected together and then connected to one output port of the differential antenna through the first capacitor C11, and the gate of the first transistor M1, the gate of the third transistor M3, the drain of the second transistor M2, and the drain of the fourth transistor M4 are connected together and then connected to the other output port of the differential antenna through the second capacitor C12; in two adjacent four-tube differential pairs, the source electrode of the third transistor M3 and the source electrode of the fourth transistor M4 in the four-tube differential pair at the previous stage are connected together, and the source electrode of the first transistor M1 and the source electrode of the second transistor M2 in the four-tube differential pair at the next stage are connected together; in the four-tube differential pair of the first stage, the source electrode of the first transistor M1 and the source electrode of the second transistor M2 are grounded; in the last stage of the four-transistor differential pair, the source of the third transistor M3 and the source of the fourth transistor M4 output the rectified output voltage in common. In fig. 5, ANT1 and ANT2 are used to connect to two output ports of a differential antenna, respectively.
More specifically, in any stage of the four-transistor differential pair, the capacitance values of the first capacitor C11 and the second capacitor C12 are equal and are both the capacitance value of one unit capacitor. In any stage of the four-transistor differential pair, the first transistor M1 and the second transistor M2 are both NMOS transistors, and the third transistor M3 and the fourth transistor M4 are both PMOS transistors. In this embodiment, the four-tube differential pair of the differential rectifier has five stages, and in other embodiments, the four-tube differential pair may have six stages, seven stages, and the like, which are reasonably arranged as required.
The radio frequency input overpower protection method and system based on the tuning function block overpower energy outside a radio frequency front end through power detection and tuning, so that potential danger and interference of the overpower energy entering the radio frequency front end are prevented, and the problem of radio frequency waveform signal integrity caused by a traditional on-chip radio frequency front end amplitude limiting protection module is also prevented. The invention can block the radio frequency input overpower outside the radio frequency front end, and can not cause the signal integrity problem, and the invention can realize proper tuning matching (conjugate matching) of the radio frequency front end and the antenna while realizing overpower protection.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.
Claims (10)
1. A radio frequency input over-power protection method based on a tuning function is characterized in that: comprises the following steps of (a) carrying out,
s1, detecting whether the preset divided voltage of the rectified output voltage output by the radio frequency front end exceeds an upper limit judgment threshold value; if yes, sequentially executing S2-S3 in a circulating manner; if not, sequentially executing S4-S6 in a circulating manner;
s2, gradually adjusting the impedance of the radio frequency front end to reduce the impedance matching degree between the radio frequency front end and the antenna;
s3, after the impedance of the radio frequency front end is adjusted each time, whether the preset divided voltage of the rectified output voltage does not exceed an upper limit judgment threshold value is detected; if not, returning to execute the S2; if yes, finishing the adjustment;
s4, gradually adjusting the impedance of the radio frequency front end to increase the impedance matching degree between the radio frequency front end and the antenna;
s5, after the impedance of the radio frequency front end is adjusted each time, detecting whether the preset divided voltage of the rectified output voltage exceeds an upper limit judgment threshold value, if so, returning to execute the S2, and if not, executing S6;
and S6, detecting whether the rectified output voltage rises relative to the rectified output voltage before adjustment, if so, returning to execute the S4, and if not, ending the adjustment.
2. The radio frequency input over-power protection method based on the tuning function of claim 1, wherein: before the step of S1, the method further comprises the following steps,
s0, detecting whether the rectified output voltage output by the radio frequency front end is stable; if not, continuously detecting the rectified output voltage output by the radio frequency front end until the rectified output voltage output by the radio frequency front end is detected to be stable; if yes, the process goes to S1.
3. A radio frequency input overpower protection system based on tuning function, characterized by: the system comprises a radio frequency front end, an over-power detection module and a tuning module, wherein the radio frequency front end is provided with a capacitor array for changing impedance;
the radio frequency front end is used for rectifying radio frequency signals sent by the antenna and outputting rectified output voltage;
the over-power detection module is used for outputting an over-power marking signal according to the rectified output voltage output by the radio frequency front end;
the tuning module is used for controlling the on-off of the unit capacitor in the capacitor array according to the rectified output voltage output by the radio frequency front end and the over-power marking signal output by the over-power detection module, so that the impedance matching degree between the radio frequency front end and the antenna is adjusted, and the power entering the radio frequency front end is kept within a preset input power range.
4. A tuning function based rf input over-power protection system as claimed in claim 3, wherein: the over-power detection module comprises a voltage reference circuit and a comparison and judgment unit; the output of the voltage reference circuit and the output of the radio frequency front end are both connected to the input of the comparison and judgment unit, and the output of the comparison and judgment unit is connected with the tuning module;
the voltage reference circuit is used for generating a reference voltage representing an upper limit judgment threshold value and is connected to the comparison judgment unit;
the comparison judgment unit is used for comparing the preset divided voltage of the rectified output voltage with the reference voltage; when the preset divided voltage of the rectified output voltage is larger than the reference voltage value, outputting an overpower marking signal with Vtop equal to 1 to the tuning module; and when the preset divided voltage of the rectified output voltage is smaller than or equal to the reference voltage value, outputting an overpower marking signal with Vtop equal to 0 to the tuning module.
5. The tuning function based rf input over-power protection system of claim 4, wherein: the antenna is specifically a differential antenna, the capacitor array is specifically a CTC structure switch capacitor array, the CTC structure switch capacitor array comprises a plurality of stages of CTC structure switch capacitors, and each stage of the CTC structure switch capacitors comprises a first unit capacitor, a second unit capacitor and a switch tube; in any stage of the CTC structure switched capacitor, one end of the first unit capacitor is connected to one output port of the differential antenna, the other end of the first unit capacitor is connected to a drain of the switching tube, a source of the switching tube is connected to one end of the second unit capacitor, the other end of the second unit capacitor is connected to the other output port of the differential antenna, and a gate of the switching tube is connected to the tuning module.
6. The tuning function based rf input over-power protection system of claim 5, wherein: each stage of the CTC structure switch capacitor further comprises a discharge tube, and in any stage of the CTC structure switch capacitor, the grid electrode of the switch tube is connected with the impedance self-adaptive adjusting module through the discharge tube; specifically, in any stage of the CTC structure switched capacitor, a gate of the switching tube is connected to a source of the discharging tube, a drain of the discharging tube is grounded, and the gate of the discharging tube is connected to the impedance adaptive adjustment module;
in any stage of the CTC structure switch capacitor, a grid electrode of the switch tube is respectively connected with a grid electrode of the first bias tube and a grid electrode of the second bias tube, a drain electrode of the first bias tube and a drain electrode of the second bias tube are respectively and correspondingly connected with a source electrode and a drain electrode of the switch tube, and a source electrode of the first bias tube and a source electrode of the second bias tube are both grounded.
7. The tuning function based rf input over-power protection system of claim 6, wherein: the capacitance values of a first unit capacitor and a second unit capacitor in any stage of the CTC structure switch capacitor are equal; the capacitance values of a first unit capacitor and a second unit capacitor in each stage of the CTC structure switch capacitor are increased progressively according to a binary system;
the gate widths of the switch tube, the first bias tube and the second bias tube in the CTC structure switch capacitor of each stage are increased in a binary mode.
8. The tuning function based rf input over-power protection system according to any one of claims 5 to 7, wherein: the tuning module is particularly adapted to,
when the over-power detection module outputs an over-power marking signal with Vtop being 1, outputting a multi-bit binary control signal to control a switching tube in the CTC structure switched capacitor array to be closed;
after one switching tube in the CTC structure switched capacitor array is controlled to be closed, if the overpower detection module outputs an overpower mark signal with Vtop equal to 1, a multi-bit binary control signal is continuously output to control the next switching tube in the CTC structure switched capacitor array to be closed; if the over-power detection module outputs an over-power marking signal with Vtop equal to 0, locking the output multi-bit binary control signal;
the tuning module is also particularly adapted to,
when the over-power detection module outputs an over-power marking signal with Vtop being 0, outputting a multi-bit binary control signal to control one switching tube in the CTC structure switched capacitor array to be opened;
after one switching tube in the CTC structure switched capacitor array is controlled to be opened, if the overpower detection module outputs an overpower mark signal with Vtop equal to 1, a multi-bit binary control signal is output to control one switching tube in the CTC structure switched capacitor array to be closed; if the over-power detection module outputs an over-power flag signal with Vtop ═ 0, detecting whether the rectified output voltage rises relatively before adjustment; if the rectified output voltage rises relatively before adjustment, outputting a multi-bit binary control signal to control the opening of the next switch tube in the CTC structure switch capacitor array; and if the rectified output voltage does not rise relatively before adjustment, locking the output multi-bit binary control signal.
9. The tuning function based rf input over-power protection system according to any one of claims 5 to 7, wherein: the tuning module is further configured to detect whether the rectified output voltage output by the radio frequency front end is stable, and generate an enable signal VEN1 to control the over-power detection module to be turned on after the rectified output voltage output by the radio frequency front end is stable; and simultaneously, an enabling signal VEN2 is also generated to control all switch tubes in the CTC structure switch capacitor array to be closed.
10. The tuning function based rf input over-power protection system according to any one of claims 3 to 7, wherein: the antenna is specifically a differential antenna, and the radio frequency front end comprises a differential rectifying circuit; the differential rectifying circuit comprises a plurality of stages of four-tube differential pairs, and each stage of the four-tube differential pairs is connected with two output ports of the differential antenna; any stage of the four-tube differential pair comprises a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a first capacitor C11 and a second capacitor C12; in any stage of the four-transistor differential pair, the drain of the first transistor M1, the drain of the third transistor M3, the gate of the second transistor M2, and the gate of the fourth transistor M4 are connected together and then connected to one output port of the differential antenna through the first capacitor C11, and the gate of the first transistor M1, the gate of the third transistor M3, the drain of the second transistor M2, and the drain of the fourth transistor M4 are connected together and then connected to the other output port of the differential antenna through the second capacitor C12; in two adjacent four-tube differential pairs, the source electrode of the third transistor M3 and the source electrode of the fourth transistor M4 in the four-tube differential pair at the previous stage are connected together, and the source electrode of the first transistor M1 and the source electrode of the second transistor M2 in the four-tube differential pair at the next stage are connected together; in the four-tube differential pair of the first stage, the source electrode of the first transistor M1 and the source electrode of the second transistor M2 are grounded; in the last stage of the four-transistor differential pair, the source of the third transistor M3 and the source of the fourth transistor M4 output the rectified output voltage in common.
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Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040166803A1 (en) * | 1999-10-21 | 2004-08-26 | Shervin Moloudi | Adaptive radio transceiver with a power amplifier |
| US20070087719A1 (en) * | 2004-09-17 | 2007-04-19 | Soumyajit Mandal | Rf power extracting circuit and related techniques |
| CN102946281A (en) * | 2012-11-01 | 2013-02-27 | 青岛海信宽带多媒体技术有限公司 | Method and device for controlling signal power |
| CN103782519A (en) * | 2011-08-30 | 2014-05-07 | 摩托罗拉移动有限责任公司 | Antenna tuning on an impedance trajectory |
| US20160314390A1 (en) * | 2014-01-08 | 2016-10-27 | Excelio Technology (Shenzhen) Co., Ltd. | Rectifier and limiter circuit controlled by switching signals, and passive radio frequency tag |
| CN107154788A (en) * | 2017-04-21 | 2017-09-12 | 西安电子科技大学 | L-type impedance matching system and method in a kind of RF energy Acquisition Circuit |
| CN107294879A (en) * | 2016-03-31 | 2017-10-24 | 宇龙计算机通信科技(深圳)有限公司 | A kind of impedance matching methods and device, mobile terminal |
| CN107528601A (en) * | 2017-09-01 | 2017-12-29 | 无锡泽太微电子有限公司 | The automatic tuning apparatus of emitter loop antenna and the tuning methods based on the device |
| CN109598324A (en) * | 2018-12-06 | 2019-04-09 | 苏州晟达力芯电子科技有限公司 | A kind of radio frequency chip, electronic tag, detection device and displacement detecting method |
| CN110020708A (en) * | 2019-04-19 | 2019-07-16 | 中国科学院上海高等研究院 | A kind of ultra-high frequency RFID label impedance self-adaptive circuit and its implementation |
| CN112436851A (en) * | 2020-07-21 | 2021-03-02 | 珠海市杰理科技股份有限公司 | Detection circuit and detection method, wireless radio frequency receiver, chip and electrical equipment |
| CN112986669A (en) * | 2021-05-12 | 2021-06-18 | 成都信息工程大学 | Radio frequency power detection circuit |
-
2021
- 2021-06-22 CN CN202110689549.6A patent/CN113541720B/en active Active
Patent Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040166803A1 (en) * | 1999-10-21 | 2004-08-26 | Shervin Moloudi | Adaptive radio transceiver with a power amplifier |
| US20070087719A1 (en) * | 2004-09-17 | 2007-04-19 | Soumyajit Mandal | Rf power extracting circuit and related techniques |
| CN103782519A (en) * | 2011-08-30 | 2014-05-07 | 摩托罗拉移动有限责任公司 | Antenna tuning on an impedance trajectory |
| CN102946281A (en) * | 2012-11-01 | 2013-02-27 | 青岛海信宽带多媒体技术有限公司 | Method and device for controlling signal power |
| US20160314390A1 (en) * | 2014-01-08 | 2016-10-27 | Excelio Technology (Shenzhen) Co., Ltd. | Rectifier and limiter circuit controlled by switching signals, and passive radio frequency tag |
| CN107294879A (en) * | 2016-03-31 | 2017-10-24 | 宇龙计算机通信科技(深圳)有限公司 | A kind of impedance matching methods and device, mobile terminal |
| CN107154788A (en) * | 2017-04-21 | 2017-09-12 | 西安电子科技大学 | L-type impedance matching system and method in a kind of RF energy Acquisition Circuit |
| CN107528601A (en) * | 2017-09-01 | 2017-12-29 | 无锡泽太微电子有限公司 | The automatic tuning apparatus of emitter loop antenna and the tuning methods based on the device |
| CN109598324A (en) * | 2018-12-06 | 2019-04-09 | 苏州晟达力芯电子科技有限公司 | A kind of radio frequency chip, electronic tag, detection device and displacement detecting method |
| CN110020708A (en) * | 2019-04-19 | 2019-07-16 | 中国科学院上海高等研究院 | A kind of ultra-high frequency RFID label impedance self-adaptive circuit and its implementation |
| CN112436851A (en) * | 2020-07-21 | 2021-03-02 | 珠海市杰理科技股份有限公司 | Detection circuit and detection method, wireless radio frequency receiver, chip and electrical equipment |
| CN112986669A (en) * | 2021-05-12 | 2021-06-18 | 成都信息工程大学 | Radio frequency power detection circuit |
Non-Patent Citations (1)
| Title |
|---|
| 尹勇生等: "一种高频阻抗匹配自校准电路", 《微电子学》 * |
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