CN112436851A - Detection circuit and detection method, wireless radio frequency receiver, chip and electrical equipment - Google Patents
Detection circuit and detection method, wireless radio frequency receiver, chip and electrical equipment Download PDFInfo
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- CN112436851A CN112436851A CN202010704415.2A CN202010704415A CN112436851A CN 112436851 A CN112436851 A CN 112436851A CN 202010704415 A CN202010704415 A CN 202010704415A CN 112436851 A CN112436851 A CN 112436851A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers without distortion of the input signal
- H03G3/20—Automatic control
- H03G3/30—Automatic control in amplifiers having semiconductor devices
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B17/00—Monitoring; Testing
- H04B17/20—Monitoring; Testing of receivers
- H04B17/29—Performance testing
Abstract
The invention provides a detection circuit, a detection method, a wireless radio frequency receiver, a chip and electrical equipment, wherein the detection circuit comprises a conversion module and a signal processing module; the conversion module is used for converting the output radio frequency signal of the low noise amplifier into a direct current voltage signal and outputting the direct current voltage signal to the signal processing module, and comprises a first field effect transistor, a second field effect transistor, a first capacitor, a second capacitor and a first resistor; the signal processing module is used for providing reference voltage, detecting the magnitude relation between the direct current voltage signal and the reference voltage, and outputting a control signal according to the magnitude relation so that the processor adjusts the gain of the low noise amplifier. The detection circuit provided by the invention can quickly detect the gain state of the receiving link of the wireless radio frequency receiver, thereby being beneficial to realizing the timely and quick automatic gain control of the wireless radio frequency receiver and being beneficial to improving the anti-blocking and anti-interference performance of the receiving.
Description
Technical Field
The invention relates to the technical field of wireless radio frequency, in particular to a detection circuit and a detection method, a wireless radio frequency receiver, a chip and electrical equipment.
Background
In the radio frequency communication process, a radio frequency receiver automatically controls and adjusts gain according to the communication distance between communication devices to ensure the quality and the receiving performance of a receiving link signal, and a reasonable trigger source is required for changing the gain of the receiving link by an Automatic Gain Control (AGC) technology.
Disclosure of Invention
Based on the above situation, the present invention is directed to a detection circuit, a detection method, a radio frequency receiver, a chip, and an electrical device, which can quickly detect a gain state of a receiving link of the radio frequency receiver.
In order to achieve the above object, the present invention provides a detection circuit for a wireless radio frequency receiver, where the wireless radio frequency receiver includes a processor and a low noise amplifier connected to an antenna for amplifying a signal received by the antenna, and the detection circuit includes a conversion module and a signal processing module;
the conversion module is used for converting the output radio frequency signal of the low noise amplifier into a direct current voltage signal and outputting the direct current voltage signal to the signal processing module, the conversion module comprises a first field effect transistor, a second field effect transistor, a first capacitor, a second capacitor and a first resistor, a first pole of the first field effect transistor and a first pole of the second field effect transistor are connected with a first end of a power supply, a second pole of the first field effect transistor and a second pole of the second field effect transistor are connected with a first end of the first resistor, a second end of the first resistor is connected with a second end of the power supply, a control pole of the first field effect transistor is biased and connected with the first end of the first capacitor, a control pole of the second field effect transistor is biased and connected with the first end of the second capacitor, wherein the first field effect transistor, the second field effect transistor, the first resistor and the second resistor are connected with the first end of the, The second field effect transistors are the same, and a signal on the first end of the first resistor is an output signal of the conversion module;
the signal processing module is used for providing reference voltage, detecting the magnitude relation between the direct current voltage signal and the reference voltage, and outputting a control signal according to the magnitude relation so that the processor can adjust the gain of the low noise amplifier.
Further, the conversion module further comprises an amplifier for amplifying the output radio frequency signal of the low noise amplifier;
the input end of the amplifier is used for being connected with the output end of the low-noise amplifier so as to obtain the output radio-frequency signal of the low-noise amplifier, the first output end of the amplifier is connected with the second end of the first capacitor, and the second output end of the amplifier is connected with the second end of the second capacitor.
Further, the signal processing module comprises a comparator, a band gap reference circuit and a reference voltage generating circuit for providing a reference voltage;
the output end of the reference voltage generating circuit is connected with the non-inverting input end of the comparator, and the output end of the conversion module is connected with the inverting input end of the comparator;
the band-gap reference circuit is connected with the output end of the comparator and the reference voltage generating circuit, and is used for changing the reference voltage output by the reference voltage generating circuit according to the output of the comparator so as to provide hysteresis voltage for the comparator.
Further, the bandgap reference circuit is further configured to change the reference voltage output by the reference voltage generating circuit according to the control signal output by the processor.
Further, the reference voltage generating circuit comprises a third field effect transistor and a second resistor, a control electrode of the third field effect transistor is biased, a first electrode of the third field effect transistor is connected with a first end of the power supply, a second electrode of the third field effect transistor is connected with a first end of the second resistor, and a second end of the second resistor is connected with a second end of the power supply, wherein the voltage of the first end of the second resistor is the reference voltage provided by the reference voltage generating circuit;
the band-gap reference circuit comprises a plurality of control branches, each control branch comprises a control switch and a current source which are connected in series, one end of each control branch is connected with the first pole of the third field effect transistor, and the other end of each control branch is connected with the second pole of the third field effect transistor;
the control switch of at least one control branch is controlled by the inverted signal of the control signal of the comparator, and the control switch of at least one control branch is controlled by the control signal output by the processor.
Further, the second pole of the third field effect transistor is connected with the first end of the second resistor through the first common-gate transistor with the biased grid electrode.
Further, the resistance value of the first resistor is variable.
Further, the second pole of the first field effect transistor and the second pole of the second field effect transistor are connected and then connected with the first end of the first resistor through a second common-gate transistor with a biased gate.
Further, the control electrode of the first field effect transistor is connected with a bias voltage through a third resistor, so that the control electrode of the first field effect transistor is biased;
and the control electrode of the second field effect transistor is connected with the bias voltage through a fourth resistor so as to realize that the control electrode of the second field effect transistor is biased.
In order to achieve the above object, the present invention further provides a wireless rf receiver, which includes a processor, a low noise amplifier connected to an antenna for amplifying a signal received by the antenna, and the above detection circuit, wherein the processor is configured to adjust a gain of the low noise amplifier according to a control signal output by the detection circuit.
Further, the wireless radio frequency receiver is a Bluetooth radio frequency receiver or a WIFI radio frequency receiver.
In order to achieve the above object, the technical solution of the present invention further provides a chip, which includes the above radio frequency receiver.
In order to achieve the purpose, the technical scheme of the invention also provides electrical equipment which comprises the chip.
In order to achieve the above object, a technical solution of the present invention further provides a detection method for a radio frequency receiver, where the radio frequency receiver includes a processor and a low noise amplifier, and the low noise amplifier is used for being connected to an antenna to amplify a signal received by the antenna, and the method includes:
step S1: converting the output radio frequency signal of the low noise amplifier into a direct current voltage signal through a conversion module and then outputting the direct current voltage signal to a signal processing module, wherein the conversion module comprises a first field effect transistor, a second field effect transistor, a first capacitor, a second capacitor and a first resistor, a first pole of the first field effect transistor and a first pole of the second field effect transistor are connected with a first end of a power supply, a second pole of the first field effect transistor and a second pole of the second field effect transistor are connected with a first end of the first resistor, a second end of the first resistor is connected with a second end of the power supply, a control pole of the first field effect transistor is biased and connected with the first end of the first capacitor, a control pole of the second field effect transistor is biased and connected with a first end of the second capacitor, and the first field effect transistor and the second field effect transistor are connected with the first end of the second capacitor, wherein the first, The second field effect transistors are the same, and a signal on the first end of the first resistor is an output signal of the conversion module;
step S2: the signal processing module detects the magnitude relation between the direct current voltage signal and the reference voltage and outputs a control signal according to the magnitude relation so that the processor adjusts the gain of the low noise amplifier.
Further, the signal processing module comprises a comparator, a bandgap reference circuit and a reference voltage generating circuit for providing a reference voltage, an output end of the reference voltage generating circuit is connected with a non-inverting input end of the comparator, and an output end of the converting module is connected with an inverting input end of the comparator; the band-gap reference circuit is connected with the output end of the comparator and the reference voltage generating circuit;
the reference voltage generating circuit comprises a third field effect transistor and a second resistor, wherein a control electrode of the third field effect transistor is biased, a first electrode of the third field effect transistor is connected with a first end of the power supply, a second electrode of the third field effect transistor is connected with a first end of the second resistor, a second end of the second resistor is connected with a second end of the power supply, and the voltage of the first end of the second resistor is the reference voltage provided by the reference voltage generating circuit;
the band-gap reference circuit comprises a plurality of control branches, each control branch comprises a control switch and a current source which are connected in series, one end of each control branch is connected with the first pole of the third field effect transistor, and the other end of each control branch is connected with the second pole of the third field effect transistor, wherein the control switch of at least one control branch is controlled by the inverted signal of the control signal of the comparator, and the control switch of at least one control branch is controlled by the control signal output by the processor;
wherein, prior to the step S1, the method further comprises calibrating the comparator by:
when the low noise amplifier is in a closed state, controlling the band gap reference circuit to adjust the reference voltage output by the reference voltage generating circuit, and recording the voltage value VREF _ S1 of the reference voltage output by the reference voltage generating circuit when the output of the comparator is inverted;
calculating Δ VREF _ S1 ═ VREF _ S0 — VREF _ S1|, where VREF _ S0 is a voltage value of a reference voltage output by the reference voltage generation circuit when each of the control switches controlled by the control signal output by the processor is in an off state in the bandgap reference circuit;
when the low noise amplifier is in an on state, inputting a radio frequency signal with preset power to the low noise amplifier, and recording a voltage value VREF _ S2 of an output signal of the conversion module, wherein the preset power is a power value obtained by subtracting any value from 5dB to 10dB from a power value of an input 1dB compression point of the low noise amplifier;
and controlling the band gap reference circuit to adjust the reference voltage output by the reference voltage generating circuit, so that the reference voltage output by the reference voltage generating circuit is equal to the sum of Δ VREF _ S1 and VREF _ S2.
The detection circuit provided by the invention can quickly detect the gain state of the receiving link of the wireless radio frequency receiver, thereby being beneficial to realizing the timely and quick automatic gain control of the wireless radio frequency receiver and being beneficial to improving the anti-blocking and anti-interference performance of the receiving.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:
FIG. 1 is a schematic diagram of a detection circuit according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a detection circuit for detecting a radio frequency receiver according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of another detection circuit provided by embodiments of the present invention;
FIG. 4 is a schematic diagram of a conversion module, a bandgap reference circuit and a reference voltage generating circuit in a detection circuit according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of an amplifier provided by an embodiment of the present invention;
fig. 6 is a schematic diagram of a comparator according to an embodiment of the present invention.
Detailed Description
The present invention will be described below based on examples, but the present invention is not limited to only these examples. In the following detailed description of the present invention, certain specific details are set forth in order to avoid obscuring the nature of the present invention, well-known methods, procedures, and components have not been described in detail.
Further, those of ordinary skill in the art will appreciate that the drawings provided herein are for illustrative purposes and are not necessarily drawn to scale.
Unless the context clearly requires otherwise, throughout the description and the claims, the words "comprise", "comprising", and the like are to be construed in an inclusive sense as opposed to an exclusive or exhaustive sense; that is, what is meant is "including, but not limited to".
In the description of the present invention, it is to be understood that the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. In addition, in the description of the present invention, "a plurality" means two or more unless otherwise specified.
Referring to fig. 1, fig. 1 is a schematic diagram of a detection circuit for a wireless radio frequency receiver according to an embodiment of the present invention, wherein, as shown in fig. 2, the wireless radio frequency receiver may include a processor 60, a low noise amplifier 20 for connecting to an antenna 10 to amplify a signal received by the antenna 10, a down-conversion mixer 31 of an I channel, a filter 41 of the I channel, an analog-to-digital converter (ADC)51 of the I channel, a down-conversion mixer 32 of a Q channel, a filter 42 of the Q channel, and an analog-to-digital converter (ADC)52 of the Q channel, the processor 60 includes a digital baseband, a demodulation module, and the like, wherein the detection circuit 1 includes a conversion module, a signal processing module 100;
the conversion module is configured to convert an output radio frequency signal of the low noise amplifier 20 into a direct current voltage signal and output the direct current voltage signal to the signal processing module 100, where the conversion module includes a first field effect transistor MP1, a second field effect transistor MP2, a first capacitor C1, a second capacitor C2, and a first resistor R1, a first pole of the first field effect transistor MP1 and a first pole of the second field effect transistor MP2 are connected to a first end of a power supply, a second pole of the first field effect transistor MP1 and a second pole of the second field effect transistor MP2 are connected to a first end of the first resistor R1, a second end of the first resistor R1 is connected to a second end of the power supply, a control pole of the first field effect transistor MP1 is biased and connected to a first end of the first capacitor C1, a control pole of the second field effect transistor MP2 is biased and connected to a first end of the second capacitor C2, the first field effect transistor MP1 and the second field effect transistor MP2 are the same field effect transistor, and the signal at the first end of the first resistor R1 is the output signal VODC of the conversion module;
for example, as shown in fig. 1, the gate of the first field effect transistor MP1 is connected to the bias voltage VB2 through a third resistor Rb1 (serving as a bias resistor) to realize that the gate of the first field effect transistor MP1 is biased; the control electrode of the second field effect transistor MP2 is connected to the bias voltage VB2 through a fourth resistor Rb2 (used as a bias resistor) to realize that the control electrode of the second field effect transistor MP2 is biased;
the signal processing module 100 is configured to provide a reference voltage, detect a magnitude relationship between the dc voltage signal and the reference voltage, and output a control signal according to the magnitude relationship, so that the processor adjusts a gain of the low noise amplifier;
in this embodiment, the conversion module may detect the power of the output radio frequency signal of the low noise amplifier 20, the voltage of the output signal of the conversion module may change with the change of the power of the output radio frequency signal of the low noise amplifier 20, the change of the power value of the output radio frequency signal of the low noise amplifier 20 is converted into the change of current through the conversion module, and the change of the current is converted into the change of the direct current voltage VODC through the resistor;
in the embodiment of the present invention, the first field effect transistor MP1 and the second field effect transistor MP2 may be MOS transistors, for example, in the embodiment, the first end of the power supply is ground, the second end of the power supply is a positive end VDD of the power supply, the first field effect transistor MP1 and the second field effect transistor MP2 may be NMOS transistors, the first electrode of the field effect transistor is a source electrode, the second electrode of the field effect transistor is a drain electrode, the voltage of the output signal of the conversion module may become smaller with the increase of the power of the output radio frequency signal of the low noise amplifier 20, when the signal processing module 100 determines that the dc voltage signal VODC is smaller than the reference voltage, it is determined that the gain of the receiving link is too large, the processor responds according to the control signal output by the signal processing module, the gain of the low noise amplifier is reduced, distortion of the signal is avoided, and thus the quality of the;
preferably, in this embodiment, after the second pole of the first field effect transistor MP1 and the second pole of the second field effect transistor MP2 are connected, the second common-gate transistor MP4 with its gate biased is connected to the first end of the first resistor R1, the second common-gate transistor MP4 has shielding property to voltage jump to improve the output stability of the conversion module, the gate of the second common-gate transistor MP4 is connected with the reference voltage VB1, the first stage of the second common-gate transistor MP4 is connected with the second pole of the first field effect transistor MP1 and the second pole of the second field effect transistor MP2, the second pole of the second common-gate transistor MP4 is connected with the first resistor, wherein, the second common gate transistor MP4 can adopt the same type of transistors as the first field effect transistor MP1 and the second field effect transistor MP2, if the first field effect transistor MP1 is an NMOS transistor, the second common-gate transistor MP4 is also an NMOS transistor.
For example, in the embodiment of the present invention, the low noise amplifier 20 may first operate with a larger gain value, the processor determines the gain condition of the receiving link of the wireless radio frequency receiver according to the control signal output by the signal processing module 100, if the gain of the receiving link is determined to be too large, the processor gradually decreases the gain of the low noise amplifier 20, and when the control signal output by the signal processing module changes, the processor determines that the current gain state is appropriate.
The detection circuit provided by the embodiment of the invention can quickly detect the gain state of the receiving link of the wireless radio frequency receiver, thereby being beneficial to realizing the timely and quick automatic gain control of the wireless radio frequency receiver and improving the anti-blocking and anti-interference performance of the receiving.
Preferably, in an embodiment, the conversion module further includes an amplifier for amplifying the output radio frequency signal of the low noise amplifier; the input end of the amplifier is used for being connected with the output end of the low noise amplifier so as to obtain the output radio frequency signal of the low noise amplifier, the first output end of the amplifier is connected with the second end of the first capacitor, the second output end of the amplifier is connected with the second end of the second capacitor, the output radio frequency signal of the low noise amplifier 20 can be further amplified through the amplifier, and therefore the detection accuracy is improved.
Preferably, in this embodiment, the resistance of the first resistor R1 is variable, that is, the first resistor R1 may adopt a variable resistor, so that the output of the conversion module can be changed under the same radio frequency input condition, and the adjustment of the detection circuit is facilitated.
For example, in an embodiment, the signal processing module 100 may use a comparator to determine a magnitude relationship between the dc voltage signal VODC and the reference voltage, and preferably, the comparator uses a hysteresis manner to reduce an output instability problem caused by a glitch of an input voltage of the comparator;
referring to fig. 3, the signal processing module 100 includes a comparator 110, a Bandgap reference circuit (Bandgap bias current)130, and a reference voltage generating circuit 120 for providing a reference voltage;
the output terminal of the reference voltage generating circuit 120 is connected to the non-inverting input terminal of the comparator 100 to provide the reference voltage VREF to the comparator 110, the output terminal of the converting module 200 is connected to the inverting input terminal of the comparator 110 to output the signal VODC to the comparator 110, the output signal of the comparator 110 is ZO _ DIG, and the inverting signal thereof is ZO _ FB;
the bandgap reference circuit 120 is connected to the output terminal of the comparator 110 and the reference voltage generating circuit 120, and is configured to change the reference voltage VREF output by the reference voltage generating circuit according to the output of the comparator 110 to provide a hysteresis voltage to the comparator 110, where the hysteresis voltage and the provided bandgap reference voltage have the same process and temperature characteristics, i.e., have very small changes with temperature and process;
preferably, in an embodiment, the bandgap reference circuit 120 is further configured to change the reference voltage output by the reference voltage generating circuit 120 according to the control signal output by the processor 60.
For example, referring to fig. 4, the conversion module 200 of the detection circuit includes an amplifier 210, a first field effect transistor MP1, a second field effect transistor MP2, a first capacitor C1, a second capacitor C2, and a first resistor R1, wherein, the input end of the amplifier 210 is used for connecting the output end of the low noise amplifier 20 to obtain the output radio frequency signals VRFN, VRFP of the low noise amplifier 20, VRFIP, VRFIN are differential output voltage signals of the amplifier 210, the first output end of the amplifier 210 is connected to the second end of the first capacitor C1, to output VRFIN, a second output of the amplifier 210 is connected to a second terminal of the second capacitor C2, to output VRFIP, the differential output voltage signals VRFIP, VRFIN of the amplifier 210 are rectified and converted into a dc output signal VODC, the change of the radio frequency signal power value can be converted into the change of current through the conversion module, and the change of direct current voltage VODC is converted into the change of direct current voltage VODC through the resistor;
the reference voltage generating circuit 120 includes a third field effect transistor MP3, a second resistor R2, a control electrode of the third field effect transistor MP3 is biased, a first electrode of the third field effect transistor MP3 is connected to a first end of the power supply, a second electrode of the third field effect transistor MP3 is connected to a first end of the second resistor, and a second end of the second resistor R2 is connected to a second end of the power supply, wherein a voltage of the first end of the second resistor R2 is a reference voltage VREF provided by the reference voltage generating circuit 120, the third field effect transistor MP3 may be a transistor of the same type as the first field effect transistor MP1 and the second field effect transistor MP2, and if the first field effect transistor MP1 is an NMOS transistor, the third field effect transistor MP3 is also an NMOS transistor;
preferably, the second pole of the third field effect transistor MP3 is connected to the first end of the second resistor R2 through the first common gate transistor MP5 with its gate biased, the first common gate transistor MP5 has shielding property against voltage jump, so as to improve the output stability of the reference voltage generating circuit, the control pole of the first common gate transistor MP5 is connected to the bias voltage VB1, the first stage is connected to the third field effect transistor MP3, and the second pole is connected to the second resistor R2, wherein the first common gate transistor MP5 may be a transistor of the same type as the first field effect transistor MP1 and the second field effect transistor MP2, if the first field effect transistor MP1 is an NMOS transistor, then the first common gate transistor MP5 is also an NMOS transistor;
the bandgap reference circuit 130 may include multiple control branches, each of which includes a control switch 131 and a current source 132 connected in series, and one end of each of the control branches is connected to the first pole of the third fet MP3, and the other end of each of the control branches is connected to the second pole of the third fet MP3, wherein the control switch 131 may be a transistor of the same type as the first fet MP 1;
wherein, the control switch of at least one of the control branches is controlled by the inverted signal ZO _ FB of the control signal of the comparator, and the control switch of at least one of the control branches is controlled by the control signal output by the processor 60, for example, at least a plurality of control switches of the control branches are controlled by the control signal output by the processor 60.
For example, the inverted signal ZO _ FB of the control signal of the comparator 110 is used as a switch control signal of one of the control branches, wherein the hysteresis voltage is determined by I × R, I is the same as the bias current of the bandgap reference, and R is the resistance of the second resistor R2, so the hysteresis voltage is a value with low correlation with the process and temperature, and in addition, compared with the way of adjusting the resistor to obtain the hysteresis voltage, the present embodiment can effectively save the area occupied by the circuit;
in this embodiment, VREF is reduced by the bandgap reference circuit 130 to obtain the hysteresis voltage of the comparator, where VREF is an adjustable voltage, and the adjustment mode is a current adjustment mode, where the current is from a current in the bandgap reference circuit with low temperature and process correlations, that is, the hysteresis voltage of the comparator is a value with low temperature and process correlations, so as to be beneficial to improving the uniformity of chip performance.
In this embodiment, the peak detection is performed on the output rf signal of the low noise amplifier through the conversion module, and the rectified output dc signal VODC, VODC and the reference voltage VREF having low correlation with temperature and process are simultaneously input to the comparator using the hysteresis method, and the output ZO _ DIG of the comparator can be sampled to the processor (CPU)60 through a plurality of continuous flip-flops;
the reference voltage generating circuit 120 may adopt a current mirror image bias mode the same as that of the converting module 200 (rectifying branch);
the amplifier 210 may include a structure as shown in fig. 5, which may include a transistor MP6, a transistor MP7, a transistor Q1, a transistor Q2, and a capacitor C3, wherein the transistors MP6 and MP7 may be NMOS transistors, and the transistors Q1 and Q2 may be PMOS transistors;
the source of the transistor Q1 is connected to the positive terminal Vdd1 of the power supply, the gate of the transistor Q1 is connected to the drain of the transistor Q1 and the first end of the capacitor C3, the drain of the transistor Q1 is grounded through the transistor MP6, the source of the transistor Q2 is connected to the positive terminal Vdd1 of the power supply, the gate of the transistor Q2 is connected to the drain of the transistor Q2 and the second end of the capacitor C3, the drain of the transistor Q2 is grounded through the transistor MP7, and the radio frequency differential signals VRFP and VRFN are amplified by the MOS transistors to output VRFIN and VRFIP;
the comparator 110 may include a structure as shown in fig. 6, which includes a transistor MP8, a transistor MP9, a transistor Q3, a transistor Q4, a transistor Q5, a transistor Q6, a transistor Q7, an inverter U1, an inverter U2, a current source 111, a current source 112, a current source 113, a current source 114; the transistors MP8 and MP9 may be NMOS transistors, and the transistors Q3, Q4, Q5, Q6, and Q7 may be PMOS transistors;
the source of the transistor MP8 and the source of the transistor MP9 are connected and then grounded through the current source 111, the drain of the transistor MP8 is connected to the drain of the transistor Q3, the drain of the transistor MP9 is connected to the drain of the transistor Q4, the source of the transistor Q3 is connected to the positive terminal Vdd2 of the power supply, the drain of the transistor Q3 is connected to the source of the transistor Q5, and the drain of the transistor Q5 is grounded through the current source 112; the source of the transistor Q4 is connected to the positive terminal Vdd2 of the power supply, the drain of the transistor Q4 is connected to the source of the transistor Q6, and the drain of the transistor Q6 is connected to the gate of the transistor Q7 and to ground through the current source 113; the source of the transistor Q7 is connected to the positive terminal Vdd2 of the power supply, and the drain of the transistor Q7 is connected to the input of the inverter U1 and to ground through the current source 114; the grid of the transistor Q3 and the grid of the transistor Q4 are connected and then connected with the drain of the transistor Q5, the grid of the transistor Q3 and the grid of the transistor Q4 are connected and then connected with the bias voltage VB, and the output end of the inverter U1 is connected with the input end of the inverter U2.
For the detection circuit in this embodiment, when no signal is input, due to non-ideal factors such as previous stage circuit design and process manufacturing, the differential input terminal of the comparator still has a certain offset (offset), and therefore, before detection, the offset needs to be calibrated, and the calibration flow is as follows:
step A: when the low noise amplifier 20 is turned off (LNA disable) and no rf signal is input, the inverting input terminal (signal VODC) of the comparator 110 is slightly lower than the non-inverting input terminal (signal VREF), at this time, the output of the comparator 110 is at a high level "1", then, the processor 60 outputs a corresponding control signal to the bandgap reference circuit 130, adjusts (with monotonicity) the current level in the reference voltage generating circuit to realize adjustment of VREF, until the output of the comparator is inverted to a low level "0", records the voltage value VREF _ S1 of the reference voltage output by the reference voltage generating circuit at this time, it is considered that the offset at the input terminal of the comparator is minimum in the configuration where VREF is VREF _ S1, and then, step B is executed;
and B: calculating Δ VREF _ S1 ═ VREF _ S0 — VREF _ S1|, where VREF _ S0 is the voltage value of the reference voltage output by the reference voltage generation circuit, i.e., Δ VREF _ S1 is the adjustment control amount of the control signal output by the processor to VREF when each control switch controlled by the control signal output by the processor is in an off state in the bandgap reference circuit, and it should be noted that, at this time, each control switch controlled by the inverted signal ZO _ FB of the control signal of the comparator is also in an off state;
that is, Δ VREF _ S1 is the absolute value of the difference between VREF _ S0 and VREF _ S1;
and C: acquiring an envelope threshold voltage VREF _ S2 corresponding to a power backoff of 5dB to 10dB of an input 1dB compression point of the low noise amplifier 20, namely, when the low noise amplifier 20 is in an on state, inputting a radio frequency signal with preset power to the low noise amplifier 20, and recording a voltage value VREF _ S2 of an output signal of the conversion module 200, wherein the preset power is a power value obtained by subtracting any value of 5dB to 10dB from a power value of the input 1dB compression point of the low noise amplifier 20;
step D: VREF is set to VREF _ S3 ═ Δ VREF _ S1+ VREF _ S2;
the calibration mode is favorable for ensuring the consistency among different chips, thereby ensuring the consistency of AGC functions and performances on different chips and better improving the discreteness brought by mismatch of processes and circuits.
In this embodiment, the trigger principle that the detection circuit can realize AGC (automatic gain control) gain adjustment is as follows: as the radio frequency input signal (the radio frequency output signal of the low noise amplifier) received by the detection circuit increases, the VODC continuously decreases, and when the voltage is as low as the hysteresis voltage corresponding to VREF _ S3, the output of the comparator undergoes level inversion from "0" to "1"; as the rf input signal (the rf output signal of the low noise amplifier) received by the detection circuit decreases, the VODC increases, and when it reaches VREF _ S3, the output of the comparator undergoes a level inversion from "1" to "0".
In addition, for the control of the automatic gain, the AGC can select one or two rf signal power values as a trigger value to achieve a fast response to the gain of the receiving loop, and adjust the gain of the LNA to ensure the quality of the signal.
The detection circuit provided by the embodiment of the invention performs power peak value detection on the radio frequency output signal of the low noise amplifier, converts the radio frequency output signal into a direct current voltage value which changes along with the amplitude of the radio frequency signal, compares the direct current voltage value with a reference standard, and outputs the direct current voltage value to the processor, when the radio frequency output signal of the low noise amplifier is overlarge, the conversion module outputs a high level 1, and the processor considers that the gain of the receiving link is overlarge, can respond to reduce the gain of the low noise amplifier, so that the distortion of the signal can be avoided, and the quality of the receiving link signal can be ensured.
The detection circuit provided by the embodiment of the invention is arranged at the output end of a low noise amplifier of a radio frequency receiver, an output digital signal can be directly sent to a processor (CPU) of an SOC (system on chip), and then the gain of a receiving link is automatically controlled by a digital baseband in the processor, because the power value of the directly detected radio frequency signal is used as a trigger signal controlled by AGC (automatic gain control), the detection circuit can realize quick response, is favorable for the anti-blocking and anti-interference performance of receiving, can greatly improve the anti-blocking and anti-blocking performance of receiving in a Bluetooth chip, and moreover, the hysteresis voltage of a comparator is a value with low correlation with temperature and process, is favorable for the consistency of the chip performance, in addition, by adopting a digital auxiliary calibration process, the consistency of the Bluetooth chip can be further improved, the yield after the chip quantity can be ensured, in addition, the detection circuit in the embodiment, the circuit has the advantages of few passive devices, small occupied area and capability of effectively controlling the cost.
In addition, in another embodiment, the first terminal of the power supply in the conversion module may be a positive terminal of the power supply, and the second terminal of the power supply is a ground, accordingly, it can be understood that, devices such as MP1, MP2, MP3, MP4, MP5, etc. may adopt PMOS transistors according to the change, where the first terminal is a source and the second terminal is a drain, at this time, the output signal VODC of the conversion module may increase with the increase of the power of the output radio frequency signal of the low noise amplifier 20, when the signal processing module 100 determines that the dc voltage signal VODC is greater than the reference voltage, it is determined that the gain of the receiving link is too large, and the processor responds according to the control signal output by the signal processing module, so as to reduce the gain of the low noise amplifier, avoid distortion of the signal, and thus ensure the quality of the.
The embodiment of the present invention further provides a wireless radio frequency receiver, which includes a processor, a low noise amplifier connected to an antenna for amplifying a signal received by the antenna, and the detection circuit, where the processor is configured to adjust a gain of the low noise amplifier according to a control signal output by the detection circuit.
The wireless radio frequency receiver may be a 2.4G frequency band wireless radio frequency receiver, for example, the wireless radio frequency receiver is a bluetooth radio frequency receiver or a WIFI radio frequency receiver.
The embodiment of the invention also provides a chip which comprises the wireless radio frequency receiver. For example, the chip is a bluetooth chip or a WIFI chip;
the embodiment of the invention also provides electric equipment which comprises the chip, and the electric equipment can be a Bluetooth headset, a Bluetooth sound box and the like.
The embodiment of the invention also provides a detection method of a wireless radio frequency receiver, wherein the wireless radio frequency receiver comprises a processor and a low noise amplifier which is used for being connected with an antenna to amplify signals received by the antenna, and the method comprises the following steps:
step S1: converting the output radio frequency signal of the low noise amplifier into a direct current voltage signal through a conversion module and then outputting the direct current voltage signal to a signal processing module, wherein the conversion module comprises a first field effect transistor, a second field effect transistor, a first capacitor, a second capacitor and a first resistor, a first pole of the first field effect transistor and a first pole of the second field effect transistor are connected with a first end of a power supply, a second pole of the first field effect transistor and a second pole of the second field effect transistor are connected with a first end of the first resistor, a second end of the first resistor is connected with a second end of the power supply, a control pole of the first field effect transistor is biased and connected with the first end of the first capacitor, a control pole of the second field effect transistor is biased and connected with a first end of the second capacitor, and the first field effect transistor and the second field effect transistor are connected with the first end of the second capacitor, wherein the first, The second field effect transistors are the same, and a signal on the first end of the first resistor is an output signal of the conversion module;
step S2: the signal processing module detects the magnitude relation between the direct current voltage signal and the reference voltage and outputs a control signal according to the magnitude relation so that the processor adjusts the gain of the low noise amplifier.
Preferably, in an embodiment, the signal processing module includes a comparator, a bandgap reference circuit, and a reference voltage generating circuit for providing a reference voltage, an output terminal of the reference voltage generating circuit is connected to a non-inverting input terminal of the comparator, and an output terminal of the converting module is connected to an inverting input terminal of the comparator; the band-gap reference circuit is connected with the output end of the comparator and the reference voltage generating circuit;
the reference voltage generating circuit comprises a third field effect transistor and a second resistor, wherein a control electrode of the third field effect transistor is biased, a first electrode of the third field effect transistor is connected with a first end of the power supply, a second electrode of the third field effect transistor is connected with a first end of the second resistor, a second end of the second resistor is connected with a second end of the power supply, and the voltage of the first end of the second resistor is the reference voltage provided by the reference voltage generating circuit;
the band-gap reference circuit comprises a plurality of control branches, each control branch comprises a control switch and a current source which are connected in series, one end of each control branch is connected with the first pole of the third field effect transistor, and the other end of each control branch is connected with the second pole of the third field effect transistor, wherein the control switch of at least one control branch is controlled by the inverted signal of the control signal of the comparator, and the control switch of at least one control branch is controlled by the control signal output by the processor;
wherein, prior to the step S1, the method further comprises calibrating the comparator by:
when the low noise amplifier is in a closed state, controlling the band gap reference circuit to adjust the reference voltage output by the reference voltage generating circuit, and recording the voltage value VREF _ S1 of the reference voltage output by the reference voltage generating circuit when the output of the comparator is inverted;
calculating Δ VREF _ S1 ═ VREF _ S0 — VREF _ S1|, where VREF _ S0 is a voltage value of a reference voltage output by the reference voltage generation circuit when each of the control switches controlled by the control signal output by the processor is in an off state in the bandgap reference circuit;
when the low noise amplifier is in an on state, inputting a radio frequency signal with preset power to the low noise amplifier, and recording a voltage value VREF _ S2 of an output signal of the conversion module, wherein the preset power is a power value obtained by subtracting any value from 5dB to 10dB from a power value of an input 1dB compression point of the low noise amplifier;
and controlling the band gap reference circuit to adjust the reference voltage output by the reference voltage generating circuit, so that the reference voltage output by the reference voltage generating circuit is equal to the sum of Δ VREF _ S1 and VREF _ S2.
It will be appreciated by those skilled in the art that the above-described preferred embodiments may be freely combined, superimposed, without conflict.
It will be understood that the embodiments described above are illustrative only and not restrictive, and that various obvious and equivalent modifications and substitutions for details described herein may be made by those skilled in the art without departing from the basic principles of the invention.
Claims (15)
1. A detection circuit for a wireless radio frequency receiver, the wireless radio frequency receiver comprises a processor and a low noise amplifier, wherein the low noise amplifier is connected with an antenna to amplify signals received by the antenna, and the detection circuit comprises a conversion module and a signal processing module;
the conversion module is used for converting the output radio frequency signal of the low noise amplifier into a direct current voltage signal and outputting the direct current voltage signal to the signal processing module, the conversion module comprises a first field effect transistor, a second field effect transistor, a first capacitor, a second capacitor and a first resistor, a first pole of the first field effect transistor and a first pole of the second field effect transistor are connected with a first end of a power supply, a second pole of the first field effect transistor and a second pole of the second field effect transistor are connected with a first end of the first resistor, a second end of the first resistor is connected with a second end of the power supply, a control pole of the first field effect transistor is biased and connected with the first end of the first capacitor, a control pole of the second field effect transistor is biased and connected with the first end of the second capacitor, wherein the first field effect transistor, the second field effect transistor, the first resistor and the second resistor are connected with the first end of the, The second field effect transistors are the same, and a signal on the first end of the first resistor is an output signal of the conversion module;
the signal processing module is used for providing reference voltage, detecting the magnitude relation between the direct current voltage signal and the reference voltage, and outputting a control signal according to the magnitude relation so that the processor can adjust the gain of the low noise amplifier.
2. The detection circuit of claim 1, wherein the conversion module further comprises an amplifier that amplifies an output radio frequency signal of the low noise amplifier;
the input end of the amplifier is used for being connected with the output end of the low-noise amplifier so as to obtain the output radio-frequency signal of the low-noise amplifier, the first output end of the amplifier is connected with the second end of the first capacitor, and the second output end of the amplifier is connected with the second end of the second capacitor.
3. The detection circuit of claim 1, wherein the signal processing module comprises a comparator, a bandgap reference circuit, and a reference voltage generation circuit for providing a reference voltage;
the output end of the reference voltage generating circuit is connected with the non-inverting input end of the comparator, and the output end of the conversion module is connected with the inverting input end of the comparator;
the band-gap reference circuit is connected with the output end of the comparator and the reference voltage generating circuit, and is used for changing the reference voltage output by the reference voltage generating circuit according to the output of the comparator so as to provide hysteresis voltage for the comparator.
4. The detection circuit of claim 3, wherein the bandgap reference circuit is further configured to vary the reference voltage output by the reference voltage generation circuit according to the control signal output by the processor.
5. The detection circuit according to claim 4, wherein the reference voltage generation circuit comprises a third field effect transistor, a second resistor, a control electrode of the third field effect transistor is biased, a first electrode of the third field effect transistor is connected to the first end of the power supply, a second electrode of the third field effect transistor is connected to the first end of the second resistor, and a second end of the second resistor is connected to the second end of the power supply, wherein a voltage of the first end of the second resistor is a reference voltage provided by the reference voltage generation circuit;
the band-gap reference circuit comprises a plurality of control branches, each control branch comprises a control switch and a current source which are connected in series, one end of each control branch is connected with the first pole of the third field effect transistor, and the other end of each control branch is connected with the second pole of the third field effect transistor;
the control switch of at least one control branch is controlled by the inverted signal of the control signal of the comparator, and the control switch of at least one control branch is controlled by the control signal output by the processor.
6. The detection circuit of claim 5, wherein the second pole of the third FET is connected to the first end of the second resistor through a first common-gate transistor with its gate biased.
7. The detection circuit according to any one of claims 1 to 6, wherein the first resistor has a variable resistance.
8. The detection circuit according to any one of claims 1 to 6, wherein the second pole of the first field effect transistor and the second pole of the second field effect transistor are connected and then connected to the first end of the first resistor through a second common-gate transistor with a gate biased.
9. The detection circuit according to any one of claims 1 to 6, wherein the control electrode of the first field effect transistor is connected with a bias voltage through a third resistor so as to realize that the control electrode of the first field effect transistor is biased;
and the control electrode of the second field effect transistor is connected with the bias voltage through a fourth resistor so as to realize that the control electrode of the second field effect transistor is biased.
10. A wireless radio receiver comprising a processor, a low noise amplifier for connection to an antenna for amplifying a signal received by the antenna, and the detection circuit of any of claims 1-9, wherein the processor is configured to adjust the gain of the low noise amplifier in accordance with a control signal output by the detection circuit.
11. The wireless radio receiver of claim 10, wherein the wireless radio receiver is a bluetooth radio receiver or a WIFI radio receiver.
12. A chip comprising a radio frequency receiver as claimed in claim 10 or claim 11.
13. An electrical device comprising the chip of claim 12.
14. A method for detecting a radio frequency receiver, the radio frequency receiver including a processor and a low noise amplifier coupled to an antenna for amplifying signals received by the antenna, the method comprising:
step S1: converting the output radio frequency signal of the low noise amplifier into a direct current voltage signal through a conversion module and then outputting the direct current voltage signal to a signal processing module, wherein the conversion module comprises a first field effect transistor, a second field effect transistor, a first capacitor, a second capacitor and a first resistor, a first pole of the first field effect transistor and a first pole of the second field effect transistor are connected with a first end of a power supply, a second pole of the first field effect transistor and a second pole of the second field effect transistor are connected with a first end of the first resistor, a second end of the first resistor is connected with a second end of the power supply, a control pole of the first field effect transistor is biased and connected with the first end of the first capacitor, a control pole of the second field effect transistor is biased and connected with a first end of the second capacitor, and the first field effect transistor and the second field effect transistor are connected with the first end of the second capacitor, wherein the first, The second field effect transistors are the same, and a signal on the first end of the first resistor is an output signal of the conversion module;
step S2: the signal processing module detects the magnitude relation between the direct current voltage signal and the reference voltage and outputs a control signal according to the magnitude relation so that the processor adjusts the gain of the low noise amplifier.
15. The method according to claim 14, wherein the signal processing module comprises a comparator, a bandgap reference circuit and a reference voltage generating circuit for providing a reference voltage, an output terminal of the reference voltage generating circuit is connected to a non-inverting input terminal of the comparator, and an output terminal of the converting module is connected to an inverting input terminal of the comparator; the band-gap reference circuit is connected with the output end of the comparator and the reference voltage generating circuit;
the reference voltage generating circuit comprises a third field effect transistor and a second resistor, wherein a control electrode of the third field effect transistor is biased, a first electrode of the third field effect transistor is connected with a first end of the power supply, a second electrode of the third field effect transistor is connected with a first end of the second resistor, a second end of the second resistor is connected with a second end of the power supply, and the voltage of the first end of the second resistor is the reference voltage provided by the reference voltage generating circuit;
the band-gap reference circuit comprises a plurality of control branches, each control branch comprises a control switch and a current source which are connected in series, one end of each control branch is connected with the first pole of the third field effect transistor, and the other end of each control branch is connected with the second pole of the third field effect transistor, wherein the control switch of at least one control branch is controlled by the inverted signal of the control signal of the comparator, and the control switch of at least one control branch is controlled by the control signal output by the processor;
wherein, prior to the step S1, the method further comprises calibrating the comparator by:
when the low noise amplifier is in a closed state, controlling the band gap reference circuit to adjust the reference voltage output by the reference voltage generating circuit, and recording the voltage value VREF _ S1 of the reference voltage output by the reference voltage generating circuit when the output of the comparator is inverted;
calculating Δ VREF _ S1 ═ VREF _ S0 — VREF _ S1|, where VREF _ S0 is a voltage value of a reference voltage output by the reference voltage generation circuit when each of the control switches controlled by the control signal output by the processor is in an off state in the bandgap reference circuit;
when the low noise amplifier is in an on state, inputting a radio frequency signal with preset power to the low noise amplifier, and recording a voltage value VREF _ S2 of an output signal of the conversion module, wherein the preset power is a power value obtained by subtracting any value from 5dB to 10dB from a power value of an input 1dB compression point of the low noise amplifier;
and controlling the band gap reference circuit to adjust the reference voltage output by the reference voltage generating circuit, so that the reference voltage output by the reference voltage generating circuit is equal to the sum of Δ VREF _ S1 and VREF _ S2.
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