CN113534513A

CN113534513A - Semiconductor packaging structure and display device

Info

Publication number: CN113534513A
Application number: CN202010317718.9A
Authority: CN
Inventors: 吴永良; 杜帅; 陈宥烨; 常鹏刚
Original assignee: Xianyang Caihong Optoelectronics Technology Co Ltd
Current assignee: Xianyang Caihong Optoelectronics Technology Co Ltd
Priority date: 2020-04-21
Filing date: 2020-04-21
Publication date: 2021-10-22

Abstract

The embodiment of the invention discloses a semiconductor packaging structure and a display device. The semiconductor package structure includes, for example, a main substrate including: the main substrate is provided with a mounting area, a first lead part and a second lead part, the first lead part comprises a first protruding structure and a second protruding structure which protrude outwards, and the second lead part comprises a third protruding structure and a fourth protruding structure which protrude outwards; and the semiconductor chip is arranged in the mounting area, wherein the first pin part and the second pin part are respectively provided with a plurality of connecting pins, and the plurality of connecting pins are electrically connected with the semiconductor chip. The invention can solve the problem that the thin film flip chip packaging structure connected with the liquid crystal panel or the printed circuit board is stripped or falls off from the liquid crystal panel or the printed circuit board due to external force applied to the liquid crystal panel in the transportation and assembly processes.

Description

Semiconductor packaging structure and display device

Technical Field

The present invention relates to the field of semiconductor technologies, and in particular, to a semiconductor package structure and a display device.

Background

With the improvement of semiconductor technology, liquid crystal displays have advantages of low power consumption, light weight, high resolution, high color saturation, long service life, and the like, and thus are widely used in mobile phones, liquid crystal screens of notebook computers or desktop computers, liquid crystal televisions, and other life-related electronic products. Among them, a driver IC (driver IC) of a display is an essential element of a liquid crystal display. In response to various application requirements of the driving Chip of the lcd device, a TAB (tape automated bonding) packaging technology is generally adopted for Chip packaging, and a Chip-On-Film (COF) packaging structure is one of the packaging structures applying the TAB technology.

At present, the COF package structure is usually connected to a liquid crystal panel of a display device, however, the liquid crystal panel is often subjected to various external forces during transportation and assembly processes, so that the COF package structure connected to the liquid crystal panel or a printed circuit board is easily peeled or dropped from the liquid crystal panel or the printed circuit board, thereby causing product failure and being incapable of being used normally.

Disclosure of Invention

The invention discloses a semiconductor packaging structure and a display device, which can solve the problem that a thin film flip chip packaging structure connected with a liquid crystal panel or a printed circuit board is stripped or falls off from the liquid crystal panel or the printed circuit board due to external force applied to the liquid crystal panel in the transportation and assembly processes.

Specifically, an embodiment of the present invention discloses a semiconductor package structure, which includes: a primary substrate comprising: the main substrate is provided with a mounting area, a first pin part and a second pin part, wherein the first pin part and the second pin part are positioned on two opposite sides of the mounting area and are respectively adjacent to the first side and the second side, the first pin part comprises a first protruding structure protruding outwards based on the third side and a second protruding structure protruding outwards based on the fourth side, and the second pin part comprises a third protruding structure protruding outwards based on the third side and a fourth protruding structure protruding outwards based on the fourth side; and the semiconductor chip is arranged in the mounting area, wherein the first pin part and the second pin part are respectively provided with a plurality of connecting pins, and the plurality of connecting pins are electrically connected with the semiconductor chip.

In an embodiment of the present invention, a junction of the first protruding structure and the third side surface is provided with a first fillet, a junction of the second protruding structure and the fourth side surface is provided with a second fillet, a junction of the third protruding structure and the third side surface is provided with a third fillet, and a junction of the fourth protruding structure and the fourth side surface is provided with a fourth fillet.

In one embodiment of the present invention, the first protruding structure includes a first face, a second face connecting the first face, and a third face connecting the second face, the first face is flush with the first side face, the second face is perpendicular to the first face and parallel to the third side face, the third face is inclined based on the second face in a direction away from the first face to intersect with the third side face, wherein a fifth rounded corner is provided at a connection of the third face and the second face.

In an embodiment of the present invention, any two of the first fillet, the second fillet, the third fillet, the fourth fillet and the fifth fillet are fillets with the same angle, or all of the first fillet, the second fillet, the third fillet, the fourth fillet and the fifth fillet are fillets with different angles.

In one embodiment of the present invention, the main substrate further includes at least one fifth bump structure protruding outward based on the third side and at least one sixth bump structure protruding outward based on the fourth side, the at least one fifth bump structure being located between the first bump structure and the third bump structure, and the at least one sixth bump structure being located between the second bump structure and the fourth bump structure.

In an embodiment of the present invention, at least two of the first bump structure, the second bump structure, the third bump structure, the fourth bump structure, the at least one fifth bump structure, and the at least one sixth bump structure are the same structure, or are all different structures.

In an embodiment of the present invention, the semiconductor package structure further includes: an auxiliary substrate surrounding the main substrate and complementarily coupled to the main substrate, the auxiliary substrate including a first cutting sub-portion adjacent to the third side surface and a second cutting sub-portion adjacent to the fourth side surface, the first cutting sub-portion being provided with a plurality of first mounting holes arranged at intervals in a direction parallel to the third side surface, the second cutting sub-portion being provided with a plurality of second mounting holes arranged at intervals in a direction parallel to the fourth side surface; a first reinforcing structure provided on the first cutting sub-portion and located at a side of the plurality of first mounting holes close to the third side surface; and a second reinforcing structure disposed on the second cutting sub-portion and located at a side of the plurality of second mounting holes close to the fourth side surface.

In one embodiment of the present invention, the auxiliary substrate further includes a third cutting sub-portion adjacent to the first side surface and a fourth cutting sub-portion adjacent to the second side surface; the semiconductor package structure further includes: a third reinforcing structure disposed on the third cutting sub-portion and adjacent to the first side and the third side; a fourth reinforcing structure disposed on the third cutting sub-portion and adjacent to the first side and the fourth side; a fifth reinforcement structure disposed on the fourth cutting sub-portion and adjacent to the second side and the third side; a sixth reinforcing structure disposed on the fourth cutting sub-portion and adjacent to the second and fourth lateral sides.

In one embodiment of the invention, the third and fifth reinforcing structures are in communication with the first reinforcing structure, and the fourth and sixth reinforcing structures are in communication with the second reinforcing structure.

Furthermore, a display device disclosed in an embodiment of the present invention includes: any of the foregoing semiconductor package structures; a display panel connected to the plurality of connection pins of the first pin part of the semiconductor package structure; and a printed circuit board connected to the plurality of connection pins of the second pin part of the semiconductor package structure.

The technical scheme of the invention can have one or more of the following beneficial effects: the problem that the thin film flip chip packaging structure connected with the liquid crystal panel or the printed circuit board is stripped or falls off from the liquid crystal panel or the printed circuit board due to external forces of various forms when the liquid crystal panel is subjected to transportation and assembly processes is solved by arranging the first protruding structure protruding outwards based on the third side surface, the second protruding structure protruding outwards based on the fourth side surface, the third protruding structure protruding outwards based on the third side surface and the fourth protruding structure protruding outwards based on the fourth side surface on the first pin part and the second pin part, and the problem that the product fails and cannot be used normally is avoided; by designing the round angle on the protruding structure, the lateral anti-tearing capability of the semiconductor packaging structure is improved, and the product yield is improved; the stress area corresponding to the pin part is increased, so that the combination tightness of the semiconductor packaging structure, the display panel and the printed circuit board is improved; through set up reinforcing structure on auxiliary substrate, guarantee when cutting semiconductor packaging structure, main substrate can not take place the fracture.

Drawings

In order to more clearly illustrate the technical solution of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on the drawings without creative efforts.

Fig. 1 is a schematic structural diagram of a chip-on-film package structure in the prior art.

Fig. 2 is a schematic structural diagram of a semiconductor package structure according to a first embodiment of the present invention.

Fig. 3 is another structural schematic diagram of a semiconductor package structure according to the first embodiment of the disclosure.

Fig. 4 is a schematic structural diagram of a semiconductor package structure according to a second embodiment of the disclosure.

Fig. 5 is another structural schematic diagram of a semiconductor package structure according to a second embodiment of the disclosure.

Fig. 6 is a schematic structural diagram of a semiconductor package structure according to a third embodiment of the disclosure.

Fig. 7 is another structural schematic diagram of a semiconductor package structure according to a third embodiment of the disclosure.

Fig. 8 is a schematic structural diagram of a semiconductor package structure according to a fourth embodiment of the disclosure.

Fig. 9 is another structural schematic diagram of a semiconductor package structure according to a fourth embodiment of the disclosure.

Fig. 10 is a schematic structural diagram of a display device according to a fifth embodiment of the disclosure.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the invention described herein are, for example, capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

It should be noted that the division of the embodiments of the present invention is only for convenience of description and should not be construed as a limitation, and features of various embodiments may be combined and referred to each other without contradiction.

[ first embodiment ] A method for manufacturing a semiconductor device

As shown in fig. 1, in the conventional chip-on-film package structure, the connection pins on one side are connected to the liquid crystal panel of the display device, and the connection pins on the other side are connected to the printed circuit board, however, the liquid crystal panel is often subjected to various external forces during transportation and assembly, so that the chip-on-film package structure connected to the liquid crystal panel or the printed circuit board is easily peeled off or falls off from the liquid crystal panel or the printed circuit board, and thus the product fails and cannot be used normally.

In view of the above, referring to fig. 2, a first embodiment of the invention discloses a semiconductor package structure 10, such as a Chip-On-Film (COF) package structure. As shown in fig. 2, the semiconductor package structure 10 includes, for example: a main substrate 11 and a semiconductor chip 12.

The main substrate 11 includes, for example: the main substrate 11 is provided with a mounting region 111, and a lead portion 112 and a lead portion 113 located on two opposite sides of the mounting region 111 and adjacent to the side 1111 and the side 1112, respectively, and the lead portion 112 includes a protruding region 1121 protruding outward based on the side 1113, and a protruding region 1122 protruding outward based on the side 1114, for example. The lead portion 113 includes, for example, a convex region 1131 that protrudes outward based on the side 1113, and a convex region 1132 that protrudes outward 12 based on the side 1114. The semiconductor chip 12 is disposed in the mounting region 111, wherein the lead portion 112 and the lead portion 113 are provided with, for example, a plurality of connection pins 1123 and a plurality of connection pins 1133, respectively, and the plurality of connection pins 1123 and the plurality of connection pins 1133 are electrically connected to the semiconductor chip 12. It should be noted that the connection pins 1123 and the connection pins 1133 are not illustrated in the figure, and connection is established between the semiconductor chip 12 and the connection lines, for example, through internal connection lines.

Specifically, the primary substrate 11 is, for example, a flexible circuit substrate including a flexible base material, which may also be referred to as a flexible film substrate, and a circuit layer, where "flexible" means that horizontal regions of the substrate separated by the cutting lines can be vertically displaced with respect to each other without being separated from the substrate or broken. The flexible film substrate is made of resin such as Polyimide, polyvinyl acetate or the like, for example, but not limited to, Polyimide (PI), Polyethylene terephthalate (PET) or the like. The wiring layer may be understood to include the aforementioned plurality of connection pins 1123 and plurality of connection pins 1133, as well as a plurality of connection pins 1123 and a plurality of connection lines between connection pins 1133 and the semiconductor chip 12. The aforementioned semiconductor chip 12 is, for example, a display driver chip, or a display driver chip and a touch control chip packaged together, or a display driver chip, a touch control chip and a fingerprint identification chip packaged together, etc. The semiconductor chip 12 is disposed in the mounting region of the main substrate 11 by a sealant, for example, wherein the sealant may be one selected from the group consisting of an underfill material, a resin, an Anisotropic Conductive Paste (ACP), an Anisotropic Conductive Film (ACF), and the like.

The specific number of the plurality of connection pins 1123 and the plurality of connection pins 1133 is not limited in the embodiments of the present invention, and the number of the connection pins is illustrated in the figure only for better understanding of the embodiments. One of the

lead portions

112 and 113 is used to connect a display panel, such as a liquid crystal panel, and the other is used to connect a printed circuit board, such as a PCB.

Further, as shown in fig. 2, the

bump structures

1121, 1122, 1131, and 1132 are, for example, identical structures and are identical in size and shape.

Bump structures

1121, 1122, 1131, and 1132 illustrated in fig. 2 are, for example, trapezoids of equal size.

In addition, the

aforementioned protruding structures

1121, 1122, 1131, and 1132 may also be completely different structures. As shown in fig. 3, the shapes and sizes of the

protrusion structures

1121, 1122, 1131, and 1132 are all different.

In addition, the

aforementioned protruding structures

1121, 1122, 1131, and 1132 may also be partially the same structure, and partially different structures.

In short, at least two of the

bump structures

1121, 1122, 1131, and 1132 disclosed in the present embodiment are the same structure, or all of them are different structures, where the same structure described herein means the same shape and size, and the different structure described herein means the shape and/or size are not completely the same.

Of course, the present invention is not limited to fig. 2 and 3, and the

bump structures

1121, 1122, 1131, and the bump interfaces 1132 may also have a circular shape, an elliptical shape, a rectangular shape, a triangular shape, a quadrangular shape, a pentagonal shape, or a hexagonal shape.

In the semiconductor package structure 10 disclosed in this embodiment, the protrusion structures 1121 protruding outward from the

side surfaces

1113 and 1122 protruding outward from the side surfaces 1114 are disposed on the pin portions 112, and the protrusion structures 1131 protruding outward from the

side surfaces

1113 and 1132 protruding outward from the side surfaces 1114 are disposed on the pin portions 113, so that the problems that the liquid crystal panel is subjected to various external forces during transportation and assembly processes, the thin film flip chip package structure connected to the liquid crystal panel or the printed circuit board is peeled or dropped from the liquid crystal panel or the printed circuit board can be solved, and the product failure can not be normally used can be avoided.

In addition, compared to the chip-on-film package structure in the prior art, the bump structure 1121, the bump structure 1122, the bump structure 1131, and the bump structure 1132 included in the semiconductor package structure 10 disclosed in the present embodiment are obtained by, for example, outwardly expanding the existing leads, that is, increasing the areas of the

leads

112 and 113, and correspondingly increasing the stressed areas of the

leads

112 and 113, so as to improve the bonding tightness between the semiconductor package structure and the display panel and the printed circuit board. Of course, the present invention is not limited thereto, and the protrusion structure 1121, the protrusion structure 1122, the protrusion structure 1131, and the protrusion structure 1132 may also be obtained by recessing the middle region of the primary substrate inwards, that is, the area corresponding to the lead portion is not changed.

[ second embodiment ]

Referring to fig. 4, a second embodiment of the invention provides a semiconductor package structure 20, such as a COF package structure. As shown in fig. 4, the semiconductor package 20 is similar to the semiconductor package 10, and includes: a main substrate 21 and a semiconductor chip 22. The main substrate 21 includes, for example: the main substrate 21 is provided with a mounting region 211, and a pin portion 212 and a pin portion 213 which are located at opposite sides of the mounting region 211 and are respectively adjacent to the side 2111 and the side 2112, wherein the pin portion 212 includes, for example, a protruding structure 2121 protruding outward based on the side 2113, and a protruding structure 2122 protruding outward based on the side 2114. The lead portion 213 includes, for example, a protruding structure 2131 protruding outward based on the side surface 2113, and a protruding structure 2132 protruding outward based on the side surface 2114. The semiconductor chip 22 is disposed in the mounting region 211, wherein the lead part 212 and the lead part 213 are provided with, for example, a plurality of connection pins 2123 and a plurality of connection pins 2133, respectively, and the plurality of connection pins 2122 and the plurality of connection pins 2133 electrically connect the semiconductor chip 22.

The semiconductor package structure 20 disclosed in the present embodiment is different from the semiconductor package structure 10 disclosed in the foregoing first embodiment in that, as shown in fig. 4, the main substrate 21 of the semiconductor package structure 20 further includes, for example, at least one protruding structure 214 protruding outward based on the side surface 2113 and at least one protruding structure 215 protruding outward based on the side surface 2114, the at least one protruding structure 214 is located between the protruding structure 2121 and the protruding structure 2131, and the at least one protruding structure 215 is located between the protruding structure 2122 and the protruding structure 2132.

At least two of the protrusion 2121, the protrusion 2122, the protrusion 2131, the protrusion 2132, the at least one protrusion 214, and the at least one protrusion 215 are the same structure, or different structures. It is understood herein that the shapes and sizes of the protruding

structures

2121, 2122, 2131, 2132, the at least one protruding structure 214 and the at least one protruding structure 215 are, for example, the same, or the shapes and sizes of the protruding

structures

2121, 2122, 2131, 2132, 214 and 215 are partially the same and partially different. The protruding

structures

2121, 2122, 2131, 2132, at least one protruding structure 214, and at least one protruding structure 215 shown in fig. 4 are trapezoidal, but the invention is not limited thereto, and the protruding

structures

2121, 2122, 2131, 2132, at least one protruding structure 214, and at least one protruding structure 215 may also be circular, oval, rectangular, triangular, quadrilateral, pentagonal, or hexagonal.

Fig. 4 illustrates that a protrusion structure 214 and a protrusion structure 215 are respectively disposed on two opposite sides of the mounting region 211, which can increase the torsion resistance of the mounting region and improve the stability of the product.

Further, the at least one projection structure 214 and the at least one projection structure 215 may be of asymmetric design, i.e. as shown in fig. 5, the at least one projection structure 214, e.g. two projection structures 214, is arranged between the projection structure 2121 and the projection structure 2131, and the at least one projection structure 215, e.g. one projection structure 215, is arranged between the projection structure 2122 and the projection structure 2132.

The present embodiment increases the torsion resistance of the main substrate and further improves the structural stability by providing at least one protrusion structure 214 between the protrusion structure 2121 and the protrusion structure 2131 and at least one protrusion structure 215 between the protrusion structure 2122 and the protrusion structure 2132.

[ third embodiment ]

Referring to fig. 6, a third embodiment of the invention discloses a semiconductor package structure 30, such as a COF package structure. As shown in fig. 6, the semiconductor package structure 30 disclosed in this embodiment is similar to the semiconductor package structure 10 disclosed in the first embodiment, and includes: a main substrate 31 and a semiconductor chip 32.

The main substrate 31 includes, for example: the opposing

sides

3111 and 3112 and the opposing

sides

3113 and 3114 connecting the

sides

3111 and 3112, the main substrate 31 is provided with a mounting region 311 and

lead portions

312 and 313 located on opposing sides of the mounting region 311 and adjacent to the

sides

3111 and 3112, respectively, the lead portions 312 including, for example, a protruding structure 3121 protruding outward based on the sides 3113 and a protruding structure 3122 protruding outward based on the sides 3114. The footer 313 includes, for example, a raised structure 3131 that is raised outward based on the side 3113 and a raised structure 3132 that is raised outward based on the side 3114. The semiconductor chip 32 is disposed within the mounting region 311, wherein the lead portion 312 and the lead portion 313 are provided with, for example, a plurality of connection pins 3123 and a plurality of connection pins 3133, respectively, the plurality of connection pins 3123 and the plurality of connection pins 3133 electrically connecting the semiconductor chip 32.

The semiconductor package structure 30 is different from the semiconductor package structure 10 in that a junction of the bump structure 3121 and the side 3113 is provided with a fillet 31211, a junction of the bump structure 3122 and the side 3114 is provided with a fillet 31221, a junction of the bump structure 3131 and the side 3113 is provided with a fillet 31311, and a junction of the bump structure 3132 and the side 3114 is provided with a fillet 31321. The fillet is designed at the connecting position of the side face of the protruding structure and the side face of the main substrate, so that the lateral anti-tearing capability of the semiconductor packaging structure can be improved, and the product yield is improved.

Further, as shown in fig. 7, the protruding structure 3121 is further provided with a protruding structure 31212, for example, the protruding structure 3122 is further provided with a rounded corner 31222, for example, the protruding structure 3131 is further provided with a rounded corner 31312, for example, and the protruding structure 3132 is further provided with a rounded corner 31322, for example. The convex structure 3121 is taken as an example for explanation. The protruding structure 3121 includes, for example, an a-face which is flush with the side face 3111, a B-face which is perpendicular to the a-face and parallel to the side face 3113, and a C-face which is connected to the B-face, which is inclined in a direction away from the a-face based on the B-face to intersect with the side face 3113, wherein a junction of the C-face and the B-face is provided with a rounded corner 31212. Other raised structures are similar to raised structure 3121. By arranging the round angle at the turning part of the protruding structure, the lateral tearing resistance of the semiconductor packaging structure can be further improved.

It should be noted that the size of the fillet is not limited in this embodiment, and any two of the aforementioned fillet 31211, fillet 31212, fillet 31221, fillet 31222, fillet 31311, fillet 31312, fillet 31321 and fillet 31322 may be fillets with the same angle, or fillets with different angles.

[ fourth example ] A

Referring to fig. 8, a fourth embodiment of the invention discloses a semiconductor package structure 40, such as a COF package structure. As shown in fig. 8, the semiconductor package structure 40 is similar to the semiconductor package structure 10 disclosed in the first embodiment, and includes: a main substrate 41 and a semiconductor chip 42. The main substrate 41 includes, for example:

opposite side surfaces

4111 and 4112, and

opposite side surfaces

4113 and 4114 connecting

side surfaces

4111 and 4112, a mounting area 411, and a lead portion 412 and a lead portion 413 located at opposite sides of the mounting area 411 and adjacent to

side surfaces

4111 and 4112, respectively, are disposed on the main substrate 41, and the lead portion 412 includes a protruding structure 4121 protruding outward based on side surface 4113, and a protruding structure 4122 protruding outward based on side surface 4114, for example. The lead part 413 includes, for example, a convex structure 4131 protruding outward based on the side surface 4113, and a convex structure 4132 protruding outward based on the side surface 4114. The semiconductor chip 42 is disposed in the mounting region 411, wherein the lead portion 412 and the lead portion 413 are provided with, for example, a plurality of connection pins 4123 and a plurality of connection pins 4133, respectively, and the plurality of connection pins 4123 and the plurality of connection pins 4133 electrically connect the semiconductor chip 42.

The semiconductor package 40 differs from the semiconductor package 10 in that the semiconductor package 40 further includes, for example: a reinforcing structure 43, a reinforcing structure 44 and an auxiliary substrate 49. The auxiliary substrate 49 includes, for example, a cutting sub-portion 491 adjacent to the side surface 4113 and a cutting sub-portion 492 adjacent to the side surface 4114, the cutting sub-portion 491 is provided with a plurality of mounting holes 4911 arranged at intervals in a direction parallel to the side surface 4113, and the cutting sub-portion 492 is provided with a plurality of mounting holes 4921 arranged at intervals in a direction parallel to the side surface 4114. Reinforcing structures 43 are provided on cutter portion 491 on a side of plurality of mounting holes 4911 adjacent to side 4113. Reinforcing structure 44 is disposed on cutter sub-portion 492 on a side of plurality of mounting holes 4921 proximate to side 4114.

The plurality of mounting holes 4911 and the plurality of mounting holes 4921 are, for example, arranged in a one-to-one correspondence at equal intervals and located at the same height. The plurality of mounting holes 4911 and the plurality of mounting holes 4921 are, for example, the same size and shape. The plurality of mounting holes 4911 and the plurality of mounting holes 4921 disclosed in the present embodiment are used, for example, to cooperate with one or more sprocket reels during product manufacturing to effect transfer and/or alignment of semiconductor packages.

It should be noted that the semiconductor package structure disclosed in the foregoing embodiments may be understood as a form after the semiconductor package structure is cut, while the semiconductor package structure 40 disclosed in this embodiment may be understood as a form before the semiconductor package structure is cut, that is, the outer contour of the main substrate in the semiconductor package structure is a cut line, and the main substrate and the auxiliary substrate in this embodiment are, for example, an integral structure and are defined by the cut line.

This embodiment ensures that the main substrate is not broken when the semiconductor package is diced by providing the reinforcing

structures

43 and 44 on the auxiliary substrate.

Further, as shown in fig. 9, the auxiliary substrate 49 may further include a cutting sub-portion 493 adjacent to the side surface 4111 and a cutting sub-portion 494 adjacent to the side surface 4112. The semiconductor package structure 40 further includes, for example: reinforcing structure 45, reinforcing structure 46, reinforcing structure 47, and reinforcing structure 48.

Wherein the reinforcing structure 45 is disposed on the cutting sub-portion 493, and adjacent to the side surface 4111 and the side surface 4113. Reinforcing structure 46 is disposed on cutter sub-portion 493 and adjacent to side 4111 and side 4114. The reinforcing structure 47 is disposed on the cutting sub-portion 494 and adjacent to the side surface 4112 and the side surface 4113. Reinforcing structure 48 is disposed on cutting sub-portion 4124 and adjacent to side 4112 and side 4114. By providing reinforcement structure 45, reinforcement structure 46, reinforcement structure 47, and reinforcement structure 48, the strength of semiconductor package structure 40 is further improved.

Further, the reinforcing

structures

45 and 47 are communicated with the reinforcing structure 43, and the reinforcing structures 46 and 48 are communicated with the reinforcing structure 44, which is here understood that the reinforcing structure 43, the reinforcing structure 44, the reinforcing structure 45, the reinforcing structure 46, the reinforcing structure 47 and the reinforcing structure 48 are integrally formed structures, and the strength of the semiconductor package structure is ensured by providing the communicated reinforcing structures.

Specifically, the aforementioned reinforcing

structures

43, 44, 45, 46, 47 and 48 are copper layers, for example, it should be noted that the area and thickness of the copper layers are not limited in this embodiment, and the reinforcing structures 43 may be intermittently disposed on the cutting sub-portion 491 at a side of the plurality of mounting holes 4911 close to the side surface 4113, and similarly, the reinforcing structures 44 may be intermittently disposed on the cutting sub-portion 492 at a side of the plurality of mounting holes 4921 close to the side surface 4114. It should be understood that the illustrations in fig. 8 and 9 are for better understanding of the present embodiment only, and the present invention is not limited thereto.

[ fifth embodiment ]

Referring to fig. 10, a fifth embodiment of the present invention discloses a display device. As shown in fig. 10, the display device 50 includes, for example, a semiconductor package structure 51, a display panel 52, and a printed circuit board 53.

For example, the semiconductor package structure 51 is the semiconductor package structure described in the first to fourth embodiments, and for specific description of the semiconductor package structure, reference may be made to the first to fourth embodiments, which are not repeated herein for brevity. The display panel 52 is connected to a plurality of connection pins of one pin portion of the semiconductor package 51, wherein the display panel 52 is, for example, a liquid crystal panel. The printed circuit board 53 is connected to a plurality of connection pins of another pin portion of the semiconductor package 51, wherein the printed circuit board 53 is, for example, a PCB circuit board.

Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims

1. A semiconductor package structure, comprising:

a primary substrate comprising: the main substrate is provided with a mounting area, a first pin part and a second pin part, wherein the first pin part and the second pin part are positioned on two opposite sides of the mounting area and are respectively adjacent to the first side and the second side, the first pin part comprises a first protruding structure protruding outwards based on the third side and a second protruding structure protruding outwards based on the fourth side, and the second pin part comprises a third protruding structure protruding outwards based on the third side and a fourth protruding structure protruding outwards based on the fourth side;

and the semiconductor chip is arranged in the mounting area, wherein the first pin part and the second pin part are respectively provided with a plurality of connecting pins, and the plurality of connecting pins are electrically connected with the semiconductor chip.

2. The semiconductor package structure of claim 1, wherein a junction of the first bump structure and the third side is provided with a first fillet, a junction of the second bump structure and the fourth side is provided with a second fillet, a junction of the third bump structure and the third side is provided with a third fillet, and a junction of the fourth bump structure and the fourth side is provided with a fourth fillet.

3. The semiconductor package structure according to claim 2, wherein the first bump structure includes a first face, a second face connecting the first face, and a third face connecting the second face, the first face is flush with the first side face, the second face is perpendicular to the first face and parallel to the third side face, the third face is inclined based on the second face in a direction away from the first face to intersect with the third side face, and a fifth rounded corner is provided at a junction of the third face and the second face.

4. The semiconductor package structure of claim 3, wherein any two of the first fillet, the second fillet, the third fillet, the fourth fillet and the fifth fillet are fillets with the same angle, or the first fillet, the second fillet, the third fillet, the fourth fillet and the fifth fillet are fillets with different angles.

5. The semiconductor package structure of claim 1, wherein the main substrate further comprises at least one fifth bump structure protruding outward based on the third side and at least one sixth bump structure protruding outward based on the fourth side, the at least one fifth bump structure being located between the first bump structure and the third bump structure, the at least one sixth bump structure being located between the second bump structure and the fourth bump structure.

6. The semiconductor package structure of claim 5, wherein at least two of the first bump structure, the second bump structure, the third bump structure, the fourth bump structure, the at least one fifth bump structure, and the at least one sixth bump structure are the same structure or are all different structures.

7. The semiconductor package structure of claim 1, further comprising:

an auxiliary substrate surrounding the main substrate and complementarily coupled to the main substrate, the auxiliary substrate including a first cutting sub-portion adjacent to the third side surface and a second cutting sub-portion adjacent to the fourth side surface, the first cutting sub-portion being provided with a plurality of first mounting holes arranged at intervals in a direction parallel to the third side surface, the second cutting sub-portion being provided with a plurality of second mounting holes arranged at intervals in a direction parallel to the fourth side surface;

a first reinforcing structure provided on the first cutting sub-portion and located at a side of the plurality of first mounting holes close to the third side surface;

and a second reinforcing structure disposed on the second cutting sub-portion and located at a side of the plurality of second mounting holes close to the fourth side surface.

8. The semiconductor package structure of claim 7, wherein the auxiliary substrate further comprises a third cutting sub-portion adjacent to the first side surface and a fourth cutting sub-portion adjacent to the second side surface; the semiconductor package structure further includes:

a third reinforcing structure disposed on the third cutting sub-portion and adjacent to the first side and the third side;

a fourth reinforcing structure disposed on the third cutting sub-portion and adjacent to the first side and the fourth side;

a fifth reinforcement structure disposed on the fourth cutting sub-portion and adjacent to the second side and the third side;

a sixth reinforcing structure disposed on the fourth cutting sub-portion and adjacent to the second and fourth lateral sides.

9. The semiconductor package structure of claim 8, wherein the third reinforcement structure and the fifth reinforcement structure are in communication with the first reinforcement structure, and the fourth reinforcement structure and the sixth reinforcement structure are in communication with the second reinforcement structure.

10. A display device, comprising:

a semiconductor package structure of any one of claims 1-6;

a display panel connected to the plurality of connection pins of the first pin part of the semiconductor package structure; and

a printed circuit board connected to the plurality of connection pins of the second pin part of the semiconductor package structure.