CN113524022A - Polishing pad and method for manufacturing semiconductor device - Google Patents

Polishing pad and method for manufacturing semiconductor device Download PDF

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Publication number
CN113524022A
CN113524022A CN202111089592.5A CN202111089592A CN113524022A CN 113524022 A CN113524022 A CN 113524022A CN 202111089592 A CN202111089592 A CN 202111089592A CN 113524022 A CN113524022 A CN 113524022A
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China
Prior art keywords
polishing
pit
pits
contact surface
equal
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CN202111089592.5A
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Chinese (zh)
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CN113524022B (en
Inventor
黄学良
邱瑞英
杨佳佳
张季平
朱顺全
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Hubei Dinglong Co ltd
Hubei Dinghui Microelectronics Materials Co ltd
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Hubei Dinglong Co ltd
Hubei Dinghui Microelectronics Materials Co ltd
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Priority to CN202111089592.5A priority Critical patent/CN113524022B/en
Publication of CN113524022A publication Critical patent/CN113524022A/en
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/11—Lapping tools
    • B24B37/20—Lapping pads for working plane surfaces
    • B24B37/22—Lapping pads for working plane surfaces characterised by a multi-layered structure
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/005—Control means for lapping machines or devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/11—Lapping tools
    • B24B37/20—Lapping pads for working plane surfaces
    • B24B37/24—Lapping pads for working plane surfaces characterised by the composition or properties of the pad materials
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/11—Lapping tools
    • B24B37/20—Lapping pads for working plane surfaces
    • B24B37/26—Lapping pads for working plane surfaces characterised by the shape of the lapping pad surface, e.g. grooved
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B49/00—Measuring or gauging equipment for controlling the feed movement of the grinding tool or work; Arrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation
    • B24B49/006—Measuring or gauging equipment for controlling the feed movement of the grinding tool or work; Arrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation taking regard of the speed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step

Abstract

The invention discloses a manufacturing method of a semiconductor device, which comprises a process of grinding the surface of a semiconductor wafer by using a polishing pad with a specific pattern; the invention also discloses a polishing pad, which comprises a polishing layer, wherein the polishing layer comprises a polishing surface and a polishing unit positioned on the polishing surface, one end of the polishing unit forms a contact surface, and the contact surface is directly contacted with the ground material; the plurality of polishing units respectively form a first part and a second part, the first part extends along a first direction and is uniformly spaced, and the second part extends along a direction parallel to the first direction and is uniformly spaced; and the polishing layer further has pits and comprises a first portion of pits and a second portion of pits; the polishing pad has excellent comprehensive performance when parameters such as limited polishing unit area ratio, pit area ratio, volume ratio and the like are in a proper range.

Description

Polishing pad and method for manufacturing semiconductor device
Technical Field
The present invention relates to the field of Chemical Mechanical Polishing (CMP) of semiconductors, and more particularly, to a polishing pad having a well-designed surface pattern structure for polishing at least one of a magnetic substrate, an optical substrate, and a semiconductor substrate, and a method of manufacturing a semiconductor device using the same.
Background
In the fabrication of integrated circuits, other electronic devices, and optical materials, many processes involving polishing, thinning, or planarizing of the material are most commonly used chemical mechanical polishing. The action principle of chemical mechanical polishing is that on a fixed polishing machine, a grinding liquid acts on a polishing pad, the polishing pad is in contact with the surface of a ground material, chemical reaction can occur, meanwhile, the polishing pad and the ground material do rotary motion on the machine, mechanical action of shearing is generated, and the chemical action and the mechanical action polish the ground material together to form a desired pattern structure.
Therefore, the flow and distribution of the slurry, the distribution of the mechanical force generated by the grooves, and the like have a determining effect on the performance of the chemical mechanical polishing pad, and the effects of these factors have different requirements for different patterns and materials, and many attempts have been made to form the groove structure of the polishing pad.
CN1990183A of west cunxix tree discloses a groove design combining concentrically arranged annular grooves and radially distributed linear grooves, with high polishing rate and excellent in-plane uniformity, but also does not disclose specific design parameters in relation to polishing performance.
TW201904719A to j.v. raney et al discloses grooves of a non-isosceles trapezoid structure and illustrates that a concentric circular groove structure is the most popular groove pattern, and a polishing pad of a non-isosceles trapezoid structure is considered to have a better polishing effect.
The prior art discloses various groove structures, but the relation between a specific groove structure and polishing performance and how to optimize are not deeply researched, the research on the polishing performance as an experimental science has the influence relation among complex factors, the research on the polishing performance is not sufficient in theory, the design of a polishing pad is crucial to the polishing performance of the polishing pad, and the manufacturing process of a semiconductor device is directly influenced.
The polishing pad is provided with the polishing units which are arranged, and the polishing layer is provided with the distributed pits, so that the polishing pad with excellent comprehensive polishing performance is optimized through a large amount of experimental researches, and can be used for the chemical mechanical polishing of at least one of magnetic substrates, optical substrates and semiconductor substrates.
Disclosure of Invention
A first object of the present invention is to provide a method for manufacturing a semiconductor device, including a step of polishing a surface of a semiconductor wafer by using a polishing pad, the polishing pad including a polishing layer, the polishing layer including a polishing surface and polishing units on the polishing surface, the polishing units constituting a polishing unit group, one end of the polishing unit group forming a contact surface, the contact surface being in direct contact with a material to be polished, a projection of each polishing unit on the contact surface being a parallelogram, two directions of the parallelogram being denoted as a first direction and a second direction, sides of the parallelogram in the first direction and the second direction being L1 and L2, respectively, an included angle between the first direction and the second direction being θ, and an area of the parallelogram being as follows:
S1=L1*L2*sinθ；
a plurality of polishing elements constituting a first section, the polishing elements of the first section extending in a first direction and being uniformly spaced,
a plurality of polishing elements constituting a second section, the polishing elements of the second section extending in a direction parallel to the first direction and being uniformly spaced, the polishing elements of the first section being spaced at a spacing equal to the spacing of the polishing elements of the second section, the spacing distance in the first direction being W1;
the polishing unit is composed of a plurality of first portions and second portions which are equally spaced from each other by a distance W2 in the second direction;
RS1= L1 × L2/((L1+ W1) × (L2+ W2)), RS1 ranges from 0.60 to 0.98;
the polishing layer further comprises a plurality of pockets comprising:
the first pit group is formed by a plurality of pits, the pits of the first pit group extend in the third direction and are uniformly spaced, the second pit group is formed by a plurality of pits, and the pits of the second pit group extend in the direction parallel to the third direction and are uniformly spaced; the distance between the adjacent pits of the first pit group is the same as that between the adjacent pits of the second pit group, and the distances in the third direction are all a;
the polishing layer comprises a plurality of pits, wherein the pits of the polishing layer consist of a plurality of first pit sets and a plurality of second pit sets, and the first pit sets and the second pit sets are parallel to each other; the distances from each other are the same and are marked as h;
defining an area ratio Rt = St/a h, where St denotes the area of a single pit projected on the contact surface, Rt ranging from 2-20%;
the polishing elements have an average height D1, the D1 being 0.15-0.8 times the thickness of the polishing layer; the height from the bottom surface of the pit to the contact surface is recorded as D2, and D2 is more than or equal to D1;
defining an effective channel volume ratio Rv = Rt D2/(1-RS1) D1, Rv ranging from 0.5 to 10.
Another object of the present invention is to provide a polishing pad for polishing of magnetic, optical and semiconductor substrates, comprising a polishing layer, the polishing layer comprising a polishing surface and polishing units disposed on the polishing surface, the polishing units constituting a polishing unit group, one end of the polishing unit group forming a contact surface, the contact surface directly contacting a material to be polished, a projection of each polishing unit on the contact surface being a parallelogram, two directions of the parallelogram being denoted as a first direction and a second direction, sides of the parallelogram in the first direction and the second direction being L1 and L2, respectively, an included angle between the first direction and the second direction being θ, and an area of the parallelogram being as follows:
S1=L1*L2*sinθ；
a plurality of polishing elements constituting a first section, the polishing elements of the first section extending in a first direction and being uniformly spaced,
a plurality of polishing elements constituting a second section, the polishing elements of the second section extending in a direction parallel to the first direction and being uniformly spaced, the polishing elements of the first section being spaced at a spacing equal to the spacing of the polishing elements of the second section, the spacing distance in the first direction being W1;
the polishing unit is composed of a plurality of first portions and second portions which are equally spaced from each other by a distance W2 in the second direction;
RS1= L1 × L2/((L1+ W1) × (L2+ W2)), RS1 ranges from 0.60 to 0.98;
the polishing layer further comprises a plurality of pockets comprising:
the first pit group is formed by a plurality of pits, the pits of the first pit group extend in the third direction and are uniformly spaced, the second pit group is formed by a plurality of pits, and the pits of the second pit group extend in the direction parallel to the third direction and are uniformly spaced; the distance between the adjacent pits of the first pit group is the same as that between the adjacent pits of the second pit group, and the distances in the third direction are all a;
the polishing layer comprises a plurality of pits, wherein the pits of the polishing layer consist of a plurality of first pit sets and a plurality of second pit sets, and the first pit sets and the second pit sets are parallel to each other; the distances from each other are the same and are marked as h;
defining an area ratio Rt = St/a h, where St denotes the area of a single pit projected on the contact surface, Rt ranging from 2-20%;
the polishing elements have an average height D1, the D1 being 0.15-0.8 times the thickness of the polishing layer; the height from the bottom surface of the pit to the contact surface is recorded as D2, and D2 is more than or equal to D1;
defining an effective channel volume ratio Rv = Rt D2/(1-RS1) D1, Rv ranging from 0.5 to 10.
According to one embodiment of the present invention, the distance between adjacent pits of the first pit group is the same as the distance between adjacent pits of the second pit group, and the distances in the third direction are both a; the first pit group and the second pit group have the same distance from each other, and are marked as h; the requirements are as follows: a is more than or equal to 4.5mm and less than or equal to 6.5 mm; h is more than or equal to 3.8mm and less than or equal to 5.8 mm.
According to an embodiment of the invention, a, h satisfy the relation: a is more than h.
According to one embodiment of the present invention, the polishing unit has L1 and L2 in the range of 22-50 mm.
According to one embodiment of the present invention, the polishing unit has L1 and L2 in the range of 25-40 mm.
According to one embodiment of the present invention, the polishing unit has W1 and W2 in the range of 0.5-5 mm.
According to one embodiment of the present invention, the polishing unit has W1 and W2 in the range of 0.8 to 3mm, more preferably 1 to 2.5 mm.
According to one embodiment of the invention, the projection of the dimple on the contact surface is one or more of a circle and a regular n-polygon, where n is an integer from 3 to 18; the diameter of the circumcircle of the pit is d, and the range of d is 1-3.5 mm.
According to one embodiment of the invention, the projection of the dimple on the contact surface is one or more of a circle and a regular n-polygon, where n is an integer from 3 to 18; the diameter of a circumscribed circle of the pit is d; rw =2d/(W1+ W2) is defined, with Rw ranging from 0.2 to 4.5.
According to one embodiment of the invention, Rw ranges from 0.3 to 3.0; preferably 0.5 to 1.
According to one embodiment of the invention, the diameter of the circumcircle of the pit is d; the projection of the pit on the contact surface is circular, Rt = (pi (d))2/4))/(a x h) 100%; the projection of the pits on the contact surface is a regular n-polygon, n is an integer from 3 to 18, and Rt = ((n/2) × (d)2(v 4) × sin (360/n))/(a × h) × 100%, wherein Rt is in the range of 5 to 18%, preferably 7.2 to 18%.
According to one embodiment of the invention, the RS1 is in the range of 0.8-0.98; and Rt/(1-RS1) is more than or equal to 0.1 and less than or equal to 5.
According to one embodiment of the invention, the Rt is preferably in the range of 5-18%, more preferably 7.2-18%, more preferably 7.4-14%.
According to one embodiment of the invention, the RS1 is in the range of 0.8-0.95%.
According to one embodiment of the invention, the 0.6. ltoreq. Rt/(1-RS 1). ltoreq.3.5.
According to one embodiment of the invention, the polishing elements have an average height D1, the average height D1 being 0.15-0.8 times the thickness of the polishing layer.
According to one embodiment of the invention, the average height D1 is 0.15 to 0.63 times the thickness of the polishing layer.
According to one embodiment of the invention, the polishing units have an average height D1, 0.34mm < D1 < 1.63mm, the height from the bottom surface of the pit to the contact surface is recorded as D2, and D2 is greater than or equal to D1.
According to one embodiment of the invention, the D2 > D1.
According to one embodiment of the invention, the 0.4mm < D1 < 1.27 mm.
According to one embodiment of the invention, the pits extend through the polishing layer.
According to one embodiment of the invention, the angle between the third direction and the first direction is denoted α 1, the range of α 1 being 0 ° < α 1 < 90 °, or the angle between the third direction and the second direction is denoted α 2, the range of α 2 being 0 ° < α 2 < 90 °.
According to one embodiment of the invention, the projection of the indentation onto the contact surface is circular, the indentation having a diameter d0(ii) a The projection of the pit on the contact surface is a regular n-polygon, the diameter of the circumcircle of the pit is dn, and dn = d0*(2π/(nsin(360/n)))1/2(ii) a D is0In the range of 1-2 mm.
According to one embodiment of the invention, the angle θ between the first direction and the second direction is 90 °; and the 0 DEG < alpha 1 is less than or equal to 45 deg.
According to one embodiment of the invention, the angle θ between the first direction and the second direction is 90 °; and the 0 DEG < alpha 2 DEG-45 deg.
According to one embodiment of the invention, the angle θ between the first direction and the second direction is 90 °; an included angle between the third direction and the first direction is recorded as alpha 1, and the range of the alpha 1 is more than or equal to 10 degrees and less than or equal to 45 degrees; and/or the included angle between the third direction and the second direction is marked as alpha 2, and the range of alpha 2 is more than or equal to 10 degrees and less than or equal to alpha 2 and less than or equal to 45 degrees.
As a more preferable embodiment of the present invention, an angle θ between the first direction and the second direction is 90 °; an included angle between the third direction and the first direction is recorded as alpha 1, and the range of the alpha 1 is more than or equal to 10 degrees and less than or equal to 20 degrees; and/or the included angle between the third direction and the second direction is marked as alpha 2, and the range of alpha 2 is more than or equal to 10 degrees and less than or equal to alpha 2 and less than or equal to 20 degrees.
In one embodiment of the present disclosure, a triangle formed by the center of an optional first dimple in the first dimple group and the centers of two second dimples closest to the first dimple selected from adjacent second dimple groups is an isosceles triangle, and the two second dimples are selected from the same second dimple group; or the triangle formed by the center of an optional second pit in the second pit group and the centers of two first pits which are selected from adjacent first pit groups and are closest to the second pit is an isosceles triangle, and the two first pits are selected from the same first pit group.
The isosceles triangle is preferably an equilateral triangle. .
In a disclosed embodiment, the polishing layer of the polishing pad of the invention optionally further comprises an endpoint detection window, preferably the detection window is an integrity window incorporated into the polishing layer.
The above-mentioned embodiments are only some specific explanations made on the technical idea of the present invention, and should not be construed as limiting the present invention to these embodiments.
The invention has the beneficial effects that:
the polishing pad with excellent comprehensive polishing performance is obtained through the defined special polishing pad surface pattern.
Drawings
The above and other objects, features and advantages of the present invention will become more readily apparent from the following detailed description of the preferred embodiments of the present invention which proceeds with reference to the accompanying drawings, but which is not intended to represent the scale and dimensions of the present invention but is to be limited to the illustrative drawings.
FIG. 1 schematically illustrates a partial perspective view of a polishing pad according to a preferred embodiment of the present invention.
Fig. 2 is a plan view of the polishing pad shown in fig. 1.
Fig. 3 is a partially enlarged plan view of fig. 2.
Fig. 4 schematically shows a magnified plan view of another preferred embodiment according to the present invention.
Fig. 5 is a sectional view schematically showing a polishing pad according to an embodiment of the present invention.
Fig. 6 is a partially enlarged plan view schematically showing the shape of the projected surface of the pit according to another preferred embodiment of the present invention.
Fig. 7 is a partially enlarged plan view schematically showing the shape of the projected surface of the pit according to another preferred embodiment of the present invention.
Fig. 8 schematically shows the projected shape of a portion of a dimple of the present invention on the contact surface.
FIG. 9 schematically illustrates a partial plan view of a polishing pad according to another preferred embodiment of the present invention.
FIG. 10 schematically illustrates a plan view of a polishing pad according to another preferred embodiment of the present invention.
FIG. 11 schematically illustrates a plan view of a polishing pad according to another preferred embodiment of the present invention.
Detailed Description
Implementation mode one
Fig. 1 is a partial perspective view schematically showing a polishing pad according to an embodiment of the present invention, and a plan view of the polishing pad is shown with reference to fig. 2. For convenience of explanation, the first direction in fig. 1 is referred to as an a direction, the second direction is referred to as a B direction, the third direction is referred to as a C direction, and the thickness direction of the polishing pad, i.e., the direction perpendicular to the surface of the polishing pad, is referred to as a Z direction.
In the first embodiment, the a direction and the B direction are 90 degrees, i.e., sin θ is 1. Referring to FIG. 1, the polishing pad of the present invention is suitable for polishing or planarizing at least one of semiconductor, optical, and magnetic substrates. The polishing layer 110 has a polishing surface 10 and a polishing unit group 20, the polishing unit group 20 is distributed on the polishing surface 10, and the surface of the polishing unit group 20 forms a contact surface directly contacting the material to be ground. The projection of each polishing unit on the contact surface is a quadrangle, preferably a parallelogram such as a rectangle and a rhombus; specifically, the polishing unit group 20 includes a first portion 21 and a second portion 22, wherein the first portion 21 and the second portion 22 each include at least one polishing unit 23, and the arrangement of the polishing unit group 20 and the size of the polishing unit directly affect the grinding performance of the polishing pad.
Referring to fig. 2 and 3, the polishing elements 23 of the first portion 21 are uniformly distributed along a direction parallel to the a direction, and define a length of the polishing elements 23 in the a direction as L1 and a length of the polishing elements 23 in the B direction as L2. The interval in the a direction between adjacent polishing elements 23 is defined as W1; the polishing elements 23 of the second portion 22 are also uniformly distributed in a direction parallel to the a direction, and the interval between adjacent polishing elements 23 in the a direction is also W1. As shown in fig. 3, the interval referred to in the present invention means a spacing between adjacent faces of adjacent polishing elements, not a spacing between centers of adjacent polishing elements. The first portion 21 and the second portion 22 both extend along a direction parallel to the direction a and are uniformly distributed, and the distance between the second portion 22 and the first portion 21 in the direction B is defined as W2.
With respect to the above dimensions, the preferred L1 range of 22-50 mm; for example, 22mm, 25mm, 28mm, 30mm, 31mm, 32mm, 33mm, 34mm, 35mm, 36mm, 37mm, 38mm, 39mm, 40mm, 41mm, 42mm, 45mm, 47mm, 50 mm; l1 is more preferably 25-40 mm. Preferably L2 is in the range of 22-50 mm; for example, 22mm, 25mm, 28mm, 30mm, 31mm, 32mm, 33mm, 34mm, 35mm, 36mm, 37mm, 38mm, 39mm, 40mm, 41mm, 42mm, 45mm, 47mm, 50 mm; l1 is more preferably 25-40 mm. Preferably W1 is in the range of 0.5-5mm, more preferably in the range of 0.8-3mm, for example 0.8mm, 1mm, 1.5mm, 1.6mm, 2mm, 2.5mm, 3 mm; w1 is more preferably 1-2.5 mm. Preferably W2 is in the range of 0.5-5mm, more preferably in the range of 0.8-3mm, for example 0.8mm, 1mm, 1.5mm, 1.6mm, 2mm, 2.5mm, 3 mm; w2 is more preferably 1-2.5 mm.
In a preferred embodiment of the present invention, the polishing unit is a rectangular parallelepiped or a cube.
In a preferred embodiment of the present invention, the polishing unit is a cube.
In a preferred embodiment of the present invention, the intervals W1 between the polishing units are equal to W2.
As a preferred embodiment of the invention, the polishing units are arranged in a square matrix on the polishing layer, and the center distances of the polishing units are equal, namely L1 is equal to L2, and W1 is equal to W2.
Referring to fig. 1, the polishing layer also has uniformly distributed pits 33 distributed over the polishing surface 10 and the polishing elements 20. With continued reference to fig. 3, the pits are composed of a plurality of first pit groups 31 and a plurality of second pit groups 32, and the pits 33 of the first pit groups 31 extend in the C direction and are evenly spaced; pits 33 of second pit group 32 also extend in a direction parallel to C and are evenly spaced. The pitch of adjacent pits in the first pit group 31 is the same, denoted as a, and the pitch of adjacent pits in the second pit group 32 is also a, the distance between adjacent pit groups 31 and 32 is h.
Referring to fig. 3, when the dimples extend in the C direction and are spaced apart by the same distance (as shown, distance a 1), the dimples may also be considered as extending in the C 'direction and parallel to the C' direction, and the dimple pitch is a 2; similarly, the arrangement of the dimples can also be considered as extending in the direction C 'and parallel to the direction C', with a dimple pitch of a 3. For the sake of clarity, the third direction of the present invention refers to a direction in which the pits are arranged and more pits are distributed per unit length.
I.e. an arrangement is formed having a direction in which the pit pitch is smallest. In the dimple arrangement shown in FIG. 3, the triangle V has the longest distance a3 in the polishing unit, and the number of dimple groups distributed in the C 'direction is small, so the third direction is not the C' direction. Comparing the lengths of a1, a2 and a3, the direction in which the minimum distance is located is the third direction. If a1= a2, in this embodiment, the third direction may be the C direction or the C' direction, and the pit pitch a and the pit group pitch h can be confirmed in any one direction as the third direction; since a1= a2, it is known that the selection of the C or C' direction does not affect the values of a and h.
Fig. 6 is a further enlargement for a partial plan view, the pit pitch a and the pitch h of adjacent groups of pits being shown in fig. 6. The pitch of the dimples of the present invention refers to the distance between the centers of adjacent dimples, unlike the above definition of the spacing of the polishing elements. The first pit group 31 and the second pit group 32 are parallel to each other, the distance between the adjacent pit groups is the same, and is denoted as h, and the distance between the pit groups in the present invention is the distance between two straight lines formed by connecting the pit centers of the two pit groups.
In view of the above, in the case of the same pit pitch a, the smaller the pit group pitch h, the denser the pit arrangement, and accordingly the total pit area occupies a larger total area of the polishing layer. In the invention, a is preferably more than or equal to 4.5mm and less than or equal to 6.5 mm; for example, 4.5mm, 5mm, 5.5mm, 6.0mm, 6.5mm, etc. may be mentioned; h is not less than 3.8mm and not more than 5.8mm, for example, 3.8mm, 4.2mm, 4.6mm, 5.0mm, 5.4mm, 5.8mm, etc. may be mentioned. In some preferred embodiments, the pits in the polishing layer are arranged in a preferred pattern by controlling the pit spacing a to be greater than the pit group spacing h.
In the case where the size of the polishing element 23 is defined as L1, and the interval between L2 and the adjacent polishing elements is defined as W1, and W2, the lapping area ratio RS1= L1 × L2/((L1+ W1) ((L2 + W2)) is set, which can approximately represent the ratio of the total area of the polishing elements 23 to the area of the polishing layer. RS1 ranges from 0.60 to 0.98. Accordingly, the ratio of the area of the channels between the polishing elements to the area of the polishing layer is 1-RS 1.
The area and distribution of the pits have an important influence on the polishing performance, the pattern of the polishing layer is drawn through software, the area of the pits can be directly obtained through the software, and the area of the pits on the polishing layer does not exceed 20%.
With continued reference to fig. 6, a cell e is introduced to divide the polishing layer area, the cell e is the smallest lattice with a side length passing through the centers of the three pits, and the surface of the polishing layer can be uniformly divided by the cell e, even if the boundary of the circular arc is the same, and can be approximately divided by the cell in a complementary manner through different circular arcs. Wherein the three pits are selected from two adjacent pit groups; for example, cells e1, e2, e3, e4 …, which are uniformly distributed on the polishing layer, can uniformly separate the polishing layer. The ratio of the area of the pits within the dashed e1 frame to the area of the cell, as illustrated by cell e1, reflects the ratio of the total area of the pits to the total area of the polishing layer.
Since the pits are in a regular pattern, such as a circle or a regular n-polygon, and the virtual frame edge is a line passing through the center of the pit, the area of the pit (the area of the shaded part) in the virtual frame is equal to the area of a single pit; the length of the cell e1 is the distance a between two adjacent pits, and the width of the cell e1 is the distance h between two adjacent groups.
FIG. 7 shows an enlarged plan view of another polishing pad having non-circular shaped depressions, such as a regular pentagon, in accordance with embodiments of the present invention. As described above, the ratio of the total area of the pits to the total area of the polishing layer may use the area of the pits within the virtual frame (the area of the shaded portion)/the area of the virtual frame.
Thus, the present invention defines Rt = (St/a ×) 100%, which is used to approximate the percentage of the total area of the pits to the total area of the polishing layer, where St represents the area of the projection of a single pit on the contact surface, and Rt ranges from 2 to 20%. The Rt preferably ranges from 5 to 18%, more preferably from 7.2 to 18%, and still more preferably from 7.4 to 14%.
Referring to fig. 8, the projection of the concave pits 33 on the contact surface may be a circle or a regular n-polygon, each regular polygon has a circumscribed circle, the center of the circumscribed circle coincides with the center of the regular polygon, and n is an integer of 3 to 18; for example, the cross section of the pit can be in the shape of one or more of a regular triangle, a regular quadrangle, a regular pentagon, …, a regular dodecagon and a regular octadecagon; taking the cross section of the recess 331 as an example, the recess 331 has a circumscribed circle 331a with a diameter d. The invention limits d to the range of 1-3.5 mm. The pits 332 are circular in cross section, and the projection of the cross section is superposed with the circumscribed circle, and the diameter of the circle is d and ranges from 1mm to 3.5 mm.
The ratio of the total area of the pits to the area of the polishing layer is an important factor influencing the polishing effect, so that the diameters of the circumscribed circles of the pits in different shapes are different in order to ensure that the pits in different shapes have proper areas.
The projection of the pit on the contact surface is circular, Rt = (pi (d))2/4))/(a*h)*100%；
The projection of the pits on the contact surface is a regular n-polygon, n is an integer from 3 to 18, and Rt = ((n/2) × (d)2(v 4) × sin (360/n))/(a × h) × 100%. According to the equation, under the condition of the same area, the diameter of the circumcircle of the regular triangle pit is the largest, and the diameter of the circumcircle of the circular pit is the smallest.
Further, use of d0Representing the diameter of the circumscribed circle of the circular pit, dn representing the diameter of the circumscribed circle of the regular n-sided polygon, dn and d having the same pit area0The relationship of (1) is: dn = d0*(2π/(nsin(360/n)))1/2In some preferred embodiments, d is defined0In the range of 1-2 mm.
The ratio of the size of the polishing layer pits to the size of the channels formed between the polishing units, the area ratio between the pits and the channels, and the volume ratio are also important parameters affecting the polishing performance of the polishing pad, and the width ratio Rw =2d/(W1+ W2) is defined, and the present invention limits the width ratio to the range of 0.2 to 4.5, more preferably 0.3 to 3, and still more preferably 0.5 to 1. The present invention uses Rt/(1-RS1) to characterize the ratio of the area of the pits in the polishing layer to the area of the channels between the polishing elements, and limits this area ratio to a range of 0.1 to 5, more preferably a range of 0.6 to 3.5.
More preferably, RS1 ranges from 0.8 to 0.98; rt ranges from 7.2 to 18%; and Rt/(1-RS1) is more than or equal to 0.1 and less than or equal to 5.
More preferably 0.6. ltoreq. Rt/(1-RS 1). ltoreq.3.5.
Fig. 5 shows a cross-sectional view of the polishing layer, the polishing surface 10 having polishing elements distributed thereon, one end of the polishing elements forming a contact surface 00, the average height of the polishing elements being denoted as D1, and the height of the bottom surface of the dimple to the contact surface 00 being denoted as D2. The average height D1 is 0.15 to 0.8 times, preferably 0.15 to 0.63 times the thickness of the polishing layer. In a preferred embodiment, the height of the bottom surface of the recess to the contact surface is denoted as D2, D2 > D1. The range of D1 may be preferred, 0.34 mm. ltoreq. D1. ltoreq.1.63 mm, more preferably 0.4 mm. ltoreq. D1. ltoreq.1.27 mm.
As a preferred embodiment of the invention, the pits depicted in FIG. 5 extend through the polishing layer, i.e., D2 is equal to the thickness of the polishing layer.
The present invention uses a volume ratio Rv = Rt D2/((1-RS1) × D1) to characterize the ratio of the volume of the channels between the pits and the polishing elements in the polishing layer, which is limited by the present invention to a range of 0.5 to 10, more preferably 0.5 to 8.5, and most preferably 1 to 5.
The parameters of the polishing pad such as RS1, Rt and Rv are in the range of the invention, and the polishing pad can have excellent grinding performance. Further, the arrangement of the groups of pits has an important influence on the polishing effect, provided that the parameters of Rw, Rt/(1-RS1), and the like, and the preferred size are consistent with the scope of the present invention.
Further, the present invention is studied on the distribution of pits, and with continued reference to fig. 3, a pattern formed by the center of one pit of the first pit group and the centers of two pits of the adjacent second pit group is a triangle V; the present invention will be readily understood that one point of the triangle V may also be from the center of one pit of the second pit group, and the other two points are selected from the centers of the nearest two pits of the adjacent first pit group. As described above, in order to clearly define the present invention, the third direction referred to in the present invention refers to a direction in which the pits are arranged in the direction and more pits are distributed per unit length. I.e. the direction in which the shortest side of the triangle V is located is the third direction. If the triangle V is an isosceles triangle, it has two or three identical short sides, i.e. there are multiple third directions for the arrangement of the pits, but neither the size parameter a nor h of the pits is affected. However, the angle between the third direction in which the pit group extends and the first direction or the second direction may be varied due to the plurality of third directions.
The invention researches the position arrangement of the pit group and the polishing unit.
With continued reference to fig. 3, the triangle V shown in the figure is an isosceles triangle, a1= a2, and thus there is a third direction C parallel to the side length of a1 and a third direction C' parallel to the side length of a 2. The included angle between the third direction and the first direction is defined as alpha 1, and the included angle refers to the minimum angle formed by one or more third directions and the first direction A; similarly, the angle between the third direction and the second direction is defined as α 2, where the angle refers to the smallest angle formed by one or more third directions and the second direction B.
As shown in fig. 3, the third directions C, C' form angles α 11 and α 21 with the first direction a, respectively, and form angles α 12 and α 22 with the second direction B, respectively; the angle α 1 between the third direction and the first direction is the smaller of α 11 and α 21, and α 2 is the smaller of α 12 and α 22.
With continued reference to fig. 4, where the triangle V is an equilateral triangle, the arrangement of the pits can be considered as having three third directions, i.e. extending in three directions C, C 'or C ", such that α 1 is the minimum angle formed by the third direction (C, C' or C") and the first direction a, and α 2 is the minimum angle formed by the third direction and the second direction B.
The arrangement of the pit groups preferably forms a certain angle with the first direction or the second direction, and the pit groups are staggered to form a certain angle, so that the grinding effect is better. Thus, in some embodiments of the invention, the third direction has an angle α 1 with the first direction in the range 0 ° < α 1 < 90 °; or the included angle alpha 2 between the third direction and the second direction is in the range of 0 degrees < alpha 1 < 90 degrees.
According to one embodiment of the invention, the angle θ between the first direction and the second direction is 90 °; an included angle between the third direction and the first direction is recorded as alpha 1, and the range of the alpha 1 is more than or equal to 10 degrees and less than or equal to 45 degrees; and/or the included angle between the third direction and the second direction is marked as alpha 2, and the range of alpha 2 is more than or equal to 10 degrees and less than or equal to alpha 2 and less than or equal to 45 degrees.
As a more preferable embodiment of the present invention, an angle θ between the first direction and the second direction is 90 °; an included angle between the third direction and the first direction is recorded as alpha 1, and the range of the alpha 1 is more than or equal to 10 degrees and less than or equal to 20 degrees; and/or the included angle between the third direction and the second direction is marked as alpha 2, and the range of alpha 2 is more than or equal to 10 degrees and less than or equal to alpha 2 and less than or equal to 20 degrees.
In one embodiment of the present disclosure, a triangle V formed by a center of one dimple of the first dimple group and a center of two dimples closest to the adjacent second dimple group is an isosceles triangle. More preferably an equilateral triangle.
More preferably, the triangle V is an equilateral triangle, and the angle θ between the first direction and the second direction is 90 °; the range of α 1 is 10 ° ≦ α 1 ≦ 20 °, and the range of α 2 is 10 ° ≦ α 2 ≦ 20 °. The polishing units and the pits which are arranged have excellent grinding effect.
Second embodiment
Similar to the first embodiment, the direction a and the direction B are 90 degrees in the second embodiment, i.e. sin θ is 1. Similarly, the polishing layer has a polishing surface and polishing unit groups distributed on the polishing surface, and the surfaces of the polishing unit groups are directly contacted with the ground material, as shown in fig. 1.
Arrangement pattern of polishing elements of polishing layer referring to fig. 9, the polishing elements 43 of the first and second sections 41 and 42 are alternately arranged in the second embodiment. Preferably, the offset distance is half the side length of the grinding unit in the a direction.
This embodiment is one of the preferred embodiments of the present invention, and the polishing layer also has uniformly distributed pits 53, the size of the polishing elements, the shape and size of the pits, all as defined in the first embodiment.
Specifically, L1 is in the range of 22-50 mm; more preferably 25-40 mm. L2 is in the range of 22-50 mm; more preferably 25-40 mm. Preferably W1 is in the range of 0.5-5mm, more preferably in the range of 0.8-3mm, for example 0.8mm, 1mm, 1.5mm, 1.6mm, 2mm, 2.5mm, 3 mm; w1 is more preferably 1-2.5 mm. Preferably W2 is in the range of 0.5-5mm, more preferably in the range of 0.8-3mm, for example 0.8mm, 1mm, 1.5mm, 1.6mm, 2mm, 2.5mm, 3 mm; w2 is more preferably 1-2.5 mm.
In a preferred embodiment of the present invention, the polishing unit is a rectangular parallelepiped or a cube.
In a preferred embodiment of the present invention, the polishing unit is a cube.
In a preferred embodiment of the present invention, the intervals W1 between the polishing units are equal to W2.
As a preferred embodiment of the invention, the polishing units are arranged in a square matrix on the polishing layer, and the center distances of the polishing units are equal, namely L1 is equal to L2, and W1 is equal to W2.
With continued reference to FIG. 5, the polishing elements have an average height D1, the average height D1 being 0.15-0.8 times, preferably 0.16-0.63 times, the thickness of the polishing layer. In a preferred embodiment, the height of the bottom surface of the recess to the contact surface is denoted as D2, D2 > D1. The range of D1 may be preferred, 0.34 mm. ltoreq. D1. ltoreq.1.63 mm, more preferably 0.4 mm. ltoreq. D1. ltoreq.1.27 mm.
As a preferred embodiment of the invention, the pits extend through the polishing layer, i.e., D2 is equal to the polishing layer thickness.
A is more than or equal to 4.5mm and less than or equal to 6.5mm according to the size of the pits; for example, 4.5mm, 5mm, 5.5mm, 6.0mm, 6.5mm, etc. may be mentioned; h is not less than 3.8mm and not more than 5.8mm, for example, 3.8mm, 4.2mm, 4.6mm, 5.0mm, 5.4mm, 5.8mm, etc. may be mentioned. In some preferred embodiments, the pits in the polishing layer are arranged in a preferred pattern by controlling the pit spacing a to be greater than the pit group spacing h. Similarly, the definitions and ranges of the parameters RS1, Rt, Rw, Rv, and Rt/(1-RS1) are the same as those in the first embodiment, for example, RS1 ranges from 0.60 to 0.98, Rt = (St/a × h) × 100%, and Rt ranges from 2 to 20%. The Rt preferably ranges from 5 to 18%, more preferably from 7.2 to 18%, and still more preferably from 7.4 to 14%. Rw =2d/(W1+ W2), the present invention limits the width ratio to the range of 0.2-4.5, more preferably 0.3-3, more preferably 0.5-1. 0.1. ltoreq. Rt/(1-RS 1). ltoreq.5, more preferably 0.6. ltoreq. Rt/(1-RS 1). ltoreq.3.5. The volume ratio Rv is limited to the range of 0.5 to 10, more preferably 0.5 to 8.5, most preferably 1 to 5.
The preferred arrangement of the pits is the same as that of the first embodiment, and the third direction in which the pit group extends preferably forms an angle with the first direction or the second direction. An included angle between the third direction C and the first direction a is recorded as α 1, and an included angle between the third direction C and the second direction B is recorded as α 2. The α 1 and α 2 in the present invention are defined as the minimum of the angles formed by the one or more third directions with the a or B directions, respectively.
Preferred ranges of α 1 and α 2 in the second embodiment are the same as those in the first embodiment.
The triangle V formed by the pit centers of the two adjacent groups of pit groups is preferably an isosceles triangle.
More preferably an equilateral triangle.
Third embodiment
In the third embodiment, the θ angle may be any angle other than 90 degrees, for example, 10 degrees, 20 degrees, 30 degrees, 40 degrees, 45 degrees, 50 degrees, 60 degrees, 70 degrees, 80 degrees, 100 degrees, 110 degrees, 120 degrees, 130 degrees, 135 degrees, 140 degrees, 150 degrees, 160 degrees, 170 degrees, or the like.
Similarly, referring to fig. 1, the polishing layer has a polishing surface and polishing units distributed on the polishing surface, and the surfaces of the polishing units are directly contacted with the ground material.
Referring to fig. 10, the polishing element group includes a first portion 61 and a second portion 62, wherein each of the first portion 61 and the second portion 62 includes at least one polishing element 63. Fig. 10 shows an arrangement of polishing units 63 of the polishing layer.
The polishing units 63 are uniformly distributed in parallel to the a direction, and have a length L1 in the a direction and a length L2 in the B direction, and the interval between the adjacent polishing units of the first section 61 and the second section 62 in the a direction is W1, and the interval between the second section 62 and the first section 61 in the B direction is W2.
Since the polishing unit 63 is a parallelogram, the grinding area S1= L1L 2 sin θ of the polishing unit; grinding area ratio:
RS1=(L1*L2*sinθ)/((L1+W1)*(L2+W2) *sinθ)=(L1*L2)/((L1+W1)*(L2+W2))。
this embodiment is one of the preferred embodiments of the present invention. Similarly, the polishing layer has uniformly distributed pits 73, the size of the polishing units, and the shape and size of the pits, all as defined or defined in the first embodiment.
The third direction in which the pit group extends may be parallel to the first direction or the second direction, or may be at an angle. The triangle V formed by the pit centers of the two adjacent groups of pit groups is preferably an isosceles triangle. More preferably an equilateral triangle.
The triangle V of the polishing pad shown in fig. 10 is an isosceles triangle, and the third direction can be the C direction or the C 'direction, and the values of the pitch a of the pits and the pitch h of the adjacent pit groups do not change either in the C direction or the C' direction.
A is more than or equal to 4.5mm and less than or equal to 6.5mm according to the size of the pits; for example, 4.5mm, 5mm, 5.5mm, 6.0mm, 6.5mm, etc. may be mentioned; h is not less than 3.8mm and not more than 5.8mm, for example, 3.8mm, 4.2mm, 4.6mm, 5.0mm, 5.4mm, 5.8mm, etc. may be mentioned. More preferably, the spacing a of the pits is controlled to be larger than the spacing h of the groups of pits, and the pits on the polishing layer have better arrangement effect. Similarly, the definitions and ranges of the parameters RS1, Rt, Rw, Rv, and Rt/(1-RS1) are the same as those in the first embodiment, for example, RS1 ranges from 0.60 to 0.98, Rt = (St/a × h) × 100%, and Rt ranges from 2 to 20%. The Rt preferably ranges from 5 to 18%, more preferably from 7.2 to 18%, and still more preferably from 7.4 to 14%. Rw =2d/(W1+ W2), the present invention limits the width ratio to the range of 0.2-4.5, more preferably 0.3-3, more preferably 0.5-1.
0.1. ltoreq. Rt/(1-RS 1). ltoreq.5, more preferably 0.6. ltoreq. Rt/(1-RS 1). ltoreq.3.5.
The polishing elements have an average height D1, the average height D1 being 0.15-0.8 times, preferably 0.15-0.63 times the thickness of the polishing layer. In a preferred embodiment, the height of the bottom surface of the recess to the contact surface is denoted as D2, D2 > D1. The range of D1 may be preferred, 0.34 mm. ltoreq. D1. ltoreq.1.63 mm, more preferably 0.4 mm. ltoreq. D1. ltoreq.1.27 mm.
The volume ratio Rv is limited to the range of 0.5 to 10, more preferably 0.5 to 8.5, most preferably 1 to 5.
As a preferred embodiment of the invention, the pits extend through the polishing layer, i.e., D2 is equal to the polishing layer thickness.
When the third direction is C, the third direction C is parallel to the second direction B because theta is an angle different from 90 degrees; when the third direction is C ', the third direction C' is not parallel to both the first direction and the second direction. The arrangement of the dimples may be parallel to at least one of the first and second directions as shown in fig. 10; or as shown in fig. 11, the arrangement of the pits is staggered with the first direction and the second direction, so that a better grinding effect is achieved.
In a preferred embodiment of the invention, the projection of the polishing elements onto the contact surface is rhomboid.
In a preferred embodiment of the invention, the a direction is at 45 degrees to the B direction.
In a preferred embodiment of the present invention, the intervals W1 between the polishing units are equal to W2.
In a preferred embodiment of the present invention, L1 of the polishing unit is equal to L2, and W1 is equal to W2.
Method for manufacturing semiconductor device
A semiconductor device is manufactured through a process of polishing the surface of a semiconductor wafer using the polishing pad. The semiconductor wafer is generally a wafer in which a wiring metal and an oxide film are laminated on a silicon wafer. The method for manufacturing a semiconductor device of the present invention includes a step of polishing the surface of a semiconductor wafer using the polishing pad, and the polishing apparatus is not particularly limited.
In general, a polishing apparatus includes a polishing table for supporting a polishing pad, a supporting table for supporting a semiconductor wafer, a backing material for uniformly pressurizing the semiconductor wafer, and a supply mechanism for supplying a polishing liquid, wherein the polishing table and the supporting table are disposed so that the polishing pad supported by the polishing table and the semiconductor wafer to be polished face each other, and the polishing apparatus is configured to rotate the polishing table and the supporting table to press the semiconductor wafer against the polishing pad and to polish the surface of the semiconductor wafer by using the polishing pad while supplying the polishing liquid.
Examples
(1) Examples of preparation of polishing layer
The polyurethane polishing layer can be prepared by adopting a known prepolymer method, a one-step method and other methods, and the method selected by the technical personnel of the invention according to the needs does not influence the conception and the protection scope of the invention, so long as the polishing pad related to the invention can be prepared. The polyurethane of the polishing layer prepared in accordance with the present invention may also be a polymer or copolymer formed from one or more of polyetherureas, polyisocyanurates, polyurethanes, polyureas, and polyurethaneureas. Better polishing effect can be obtained by adopting the polyurethane of the kind. Preferably, the polyurethane is prepared by reacting an isocyanate-terminated prepolymer obtained by reacting an isocyanate and a polyol with a mixture of a curing agent and hollow microspheres.
The isocyanate is not particularly limited, and a compound known in the field of polyurethane, for example, an aromatic isocyanate and/or an aliphatic isocyanate, may be used. The aromatic diisocyanate-based compound is preferably one or more of 2, 4-tolylene diisocyanate, 2, 6-tolylene diisocyanate, 2 ' -diphenylmethane diisocyanate, 2, 4 ' -diphenylmethane diisocyanate, 4 ' -diphenylmethane diisocyanate, 1, 5-naphthalene diisocyanate, p-phenylene diisocyanate, m-phenylene diisocyanate, p-xylylene diisocyanate and m-xylylene diisocyanate.
The aliphatic diisocyanate compound is preferably one or more of ethylene diisocyanate, 2, 4-trimethylhexamethylene diisocyanate and 1, 6-hexamethylene diisocyanate. The alicyclic diisocyanate compound is preferably one or more of 1, 4-cyclohexane diisocyanate, 4' -dicyclohexylmethane diisocyanate, isophorone diisocyanate and norbornane diisocyanate.
The polyol is not particularly limited, and a compound known in the field of polyurethane, for example, a polyether polyol and/or a polyester polyol can be used. Preferably, the polyol is one or more of polytetramethylene ether glycol, polyethylene glycol, polypropylene glycol, polybutylene glycol, ethylene adipate and butylene adipate.
Wherein, the curing agent, which is not particularly limited, may be a compound well known in the art of polyurethane, for example, one or more of polyol, polyamine and alcohol amine, and is preferably MOCA and/or MCDEA, the MOCA being 3, 3-dichloro-4, 4-diaminodiphenylmethane and the MCDEA being 4, 4-methylenebis (3-chloro-2, 6-diethylaniline).
The polishing layer prepared in the examples of the present invention was 80mil, about 2mm, had a hardness of (62. + -. 5D) and a density of (0.8. + -. 0.2) g/cm3。
(2) Preparation of polishing pad
The polishing pad of the invention can also be a polishing layer as described above; may further comprise a bottom layer; or a bottom layer and one or more intermediate layers disposed between the polishing layer and the bottom layer. The chemical mechanical polishing of the semiconductor substrate is performed by a polishing layer, and the underlying layer or intermediate layer is not a limitation of the present invention.
It is noted that the polishing layer of the polishing pad of the invention optionally further comprises an endpoint detection window, preferably the detection window is an integrity window incorporated into the polishing layer.
The polishing pad comprises a buffer layer, and the polishing layer is attached to the buffer layer to obtain the polishing pad.
Code number explanation:
w1: interval length in the a-axis direction between polishing elements (parallelograms), unit: mm;
w2: interval length in the B-axis direction between polishing elements (parallelograms), unit: mm;
l1: length of polishing element (parallelogram) in a-axis direction, unit: mm;
l2: length of polishing element (parallelogram) in B-axis direction, unit: mm;
θ: the included angle between the first direction and the second direction is 0-180 degrees, and the unit is degree.
α 1: the minimum included angle between the third direction and the first direction is a numerical value in degrees.
α 2: the minimum included angle between the third direction and the second direction is a numerical value in degrees.
a: the distance between adjacent pits of the same pit group in the C direction is unit mm;
h: the distance between adjacent pit groups is unit mm;
d: the diameter of the circumscribed circle of the pit is in mm;
RS1：L1*L2 /((L1+W1)*(L2+W2))；
Rt：(St/a*h)*100%；
Rw：2d /(W1+W2)；
Rv：(Rt*D2)/(D1*(1-RS1))
d1, the polishing elements have an average height in mm;
d2: the height of the bottom surface of the pit to the contact surface is in mm;
grinding parameters and evaluation methods:
the wafer was TEOS 7.5K wafer, the Slurry was a ceria abrasive Slurry selected from Versum under the designation STI2503, (dilution ratio Slurry: DIW =1: 4), flow rate was 250ml/min, conditioner was a DS8051 diamond disk, pressure was 4lbf, polishing head pressure was 4psi, platen speed was 63rpm, carrier speed was 57rpm, and polishing time was 60 s.
For the 50 th wafer, the polishing rates of oxide and silicon nitride were measured, and the polishing selection ratio (the ratio of the polishing rates of oxide to silicon nitride) was calculated, and the polishing nonuniformity of oxide and the defectivity of the wafer were measured.
The lapping rate was calculated by measuring the lapping removal at various locations on the wafer over a polishing time using a Nano SpecII tool.
The polishing rate heterogeneity (Nu) was also calculated from the Nano SpecII.
The defectivity is a count of defects on the wafer measured using a KLA-Tencor SP2 analyzer.
TABLE 1 Trench sample set
Figure 503895DEST_PATH_IMAGE001
Note: examples 1-15 and comparative examples 1-3 used polishing layers having a thickness of 80mil, about 2 mm.
The projected surfaces of the contact areas of the polishing elements of examples 1-4 and examples 7-15 were rectangular. Example 5, the projection surface of the polishing unit is a diamond shape, as shown in fig. 10; example 6, polishing elements are staggered as shown in fig. 9.
Table 2 groove sample geometry parameters
Figure 631119DEST_PATH_IMAGE002
TABLE 3 evaluation of polishing Properties
Figure 154505DEST_PATH_IMAGE003
Table 1 shows the dimensional parameters of the grooves of the inventive examples and comparative examples, table 2 shows the values of RS1, Rt, Rw, Rv, etc. calculated from the groove dimensions of the inventive examples and comparative examples, and table 3 shows the results of the grinding evaluations of the inventive examples and comparative examples.
As can be seen from examples 1-15 and comparative examples 1-3, the polishing pad has better polishing rates of silicon oxide and silicon nitride and suitable selectivity (range of 10-21) and lower defectivity (less than 460) when RS1 is 0.60-0.98, Rt is in the range of 2-20%, and Rv is in the range of 0.5-10.
Comparative example 1 is a polishing pad containing only XY grooves, and the pit area ratio Rt is 0, the grinding selectivity is higher than 24, does not fall within the preferred range of process requirements, and has more defect counts up to 581. Comparative example 2 does not contain only the polishing pad having through pits, and although the polishing rate was improved, the polishing selectivity, polishing non-uniformity, and defectivity were not satisfactory. Comparative example 3 is a polishing pad containing XY grooves and pits, but its volume ratio Rv exceeds the range of 0.5 to 10, and its grinding selectivity and non-uniformity still do not meet the requirements of the polishing process.
Through a plurality of experimental researches and creative labor, various factors are comprehensively considered, and the obtained polishing pad which meets the parameter range has the optimal polishing performance. The process of polishing the surface of a semiconductor wafer using the polishing pad and the method of manufacturing a semiconductor device including the process are also within the scope of the present invention.

Claims (11)

1. A manufacturing method of a semiconductor device is characterized by comprising a step of grinding a surface of a semiconductor wafer by using a polishing pad, wherein the polishing pad comprises a polishing layer, the polishing layer comprises a polishing surface and polishing units positioned on the polishing surface, the polishing units form a polishing unit group, one end of the polishing unit group forms a contact surface, the contact surface is in direct contact with a material to be ground, the projection of each polishing unit on the contact surface is a parallelogram, two directions of the parallelogram are marked as a first direction and a second direction, the side lengths of the parallelogram in the first direction and the second direction are respectively L1 and L2, the included angle between the first direction and the second direction is theta, and the area of the parallelogram is as follows:
S1=L1*L2*sinθ；
a plurality of polishing elements constituting a first section, the polishing elements of the first section extending in a first direction and being uniformly spaced,
a plurality of polishing elements constituting a second section, the polishing elements of the second section extending in a direction parallel to the first direction and being uniformly spaced, the polishing elements of the first section being spaced at a spacing equal to the spacing of the polishing elements of the second section, the spacing distance in the first direction being W1;
the polishing unit is composed of a plurality of first portions and second portions which are equally spaced from each other by a distance W2 in the second direction;
RS1= L1 × L2/((L1+ W1) × (L2+ W2)), RS1 ranges from 0.60 to 0.98;
the polishing layer further comprises a plurality of pockets comprising:
the first pit group is formed by a plurality of pits, the pits of the first pit group extend in the third direction and are uniformly spaced, the second pit group is formed by a plurality of pits, and the pits of the second pit group extend in the direction parallel to the third direction and are uniformly spaced; the distance between the adjacent pits of the first pit group is the same as that between the adjacent pits of the second pit group, and the distances in the third direction are all a;
the polishing layer comprises a plurality of pits, wherein the pits of the polishing layer consist of a plurality of first pit sets and a plurality of second pit sets, and the first pit sets and the second pit sets are parallel to each other; the distances from each other are the same and are marked as h;
defining an area ratio Rt = (St/a ×) 100%, wherein St represents the area of a single pit projected on the contact surface, Rt ranges from 2-20%;
the polishing elements have an average height D1, the D1 being 0.15-0.8 times the thickness of the polishing layer; the height from the bottom surface of the pit to the contact surface is recorded as D2, and D2 is more than or equal to D1;
define a volume ratio Rv = Rt × D2/((1-RS1) × D1), Rv ranging from 0.5 to 10.
2. A polishing pad is characterized by comprising a polishing layer, wherein the polishing layer comprises a polishing surface and polishing units positioned on the polishing surface, the polishing units form a polishing unit group, one end of the polishing unit group forms a contact surface, the contact surface is in direct contact with a material to be ground, the projection of each polishing unit on the contact surface is a parallelogram, two directions of the parallelogram are marked as a first direction and a second direction, the side lengths of the parallelogram in the first direction and the second direction are respectively L1 and L2, the included angle between the first direction and the second direction is theta, and the area of the parallelogram is as follows:
S1=L1*L2*sinθ；
a plurality of polishing elements constituting a first section, the polishing elements of the first section extending in a first direction and being uniformly spaced,
a plurality of polishing elements constituting a second section, the polishing elements of the second section extending in a direction parallel to the first direction and being uniformly spaced, the polishing elements of the first section being spaced at a spacing equal to the spacing of the polishing elements of the second section, the spacing distance in the first direction being W1;
the polishing unit is composed of a plurality of first portions and second portions which are equally spaced from each other by a distance W2 in the second direction;
RS1= L1 × L2/((L1+ W1) × (L2+ W2)), RS1 ranges from 0.60 to 0.98;
the polishing layer further comprises a plurality of pockets comprising:
the first pit group is formed by a plurality of pits, the pits of the first pit group extend in the third direction and are uniformly spaced, the second pit group is formed by a plurality of pits, and the pits of the second pit group extend in the direction parallel to the third direction and are uniformly spaced; the distance between the adjacent pits of the first pit group is the same as that between the adjacent pits of the second pit group, and the distances in the third direction are all a;
the polishing layer comprises a plurality of pits, wherein the pits of the polishing layer consist of a plurality of first pit sets and a plurality of second pit sets, and the first pit sets and the second pit sets are parallel to each other; the distances from each other are the same and are marked as h;
defining an area ratio Rt = (St/a ×) 100%, wherein St represents the area of a single pit projected on the contact surface, Rt ranges from 2-20%;
the polishing elements have an average height D1, the D1 being 0.15-0.8 times the thickness of the polishing layer; the height from the bottom surface of the pit to the contact surface is recorded as D2, and D2 is more than or equal to D1;
define a volume ratio Rv = Rt × D2/((1-RS1) × D1), Rv ranging from 0.5 to 10.
3. The polishing pad of claim 2, wherein a, h satisfy: a is more than or equal to 4.5mm and less than or equal to 6.5 mm; h is more than or equal to 3.8mm and less than or equal to 5.8 mm.
4. The polishing pad of claim 2, wherein the polishing elements have a range of L1 and L2 of 22-50mm, and the polishing elements have a range of W1 and W2 of 0.5-5 mm.
5. The polishing pad of claim 2, wherein a projection of the dimple onto the contact surface is one or more of a circle and a regular n-sided polygon, wherein n is an integer from 3 to 18; the diameter of the circumcircle of the pit is d, and the range of d is 1-3.5 mm.
6. The polishing pad of claim 2, wherein a projection of the dimple onto the contact surface is one or more of a circle and a regular n-sided polygon, wherein n is an integer from 3 to 18; the diameter of a circumscribed circle of the pit is d; rw =2d/(W1+ W2) is defined, with Rw ranging from 0.2 to 4.5.
7. The polishing pad of claim 2, wherein the dimples have a circumscribed circle diameter d; the projection of the pit on the contact surface is circular, Rt = (pi (d))2/4))/(a x h) 100%; the projection of the pits on the contact surface is a regular n-polygon, n is an integer from 3 to 18, and Rt = ((n/2) × (d)2(v 4) × sin (360/n))/(a × h) × 100%, wherein Rt is in the range of 5 to 18%, said RS1 is in the range of 0.8 to 0.98, and 0.1 ≦ Rt/(1-RS1) ≦ 5.
8. The polishing pad of claim 2, wherein θ is 90 °, and the third direction is at an angle α 1 to the first direction, the range of α 1 being 0 ° < α 1 < 90 °; or the included angle between the third direction and the second direction is recorded as alpha 2, and the range of the alpha 2 is more than 0 degree and less than alpha 2 and less than 90 degrees.
9. The polishing pad of claim 2, wherein the triangle of the center of an optional first dimple of the first dimple group with the centers of two second dimples selected from adjacent second dimple groups that are closest to the first dimple is an isosceles triangle, or the triangle of the center of an optional second dimple of the second dimple group with the centers of two first dimples selected from adjacent first dimple groups that are closest to the second dimple is an isosceles triangle.
10. The polishing pad of claim 9, wherein the isosceles triangle is an equilateral triangle.
11. The polishing pad of claim 10, wherein θ is 90 °, the angle between the third direction and the first direction is denoted as α 1, and α 1 is in the range of 10 ° ≦ α 1 ≦ 20 °; and the included angle between the third direction and the second direction is recorded as alpha 2, and the range of the alpha 2 is more than or equal to 10 degrees and less than or equal to alpha 2 and less than or equal to 20 degrees.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1151342A (en) * 1995-10-25 1997-06-11 日本电气株式会社 Polishing device having pad which has grooves and holes
JP2001219362A (en) * 2000-02-04 2001-08-14 Mitsubishi Materials Corp Abrasive pad
JP2004140178A (en) * 2002-10-17 2004-05-13 Renesas Technology Corp Chemical mechanical polishing apparatus

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1151342A (en) * 1995-10-25 1997-06-11 日本电气株式会社 Polishing device having pad which has grooves and holes
JP2001219362A (en) * 2000-02-04 2001-08-14 Mitsubishi Materials Corp Abrasive pad
JP2004140178A (en) * 2002-10-17 2004-05-13 Renesas Technology Corp Chemical mechanical polishing apparatus

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