CN113517351A - Ion-doped thin film transistor and preparation method thereof - Google Patents

Ion-doped thin film transistor and preparation method thereof Download PDF

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CN113517351A
CN113517351A CN202110699209.1A CN202110699209A CN113517351A CN 113517351 A CN113517351 A CN 113517351A CN 202110699209 A CN202110699209 A CN 202110699209A CN 113517351 A CN113517351 A CN 113517351A
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ion
thin film
film transistor
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nitrate
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曹一心
赵春
赵策洲
刘伊娜
杨莉
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Xian Jiaotong Liverpool University
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Xian Jiaotong Liverpool University
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials

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Abstract

The invention relates to an ion-doped thin film transistor, which comprises a substrate, a gate electrode arranged on one surface of the substrate, an insulating layer arranged on the other surface of the substrate, a metal oxide semiconductor layer arranged on the surface of the insulating layer, and a source electrode and a drain electrode arranged on the surface of the metal oxide semiconductor layer, wherein the insulating layer is an ion-doped high-dielectric-constant material insulating layer, and ions bring abundant charges, so that a device is easier to form an electric double layer and generate ion doping, thereby increasing the conductivity of the metal oxide semiconductor layer and enabling the metal oxide semiconductor layer to be suitable for simulating the long-time memory characteristic of biological synapses; and the relaxation time of the traditional thin film transistor is about tens of milliseconds, while the relaxation time of the thin film transistor doped with ions is two hundred to three hundred milliseconds, which is in an order of magnitude with biological synapse, so that the thin film transistor is more suitable for simulating the biological synapse.

Description

Ion-doped thin film transistor and preparation method thereof
Technical Field
The invention relates to an ion-doped thin film transistor and a preparation method thereof, belonging to the technical field of semiconductor devices.
Background
Artificial synapse electronics are an important component of neuromorphic computing systems that can exceed the limitations of von neumann architectures. Although many two-terminal memory devices have been proposed in the present stage for simulating biological synapses, they suffer from several problematic issues including non-linear switching, device high conductance and write noise, all of which reduce accuracy and energy efficiency, such that two-terminal memory devices are limited to a small volume. Recently, it has been reported that a three-terminal transistor is used as a device for simulating biological synapses, and since the channel conductance of the three-terminal transistor can be adjusted by applying positive and negative voltages and an additional pulse is not required to activate the device, the device can be easily turned on and off, and thus the device is considered to be more suitable for simulating biological synapses. However, few people have dedicated researches on how to enable a three-terminal artificial synapse thin film transistor to simulate biological synapses more truly, and especially, the long-term memory characteristics of the biological synapses, so that the biological synapses have more excellent synapse characteristics, and a good basis is laid for more accurate synaptic property simulation later.
Disclosure of Invention
The invention aims to provide an ion-doped thin film transistor, wherein an ion-doped high-dielectric constant material is used as an insulating layer, so that the device is suitable for simulating the long-time memory characteristic of biological synapses.
In order to achieve the purpose, the invention provides the following technical scheme: the ion-doped thin film transistor comprises a substrate, a gate electrode arranged on one surface of the substrate, an insulating layer arranged on the other surface of the substrate, a metal oxide semiconductor layer arranged on the surface of the insulating layer, and a source electrode and a drain electrode which are arranged on the surface of the metal oxide semiconductor layer, wherein the insulating layer is an ion-doped high-dielectric-constant material insulating layer.
Further, the ions are sodium ions or lithium ions.
Further, the high dielectric constant material is one or more of aluminum oxide, gallium oxide, yttrium oxide, neodymium oxide, lanthanum oxide, scandium oxide and zirconium oxide.
Further, the material of the metal oxide semiconductor layer is one or more of indium oxide, zinc oxide, tin oxide, zinc tin oxide, indium gallium zinc oxide and indium zinc oxide.
The invention also provides a preparation method of the ion-doped thin film transistor, which is used for preparing the ion-doped thin film transistor and comprises the following steps:
s1, providing a substrate, and cleaning the substrate;
s2, preparing a gate electrode on one surface of the substrate;
s3, performing hydrophilic treatment on the surface of the substrate far away from the gate electrode;
s4, preparing an ion-doped high-dielectric-constant material insulating layer on the surface of the substrate far away from the gate electrode by using an aqueous solution method;
s5, preparing a metal oxide semiconductor layer on the ion-doped high-dielectric-constant material insulating layer;
and S6, preparing a source electrode and a drain electrode on the metal oxide semiconductor layer to obtain the ion-doped thin film transistor.
Further, the specific preparation steps of the ion-doped high-dielectric-constant material insulating layer are as follows:
a1, preparing a high dielectric constant material precursor solution, and adding metal salt with ions into the high dielectric constant material precursor solution to be mixed to obtain a mixed solution, wherein the molar concentration ratio of the metal salt to the high dielectric constant material precursor is 0.01-10: 1;
a2, forming an insulating layer of high dielectric constant material doped with ions: dropping the mixed liquid on the surface of the substrate far away from the gate electrode; spin coating in air at the speed of 1000-6000rpm, and pre-annealing at 80-300 deg.C for 10-60 min; then annealing in air at 200-300 deg.C or treating with deep ultraviolet light or ultraviolet ozone at room temperature-250 deg.C for 1-60 min.
Further, the metal salt is one or more of sodium chloride, sodium carbonate, sodium bicarbonate, sodium nitrate, sodium sulfate, lithium chloride, lithium hydroxide, lithium nitrate, lithium carbonate, lithium bicarbonate, lithium sulfate and lithium acetate.
Further, the high dielectric constant material precursor solution is 2-mercaptoethanol, ethanol or an aqueous solution of nitrate or chloride, and the molar concentration of the nitrate or chloride is 0.01-3 mol/L.
Further, the nitrate is one of aluminum nitrate, gallium nitrate, yttrium nitrate, neodymium nitrate, lanthanum nitrate, scandium nitrate, zirconium nitrate and zirconyl nitrate; the chloride salt is one of aluminum chloride, gallium chloride, yttrium chloride, neodymium chloride, lanthanum chloride, scandium chloride, zirconium chloride and zirconium oxychloride.
Further, the metal oxide semiconductor layer is prepared by one of a magnetron sputtering method, an atomic layer deposition method, and a solution method.
The invention has the beneficial effects that:
1) compared with a synapse type ion-doped thin film transistor device manufactured by a traditional process, the doped ions in the insulating layer bring rich charges, so that a device is easier to form an electric double layer and generate ion doping, the conductivity of the metal oxide semiconductor layer is increased, and the metal oxide semiconductor layer is suitable for simulating the long-time memory characteristic of biological synapses;
2) ions are doped in the insulating layer, so that the synapse-type thin film transistor device has larger relaxation time, the relaxation time of the traditional thin film transistor is about tens of milliseconds, while the relaxation time of the ion-doped thin film transistor is two hundred to three hundred milliseconds, and is in an order of magnitude with biological synapse, so that the synapse is more suitable for simulating the biological synapse;
3) the method adopts a pure solution method to prepare the insulating layer and the semiconductor layer, has simple and convenient operation and less investment on equipment and raw materials, can be used for preparing large-area devices and realizes large-scale industrial application; the provided preparation method can prepare the insulating layer thin film with high capacitance value and the thin film transistor device with extremely low working voltage and excellent electrical property at extremely low cost under the condition of low temperature, and the preparation process is simple, safe and environment-friendly.
The foregoing description is only an overview of the technical solutions of the present invention, and in order to make the technical solutions of the present invention more clearly understood and to implement them in accordance with the contents of the description, the following detailed description is given with reference to the preferred embodiments of the present invention and the accompanying drawings.
Drawings
FIG. 1 is a schematic structural diagram of an ion-doped thin film transistor according to the present invention;
FIG. 2 is a graph showing the response of a back-rush current generated by an undoped ion TFT under different frequency electrical pulses;
FIG. 3 is a graph showing the post-surge current response of the ion-doped TFT of FIG. 1 generated by electrical pulses of different frequencies;
FIG. 4 is a graph of the post-spike current response of the ion-doped TFT of FIG. 1 generated under different numbers of electrical pulses;
fig. 5 shows the falling time of the post-surge current generated by the ion-doped tft of fig. 1 under different number of electrical pulses.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In addition, the technical features involved in the different embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
Referring to fig. 1, the present invention provides an ion-doped thin film transistor, which includes a substrate 400, a gate electrode 500 disposed on one surface of the substrate 400, an insulating layer 300 disposed on the other surface of the substrate 400, a metal oxide semiconductor layer 200 disposed on a surface of the insulating layer 300, and a source electrode 100 and a drain electrode 101 disposed on a surface of the metal oxide semiconductor layer 200. The insulating layer 300 is an ion-doped insulating layer 300 made of a high-k material, and the high-k material is one or more of aluminum oxide, gallium oxide, yttrium oxide, neodymium oxide, lanthanum oxide, scandium oxide, and zirconium oxide, but not limited thereto, and the high-k material may be other materials, which are not listed here. The ions are sodium ions or lithium ions, which have a small diameter and a large migration rate and can move with high efficiency under an applied voltage.
The material of the metal oxide semiconductor layer 200 is one or more of indium oxide, zinc oxide, tin oxide, zinc tin oxide, indium gallium zinc oxide, and indium zinc oxide, but is not limited thereto, and the metal oxides may be other metal oxides, which are not listed here.
The source electrode 100 and the drain electrode 101 are both formed on the metal oxide semiconductor layer 200, the distance between the source electrode 100 and the drain electrode 101 is 10 to 100 μm, the source electrode 100 and the drain electrode 101 are the same in size, and the ratio of width to length thereof is 1: 1.2-1.6, it is true that in other embodiments, the ratio of the width to the length of the source electrode 100 to the drain electrode 101 may be other ratios, which are not listed here and can be selected according to actual needs.
The materials of the source electrode 100, the drain electrode 101, and the gate electrode 500 are conductive materials such as aluminum, nickel, gold, chromium, titanium ITO, etc., and are not listed here.
Compared with a synapse-type thin film transistor device manufactured by a traditional process, ions doped in the insulating layer 300 bring abundant charges, so that the device is easier to form an electric double layer and generate ion doping, the conductivity of the metal oxide semiconductor layer is increased, the metal oxide semiconductor layer is suitable for simulating the long-time memory characteristic of biological synapses, and the synapse-type thin film transistor device has more excellent synapse characteristics. The ion-doped thin film transistor comprises a source electrode 100, a drain electrode 101 and a gate electrode 500, is a three-terminal device, has the advantage of multi-terminal stimulation when being used as a synapse-type device, and can simultaneously receive light stimulation and electrical stimulation, so that the ion-doped thin film transistor has the potential to manufacture a more complex synapse-type sensor.
The invention also provides a preparation method of the ion-doped thin film transistor, which is used for preparing the ion-doped thin film transistor and comprises the following steps:
s1, providing a substrate, and cleaning the substrate;
s2, preparing a gate electrode on one surface of the substrate;
s3, performing hydrophilic treatment on the surface of the substrate far away from the gate electrode;
s4, preparing an ion-doped high-dielectric-constant material insulating layer on the surface of the substrate far away from the gate electrode by using an aqueous solution method;
s5, preparing a metal oxide semiconductor layer on the ion-doped high-dielectric-constant material insulating layer;
and S6, preparing a source electrode and a drain electrode on the metal oxide semiconductor layer to obtain the ion-doped thin film transistor.
In this embodiment, the substrate may be a silicon dioxide substrate, an n-type heavily doped silicon wafer, or the like, but is not limited thereto, and other substrates such as glass may also be used, which is not listed here.
Before the substrate is used, the substrate needs to be cleaned, and the specific steps for cleaning the substrate are as follows: and cleaning the substrate by acetone, ethanol and deionized water in sequence, and finally blowing the substrate by nitrogen. More specifically, the substrate is put into an acetone solution and cleaned for 1-30min by ultrasonic; then putting the substrate into an ethanol solution and ultrasonically cleaning for 1-30 min; then washing with deionized water; and finally, drying by using nitrogen.
The method for performing hydrophilic treatment on the substrate is one of deep ultraviolet light, ultraviolet ozone, oxygen plasma or air plasma surface hydrophilic treatment, and is not particularly limited herein, and the specific treatment method can be selected according to actual needs. The hydrophilic treatment in one embodiment comprises the following specific steps: and (3) putting the substrate into a plasma surface treatment instrument, and carrying out plasma treatment for 10-60 min. More specifically, the substrate is placed in a plasma surface treatment instrument, the plasma surface treatment instrument is firstly vacuumized for 2-5min by an air pump, and then an irradiation switch is turned on to carry out plasma treatment for 10-60 min. Because the substrate is a hydrophobic material, it is desirable to improve the hydrophilicity of the substrate surface so that it is easier to prepare an ion-doped high-k insulating layer on the substrate surface.
The specific preparation steps of the ion-doped high-dielectric-constant material insulating layer are as follows:
a1, preparing a high dielectric constant material precursor solution, and adding metal salt with ions into the high dielectric constant material precursor solution to be mixed to obtain a mixed solution, wherein the molar concentration ratio of the metal salt to the high dielectric constant material precursor is 0.01-10: 1;
a2, forming an insulating layer of high dielectric constant material doped with ions: dropping the mixed liquid on the surface of the substrate far away from the gate electrode; spin coating in air at the speed of 1000-6000rpm, and pre-annealing at 80-300 deg.C for 10-60 min; then annealing in air at 200-300 deg.C or treating with deep ultraviolet light or ultraviolet ozone at room temperature-250 deg.C for 1-60 min.
Wherein, the pre-annealing treatment makes the insulating layer film smoother and smoother.
The metal salt is one or more of sodium chloride, sodium carbonate, sodium bicarbonate, sodium nitrate, sodium sulfate, lithium chloride, lithium hydroxide, lithium nitrate, lithium carbonate, lithium bicarbonate, lithium sulfate and lithium acetate. The metal salts may be others, which are not listed here.
The precursor solution of the high dielectric constant material is 2-mercaptoethanol, ethanol or water solution of nitrate or chloride, and the molar concentration of the nitrate or chloride is 0.01-3 mol/L. The nitrate is one of aluminum nitrate, gallium nitrate, yttrium nitrate, neodymium nitrate, lanthanum nitrate, scandium nitrate, zirconium nitrate and zirconyl nitrate, and the chloride salt is one of aluminum chloride, gallium chloride, yttrium chloride, neodymium chloride, lanthanum chloride, scandium chloride, zirconium chloride and zirconium oxychloride. Nitrate and chloride salts are not listed here.
The specific operation of spin coating is to drop the solution to be spin-coated on the spin head of the spin coater, and spin the solution for a specific time and at a specific rotation speed to form a film.
The metal oxide semiconductor layer is prepared by one of a magnetron sputtering method, an atomic layer deposition method and a solution method. In the invention, the specific preparation steps of the metal oxide semiconductor layer are as follows: preparing a metal oxide semiconductor precursor solution; dripping the metal oxide semiconductor precursor solution on the surface of the insulating layer; spin coating in air at a speed of 1000-; pre-annealing at 80-300 deg.C for 10-60 min; and then post-annealing in air at 200-300 deg.C or treating with deep ultraviolet light or ultraviolet ozone at room temperature-250 deg.C for 1-60min, wherein the metal oxide semiconductor precursor solution is nitrate or chloride of one or more of indium, zinc, tin and gallium.
The gate electrode, the source electrode and the drain electrode can be prepared by any one of an ink jet printing process, a screen printing process, a photoetching process, mask thermal evaporation, magnetron sputtering and electron beam evaporation.
In the invention, a gate electrode is obtained by growing an aluminum layer on the surface of the substrate at a rate of 0.8-1.2A/s by using a thermal evaporation process.
The specific preparation steps of the source electrode and the drain electrode are as follows:
b1, providing two mask plates for forming a source electrode and a drain electrode respectively, covering the two mask plates on the surface of the metal oxide semiconductor layer respectively, reserving a rectangular groove pair for forming the source electrode and the drain electrode on the metal oxide semiconductor layer at an interval of 10-100 mu m, and cleaning the metal oxide semiconductor layer covered by the mask plates by using a plasma cleaning agent;
b2, preparing an electrode solution, and dripping the electrode solution on the metal oxide semiconductor layer with the mask removed;
b3 spin coating in air at 3000rpm for 20s, then annealing at 300 deg.C for 1 h.
Wherein the electrode solution is ITO solution composed of In (NO)3)3•3H2O and SnCl2Dissolving in deionized water, and performing ultrasonic treatment for 15 min. In step b1, since the mask blocks the non-target area, only the area for preparing the source electrode and the drain electrode is improved and made hydrophilic during the cleaning with the plasma cleaner, so that the ITO electrode is grown subsequently. The structure of the mask plate is arranged according to the structure and the position of the source electrode and the drain electrode which are actually needed.
The method adopts a pure solution method to prepare the insulating layer and the semiconductor layer, has simple and convenient operation and less investment on equipment and raw materials, can be used for preparing large-area devices and realizes large-scale industrial application; the provided preparation method can prepare the insulating layer thin film with high capacitance value and the thin film transistor device with extremely low working voltage and excellent electrical property at extremely low cost under the condition of low temperature, and the preparation process is simple, safe and environment-friendly.
The following embodiments are described in detail with respect to a method for manufacturing a thin film transistor doped with ions:
firstly, providing a silicon dioxide substrate and cleaning, wherein the specific cleaning process comprises the steps of putting the silicon dioxide substrate into an acetone solution and ultrasonically cleaning for 30 min; then putting the silicon dioxide substrate into an ethanol solution and ultrasonically cleaning for 30 min; then washing with deionized water; and finally, drying by using nitrogen.
And secondly, growing an aluminum layer on the surface of the substrate at the rate of 0.8-1.2A/s by using a thermal evaporation process to obtain a gate electrode.
And step three, placing the substrate into a plasma surface treatment instrument, vacuumizing the plasma surface treatment instrument for 5min by using an air pump, and then opening an irradiation switch to perform plasma treatment for 20 min.
Step four, preparing 2.5mol/L aluminum nitrate solution, adding sodium nitrate into the aluminum nitrate solution, and mixing to obtain mixed solution, wherein the concentration of sodium ions is 0.025 mol/L;
step five, forming a sodium ion-doped high-dielectric-constant material insulating layer: dropping the mixed liquid on the surface of the substrate far away from the gate electrode; spin coating in air at 5000rpm, and pre-annealing at 80 deg.C for 15 min; and then annealing for 30min in the air at 300 ℃ to obtain the sodium ion-doped high-dielectric-constant material insulating layer.
Step six, preparing an indium oxide solution, and dripping the indium oxide solution on the surface of the insulating layer; spin coating in air at 3000 rpm; pre-annealing at 80 deg.C for 15 min; and then annealing in the air at 250 ℃ for 30min to obtain the metal oxide semiconductor layer.
Step seven, providing two electrodes for forming a source electrode and a drain electrode respectivelyThe electrode mask plates cover the surface of the metal oxide semiconductor layer respectively, rectangular groove pairs for forming a source electrode and a drain electrode are reserved on the metal oxide semiconductor layer and are separated by 10-100 mu m, and a substrate covered by the mask plates is cleaned by a plasma cleaning agent; 0.902 g of In (NO)3)3•3H2O with 0.420 g SnCl2Dissolving the electrode solution in 20 mL of deionized water, performing ultrasonic treatment for 15min to obtain an electrode solution, and dripping the electrode solution on the metal oxide semiconductor layer without the mask; spin-coating at 3000rpm in air for 20s, annealing at 300 deg.C for 1 hr to obtain source electrode and drain electrode, and finally preparing the doped ion thin film transistor.
Referring to fig. 2, in the response of the back-inrush current generated by the undoped ion tft under different frequency electrical pulses, it can be seen that the back-inrush current is substantially constant as the number of pulses increases.
Referring to FIG. 3, the ion-doped TFT obtained in this example generates a post-synaptic current response under different electrical pulses, and it can be seen that the post-synaptic current at each frequency has a significant superposition effect, and the post-synaptic current increases significantly with the increase of the frequency.
Referring to fig. 4, the ion-doped tfts obtained in this embodiment generate a post-impact current response under different numbers of electrical pulses, where numbers 5, 10, 20, 50 and 100 in fig. 4 represent the number of pulses. It can be seen that the post-surge current gradually becomes larger as the number of pulses increases.
Referring to fig. 5, the falling time of the post-impact current generated by the doped tft under different number of electrical pulses is shown, and the numbers 5, 10, 20, 50 and 100 indicate the number of pulses. It can be seen that as the number of pulses increases, the time for the post-inrush current to approach 0 gradually increases.
The results of fig. 2 to 5 show that the ion-doped thin film transistor prepared by the present application possesses synaptic plasticity and can simulate the transition from short-term memory to long-term memory, which is very similar to real biological synapse. The artificially prepared ion-doped thin film transistor is proved to have synaptic plasticity and be suitable for simulating the long-time memory characteristic of biological synapses.
In addition, the relaxation time of the thin film transistor doped with ions obtained after linear fitting is close to that of biological synapses, the relaxation time of the thin film transistor device is larger due to the ions doped in the insulating layer, the relaxation time of the traditional thin film transistor is about tens of milliseconds, the relaxation time of the thin film transistor doped with sodium ions is two hundred to three hundred milliseconds, and the relaxation time of the thin film transistor doped with sodium ions is one order of magnitude with the biological synapses, so that the thin film transistor doped with ions is more suitable for simulating the biological synapses, and the fact that the thin film transistor doped with ions optimized by the method is more suitable for simulating the biological synapses is proved.
In summary, 1) compared with a synapse-type ion-doped thin film transistor device manufactured by a traditional process, the doped ions in the insulating layer bring rich charges, so that the device is easier to form an electric double layer and generate ion doping, and the conductivity of the metal oxide semiconductor layer is increased, so that the metal oxide semiconductor layer is suitable for simulating the long-time memory characteristic of biological synapses;
2) ions are doped in the insulating layer, so that the synapse-type thin film transistor device has larger relaxation time, the relaxation time of the traditional thin film transistor is about tens of milliseconds, while the relaxation time of the ion-doped thin film transistor is two hundred to three hundred milliseconds, and is in an order of magnitude with biological synapse, so that the synapse is more suitable for simulating the biological synapse;
3) the method adopts a pure solution method to prepare the insulating layer and the semiconductor layer, has simple and convenient operation and less investment on equipment and raw materials, can be used for preparing large-area devices and realizes large-scale industrial application; the provided preparation method can prepare the insulating layer thin film with high capacitance value and the thin film transistor device with extremely low working voltage and excellent electrical property at extremely low cost under the condition of low temperature, and the preparation process is simple, safe and environment-friendly.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (10)

1. The ion-doped thin film transistor is characterized by comprising a substrate, a gate electrode arranged on one surface of the substrate, an insulating layer arranged on the other surface of the substrate, a metal oxide semiconductor layer arranged on the surface of the insulating layer, and a source electrode and a drain electrode which are arranged on the surface of the metal oxide semiconductor layer, wherein the insulating layer is an ion-doped high-dielectric-constant material insulating layer.
2. The ion-doped thin film transistor according to claim 1, wherein the ions are sodium ions or lithium ions.
3. The ion-doped thin film transistor of claim 1, wherein the high dielectric constant material is one or more of aluminum oxide, gallium oxide, yttrium oxide, neodymium oxide, lanthanum oxide, scandium oxide, and zirconium oxide.
4. The ion-doped thin film transistor according to claim 1, wherein the material of the metal oxide semiconductor layer is one or more of indium oxide, zinc oxide, tin oxide, zinc tin oxide, indium gallium zinc oxide, and indium zinc oxide.
5. A method for manufacturing an ion-doped thin film transistor, which is used for manufacturing the ion-doped thin film transistor according to any one of claims 1 to 4, the method comprising:
s1, providing a substrate, and cleaning the substrate;
s2, preparing a gate electrode on one surface of the substrate;
s3, performing hydrophilic treatment on the surface of the substrate far away from the gate electrode;
s4, preparing an ion-doped high-dielectric-constant material insulating layer on the surface of the substrate far away from the gate electrode by using an aqueous solution method;
s5, preparing a metal oxide semiconductor layer on the ion-doped high-dielectric-constant material insulating layer;
and S6, preparing a source electrode and a drain electrode on the metal oxide semiconductor layer to obtain the ion-doped thin film transistor.
6. The method of claim 5, wherein the ion-doped high-k insulating layer is prepared by the steps of:
a1, preparing a high dielectric constant material precursor solution, and adding metal salt with ions into the high dielectric constant material precursor solution to be mixed to obtain a mixed solution, wherein the molar concentration ratio of the metal salt to the high dielectric constant material precursor is 0.01-10: 1;
a2, forming an insulating layer of high dielectric constant material doped with ions: dropping the mixed liquid on the surface of the substrate far away from the gate electrode; spin coating in air at the speed of 1000-6000rpm, and pre-annealing at 80-300 deg.C for 10-60 min; then annealing in air at 200-300 deg.C or treating with deep ultraviolet light or ultraviolet ozone at room temperature-250 deg.C for 1-60 min.
7. The method of claim 6, wherein the metal salt is one or more of sodium chloride, sodium carbonate, sodium bicarbonate, sodium nitrate, sodium sulfate, lithium chloride, lithium hydroxide, lithium nitrate, lithium carbonate, lithium bicarbonate, lithium sulfate, and lithium acetate.
8. The method according to claim 6, wherein the precursor solution of the high-k material is 2-mercaptoethanol, ethanol or an aqueous solution of nitrate or chloride, and the molar concentration of the nitrate or chloride is 0.01-3 mol/L.
9. The method of manufacturing an ion-doped thin film transistor according to claim 8, wherein the nitrate is one of aluminum nitrate, gallium nitrate, yttrium nitrate, neodymium nitrate, lanthanum nitrate, scandium nitrate, zirconium nitrate, and zirconyl nitrate; the chloride salt is one of aluminum chloride, gallium chloride, yttrium chloride, neodymium chloride, lanthanum chloride, scandium chloride, zirconium chloride and zirconium oxychloride.
10. The method of manufacturing an ion-doped thin film transistor according to claim 5, wherein the metal oxide semiconductor layer is manufactured by one of a magnetron sputtering method, an atomic layer deposition method, and a solution method.
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