CN113496906A - Wafer overlay measuring method and device, storage medium and electronic equipment - Google Patents
Wafer overlay measuring method and device, storage medium and electronic equipment Download PDFInfo
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Abstract
The embodiment of the invention provides a wafer overlay measuring method, a wafer overlay measuring device, a storage medium and electronic equipment. In the embodiment of the invention, the abnormal target is determined according to the first data of the wafer in the first state, the second data of the abnormal target is acquired, and the detection result of the abnormal target is acquired according to the first data and the second data. Therefore, only the first data of most of the targets, and the first data and the second data of less of the targets can be acquired to determine the detection result of each target in the wafer. The measuring efficiency can be improved while the measuring precision is ensured.
Description
Technical Field
The present invention relates to the field of semiconductor technologies, and in particular, to a method and an apparatus for measuring wafer overlay, a storage medium, and an electronic device.
Background
With the continuous development of semiconductor manufacturing processes, the integration level of semiconductor devices is higher and higher, and the feature size of semiconductor devices is also gradually reduced. However, the production efficiency of semiconductor devices is also required to be improved.
Disclosure of Invention
In view of this, embodiments of the present invention provide a wafer overlay measurement method to improve the production efficiency of semiconductor devices.
In a first aspect, an embodiment of the present invention provides a method for measuring wafer overlay, where the method includes:
acquiring first data of each target of a current layer of a wafer in a first state; responding to the abnormal target with the abnormal first data, and acquiring second data of the abnormal target of the current layer of the wafer in a second state; determining a measurement result according to the first data and the second data; the first data and the second data are respectively used for representing pattern information of the current layer of the wafer in different states; the target is an area for forming one chip unit.
Optionally, the obtaining second data of the abnormal target of the current layer of the wafer in the second state includes: acquiring the position coordinates of the abnormal target; rotating the wafer by a preset angle; and acquiring second data of the abnormal target according to the position coordinate of the abnormal target.
Optionally, the rotating the wafer by the predetermined angle is specifically rotating the wafer by 180 degrees around the center of the wafer.
Optionally, the first data and the second data are patterns of a current layer of the wafer; or the first data and the second data are light intensity information which has a corresponding relation with the pattern of the current layer of the wafer.
Optionally, after the obtaining the first data of each target on the wafer with the current layer of the wafer in the first state, before the obtaining the second data of the abnormal target with the current layer of the wafer in the second state, the method further includes: and determining whether an abnormal target exists according to a fitting model and the first data, wherein the fitting model is predetermined according to the previous layer pattern and the current layer pattern.
Optionally, the determining whether the abnormal target exists according to the fitting model and the first data specifically includes: determining the target to be an anomalous target in response to an error in the first data and the fitted model being greater than a predetermined value.
Optionally, the first data is light intensity information that a pattern of a current layer of the wafer has a corresponding relationship; the error between the first data and the fitting model larger than the predetermined value is specifically: and the difference value between the light intensity of the coordinates in the first data and the light intensity of the coordinates corresponding to the fitting model is larger than a first threshold value.
Optionally, the first data is a pattern of a current layer of the wafer; the error between the first data and the fitting model larger than the predetermined value is specifically: the difference between the size of the pattern of the current layer in the first data and the size of the pattern of the fitted model is larger than a second threshold.
Optionally, the wafer in the second state rotates around the center of the wafer by a predetermined angle with respect to the wafer in the first state.
Optionally, the determining a measurement result according to the first data and the second data specifically includes:
and determining that the measurement result of the target with abnormal first data and second data is unqualified.
In a second aspect, an embodiment of the present invention provides a wafer overlay measuring apparatus, including: the first data acquisition unit is used for acquiring first data of each target of the current layer of the wafer in a first state; the second data acquisition unit is used for responding to the abnormal target with the abnormal first data, and acquiring second data of the abnormal target of the current layer of the wafer in a second state; a measurement result determining unit, configured to determine a measurement result according to the first data and the second data; the first data and the second data are respectively used for representing pattern information of the current layer of the wafer in different states; the target is an area for forming one chip unit.
In a third aspect, an embodiment of the present invention provides a computer-readable storage medium on which computer program instructions are stored, which when executed by a processor implement the method according to the first aspect.
In a fourth aspect, an embodiment of the present invention provides an electronic device, including a memory and a processor, where the memory is configured to store one or more computer program instructions, where the one or more computer program instructions are executed by the processor to perform the following steps: acquiring first data of each target of a current layer of a wafer in a first state; responding to the abnormal target with the abnormal first data, and acquiring second data of the abnormal target of the current layer of the wafer in a second state; determining a measurement result according to the first data and the second data; the first data and the second data are respectively used for representing pattern information of the current layer of the wafer in different states; the target is an area for forming one chip unit.
In the embodiment of the invention, the abnormal target is determined according to the first data of the wafer in the first state, the second data of the abnormal target is acquired, and the detection result of the abnormal target is acquired according to the first data and the second data. Therefore, only the first data of most of the targets, and the first data and the second data of less of the targets can be acquired to determine the detection result of each target in the wafer. The measuring efficiency can be improved while the measuring precision is ensured.
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The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:
FIG. 1 is a photograph of a first comparative wafer measurement result;
FIG. 2 is a wafer section view of a third comparative example;
FIG. 3 is a flowchart illustrating a wafer overlay measurement method according to a first embodiment of the present invention;
FIGS. 4-6 are schematic diagrams illustrating steps of a wafer overlay metrology method according to an embodiment of the present invention;
FIG. 7 is a flowchart illustrating a wafer overlay measurement method according to a first embodiment of the present invention;
FIG. 8 is a schematic view of a wafer overlay measuring apparatus according to a second embodiment of the present invention;
fig. 9 is a schematic view of an electronic apparatus of a third embodiment of the present invention.
Detailed Description
The present invention will be described below based on examples, but the present invention is not limited to only these examples. In the following detailed description of the present invention, certain specific details are set forth. It will be apparent to one skilled in the art that the present invention may be practiced without these specific details. Well-known methods, procedures, components and circuits have not been described in detail so as not to obscure the present invention.
Further, those of ordinary skill in the art will appreciate that the drawings provided herein are for illustrative purposes and are not necessarily drawn to scale.
Unless the context clearly requires otherwise, throughout the description, the words "comprise", "comprising", and the like are to be construed in an inclusive sense as opposed to an exclusive or exhaustive sense; that is, what is meant is "including, but not limited to".
In the description herein, it is to be understood that the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. In addition, in the description of the present invention, "a plurality" means two or more unless otherwise specified.
Semiconductor devices are electronic devices that have electrical conductivity between a good electrical conductor and an insulator, and that use the special electrical properties of semiconductor materials to perform specific functions, and can be used to generate, control, receive, convert, amplify signals, and perform energy conversion. Photolithography is an important step in the semiconductor device fabrication process, in which geometric structures are patterned on a photoresist layer by exposure and development, and then the patterns on a photomask are transferred onto a substrate by an etching process. The photolithography process specifically includes the steps of photoresist coating, photoresist baking, alignment, exposure, development, and the like. Alignment is an important step before exposure, and refers to a process of measuring the position of a reference layer pattern on a wafer and adjusting an exposure system to accurately overlap the currently exposed pattern with the pattern on the wafer. The alignment operation is performed by an alignment system in the lithography machine. The accuracy of Overlay (OVL) is a parameter for measuring the alignment, and it directly and quantitatively describes the position deviation between the current layer and the reference layer. If the lithography overlay error exceeds the tolerance of the error between the current layer and the previous layer, the circuit between the two layers may be open or short due to the error, thereby affecting the yield and performance of the semiconductor manufacturing. How to accurately and efficiently measure the lithography pattern becomes an urgent problem to be solved.
In the first comparative example, a measurement error (TIS) is obtained once for each of the 0 degree and 180 degree wafers, and a measurement value is obtained by eliminating the measurement error. The measurement method of the comparative example has better accuracy, but the measurement efficiency is lower.
In the second comparison, to further improve the measurement speed, only 0 degree is measured, and the measurement time can be reduced by nearly 50% compared to the first comparison. Calibration is performed by classifying the data into different types, while the applicability of the raw data to the calibration model is card-controlled, which causes some measurement points to be reported as being out of the card-control standard. These error reporting points are considered as measurement outliers/invalid points, and cannot receive values normally and do subsequent feedback actions. As shown in fig. 1, the dark areas on the outer side of the wafer are error reporting points. Although the measuring method of the comparative example can improve the measuring efficiency, the measuring accuracy is reduced because only 0 degree is measured.
In the third comparative example, different regions are divided in the wafer, and different measurement schemes are respectively adopted in the different regions. As shown in fig. 2, a first comparative measurement method is used in the dark areas of the wafer periphery and a second comparative measurement method is used in the light areas of the wafer center. The measurement speed was increased by 25% compared to the first comparative example. However, the dividing method is not very accurate because there are outliers in the middle region of the wafer, which results in insufficient accuracy of the measurement.
In view of this, in order to simultaneously consider the measurement accuracy and efficiency, a first embodiment of the present invention provides a wafer overlay measurement method, which can improve the measurement efficiency without reducing the measurement accuracy. It should be understood that the method of the present invention is applicable to wafer overlay metrology of various technology nodes, including but not limited to technology nodes above 130nm, 90nm, 65/55nm, 45/40nm, 32/28nm, 22/20nm, 16/14nm, and below 10 nm.
The method of the embodiment of the invention is suitable for different measuring machines, including but not limited to measuring machines based on Imaging Base Overlay (IBO), measuring methods and Diffraction Base Overlay (DBO) measuring methods.
FIG. 3 is a flowchart illustrating a wafer overlay measurement method according to a first embodiment of the present invention. As shown in fig. 3, the wafer overlay measuring method according to the embodiment of the present invention includes the following steps:
step S100, first data of each target of a current layer of a wafer in a first state are obtained.
Step S200, responding to the abnormal target with the abnormal first data, and acquiring second data of the abnormal target of the current layer of the wafer in the second state.
Step S300, determining a measurement result according to the first data and the second data.
In an optional implementation manner, after step S100 and before step S200, the method of the embodiment of the present invention further includes:
step S200a, determining whether an abnormal target exists according to a fitting model and the first data, wherein the fitting model is predetermined according to the previous layer pattern and the current layer pattern.
Fig. 4-6 are schematic diagrams illustrating steps of a measurement method according to an embodiment of the invention.
As shown in fig. 4, in step S100, first data of each target of the current layer of the wafer in the first state is obtained.
The first data is used for representing the pattern information of the current layer of the wafer when the wafer is at 0 degree.
Specifically, the first data is obtained by an OVL metrology tool. The OVL metrology tool may include a stepper and a detection device configured to obtain first data for each target of a wafer one by one. The detection means may comprise a position sensor or an optical sensor or the like.
The initial position of the wafer is 0 degree. The initial position of the wafer may be determined according to the positions of overlay marks (Mark) or notches (Notch).
The target is an area for forming one chip unit. Specifically, the target is a square area in the wafer as shown in fig. 4. The chip unit may be an intermediate structure of the chip. Active devices, passive devices, circuits, and the like formed of a plurality of semiconductor layers or metal layers may be included. Further, the active devices and the passive devices in the semiconductor substrate may be capacitors, inductors, resistors, various transistors, and the like.
The wafer current layer may be a photoresist layer formed through an exposure and development process, the photoresist layer having a pattern. For use as a mask for subsequent pre-etch layers. Therefore, it is necessary to ensure that the shape and position of the actually formed photoresist layer are within a predetermined range to prevent the circuit between the two layers from being opened or short-circuited due to an error.
The first data is used for representing the pattern information of the current layer of the wafer under the state of 0 degree. According to different detection devices in the adopted OVL metrology tool, the first data may be the current layer pattern of the wafer or the light intensity information having a corresponding relationship with the current layer pattern of the wafer. Specifically, the first data may reflect data such as a maximum value, a minimum value, an average value, and a variance of the line width in the current layer pattern.
In an optional implementation manner, the detection device in the OVL measurement machine includes an illumination system and a light intensity detector, determines a correspondence between light intensity and a pattern of a current layer by using a diffraction principle of light, and determines information of the pattern of the current layer by obtaining the light intensity.
In an alternative implementation, the detection device in the OVL metrology tool includes a position sensor or an imaging system, etc. which can directly obtain the shape and size of the pattern of the current layer by the reflection pattern.
As shown in fig. 4, in step S200a, it is determined whether there is an abnormal target 1 based on a fitting model, which is predetermined based on a previous layer pattern and a current layer pattern, and first data.
Specifically, the fitting model is different in different types of OVL machines. Alternatively, the fitting model may be the ideal current layer pattern to be formed determined according to the optical approximate correction and the pattern determined by the reasonable error range. Or a set of a series of coordinate points determined from the correspondence between the pattern and the light intensity, each coordinate point corresponding to different light intensity data.
Specifically, the target is determined to be an abnormal target in response to an error of the first data and the fitted model being greater than a predetermined value.
In an optional implementation manner, the machine obtains first data by using a diffraction principle of light, where the first data is light intensity information that a pattern of a current layer of the wafer has a corresponding relationship. Correspondingly, the fitting model is a set of coordinate points containing light intensity information. The error between the first data and the fitting model is greater than a predetermined value, specifically, a difference between the light intensity of the coordinates in the first data and the light intensity of the coordinates corresponding to the fitting model is greater than a first threshold. Specifically, the first threshold is a maximum difference value that does not cause a chip unit to fail.
In an alternative implementation, the machine uses the principle of reflected light, and uses a position sensor or an imaging system to acquire the first data. The first data is a pattern of a current layer of the wafer. Correspondingly, the error between the first data and the fitted model is greater than a predetermined value, specifically, the difference between the size of the pattern of the current layer in the first data and the size of the pattern of the fitted model is greater than a second threshold. Specifically, the second threshold is a maximum difference value that does not cause a chip unit to fail.
As shown in fig. 4, in step S200, in response to the abnormal target with the abnormal first data, second data of the abnormal target in the second state of the current layer of the wafer is obtained.
Referring to fig. 5, the obtaining of the second data of the abnormal target of the current layer of the wafer in the second state includes the following steps:
step S201, obtaining the position coordinates of the abnormal target.
Step S202, rotating the wafer by a preset angle.
And step S203, acquiring second data of the abnormal target according to the position coordinate of the abnormal target.
In step S201, the position coordinates of the abnormality target 1 are acquired.
Referring to fig. 6, in step S202, the wafer is rotated by a predetermined angle.
The rotating the wafer by the predetermined angle is specifically rotating the wafer by the predetermined angle around the center of the circle of the wafer, so that the wafer is in a second state. That is, the wafer in the second state is rotated by a predetermined angle around the center of the wafer with respect to the wafer in the first state. The predetermined angle may be 45 degrees, 90 degrees, 180 degrees, or the like. In an alternative implementation, the predetermined angle is 180 degrees.
The wafer is rotated by a preset angle to acquire pattern information of an abnormal target in different states, so that measurement errors can be reduced.
In step S203, second data of the abnormal target is acquired according to the position coordinates of the abnormal target.
Specifically, the second data is used for characterizing pattern information of a current layer of the wafer in a second state. The method for acquiring the second data may refer to the method for acquiring the first data, and is not described herein again.
Only second data of an abnormal target determined from the first data is acquired. The measurement efficiency can be improved. Meanwhile, the measuring precision can be ensured.
Alternatively, when the number of abnormal targets is 10% of the total targets, the measurement time of the present embodiment is (100% + 10%)/(100% + 100%) of the first comparative ratio, i.e., 55%, compared to the first comparative ratio, improving the measurement efficiency. Meanwhile, compared with the second comparison example and the third comparison example, the measurement is performed twice on each abnormal target, and the measurement precision is improved.
In step S300, a measurement result is determined according to the first data and the second data.
The measurement result is specifically whether the target is qualified. That is, whether the photoresist pattern of the current layer meets the process requirements or not and whether the chip unit fails due to the fact that the subsequent etching is carried out by adopting the photoresist pattern of the current layer or not. Specifically, whether the current layer pattern of the abnormal target is qualified or not is judged according to the first data, the second data and the measurement result determined by the error of the machine. Further, for the abnormal target, a measurement result of the abnormal target is determined according to the first data, the second data and the error of the machine. And determining the measurement result of the target according to the first data and the error of the machine for the target which is not abnormal.
In an alternative implementation, the first data anomaly is determined, and the target measurement result of the second data anomaly is unqualified. That is, if the difference between the first data and the second data of one object and the size of the pattern of the fitting model is simultaneously larger than the predetermined threshold, the object is determined as a failed object. Wherein, the predetermined threshold is determined according to the error of the machine. That is, the detection results of the abnormal object in the first state and the second state and the predetermined threshold have large deviations.
In another alternative implementation, the first data is determined to be abnormal, and the target measurement result that the second data is normal is qualified.
In other alternative implementations, the first data or the second data may be input into a mathematical model, and the mathematical model is used to determine whether the measurement result of the target is qualified or unqualified.
In the subsequent process, the current layer is formed again or the wafer enters the next procedure according to the qualified target proportion on the wafer.
In the embodiment of the invention, the abnormal target is determined according to the first data of the wafer in the first state, the second data of the abnormal target is acquired, and the detection result of the abnormal target is acquired according to the first data and the second data. Therefore, only the first data of most of the targets, and the first data and the second data of less of the targets can be acquired to determine the detection result of each target in the wafer. The measuring efficiency can be improved while the measuring precision is ensured.
FIG. 7 is a flowchart illustrating a wafer overlay measurement method according to a first embodiment of the present invention. As shown in fig. 7, the wafer overlay measuring method of the present embodiment includes the following steps:
step S701, first data of each target of the current layer of the wafer in the first state is obtained.
Specifically, reference may be made to step S100, which is not described herein again.
Step S702, judging whether an abnormal target exists.
Specifically, whether an abnormal target exists is determined according to a fitting model and first data, wherein the fitting model is determined in advance according to a previous layer pattern and a current layer pattern. Reference may be made to step S200a, which is not described herein.
Step S703, in response to the abnormal target with the abnormal first data, obtaining second data of the abnormal target of the current layer of the wafer in the second state.
Specifically, reference may be made to step S200, which is not described herein again.
Step S704, determining a measurement result according to the first data and the second data.
Specifically, reference may be made to step S300, which is not described herein again.
Step S705, in response to the abnormal target without the first data abnormality, determining a measurement result according to the first data.
In an alternative implementation, the measurement result of the target for which the first data is normal is determined to be qualified.
Referring to fig. 8, a second embodiment of the invention provides a wafer overlay measuring apparatus. The apparatus according to the second embodiment of the present invention comprises: a first data acquisition unit 801, a second data acquisition unit 802, and a measurement result determination unit 803.
The first data acquiring unit 801 is configured to acquire first data of each target of a current layer of a wafer in a first state.
The second data obtaining unit 802 is configured to obtain second data of an abnormal target of the current layer of the wafer in the second state in response to the abnormal target having the first data abnormality.
The measurement result determining unit 803 is configured to determine a measurement result according to the first data and the second data.
The first data and the second data are respectively used for representing pattern information of the current layer of the wafer in different states.
The target is an area for forming one chip unit.
Fig. 9 is a schematic view of an electronic apparatus of a third embodiment of the present invention. The electronic device shown in fig. 9 is a general-purpose data processing apparatus comprising a general-purpose computer hardware structure including at least a processor 91 and a memory 92. The processor 91 and the memory 92 are connected by a bus 93. The memory 92 is adapted to store instructions or programs executable by the processor 91. The processor 91 may be a stand-alone microprocessor or may be a collection of one or more microprocessors. Thus, the processor 91 implements the processing of data and the control of other devices by executing the commands stored in the memory 92 to execute the method flow of the embodiment of the present invention as described above. The bus 93 connects the above components together, and also connects the above components to a display controller 94 and a display device and an input/output (I/O) device 95. Input/output (I/O) devices 95 may be a mouse, keyboard, modem, network interface, touch input device, motion sensing input device, printer, and other devices known in the art. Typically, input/output (I/O) devices 95 are connected to the system through an input/output (I/O) controller 96.
Among other things, the memory 92 may store software components such as an operating system, a communication module, an interaction module, and an application program. Each of the modules and applications described above corresponds to a set of executable program instructions that perform one or more functions and methods described in embodiments of the invention.
The above-described flowchart and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention illustrate various aspects of the present disclosure. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.
A fourth embodiment of the invention relates to a non-volatile storage medium for storing a computer-readable program for causing a computer to perform some or all of the above-described method embodiments. Thereby having corresponding beneficial effects.
Also, as will be appreciated by one skilled in the art, aspects of embodiments of the present invention may be embodied as a system, method or computer program product. Accordingly, various aspects of embodiments of the invention may take the form of: an entirely hardware implementation, an entirely software implementation (including firmware, resident software, micro-code, etc.) or an implementation combining software and hardware aspects that may all generally be referred to herein as a "circuit," module "or" system. Further, aspects of the present disclosure may take the form of: a computer program product embodied in one or more computer readable media having computer readable program code embodied thereon.
Any combination of one or more computer-readable media may be utilized. The computer readable medium may be a computer readable signal medium or a computer readable storage medium. A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of the computer readable storage medium would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of embodiments of the present invention, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
A computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated signal may take any of a variety of forms, including, but not limited to: electromagnetic, optical, or any suitable combination thereof. The computer readable signal medium may be any of the following computer readable media: is not a computer readable storage medium and may communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.
Computer program code for carrying out operations for aspects of the present disclosure may be written in any combination of one or more programming languages, including: object oriented programming languages such as Java, Smalltalk, C + +, PHP, Python, and the like; and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package; executing in part on a user computer and in part on a remote computer; or entirely on a remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider).
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (13)
1. A method for wafer overlay metrology, the method comprising:
acquiring first data of each target of a current layer of a wafer in a first state;
responding to the abnormal target with the abnormal first data, and acquiring second data of the abnormal target of the current layer of the wafer in a second state; and
determining a measurement result according to the first data and the second data;
the first data and the second data are respectively used for representing pattern information of the current layer of the wafer in different states;
the target is an area for forming one chip unit.
2. The wafer overlay metrology method of claim 1, wherein obtaining second data for an anomaly target of a current layer of the wafer in a second state comprises:
acquiring the position coordinates of the abnormal target;
rotating the wafer by a preset angle; and
and acquiring second data of the abnormal target according to the position coordinate of the abnormal target.
3. The wafer overlay measurement method of claim 2, wherein the rotating the wafer by a predetermined angle is performed by rotating the wafer by 180 degrees around a center of the wafer.
4. The wafer overlay metrology method of claim 1, wherein the first data and the second data are patterns of a current layer of the wafer; or
The first data and the second data are light intensity information having a corresponding relationship with a pattern of a current layer of the wafer.
5. The wafer overlay metrology method of claim 1, wherein after obtaining the first data for each target on the wafer with the current layer in the first state, before obtaining the second data for the abnormal target with the current layer in the second state, the method further comprises:
and determining whether an abnormal target exists according to a fitting model and the first data, wherein the fitting model is predetermined according to the previous layer pattern and the current layer pattern.
6. The wafer overlay metrology method of claim 5, wherein the determining whether an anomalous target exists based on the fitted model and the first data comprises:
determining the target to be an anomalous target in response to an error in the first data and the fitted model being greater than a predetermined value.
7. The wafer overlay measurement method of claim 6, wherein the first data is light intensity information corresponding to a pattern of a current layer of the wafer; the error between the first data and the fitting model larger than the predetermined value is specifically:
and the difference value between the light intensity of the coordinates in the first data and the light intensity of the coordinates corresponding to the fitting model is larger than a first threshold value.
8. The wafer overlay metrology method of claim 6, wherein the first data is a pattern of a current layer of the wafer; the error between the first data and the fitting model larger than the predetermined value is specifically:
the difference between the size of the pattern of the current layer in the first data and the size of the pattern of the fitted model is larger than a second threshold.
9. The wafer overlay measurement method of claim 1, wherein the wafer in the second state is rotated around a center of the wafer by a predetermined angle with respect to the wafer in the first state.
10. The wafer overlay metrology method of claim 1, wherein determining a metrology result based on the first data and the second data comprises:
and determining that the measurement result of the target with abnormal first data and second data is unqualified.
11. An apparatus for wafer overlay measurement, the apparatus comprising:
the first data acquisition unit is used for acquiring first data of each target of the current layer of the wafer in a first state;
the second data acquisition unit is used for responding to the abnormal target with the abnormal first data, and acquiring second data of the abnormal target of the current layer of the wafer in a second state; and
a measurement result determining unit, configured to determine a measurement result according to the first data and the second data;
the first data and the second data are respectively used for representing pattern information of the current layer of the wafer in different states;
the target is an area for forming one chip unit.
12. A computer-readable storage medium on which computer program instructions are stored, which, when executed by a processor, implement the method of any one of claims 1-10.
13. An electronic device comprising a memory and a processor, wherein the memory is configured to store one or more computer program instructions, wherein the one or more computer program instructions are executed by the processor to perform the steps of:
acquiring first data of each target of a current layer of a wafer in a first state;
responding to the abnormal target with the abnormal first data, and acquiring second data of the abnormal target of the current layer of the wafer in a second state; and
determining a measurement result according to the first data and the second data;
the first data and the second data are respectively used for representing pattern information of the current layer of the wafer in different states;
the target is an area for forming one chip unit.
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| KR20160061747A (en) * | 2014-11-24 | 2016-06-01 | 세메스 주식회사 | Method of inspecting a wafer |
| JP2017138246A (en) * | 2016-02-05 | 2017-08-10 | レーザーテック株式会社 | Inspection device, inspection method, and image sensor |
| CN107561875A (en) * | 2017-09-06 | 2018-01-09 | 上海华力微电子有限公司 | A kind of method that overlay error is measured and problem is assessed |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US20140136137A1 (en) * | 2012-11-09 | 2014-05-15 | Kla-Tencor Corporation | Metrology target characterization |
| KR20160061747A (en) * | 2014-11-24 | 2016-06-01 | 세메스 주식회사 | Method of inspecting a wafer |
| JP2017138246A (en) * | 2016-02-05 | 2017-08-10 | レーザーテック株式会社 | Inspection device, inspection method, and image sensor |
| CN107561875A (en) * | 2017-09-06 | 2018-01-09 | 上海华力微电子有限公司 | A kind of method that overlay error is measured and problem is assessed |
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