CN113496749A - Storage performance test analysis method and system - Google Patents
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- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
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Abstract
The invention relates to a storage performance test analysis method, which comprises the following steps: acquiring protocol message data transmitted between an HOST end and a solid-state storage device; and analyzing the protocol message data to obtain storage performance data. The advantages are that: the protocol message data in the running process of the solid-state storage product is collected and analyzed to obtain the storage performance data, and the storage performance data is based on the protocol message data, so that the performance analysis requirement of a fine granularity level can be met.
Description
Technical Field
The invention relates to the technical field of storage, in particular to a storage performance test analysis method and a storage performance test analysis system.
Background
The solid-state storage is a technology for storing and reading data by adopting an electronic storage medium, breaks through the performance bottleneck of the traditional mechanical hard disk, and has extremely high bandwidth and IOPS (Input/Output Per Second read-write times) performance.
Solid-state storage products such as Standard Size SD (SD), micro SD (TF), embedded Multi Media Card (eMMC), Nano Memory Card (NM), etc. are widely applied to various fields such as mobile phones, flat panels, cameras, vehicles, etc., and one common challenge faced by them is how to meet higher and higher performance and stability requirements.
Common performance test software for solid-state storage includes ATTO, IOMeter, CrystalDiskMark and the like, but the software can only test the overall performance of a solid-state storage product, when the solid-state storage product has abnormal performance, the test tool cannot perform further performance analysis and problem positioning, and a corresponding test method and a corresponding test tool are lacked at the present stage.
Disclosure of Invention
Therefore, it is necessary to provide a storage performance test analysis method and system for solving the problem that fine-grained analysis cannot be performed on a solid-state storage product, so that fine-grained performance analysis can be performed on the solid-state storage product, and accurate positioning of a problem position can be achieved after the solid-state storage product has a performance problem.
A storage performance test analysis method is characterized by comprising the following steps:
acquiring protocol message data transmitted between an HOST end and a solid-state storage device;
and analyzing the protocol message data to obtain storage performance data.
In the above method for analyzing storage performance test, the step of analyzing the protocol packet data to obtain the storage performance data specifically includes:
acquiring the starting time, the ending time, the block size and the block number corresponding to the read/write command in the protocol message data;
and obtaining the read/write performance data according to the starting time, the ending time, the block size and the number of the blocks corresponding to the read/write command.
In the above method for analyzing storage performance test, the step of obtaining the read/write performance data according to the start time, the end time, the block size and the number of blocks corresponding to the read/write command specifically includes:
obtaining the read/write performance data according to the following calculation formula:
Spend Time＝End Time2-Start Time1；
Sector Count＝Block Count×Block Size；
Performance＝Sector Count/Spend Time；
in the formula, the Spend Time represents the consumed Time for transmitting the specified data in the read/write instruction, the End Time2 represents the End Time corresponding to the read/write instruction, the Start Time1 represents the Start Time corresponding to the read/write instruction, the Block Count represents the number of blocks corresponding to the read/write instruction, the Block size represents the Block size set by the HOST End, the Sector Count represents the number of bytes of transmission data corresponding to the read/write instruction, and the Performance represents the read/write Performance data.
The storage performance test analysis method further comprises the following steps:
and drawing a performance graph according to the storage performance data.
The storage performance test analysis method further comprises the following steps:
and drawing a performance graph with the abscissa as the time corresponding to the transmission of each read/write instruction and the ordinate as the read/write performance data corresponding to each read/write instruction.
The storage performance test analysis method further comprises the following steps:
and drawing a performance graph of the read/write performance data of the read/write instruction corresponding to different byte numbers of the transmission data by taking the abscissa as the different byte numbers of the transmission data and the ordinate as the different byte numbers of the transmission data.
The storage performance test analysis method comprises the following steps:
the solid-state storage device comprises any one of SD, TF, eMMC and NM.
A storage performance testing analysis system, comprising:
the acquisition module is used for acquiring protocol message data transmitted between the HOST end and the solid-state storage equipment;
and the analysis processing module is used for analyzing and obtaining the storage performance data according to the protocol message data.
The storage performance test analysis system described above, wherein:
the acquisition module comprises a protocol analyzer or a packet capturing tool.
The storage performance test analysis system further includes:
and the drawing module is used for drawing a performance graph according to the storage performance data.
According to the storage performance test analysis method and the storage performance test analysis system, the protocol message data in the operation process of the solid-state storage product is acquired and analyzed to obtain the storage performance data, the storage performance data is based on the protocol message data, so that the requirement of fine-grained performance analysis at the instruction level can be met, and the purpose of accurately positioning the problem position according to the performance diagram after the solid-state storage product has the performance problem is achieved by drawing the performance diagram on the storage performance data.
Drawings
FIG. 1 is a detailed flow chart of a storage performance test analysis method of the present invention;
FIG. 2 is a flowchart of a specific method of a step of obtaining storage performance data according to protocol packet data analysis in the storage performance test analysis method according to the present invention;
FIG. 3 is an exemplary diagram of protocol message data in an embodiment of a storage performance test analysis method of the present invention;
FIG. 4 is a performance diagram of write performance data corresponding to each write command, where the abscissa is the time for transmitting each write command and the ordinate is the time for transmitting each write command in an embodiment of the storage performance test analysis method according to the present invention;
FIG. 5 is a performance diagram of the read/write performance data of the read/write command in the embodiment of the storage performance test analysis method according to the present invention, where the abscissa is the number of different bytes of transmission data, and the ordinate is the number of bytes of the read/write command corresponding to each different number of bytes of transmission data;
fig. 6 is a schematic diagram of a connection structure between the HOST end and the solid-state storage device eMMC in the embodiment of the storage performance analysis system according to the present invention;
fig. 7 is a schematic diagram of a connection structure of the storage performance analysis system according to the present invention.
Detailed Description
For better understanding of the objects, technical solutions and effects of the present invention, the present invention will be further explained with reference to the accompanying drawings and examples. Meanwhile, the following described examples are only for explaining the present invention, and are not intended to limit the present invention.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
Where the terms "comprising," "having," and "including" are used herein, another component or method can be added unless an explicit limitation is used, such as "only," "consisting of … …," etc. Unless mentioned to the contrary, terms in the singular may include the plural and are not to be construed as being one in number.
The communication between the HOST side and the component-level solid-state storage device is initiated by the HOST side starting with an instruction (Command), and the storage device returns a Response (Response) after completing a task specified by the instruction, wherein the instruction includes but is not limited to a Read Command (Read Command) and a Write Command (Write Command). The component level solid state storage devices include but are not limited to SD, TF, eMMC, NM.
As shown in fig. 1, the present invention provides a storage performance test analysis method, which includes:
s1, acquiring protocol message data transmitted between the HOST end 1 and the solid-state storage device 2; the acquisition of the protocol message data generally refers to that is performed when the solid-state storage device 2 operates, and the acquisition time of the protocol message data can be selected according to needs; protocol message data is usually composed of a record of Command (Command) and Response (Response), each record having a corresponding timestamp and some related information.
And S2, analyzing the protocol message data to obtain storage performance data.
The invention acquires and analyzes the protocol message data in the operation process of the solid-state storage product to obtain the storage performance data, and the storage performance data is based on the protocol message data, so the requirement of fine-grained performance analysis at the instruction level can be met.
In an example, after step S2, the method may further include:
and S3, drawing a performance graph according to the storage performance data. By drawing the performance diagram of the storage performance data, the problem position can be accurately positioned according to the performance diagram after the solid-state storage product has performance problems.
In an example, as shown in fig. 2, the step of obtaining the storage performance data according to the protocol packet data analysis in step S2 specifically includes:
s21, acquiring the start time, the end time, the block size and the block number corresponding to the read/write command in the protocol message data; the block size mentioned here is usually set by HOST end 1, and is generally fixed to 512 Bytes; it should be noted that, the protocol packet data usually contains many pieces of information, and we obtain the relevant information of the read instruction and the write instruction which are directly related to the storage performance, of course, in some examples, only the read instruction and the relevant information thereof or only the write instruction and the relevant information thereof may be obtained, so as to perform evaluation analysis on only the read performance or the write performance, respectively;
s22, obtaining the read/write performance data according to the start time, the end time, the block size and the block number corresponding to the read/write command.
In an example, the step of obtaining the read/write performance data according to the start time, the end time, the block size and the number of blocks corresponding to the read/write command in step S22 specifically includes:
the read/write performance data is obtained according to the following calculation:
Spend Time＝End Time2-Start Time1；
Sector Count＝Block Count×Block Size；
Performance＝Sector Count/Spend Time；
in the formula, the Spend Time represents the consumed Time for transmitting the specified data in the read/write instruction, the End Time2 represents the End Time corresponding to the read/write instruction, the Start Time1 represents the Start Time corresponding to the read/write instruction, the Block Count represents the number of blocks corresponding to the read/write instruction, the Block size represents the Block size set by the HOST End, the Sector Count represents the number of bytes of transmission data corresponding to the read/write instruction, that is, the number of bytes transmitted by a single network packet, and the Performance represents the read/write Performance data. It can be seen that, as the collected and analyzed data is one instruction in the protocol message data, the requirement of fine-grained performance analysis at the instruction level can be met.
In an example, the step S3 may include:
and S3a, drawing a performance graph with the abscissa as the time corresponding to the transmission of each read/write command and the ordinate as the read/write performance data corresponding to each read/write command. The time corresponding to each read/write command is obtained from the start time corresponding to each read/write command in the protocol data.
In another example, the step S3 may include:
and S3b, drawing a performance graph of the read/write performance data of the read/write instruction, wherein the abscissa is different transmission data byte numbers, and the ordinate is corresponding to the different transmission data byte numbers.
As shown in fig. 7, the present invention further provides a storage performance test analysis system, which includes:
the acquisition module 3 is used for acquiring protocol message data transmitted between the HOST terminal 1 and the solid-state storage device 2; the acquisition module 3 may include a protocol analyzer or other packet capture tool that supports analysis of a specified protocol.
The analysis processing module 4 is used for analyzing the protocol message data to obtain storage performance data;
and the drawing module 5 is used for drawing the performance graph according to the storage performance data.
The working principle of the present invention will be further described with reference to fig. 3 to 7, taking the solid-state storage device 2 as eMMC21 as an example:
as shown in fig. 6, there are four large signals of CLK, CMD, DAT0-7, and Data Strobe transmission between HOST terminal 1 and eMMC21, where the CLK signal is used to output a clock signal from HOST terminal 1 to perform synchronization of Data transmission and drive of device operation, the CMD signal is mainly used for HOST terminal 1 to send a command to eMMC21 and eMMC21 to send a corresponding response to HOST terminal 1, the DAT0-7 signal is mainly used for Data transmission between HOST terminal 1 and eMMC21, and the Data Strobe clock signal is sent from eMMC21 to HOST, and has the same frequency as the CLK signal and is used for synchronization of Data reception at HOST terminal 1. The communication between the Host terminal 1 and the eMMC21 is initiated by the Host terminal starting with an instruction, and the eMMC21 returns a response after completing the task specified by the instruction.
The storage performance test analysis method of the embodiment comprises the following steps:
during the use period of the eMMC21, protocol message data transmitted between the HOST end 1 and the eMMC21 is acquired through a protocol analyzer 3; the obtained protocol packet data is stored in a LOG file, in this embodiment, the obtained LOG file (only part of the data is intercepted as an example) is shown in fig. 3, and in the protocol packet data, a command for reading data includes CMD17 (data of one Block (Block) is read from a specified address), and CMD18 (data of a plurality of blocks (Multiple blocks) is read from a specified address); the commands for writing data include CMD24 (data written in one Block) and CMD25 (data written in Multiple blocks).
Acquiring the starting time, the ending time, the block size and the block number corresponding to each write command (CMD24, CMD25) in the protocol message data, wherein the block size is set to 512Bytes by HOST end 1 in the embodiment; of course, in other examples, the start time, the end time, the chunk size, and the chunk number corresponding to each read command (CMD17, CMD18) may also be obtained, and in still other examples, the required data related to the specified read command or the specified write command may also be obtained, which is not limited herein;
obtaining write performance data according to the starting time, the ending time, the block size and the number of the blocks corresponding to each write instruction, specifically:
obtaining the write performance data according to the start time, the end time, the block size and the number of the blocks corresponding to the write command:
Spend Time＝End Time2-Start Time1；
Sector Count＝Block Count×Block Size；
Performance＝Sector Count/Spend Time；
at this Time, the Spend Time indicates the elapsed Time for transferring the designated data in the write command, the End Time2 indicates the End Time corresponding to the write command, the Start Time1 indicates the Start Time corresponding to the write command, the Block Count indicates the number of blocks corresponding to the write command, the Block size indicates the Block size set by the HOST End, the Sector Count indicates the number of bytes of transfer data corresponding to the write command, and the Performance indicates the write Performance data.
According to the formula, the write performance data of all the write instructions can be obtained by sequentially analyzing and calculating all the write instruction data.
In order to more conveniently locate the problem, the data may be displayed in combination with a chart, specifically:
as shown in fig. 4, a performance graph is plotted with the abscissa as the time corresponding to the transmission of each write command and the ordinate as the write performance data corresponding to each write command.
Since the storage performance is higher as the number of bytes (Sector Count) of the transmission data is larger theoretically, as shown in fig. 5, a performance graph of the write performance data of the write instruction with the abscissa as the different number of bytes (Sector Count) of the transmission data and the ordinate as the number of bytes (Sector Count) of the different transmission data may be further plotted, so as to check whether the write performance under the different transmission bytes is abnormal or not through the performance graph.
When the performance abnormity is found, the corresponding time point and instruction can be easily located by combining the two graphs, and further data analysis is carried out.
Of course, in other embodiments, the above-mentioned related data of the read command (CMD17, CMD18) in the protocol message data may also be obtained at the same time, and the related performance graph may be drawn in combination with the obtained read performance data, and the abnormal data diagnosis may be performed in combination with the performance graph of the write command.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware instructions of a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Non-volatile Memory may include Read-Only Memory (ROM), magnetic tape, floppy disk, flash Memory, optical storage, or the like. Volatile Memory can include Random Access Memory (RAM) or external cache Memory. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM), among others.
It should be understood that, although the steps in the flowcharts are shown in sequence as indicated by the arrows, the steps are not necessarily performed in sequence as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least a part of the steps in each flowchart may include a plurality of steps or a plurality of stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of performing the steps or stages is not necessarily sequential, but may be performed alternately or alternately with other steps or at least a part of the steps or stages in other steps.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. A storage performance test analysis method, comprising:
acquiring protocol message data transmitted between an HOST end and a solid-state storage device;
and analyzing the protocol message data to obtain storage performance data.
2. The storage performance test analysis method according to claim 1, wherein the step of obtaining the storage performance data according to the protocol packet data analysis specifically comprises:
acquiring the starting time, the ending time, the block size and the block number corresponding to the read/write command in the protocol message data;
and obtaining the read/write performance data according to the starting time, the ending time, the block size and the number of the blocks corresponding to the read/write command.
3. The storage performance test analysis method according to claim 2, wherein the step of obtaining the read/write performance data according to the start time, the end time, the number of blocks, and the size of the sector corresponding to the read/write command specifically comprises:
obtaining the read/write performance data according to the following calculation formula:
Spend Time＝End Time2-Start Time1；
Sector Count＝Block Count×Block Size；
Performance＝Sector Count/Spend Time；
in the formula, the Spend Time represents the consumed Time for transmitting the specified data in the read/write instruction, the End Time2 represents the End Time corresponding to the read/write instruction, the Start Time1 represents the Start Time corresponding to the read/write instruction, the Block Count represents the number of blocks corresponding to the read/write instruction, the Block size represents the Block size set by the HOST End, the Sector Count represents the number of bytes of transmission data corresponding to the read/write instruction, and the Performance represents the read/write Performance data.
4. The storage performance test analysis method of claim 1, further comprising:
and drawing a performance graph according to the storage performance data.
5. The storage performance test analysis method of claim 3, further comprising:
and drawing a performance graph with the abscissa as the time corresponding to the transmission of each read/write instruction and the ordinate as the read/write performance data corresponding to each read/write instruction.
6. The storage performance test analysis method of claim 3, further comprising:
and drawing a performance graph of the read/write performance data of the read/write instruction corresponding to different byte numbers of the transmission data by taking the abscissa as the different byte numbers of the transmission data and the ordinate as the different byte numbers of the transmission data.
7. The storage performance test analysis method of claim 1, wherein:
the solid-state storage device comprises any one of SD, TF, eMMC and NM.
8. A storage performance test analysis system, comprising:
the acquisition module is used for acquiring protocol message data transmitted between the HOST end and the solid-state storage equipment;
and the analysis processing module is used for analyzing and obtaining the storage performance data according to the protocol message data.
9. The storage performance test analysis system of claim 8, wherein:
the acquisition module comprises a protocol analyzer or a packet capturing tool.
10. The storage performance test analysis system of claim 8, further comprising:
and the drawing module is used for drawing a performance graph according to the storage performance data.
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