CN113495592A - Short-circuit current protection device and method for LDO (low dropout regulator), and LDO - Google Patents
Short-circuit current protection device and method for LDO (low dropout regulator), and LDO Download PDFInfo
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- CN113495592A CN113495592A CN202010266017.7A CN202010266017A CN113495592A CN 113495592 A CN113495592 A CN 113495592A CN 202010266017 A CN202010266017 A CN 202010266017A CN 113495592 A CN113495592 A CN 113495592A
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- 238000000034 method Methods 0.000 title claims abstract description 19
- 238000012544 monitoring process Methods 0.000 claims abstract description 77
- 230000005669 field effect Effects 0.000 claims description 12
- 238000010586 diagram Methods 0.000 description 10
- 230000001276 controlling effect Effects 0.000 description 4
- 230000007423 decrease Effects 0.000 description 4
- 230000003139 buffering effect Effects 0.000 description 2
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/569—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection
- G05F1/573—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection with overcurrent detector
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/569—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection
- G05F1/571—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection with overvoltage detector
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Abstract
The disclosure relates to a short-circuit current protection device and method for an LDO (low dropout regulator) and the LDO. The LDO includes a comparison amplifier and a switching circuit connected between an output of the comparison amplifier and a power supply, the apparatus includes: the monitoring module is used for controlling to output a monitoring voltage larger than a preset second voltage threshold value if the voltage of the output end of the comparison amplifier is smaller than the preset first voltage threshold value; and the trigger module is used for outputting a trigger signal for triggering the switch circuit to be switched on if the monitoring voltage is greater than the preset second voltage threshold value, so that the output end of the comparison amplifier is switched on with the power supply, and the LDO is switched off. Like this, when the output of LDO and ground wire take place the short circuit, can turn off LDO, avoid circuit assembly to receive the damage to, the circuit of this scheme is simple, and reaction rate is fast, and the practicality is good.
Description
Technical Field
The disclosure relates to the field of electronic circuit control, in particular to a short-circuit current protection device and method for an LDO (low dropout regulator) and the LDO.
Background
Low dropout linear regulators (LDOs) use transistors or fets that operate in their saturation region to subtract excess voltage from the input voltage to produce a regulated output voltage. LDOs have little power consumption, typically have very low intrinsic noise and high power supply rejection ratio.
A short-circuit current is a current that flows through a circuit when an abnormal connection (i.e., a short circuit) occurs between a certain node in the circuit and a ground line, and may have a value much larger than a rated current. When a short circuit occurs, a large amount of heat is generally generated, which in the severe cases may cause the device to burn out.
In the use process of the LDO, if the output terminal of the LDO is shorted to the ground due to a fault, a short-circuit current flows from the power supply terminal to the ground terminal, resulting in the burnout of the circuit.
Disclosure of Invention
The purpose of this disclosure is to provide a reliable, practical short-circuit current protection device and method for LDO, LDO.
To achieve the above object, the present disclosure provides a short-circuit current protection apparatus for an LDO including a comparison amplifier and a switching circuit connected between an output terminal of the comparison amplifier and a power supply, the apparatus including:
the monitoring module is connected with the output end of the comparison amplifier and is used for controlling and outputting a monitoring voltage larger than a preset second voltage threshold value if the voltage of the output end of the comparison amplifier is smaller than the preset first voltage threshold value;
and the trigger module is connected with the output end of the monitoring module, connected with the enabling end of the switch circuit and used for outputting a trigger signal for triggering the switch circuit to be opened to the enabling end of the switch circuit if the monitoring voltage is greater than the preset second voltage threshold value so as to enable the output end of the comparison amplifier to be conducted with the power supply and the LDO to be turned off.
Optionally, the LDO further includes a first transistor, a gate of the first transistor is connected to the output of the comparison amplifier, the monitoring module includes a second transistor and an output resistor, a gate of the second transistor is connected to the output of the comparison amplifier, a source of the second transistor is connected to the power supply, a drain of the second transistor is connected to the ground through the output resistor, and a drain of the second transistor outputs the monitoring voltage.
Optionally, the LDO further includes a first voltage-dividing resistor and a second voltage-dividing resistor, the drain of the first transistor sequentially passes through the first voltage-dividing resistor and the second voltage-dividing resistor to be connected to the ground, the inverting input terminal of the comparison amplifier is connected between the first voltage-dividing resistor and the second voltage-dividing resistor, the non-inverting input terminal of the comparison amplifier serves as the input terminal of the LDO, and the source of the first transistor is connected to the power supply.
Optionally, the triggering module includes an or gate circuit, one input end of the or gate circuit is connected to the output end of the monitoring module, and the output end of the or gate circuit outputs the triggering signal.
Optionally, the trigger module further includes a not-gate circuit, an output end of the or-gate circuit is connected to an input end of the not-gate circuit, an output end of the not-gate circuit is an output end of the trigger module, and the or-gate circuit outputs the trigger signal through the not-gate circuit.
Optionally, the second transistor is the same type of transistor as the first transistor.
Optionally, the second transistor is a MOS field effect transistor.
Optionally, the second transistor and the first transistor are P-type MOS field effect transistors, and the trigger signal is a low level signal.
The present disclosure also provides a short circuit current protection method for a low dropout linear regulator (LDO), the LDO including a comparison amplifier and a switching circuit connected between an output of the comparison amplifier and a power supply, the method comprising:
if the voltage of the output end of the comparison amplifier is smaller than a preset first voltage threshold, a monitoring module is used for controlling to output a monitoring voltage larger than a preset second voltage threshold;
if the monitoring voltage is larger than the preset second voltage threshold, outputting a trigger signal for triggering the switch circuit to be opened to an enabling end of the switch circuit by using a trigger module so as to enable an output end of the comparison amplifier to be conducted with a power supply, and turning off the LDO.
Optionally, if the voltage at the output end of the comparison amplifier is smaller than a predetermined first voltage threshold, controlling, by using a monitoring module, to output a monitoring voltage larger than a predetermined second voltage threshold, including:
if the voltage of the output end of the comparison amplifier is smaller than a preset first voltage threshold value, outputting a current larger than a preset current threshold value by using a second transistor;
if the second transistor outputs a current greater than the predetermined current threshold, outputting a monitor voltage greater than a predetermined second voltage threshold using an output resistor connected to the second transistor,
the monitoring module comprises the second transistor and the output resistor, the grid electrode of the second transistor is connected with the output end of the comparison amplifier, the source electrode of the second transistor is connected with the power supply, the drain electrode of the second transistor is connected with the ground wire through the output resistor, and the drain electrode of the second transistor outputs the monitoring voltage.
Optionally, if the monitored voltage is greater than the predetermined second voltage threshold, outputting, by a trigger module, a trigger signal for triggering the switch circuit to open to an enable terminal of the switch circuit, where the trigger signal includes:
receiving the monitoring voltage by using an OR gate circuit;
and if the monitoring voltage is larger than the preset second voltage threshold, outputting a trigger signal for triggering the switch circuit to be opened to the enabling end of the switch circuit by using the OR gate circuit.
The trigger module comprises the OR gate circuit, one input end of the OR gate circuit is connected with the output end of the monitoring module, and the output end of the OR gate circuit outputs the trigger signal.
Optionally, if the monitored voltage is greater than the predetermined second voltage threshold, outputting, by using the or gate circuit, a trigger signal for triggering the switch circuit to open to the enable terminal of the switch circuit, including:
if the monitoring voltage is larger than the preset second voltage threshold, outputting a trigger intermediate signal by using the OR gate circuit;
and receiving the triggering intermediate signal by using an NOT gate circuit, and outputting a triggering signal for triggering the switching circuit to be opened to an enabling end of the switching circuit according to the triggering intermediate signal.
The trigger module further comprises the not gate circuit, the output end of the or gate circuit is connected with the input end of the not gate circuit, the output end of the not gate circuit is the output end of the trigger module, and the or gate circuit outputs the trigger signal through the not gate circuit.
The present disclosure also provides an LDO including the above short-circuit current protection device provided by the present disclosure.
Due to the fact that when the output end of the LDO is in short circuit with the ground wire, the voltage of the output end of the comparison amplifier can be pulled down, through the technical scheme, the monitoring module and the triggering module are utilized, when the voltage of the output end of the comparison amplifier of the LDO is smaller than the preset first voltage threshold value, the monitoring voltage larger than the preset second voltage threshold value is controlled to be output, the triggering signal used for triggering the switching circuit to be switched on is output, the output end of the comparison amplifier is conducted with the power supply, and the LDO is switched off. Like this, when the output of LDO and ground wire take place the short circuit, can turn off LDO, avoid circuit assembly to receive the damage to, the circuit of this scheme is simple, and reaction rate is fast, and the practicality is good.
Additional features and advantages of the disclosure will be set forth in the detailed description which follows.
Drawings
The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the description serve to explain the disclosure without limiting the disclosure. In the drawings:
FIG. 1 is a schematic structural diagram of an LDO provided in an exemplary embodiment;
fig. 2 is a block diagram of a short-circuit current protection device for an LDO according to an exemplary embodiment;
FIG. 3 is a schematic circuit diagram of a short-circuit current protection apparatus for LDO according to an exemplary embodiment;
FIG. 4 is a schematic circuit diagram of a short-circuit current protection apparatus for an LDO according to another exemplary embodiment;
fig. 5 is a flowchart of a short-circuit current protection method for an LDO according to an exemplary embodiment.
Detailed Description
The following detailed description of specific embodiments of the present disclosure is provided in connection with the accompanying drawings. It should be understood that the detailed description and specific examples, while indicating the present disclosure, are given by way of illustration and explanation only, not limitation.
Fig. 1 is a schematic structural diagram of an LDO according to an exemplary embodiment. As shown in fig. 1, the LDO may include a comparison amplifier M0, a first transistor M1, a switching circuit Ms, a first voltage-dividing resistor R1, and a second voltage-dividing resistor R2. The input voltage Vi is connected to the non-inverting input V + of the comparison amplifier M0, and the non-inverting input of the comparison amplifier serves as the input of the LDO. The inverting input V-of the comparison amplifier M0 is connected between the first divider resistor R1 and the second divider resistor R2. The gate g of the first transistor M1 is connected to the output terminal of the comparison amplifier M0. The source s of the first transistor M1 is connected to the power supply Vdd. The drain d of the first transistor M1 is connected to ground via the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2 in this order. The sampled voltage between the first divider resistor R1 and the second divider resistor R2 is applied to the inverting input V-of the comparator amplifier M0. The drain d of the first transistor M1 is used as the output terminal of the LDO, outputting the voltage Vo.
When the LDO is in operation, the comparator amplifier M0 compares the input voltage Vi applied to the non-inverting input with the sampled voltage between the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2, and after the difference between the two is amplified, the voltage drop of the first transistor M1 is controlled, so as to stabilize the output voltage Vo. The first transistor M1 is a series regulating transistor.
When the output voltage Vo decreases, the difference between the input voltage Vi and the sampling voltage increases, the driving current output from the comparison amplifier M0 increases, the voltage drop of the first transistor M1 decreases, and the output voltage Vo increases. Conversely, when the output voltage Vo exceeds the required set value, the front drive current output from the comparison amplifier M0 decreases, and the output voltage Vo decreases.
The switch circuit Ms is connected between the output terminal of the comparison amplifier M0 and the power supply Vdd. Under normal conditions, the switch circuit Ms is turned off, and if necessary, the enable terminal of the switch circuit Ms can be triggered to turn on the switch circuit Ms, so that the output terminal of the comparison amplifier M0 is connected to the power supply Vdd, and the LDO is turned off.
Fig. 2 is a block diagram of a short-circuit current protection device for an LDO according to an exemplary embodiment. As shown in fig. 2, the short-circuit current protection apparatus 100 for an LDO may include a monitoring module 11 and a triggering module 12.
The monitoring module 11 is connected to the LDO 10, specifically, to the output of the comparison amplifier M0. The monitoring module 11 is configured to control to output a monitoring voltage greater than a predetermined second voltage threshold if the voltage at the output terminal of the comparison amplifier M0 is less than the predetermined first voltage threshold.
The trigger module 12 is connected to the output of the monitoring module 11 and to the LDO 10, specifically to the enable terminal of the switch circuit Ms. The trigger module 12 is configured to output a trigger signal for triggering the switch circuit Ms to turn on to the enable terminal of the switch circuit Ms if the monitored voltage is greater than the predetermined second voltage threshold, so that the output terminal of the comparison amplifier M0 is turned on with the power supply, and the LDO is turned off.
During normal operation of LDO 10, the voltage Vg at the output of comparator amplifier M0 should be greater than the predetermined first voltage threshold. When the output of LDO 10 is shorted to ground, the voltage Vg at the output of comparator amplifier M0 is pulled low. If the voltage at the output of the comparison amplifier M0 is less than the first voltage threshold, it can be considered that the output of the LDO 10 is shorted to ground. The first voltage threshold value may be obtained experimentally.
When the voltage Vg at the output terminal of the comparison amplifier M0 in the LDO 10 is greater than the predetermined first voltage threshold (at this time, the LDO operates normally), the monitoring module 11 may control to output the monitoring voltage smaller than the predetermined second voltage threshold. In the case that the voltage Vg at the output terminal of the comparison amplifier M0 is smaller than the first voltage threshold, the monitoring module 11 may control the monitoring voltage to increase to be larger than the second voltage threshold. When the monitor voltage increases above the second voltage threshold, a trigger signal may be generated.
The trigger signal may be a digital signal. That is, when the monitor voltage is less than the predetermined second voltage threshold, a digital signal (e.g., a low level signal) may be generated, and when the monitor voltage is greater than the predetermined second voltage threshold, another digital signal (e.g., a high level signal) may be generated. For example, under normal conditions, the output of the trigger module may be a low level signal, and cannot trigger the switch circuit Ms to open. When the monitoring voltage is greater than the predetermined second voltage threshold, the trigger module may generate and output a high-level trigger signal, and the trigger signal is input to the enable terminal of the switch circuit Ms, so as to trigger the switch circuit Ms to turn on.
After the switch circuit Ms is turned on, the output terminal of the comparison amplifier M0 is turned on with the power supply Vdd, the voltage Vg at the output terminal of the comparison amplifier M0 is pulled to Vdd, and the LDO 10 is turned off. At this point, the cause of the short circuit needs to be removed, so that the LDO 10 can return to a normal operation state after being powered up again. Otherwise, if the short circuit fault is not removed, even if the power is re-electrified, the switch circuit Ms is still triggered to be opened, and the LDO is turned off again.
Through the technical scheme, the monitoring module and the trigger module are utilized, when the voltage of the output end of the comparison amplifier of the LDO is smaller than the preset first voltage threshold, the monitoring voltage larger than the preset second voltage threshold is controlled to be output, and the trigger signal for triggering the switch circuit to be turned on is output, so that the output end of the comparison amplifier is conducted with the power supply, and the LDO is turned off. Like this, when the output of LDO and ground wire take place the short circuit, can turn off LDO, avoid circuit assembly to receive the damage to, the circuit of this scheme is simple, and reaction rate is fast, and the practicality is good.
Fig. 3 is a schematic circuit diagram of a short-circuit current protection apparatus for an LDO according to an exemplary embodiment. In the embodiment of fig. 3, the monitoring module 11 may include a second transistor M2 and an output resistor Ra. The gate g of the second transistor M2 is connected to the output terminal of the comparison amplifier M0, the source s of the second transistor M2 is connected to the power supply Vdd, the drain d of the second transistor M2 is connected to the ground through the output resistor Ra, and the drain d of the second transistor M2 outputs the monitor voltage.
Under normal conditions, the current flowing through the second transistor M2 is small, and the voltage Vm across the output resistor Ra is smaller than the second voltage threshold.
When the output terminal of the LDO 10 is shorted to the ground, the voltage Vg at the output terminal of the comparison amplifier M0 is reduced to be smaller than the first voltage threshold, and at this time, the second transistor M2 generates a very large current, and after the current falls on the output resistor Ra, the voltage Vm (monitor voltage) at the drain d of the second transistor M2 is increased and is greater than the second voltage threshold. Then, the trigger module 12 generates a trigger signal according to the monitor voltage.
In this embodiment, the monitoring module 11 employs a transistor and a resistor, so that a monitoring voltage larger than the second voltage threshold is generated when the output end of the LDO 10 is short-circuited, and the monitoring module has a simple circuit, a fast response speed, and is not prone to error.
The second transistor M2 and the first transistor M1 may be the same type of transistor, and both may be Metal-Oxide-Semiconductor (MOS) field effect transistors, such as P-type MOS field effect transistors. The two devices can also be the same type. When the two devices are the same type, the workload of purchasing can be reduced, the design difficulty is reduced, and the types of standby devices are reduced. In the embodiment of fig. 3, the first transistor M1 and the second transistor M2 are P-type MOS field effect transistors, and the switch circuit Ms is an N-type MOS field effect transistor.
In yet another embodiment, as shown in FIG. 3, the trigger module 12 may include an OR gate M3. An input end of the or gate M3 is connected to the output end of the monitoring module 11, and an output end of the or gate M3 outputs the trigger signal E.
Under normal conditions, the monitoring voltage output by the monitoring module 11 is smaller than the second voltage threshold, and the triggering module 12 may control to generate a low-level digital signal according to the voltage smaller than the second voltage threshold. The low-level digital signal does not generate the trigger signal E.
When the output end of the LDO 10 is short-circuited with the ground, the monitoring voltage output by the monitoring module 11 is greater than the second voltage threshold, and the triggering module 12 may control to generate a high-level digital signal according to the voltage greater than the second voltage threshold. When generating a high-level digital signal, the trigger module 12 may control the output trigger signal E to trigger the switch circuit Ms to be turned on. The output end of the trigger module 12 is connected to the enable end of the switch circuit Ms, and the enable end of the switch circuit Ms is turned on after receiving the trigger signal E.
In this embodiment, one input terminal of the or gate circuit is used in the trigger module 12 to receive the monitor voltage, and then the digital trigger signal is generated. The other input ends of the OR gate circuit can be connected to other circuits, so that the function of the circuit can be expanded. Moreover, the circuit in the embodiment is simple, the response speed is high, and errors are not easy to occur.
Fig. 4 is a schematic circuit diagram of a short-circuit current protection apparatus for an LDO according to another exemplary embodiment. In the embodiment of fig. 4, on the basis of fig. 3, the trigger module 12 may further include a not gate circuit M4. The output end of the or gate circuit M3 is connected to the input end of the not gate circuit M4, the output end of the not gate circuit M4 is the output end of the trigger module 12, and the or gate circuit M3 outputs a trigger signal through the not gate circuit M4.
In order to overcome the defects of poor interference resistance and asymmetry of the gates formed by the most basic circuit, in this embodiment, a not gate circuit M4 (inverter) is added at the output end of the trigger module 12 to perform a buffering function.
For example, in the trigger module 12, the or gate M3 may generate a high-level digital signal when the monitor voltage is greater than the second voltage threshold, and output the high-level digital signal to the not gate M4. The not gate circuit M4 generates a low level signal as a trigger signal E based on the high level signal, and outputs the trigger signal E to the enable terminal of the switch circuit Ms. In the embodiment of fig. 4, the first transistor M1, the second transistor M2 and the switch circuit Ms are all P-type MOS field effect transistors.
The disclosure also provides a short-circuit current protection method for the LDO. The LDO comprises a comparison amplifier and a switch circuit, wherein the switch circuit is connected between the output end of the comparison amplifier and a power supply. Fig. 5 is a flowchart of a short-circuit current protection method for an LDO according to an exemplary embodiment. As shown in fig. 5, the method includes the following steps.
In step S11, if the voltage at the output terminal of the comparison amplifier is smaller than the predetermined first voltage threshold, the monitoring module is used to control the output of the monitoring voltage larger than the predetermined second voltage threshold.
In step S12, if the monitored voltage is greater than the predetermined second voltage threshold, the trigger module outputs a trigger signal for triggering the switch circuit to turn on to the enable terminal of the switch circuit, so that the output terminal of the comparison amplifier is turned on with the power supply, and the LDO is turned off.
The LDO used in the method of the present disclosure is the LDO shown in fig. 1, and a specific schematic structural diagram may be the schematic structural diagram of the LDO 10 shown in the embodiments of fig. 2 to fig. 4. Referring to fig. 3 and 4, the LDO 10 may include a first transistor M1, and the gate g of the first transistor M1 is connected to the output terminal of the comparison amplifier M0. The LDO 10 further includes a first voltage-dividing resistor R1 and a second voltage-dividing resistor R2, the drain d of the first transistor M1 is connected to the ground via the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2 in turn, the inverting input terminal of the comparison amplifier M0 is connected between the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2, the non-inverting input terminal of the comparison amplifier serves as the input terminal of the LDO 10, and the source s of the first transistor M1 is connected to the power supply Vdd.
Due to the fact that when the output end (at V0) of the LDO 10 is short-circuited with the ground line, the voltage Vg at the output end of the comparison amplifier M0 is pulled low, and by the method, when the voltage Vg at the output end of the comparison amplifier M0 of the LDO 10 is smaller than the predetermined first voltage threshold, the monitoring voltage larger than the predetermined second voltage threshold is controlled to be output, and the trigger signal for triggering the switch circuit to be turned on is output, so that the output end of the comparison amplifier M0 is connected with the power supply, and the LDO 10 is turned off. Like this, when LDO 10's output and ground wire take place the short circuit, can turn off LDO 10, avoid circuit assembly to receive the damage to, the circuit of this scheme is simple, and reaction rate is fast, and the practicality is good.
In another embodiment, if the voltage at the output terminal of the comparison amplifier is smaller than the predetermined first voltage threshold, the step of controlling, by the monitoring module, to output the monitoring voltage larger than the predetermined second voltage threshold (step S11) may include:
if the voltage of the output end of the comparison amplifier is smaller than a preset first voltage threshold, outputting a current larger than a preset current threshold by using a second transistor; if the second transistor outputs a current greater than a predetermined current threshold, a monitor voltage greater than a predetermined second voltage threshold is output using an output resistor connected to the second transistor.
That is, step S11 may be implemented using a second transistor and an output resistor. Referring to fig. 3, the monitoring module 11 may include a second transistor M2 and an output resistor Ra, a gate g of the second transistor M2 is connected to the output terminal of the comparison amplifier M0, a source s of the second transistor M2 is connected to the power supply Vdd, a drain d of the second transistor M2 is connected to the ground through the output resistor Ra, and a drain d of the second transistor M2 outputs the monitoring voltage.
When the output terminal of the LDO 10 is shorted to the ground, the voltage Vg at the output terminal of the comparison amplifier M0 is reduced to be smaller than the first voltage threshold, at this time, the second transistor M2 generates a very large current (larger than the predetermined current threshold), and after the current falls on the output resistor Ra, the voltage Vm (monitor voltage) at the drain d of the second transistor M2 is increased and is larger than the second voltage threshold. Then, the trigger module 12 generates a trigger signal according to the monitor voltage.
In this embodiment, the monitoring module 11 in step S11 employs a transistor and a resistor, so that a monitoring voltage greater than the second voltage threshold is generated when the output end of the LDO 10 is short-circuited, and the circuit is simple, has a fast response speed, and is not prone to error.
In another embodiment, if the monitored voltage is greater than the predetermined second voltage threshold, the step of outputting a trigger signal for triggering the switch circuit to open to the enable terminal of the switch circuit by using the trigger module (step 12) may include:
receiving a monitoring voltage by using an OR gate circuit; and if the monitoring voltage is greater than a preset second voltage threshold value, outputting a trigger signal for triggering the switch circuit to be opened to the enabling end of the switch circuit by using the OR gate circuit.
That is, the step S12 may be implemented using an or gate circuit. Referring to fig. 3, the trigger module 12 may include an or gate M3, wherein an input terminal of the or gate M3 is connected to the output terminal of the monitor module 11, and an output terminal of the or gate M3 is connected to the enable terminal of the switch circuit Ms, so as to output the trigger signal E. The first transistor M1 and the second transistor M2 are P-type MOS field effect transistors, and the switch circuit Ms is an N-type MOS field effect transistor. The trigger signal may be a high level signal.
Under normal conditions, the monitoring voltage output by the monitoring module 11 is smaller than the second voltage threshold, and the triggering module 12 may control to generate a low-level digital signal according to the voltage smaller than the second voltage threshold. The low-level digital signal does not generate the trigger signal E.
When the output end of the LDO 10 is short-circuited with the ground, the monitoring voltage output by the monitoring module 11 is greater than the second voltage threshold, and the triggering module 12 may control to generate a high-level digital signal according to the voltage greater than the second voltage threshold. When generating a high-level digital signal, the trigger module 12 may control the output trigger signal E to trigger the switch circuit Ms to be turned on. The output end of the trigger module 12 is connected to the enable end of the switch circuit Ms, and the enable end of the switch circuit Ms is turned on after receiving the trigger signal E.
In this embodiment, one input terminal of the or gate circuit is used in the trigger module 12 to receive the monitor voltage, and then the digital trigger signal is generated. The other input ends of the OR gate circuit can be connected to other circuits, so that the function of the circuit can be expanded. Moreover, the circuit in the embodiment is simple, the response speed is high, and errors are not easy to occur.
In another embodiment, if the monitored voltage is greater than the predetermined second voltage threshold, the step of outputting a trigger signal for triggering the switch circuit to open to the enable terminal of the switch circuit by using the or gate circuit (step 12) may include:
if the monitoring voltage is larger than a preset second voltage threshold value, outputting a triggering intermediate signal by using an OR gate circuit; and receiving the triggering intermediate signal by using the NOT gate circuit, and outputting a triggering signal for triggering the switching circuit to be opened to the enabling end of the switching circuit according to the triggering intermediate signal.
That is, the step S12 may be implemented using an or gate circuit and an not gate circuit. Referring to fig. 4, the flip-flop module 12 further includes a not-gate circuit M4, an output terminal of the or-gate circuit M3 is connected to an input terminal of the not-gate circuit M4, an output terminal of the not-gate circuit M4 is an output terminal of the flip-flop module 12, and the or-gate circuit M3 outputs the trigger signal E through the not-gate circuit M4. The output terminal of the not gate circuit M4 is connected to the enable terminal of the switch circuit Ms. The or gate M3 outputs a signal to the not gate M4 as a trigger intermediate signal.
In order to overcome the defects of poor interference resistance and asymmetry of the gates formed by the most basic circuit, in this embodiment, a not gate circuit M4 (inverter) is added at the output end of the trigger module 12 to perform a buffering function.
For example, in the trigger module 12, the or gate M3 may generate a high-level digital signal when the monitor voltage is greater than the second voltage threshold, and output to the not gate M4. The not gate circuit M4 generates a low level signal as a trigger signal E based on the high level signal, and outputs the trigger signal E to the enable terminal of the switch circuit Ms. In the embodiment of fig. 4, the first transistor M1, the second transistor M2 and the switch circuit Ms are all P-type MOS field effect transistors. The trigger signal may be a low level signal.
The present disclosure also provides an LDO including the short-circuit current protection device 100 provided by the present disclosure.
The preferred embodiments of the present disclosure are described in detail with reference to the accompanying drawings, however, the present disclosure is not limited to the specific details of the above embodiments, and various simple modifications may be made to the technical solution of the present disclosure within the technical idea of the present disclosure, and these simple modifications all belong to the protection scope of the present disclosure.
It should be noted that the various features described in the above embodiments may be combined in any suitable manner without departing from the scope of the invention. In order to avoid unnecessary repetition, various possible combinations will not be separately described in this disclosure.
In addition, any combination of various embodiments of the present disclosure may be made, and the same should be considered as the disclosure of the present disclosure, as long as it does not depart from the spirit of the present disclosure.
Claims (13)
1. A short circuit current protection device for an LDO, the LDO comprising a comparison amplifier and a switching circuit connected between an output of the comparison amplifier and a power supply, the device comprising:
the monitoring module is connected with the output end of the comparison amplifier and is used for controlling and outputting a monitoring voltage larger than a preset second voltage threshold value if the voltage of the output end of the comparison amplifier is smaller than the preset first voltage threshold value;
and the trigger module is connected with the output end of the monitoring module, connected with the enabling end of the switch circuit and used for outputting a trigger signal for triggering the switch circuit to be opened to the enabling end of the switch circuit if the monitoring voltage is greater than the preset second voltage threshold value so as to enable the output end of the comparison amplifier to be conducted with the power supply and the LDO to be turned off.
2. The apparatus of claim 1, wherein the LDO further comprises a first transistor, a gate of the first transistor is connected to the output of the comparison amplifier, the monitoring module comprises a second transistor and an output resistor, a gate of the second transistor is connected to the output of the comparison amplifier, a source of the second transistor is connected to a power supply, a drain of the second transistor is connected to ground through the output resistor, and a drain of the second transistor outputs the monitoring voltage.
3. The apparatus of claim 2, wherein the LDO further comprises a first voltage-dividing resistor and a second voltage-dividing resistor, a drain of the first transistor is connected to ground through the first voltage-dividing resistor and the second voltage-dividing resistor in sequence, an inverting input terminal of the comparison amplifier is connected between the first voltage-dividing resistor and the second voltage-dividing resistor, a non-inverting input terminal of the comparison amplifier serves as an input terminal of the LDO, and a source of the first transistor is connected to a power supply.
4. The apparatus according to any of claims 1-3, wherein the trigger module comprises an OR gate, one input of the OR gate is connected to the output of the monitor module, and the output of the OR gate outputs the trigger signal.
5. The apparatus of claim 4, wherein the trigger module further comprises a not-gate circuit, an output terminal of the or-gate circuit is connected to an input terminal of the not-gate circuit, an output terminal of the not-gate circuit is an output terminal of the trigger module, and the or-gate circuit outputs the trigger signal through the not-gate circuit.
6. The apparatus of claim 2, wherein the second transistor is a same type of transistor as the first transistor.
7. The apparatus of claim 2, wherein the second transistor is a MOS field effect transistor.
8. The apparatus of claim 6, wherein the second transistor and the first transistor are P-type MOS field effect transistors, and wherein the trigger signal is a low signal.
9. A short circuit current protection method for an LDO, the LDO comprising a comparison amplifier and a switching circuit connected between an output of the comparison amplifier and a power supply, the method comprising:
if the voltage of the output end of the comparison amplifier is smaller than a preset first voltage threshold, a monitoring module is used for controlling to output a monitoring voltage larger than a preset second voltage threshold;
if the monitoring voltage is larger than the preset second voltage threshold, outputting a trigger signal for triggering the switch circuit to be opened to an enabling end of the switch circuit by using a trigger module so as to enable an output end of the comparison amplifier to be conducted with a power supply, and turning off the LDO.
10. The method of claim 9, wherein if the voltage at the output of the comparison amplifier is less than a predetermined first voltage threshold, controlling the output of the monitoring voltage greater than a predetermined second voltage threshold by using a monitoring module, comprises:
if the voltage of the output end of the comparison amplifier is smaller than a preset first voltage threshold value, outputting a current larger than a preset current threshold value by using a second transistor;
if the second transistor outputs a current greater than the predetermined current threshold, outputting a monitor voltage greater than a predetermined second voltage threshold using an output resistor connected to the second transistor,
the monitoring module comprises the second transistor and the output resistor, the grid electrode of the second transistor is connected with the output end of the comparison amplifier, the source electrode of the second transistor is connected with the power supply, the drain electrode of the second transistor is connected with the ground wire through the output resistor, and the drain electrode of the second transistor outputs the monitoring voltage.
11. The method according to claim 9 or 10, wherein outputting, by the triggering module, a triggering signal for triggering the switch circuit to open to the enable terminal of the switch circuit if the monitored voltage is greater than the predetermined second voltage threshold comprises:
receiving the monitoring voltage by using an OR gate circuit;
if the monitoring voltage is larger than the preset second voltage threshold value, outputting a trigger signal for triggering the switch circuit to be opened to the enabling end of the switch circuit by utilizing the OR gate circuit,
the trigger module comprises the OR gate circuit, one input end of the OR gate circuit is connected with the output end of the monitoring module, and the output end of the OR gate circuit outputs the trigger signal.
12. The method of claim 11, wherein outputting a trigger signal to an enable of the switch circuit to trigger the switch circuit to open using the or gate circuit if the monitored voltage is greater than the predetermined second voltage threshold comprises:
if the monitoring voltage is larger than the preset second voltage threshold, outputting a trigger intermediate signal by using the OR gate circuit;
receiving the triggering intermediate signal by using an NOT gate circuit, and outputting a triggering signal for triggering the switching circuit to be opened to an enabling end of the switching circuit according to the triggering intermediate signal,
the trigger module further comprises the not gate circuit, the output end of the or gate circuit is connected with the input end of the not gate circuit, the output end of the not gate circuit is the output end of the trigger module, and the or gate circuit outputs the trigger signal through the not gate circuit.
13. An LDO, comprising the short-circuit current protection device of any of claims 1-8.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010266017.7A CN113495592A (en) | 2020-04-07 | 2020-04-07 | Short-circuit current protection device and method for LDO (low dropout regulator), and LDO |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202010266017.7A CN113495592A (en) | 2020-04-07 | 2020-04-07 | Short-circuit current protection device and method for LDO (low dropout regulator), and LDO |
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Application publication date: 20211012 |