CN113488602A - Display panel and preparation method thereof - Google Patents

Display panel and preparation method thereof Download PDF

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Publication number
CN113488602A
CN113488602A CN202110846410.8A CN202110846410A CN113488602A CN 113488602 A CN113488602 A CN 113488602A CN 202110846410 A CN202110846410 A CN 202110846410A CN 113488602 A CN113488602 A CN 113488602A
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pixel
layer
pixel defining
anode
blocks
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CN113488602B (en
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杨星星
邢汝博
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Hefei Visionox Technology Co Ltd
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Hefei Visionox Technology Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/85—Arrangements for extracting light from the devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/86—Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass

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  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

The application provides a display panel and a preparation method thereof, and solves the problem that diffraction phenomenon exists in a transparent display area in the prior art. Wherein, display panel includes transparent display area, and transparent display area includes: an array substrate; the light-emitting device layer is arranged on one side of the array substrate and comprises an anode layer, a light-emitting layer and a cathode layer which are stacked along the light-emitting direction of the light-emitting device layer, and the anode layer comprises a plurality of anode blocks arranged at intervals; the pixel limiting layer comprises a plurality of pixel limiting blocks, each pixel limiting block surrounds and exposes at least one anode block to form a pixel opening, and the light emitting layer is arranged in the pixel opening; the pixel limiting block is overlapped with the orthographic projection of the anode block surrounded by the pixel limiting block on the array substrate, and the outline of the orthographic projection of the pixel limiting block on the array substrate is a random graph.

Description

Display panel and preparation method thereof
Technical Field
The application relates to the technical field of display, in particular to a display panel and a preparation method thereof.
Background
In order to improve the screen ratio of display products, a camera mode under a screen is generally adopted at present, namely a transparent display area with high transmittance is arranged on the screen, and a camera is arranged below the transparent display area. Under the condition, external light can enter the camera through the transparent display area so as to realize the image acquisition function. However, since periodic patterns formed by metal wiring, an anode, an organic layer, an inorganic layer and the like in the transparent display area are all similar to a grating structure, the transparent display area has a diffraction phenomenon, which affects the imaging effect of the camera, thereby restricting the development of camera display products under a screen.
Content of application
In view of the above, embodiments of the present disclosure are directed to a display panel and a method for manufacturing the same, so as to solve the problem of diffraction phenomenon in a transparent display area in the prior art.
The present application provides in a first aspect a display panel comprising a transparent display area, the transparent display area comprising: an array substrate; the light-emitting device layer is arranged on one side of the array substrate and comprises an anode layer, a light-emitting layer and a cathode layer which are stacked along the light-emitting direction of the light-emitting device layer, and the anode layer comprises a plurality of anode blocks arranged at intervals; the pixel limiting layer comprises a plurality of pixel limiting blocks, each pixel limiting block surrounds and exposes at least one anode block to form a pixel opening, and the light emitting layer is arranged in the pixel opening; the pixel limiting block is overlapped with the orthographic projection of the anode block surrounded by the pixel limiting block on the array substrate, and the outline of the orthographic projection of the pixel limiting block on the array substrate is a random graph.
In one embodiment, the outer contour lines of the pixel defining blocks are random jagged lines.
In one embodiment, the distances between the orthographic projection outline of the pixel limiting blocks on the array substrate and the orthographic projection outline of the anode blocks surrounded by the pixel limiting blocks on the array substrate are randomly distributed; the distance between the orthographic projection outer contour line of the pixel limiting block on the array substrate and the orthographic projection outer contour line of the anode block surrounded by the pixel limiting block on the array substrate is greater than or equal to 2.5 micrometers and not greater than 4 micrometers.
In one embodiment, the material of the pixel defining layer is a black organic glue.
In one embodiment, the plurality of pixel defining blocks are divided into a plurality of groups of cells, the shape of the outer contour lines of the pixel defining blocks at corresponding positions in different groups of cells being the same.
In one embodiment, the display panel further includes a thin film encapsulation layer filling the spaces between adjacent pixel defining blocks.
In one embodiment, the plurality of anode blocks respectively correspond to a plurality of sub-pixels, and the plurality of sub-pixels are arranged in a predetermined manner, the predetermined manner including: any one of RGB arrangement, RGBW arrangement, RGB Delta arrangement, Pentile arrangement, and diamond arrangement.
A second aspect of the present application provides a method for manufacturing a display panel, including: providing an array substrate; preparing an anode layer on the array substrate, wherein the anode layer comprises a plurality of anode blocks; preparing a pixel limiting layer, wherein the pixel limiting layer comprises a plurality of pixel limiting blocks, each pixel limiting block surrounds and exposes at least one anode block to form a pixel opening, each pixel limiting block is overlapped with the orthographic projection of the anode block surrounded by the pixel limiting block on the array substrate, and the outline of the orthographic projection of the pixel limiting block on the array substrate is a random pattern; preparing a light emitting layer, wherein the light emitting layer is positioned in the pixel opening; a cathode layer is prepared, the cathode layer covering the light emitting layer and the pixel defining layer.
In one embodiment, preparing a pixel defining layer, the pixel defining layer including a plurality of pixel defining blocks, each pixel defining block enclosing and exposing at least one anode block to form a pixel opening, each pixel defining block overlapping with a forward projection of the anode block enclosed by the pixel defining block on an array substrate, and an outer contour of the forward projection of the pixel defining block on the array substrate being a random pattern includes: preparing a pixel limiting material layer on the array substrate, wherein the pixel limiting material layer covers the anode layer; patterning the pixel limiting material layer by adopting a first mask plate to obtain a plurality of pixel openings; and patterning the pixel limiting material layer by adopting a second mask plate to form a plurality of pixel limiting blocks.
In one embodiment, the method of manufacturing a display panel further includes: and preparing a thin film packaging layer, wherein the thin film packaging layer fills the intervals among the pixel limiting blocks.
According to the display panel and the preparation method thereof provided by the application, the pixel limiting layer is implemented into the plurality of pixel limiting blocks, each pixel limiting block is surrounded by and exposes at least one anode block, the pixel limiting blocks are overlapped with the orthographic projections of the anode blocks surrounded by the pixel limiting blocks on the array substrate, the outline of the orthographic projections of the pixel limiting blocks on the array substrate is a random pattern, the grating structure formed by the periodic arrangement of the anode blocks is broken, and the diffraction phenomenon is improved.
Drawings
Fig. 1 is a schematic top view of a display product according to an embodiment of the present disclosure.
Fig. 2 is a schematic cross-sectional view of the product shown in fig. 1 along line AB.
Fig. 3 is a schematic cross-sectional structure diagram of a display panel according to a first embodiment of the present application.
Fig. 4a is a schematic cross-sectional structure diagram of a display panel according to a second embodiment of the present application.
Fig. 4b is a schematic diagram of a partial top view structure of the display panel shown in fig. 4a according to an embodiment of the present disclosure.
Fig. 4c is a schematic diagram of a partial top view structure of the display panel shown in fig. 4a according to another embodiment of the present disclosure.
Fig. 5 is a schematic cross-sectional structure diagram of a display panel according to a third embodiment of the present application.
Fig. 6 is a flowchart of a method for manufacturing a display panel according to an embodiment of the present disclosure.
Fig. 7a to fig. 7c are schematic diagrams illustrating an implementation process of step S630 according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Fig. 1 is a schematic top view of a display product according to an embodiment of the present disclosure. Fig. 2 is a schematic cross-sectional view of the product shown in fig. 1 along line AB. The display product is, for example, a mobile phone, a tablet computer, a smart meter, and the like. As shown in fig. 1 and 2, the display product employs an off-screen camera. Specifically, the display product includes a display panel 10, the display panel 10 including a transparent display area TA and a normal display area CA, the normal display area CA at least partially surrounding the transparent display area TA. For example, the regular display area CA includes an annular opening, the transparent display area TA is located in the opening, and the regular display area CA surrounds the transparent display area TA. For another example, the display panel 10 further includes a frame area BA, a part of the edge of the transparent display area TA is surrounded by the frame area BA, and the remaining edge is surrounded by the normal display area CA. The non-display surface side of the transparent display area TA is provided with a camera 11 to form an under-screen camera structure.
Fig. 3 is a schematic cross-sectional structure diagram of a display panel 10 according to a first embodiment of the present application. As shown in fig. 3, the display panel 10 includes a substrate 11, and an anode layer 12, a pixel defining layer 13, a light emitting layer 14, and a cathode layer 15 on the substrate 11. The anode layer 12 is disposed on the substrate 11, and the anode layer 11 includes a plurality of anode blocks 121. The pixel defining layer 13 is positioned on the substrate 11, and the pixel defining layer 13 includes a plurality of openings, each of which defines one pixel opening, and each of the anode blocks 121 is exposed to one pixel opening. For example, the pixel defining layer 13 covers an edge region of each anode block 121, and a central region of each anode block 121 except the edge region is exposed to one pixel opening. The light emitting layer 14 includes a plurality of light emitting units 141 respectively located in the plurality of pixel openings, and the light emitting units 141 cover the anode blocks 121. The cathode layer 15 covers the light emitting layer 14 and the pixel defining layer 13. The anode block 121, the light emitting unit 141, and the cathode layer 15 within each pixel opening form one sub-pixel 120.
The adjacent plurality of sub-pixels 120 constitute one pixel unit. For example, 3 adjacent sub-pixels constitute one pixel unit, and the 3 sub-pixels are a red sub-pixel, a green sub-pixel, and a blue sub-pixel, respectively. For another example, adjacent 4 sub-pixels constitute one pixel unit, and the 4 sub-pixels are a red sub-pixel, a green sub-pixel, a blue sub-pixel, and a white sub-pixel. The quantity, the color and the arrangement mode of the sub-pixels in the pixel unit can be reasonably set according to actual needs.
The substrate 11 may be an array substrate. When the substrate 11 is an array substrate, it includes a plurality of pixel driving units 110, and each pixel driving unit 110 is connected to one pixel unit for driving the pixel unit to emit light. The circuit structure of the pixel driving unit 110 may be 2T1C, 3T1C, 3T2C, 7T1C, 9T1C, and the like.
The plurality of sub-pixels 120 in the display panel 10 are arranged in a predetermined manner. The predetermined manner mentioned here includes: any one of RGB arrangement, RGBW arrangement, RGB Delta arrangement, Pentile arrangement, and diamond arrangement. The arrangement of the sub-pixels 120 has a periodicity, so that the arrangement of the anode blocks 121 also has a periodicity. Since the anode layer 12 has a low transmittance and is generally made of metal, the anode layer 12 forms a grating structure, and further generates a diffraction phenomenon, as described in the background art.
In order to solve the diffraction phenomenon caused by the periodic pattern of the anode layer 12, the present application provides a display panel in which the periodic structure of the anode layer 12 is broken through by improving the structure of the pixel defining layer 13, thereby improving the diffraction phenomenon.
Fig. 4a is a schematic cross-sectional structure diagram of a display panel according to a second embodiment of the present application. Fig. 4b is a schematic top view of the display panel shown in fig. 4a according to an embodiment of the present disclosure. For convenience of explanation, fig. 4b shows only the structures of the pixel defining layer and the anode layer, and the two-dot chain line a in fig. 4b1A2A corresponding cross section to figure 4 a. As shown in fig. 4a and 4b, the display panel 20 is different from the display panel 10 shown in fig. 1 only in the structure of the pixel defining layer. In the display panel 20, the pixel defining layer 23 includes a plurality of pixel defining blocks 231, each of the pixel defining blocks 231 is independent of each other, and the plurality of pixel defining blocks 231 are spaced two by two. Each pixel defining block 231 surrounds and exposes one anode block 121 to form a pixel opening, the pixel defining block 231 overlaps with the orthographic projection of the anode block 121 surrounded by the pixel defining block 231 on the array substrate, and the outline of the orthographic projection of the pixel defining block 231 on the array substrate is in a random pattern.
For example, the pixel defining blocks 231 are ring-shaped structures disposed around the anode block 121, each pixel defining block 231 defines one pixel opening, the pixel defining block 231 is located on the substrate 11 and covers an edge region of the anode block 121, and a region of the anode block 121 other than the edge region is exposed to the pixel opening.
The pixel defining blocks 231 have an irregular ring shape, and the distance m between the outer contour line L of the orthographic projection of each pixel defining block 231 in the direction perpendicular to the substrate 11 and the edge line S of the anode block 121 surrounded by the outer contour line L is randomly distributed, i.e., the distance m between the outer contour line L and the edge line S has an irregular trend in the circumferential direction of the anode block 121. Wherein, the calculation process of the distance between the outer contour line L and the edge line S comprises the following steps: firstly, a first point on the edge line S is selected, a tangent line is made at the point, the normal of the tangent line and the outer contour line L are intersected at a second point, and the distance m between the first point and the second point is the distance between the outer contour line L and the edge line S.
In one example, the outer contour line L of the orthographic projection of the pixel defining block 231 in the direction perpendicular to the substrate 11 is a random zigzag line, and the zigzag line may have a zigzag shape or a curved zigzag shape, or may include both zigzag and curved zigzag shapes.
For example, the pixel defining block 231 includes oppositely disposed top and bottom surfaces that are disposed in parallel in a direction parallel to the substrate 11. The pixel defining block 231 further includes an inner side surface C connecting the top and bottom surfaces1And outer side C2As shown in FIG. 4a, the medial side C1Compared with the lateral surface C2Closer to the anode block 121. The inner side surface C is different according to the shape of the formed pixel opening1Either a smooth surface or a non-smooth surface. For example, medial side C1Is a smooth curved surface, in this case, from the inner side surface C1The enclosed pixel opening may be cylindrical or truncated cone-shaped. It should be understood that medial side C1Determines the shape of the pixel opening, the embodiment of the present application being directed to the inner side surface C1The specific structure of (a) is not limited. Outer side surface C2Is a concave-convex surface to form an orthographic projection having a random saw-toothed outer contour line L on the substrate 11.
According to the display panel provided by the embodiment, the pixel defining layer is implemented as a plurality of pixel defining blocks 231, each pixel defining block 231 encloses and exposes one anode block 121, the pixel defining blocks 231 overlap with the orthographic projections of the anode blocks 121 enclosed by the pixel defining blocks 231 on the array substrate, and the outline of the orthographic projections of the pixel defining blocks 231 on the array substrate is a random pattern, so that the grating structure formed by the periodic arrangement of the anode blocks 121 is broken, and the diffraction phenomenon is improved. Meanwhile, the interval region between the adjacent pixel defining blocks 231 has one less pixel defining layer than that of the conventional display panel, and transmittance is improved.
In one embodiment, the material of the pixel defining layer 23 is a black organic glue, and the transmittance of the black organic glue is greater than or equal to 20% and less than or equal to 50%. The transmittance of the conventional pixel defining layer 23 is high, and the transmittance of the pixel defining layer 23 is reduced by replacing the material of the pixel defining layer 23 with black organic glue, so that the damage to the periodic structure of the anode block 121 is greater, and the effect of suppressing the diffraction phenomenon is further improved.
In one embodiment, as shown in fig. 4a and 4b, the distance m between the outer contour line L of the orthographic projection of the pixel defining block 231 in the direction perpendicular to the substrate 11 and the edge line S of the anode block 121 surrounded by it is greater than or equal to 2.5 micrometers and not greater than 4 micrometers, for example 3 micrometers or 3.5 micrometers. In this way, it is possible to achieve both the purpose of breaking the periodic structure of the anode block 121 and to ensure that the pixel defining block 231 has sufficient strength.
In one embodiment, as shown in fig. 4b, the plurality of pixel defining blocks 231 in the display panel 20 are divided into a plurality of unit groups 230, the outer contour lines L of the pixel defining blocks 231 at corresponding positions in different unit groups 230 are the same in shape, i.e., one unit group 230 is one repeating unit, the plurality of unit groups 230 are stacked, and the plurality of pixel defining blocks 231 in different unit groups 230 coincide. The number of pixel defining blocks 231 in the cell group 230 can be set as appropriate according to the actual situation. The shape of the outer contour line L of at least one pixel defining block 231 in the same group 230 of cells in a direction perpendicular to the substrate 11 is different. In one example, one cell group 230 includes 8 pixel defining blocks 231. By arranging the repeating units, the layout difficulty can be simplified, and the process is easy to realize.
It should be understood that the display panels shown in fig. 4a and 4b are only exemplified by RGB Dalta pixel arrangement, and the structure of the pixel defining layer 23 provided according to any embodiment of the present application is also applicable to other pixel arrangements.
Fig. 4c is a schematic diagram of a partial top view structure of the display panel shown in fig. 4a according to another embodiment of the present disclosure. Two-dot chain line B in FIG. 4c1B2A corresponding cross section to figure 4 a. As shown in fig. 4c, the difference between the display panel provided according to the present embodiment and the display panel shown in fig. 4b is that in the present embodiment, one pixel defining block 231 surrounds and exposes two anode blocks 121, and the outline of the orthographic projection of the pixel defining block 231 on the array substrate is in a random pattern.
In one example, the outline of the orthographic projection of the pixel defining block 231 on the array substrate is in a random zigzag shape. The saw teeth can be in the shape of zigzag saw teeth, also can be in the shape of curve saw teeth, and also can comprise both zigzag saw teeth and curve saw teeth.
The colors of the sub-pixels corresponding to the anode blocks 121 surrounded by the different pixel defining blocks 231 may be the same or different. The positional relationship of the two anode blocks 121 surrounded by the different pixel defining blocks 231 may be the same or different. For example, as shown in FIG. 4c, the two anode blocks 121 enclosed by different pixel defining blocks 231 have the same positional relationship.
It will be appreciated that different pixel defining blocks 231 in the display panel may be arranged to enclose a different number of anode blocks 121. For example, 1 anode block 121 is enclosed by a part of the pixel defining blocks 231, and 2 anode blocks 121 are enclosed by the remaining pixel defining blocks 231.
Fig. 5 is a schematic view of an internal structure of a display panel according to a third embodiment of the present application. As shown in fig. 5, the display panel 30 further includes a thin film encapsulation layer 16 on the basis of the display panel 20 shown in fig. 4a and 4b, and the thin film encapsulation layer 16 fills the space between the adjacent pixel defining blocks 231.
Specifically, the thin film encapsulation layer 16 includes organic and inorganic layers stacked. For example, as shown in fig. 5, the thin film encapsulation layer 16 includes a first inorganic layer 161, an organic layer 162, and a second inorganic layer 163 sequentially stacked. The first inorganic layer 161 covers the cathode layer 15, the thickness of the first inorganic layer 161 is uniform, and the first inorganic layer 161 fills the space between the adjacent pixel defining blocks 231. The organic layer 162 covers the first inorganic layer 161, and a surface of the organic layer 162 away from the first inorganic layer 161 is a flat surface. The second inorganic layer 163 covers the organic layer 162, and the second inorganic layer 163 has a uniform thickness.
The application also provides a preparation method of the display panel, which can be used for preparing the display panel provided by any one of the embodiments. Fig. 6 is a flowchart of a method for manufacturing a display panel according to an embodiment of the present disclosure. Referring to fig. 4a, 4b, 5 and 6, a method 600 for manufacturing a display panel includes:
in step S610, a substrate 11 is provided. The substrate 11 may be an array substrate including a plurality of pixel driving units 110. The circuit structure of the pixel driving unit 110 may be 2T1C, 3T1C, 3T2C, 7T1C, 9T1C, and the like.
Step S620, an anode layer 12 is prepared on the substrate, the anode layer 12 including a plurality of anode blocks 121.
The anode layer is prepared by a patterning process. For example, firstly, a vacuum coating process such as an evaporation process, a chemical vapor deposition process and the like is adopted to prepare an anode material layer; and then, patterning the anode material layer by adopting a photoetching process to obtain the anode layer.
Step S630, preparing a pixel defining layer 23, where the pixel defining layer 23 includes a plurality of pixel defining blocks 231 spaced two by two, each pixel defining block 231 surrounds and exposes at least one anode block 121 to form a pixel opening, each pixel defining block 231 overlaps with a forward projection of the anode block 121 surrounded by the pixel defining block 231 in a direction perpendicular to the substrate 11, and an outer contour line of the forward projection of the pixel defining block 231 on the array substrate is a random pattern.
In one embodiment, the distance m between the outer contour line L of the orthographic projection of the pixel defining block 231 on the array substrate and the edge line S of the anode block 121 surrounded by the outer contour line L is randomly distributed, i.e., the distance m between the outer contour line L and the edge line S varies irregularly in the circumferential direction of the anode block 121. Wherein, the calculation process of the distance between the outer contour line L and the edge line S comprises the following steps: firstly, a first point on the edge line S is selected, a tangent line is made at the position of the first point, the normal line of the tangent line and the outer contour line L are intersected at a second point, and the distance between the first point and the second point is the distance between the outer contour line L and the edge line S.
In one example, the outer contour line L of the orthographic projection of the pixel defining block 231 in the direction perpendicular to the substrate 11 is a random zigzag line, and the zigzag line may have a zigzag shape or a curved zigzag shape, or may include both zigzag and curved zigzag shapes.
In step S640, the light emitting layer 14 is prepared, and the light emitting layer 14 is located in the pixel opening. In one example, the light emitting layer 14 includes a plurality of light emitting units 141, and each light emitting unit 141 is positioned within one pixel opening and covers the anode block 121. In one embodiment, the light-emitting layer 14 is prepared using an ink-jet printing process.
Step S650, the cathode layer 15 is prepared, and the cathode layer 15 covers the light emitting layer 14 and the pixel defining layer 23. In one embodiment, the cathode layer is prepared by a vacuum coating process such as an evaporation process, a chemical vapor deposition process, and the like. To this end, the anode block 121, the light emitting unit 141 and the cathode layer 15 in each pixel opening form one sub-pixel 120, and a plurality of adjacent sub-pixels 120 constitute one pixel unit. Each pixel unit is connected with a pixel driving unit 110, and the pixel driving unit 110 is used for driving the pixel unit to emit light.
In one embodiment, the method 600 for manufacturing a display panel further includes:
in step S660, the thin film encapsulation layer 16 is prepared, and the thin film encapsulation layer 16 fills the spaces between the pixel defining blocks 231. The thin film encapsulation layer 16 includes organic and inorganic layers stacked. For example, as shown in fig. 5, the thin film encapsulation layer 16 includes a first inorganic layer 161, an organic layer 162, and a second inorganic layer 163 sequentially stacked. The first inorganic layer 161 covers the cathode layer 15, the thickness of the first inorganic layer 161 is uniform, and the first inorganic layer 161 fills the space between the adjacent pixel defining blocks 231. The organic layer 162 covers the first inorganic layer 161, and a surface of the organic layer 162 away from the first inorganic layer 161 is a flat surface. The second inorganic layer 163 covers the organic layer 162, and the second inorganic layer 163 has a uniform thickness.
Fig. 7a to fig. 7c are schematic diagrams illustrating an implementation process of step S630 according to an embodiment of the present application. As shown in fig. 7, step S630 is specifically executed as:
first, referring to fig. 7a, a pixel defining material layer 201 is prepared on a substrate 11, and the pixel defining material layer 201 covers an anode layer 12. In one embodiment, the material of the pixel defining material layer 201 is a black organic glue, and the transmittance of the black organic glue is greater than or equal to 20% and less than or equal to 50%.
Next, referring to fig. 7b, a first mask is used to pattern the pixel defining material layer 201, resulting in a plurality of pixel openings 202, and each pixel opening 202 exposes one anode block 121.
Next, referring to fig. 7c, a second mask is used to pattern the pixel defining material layer 201 to form a plurality of pixel defining blocks 231 spaced two by two, and each pixel defining block 231 defines one pixel opening 202, so as to obtain the pixel defining layer 23.
The method for manufacturing the display panel according to any embodiment of the present application and the display panel according to any embodiment of the present application belong to the same inventive concept, and details that are not described in the embodiment of the manufacturing method can be referred to the embodiment of the display panel, and are not described herein again.
The previous description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present application. Various modifications to these aspects will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other aspects without departing from the scope of the application. Thus, the present application is not intended to be limited to the aspects shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
It should be understood that the terms "first", "second", "third", "fourth", "fifth" and "sixth" used in the description of the embodiments of the present application are only used for clearly explaining the technical solutions, and are not used for limiting the protection scope of the present application.
The foregoing description has been presented for purposes of illustration and description. Furthermore, the description is not intended to limit embodiments of the application to the form disclosed herein. While a number of example aspects and embodiments have been discussed above, those of skill in the art will recognize certain variations, modifications, alterations, additions and sub-combinations thereof.

Claims (10)

1. A display panel comprising a transparent display region, the transparent display region comprising:
an array substrate;
the light-emitting device layer is arranged on one side of the array substrate and comprises an anode layer, a light-emitting layer and a cathode layer which are stacked along the light-emitting direction of the light-emitting device layer, and the anode layer comprises a plurality of anode blocks arranged at intervals;
a pixel defining layer including a plurality of pixel defining blocks, each of the pixel defining blocks enclosing and exposing at least one of the anode blocks to form a pixel opening, the light emitting layer being disposed within the pixel opening;
the pixel limiting block is overlapped with the orthographic projection of the anode block surrounded by the pixel limiting block on the array substrate, and the outline of the orthographic projection of the pixel limiting block on the array substrate is a random graph.
2. The display panel of claim 1 wherein the outer contour lines of the pixel-defining blocks are random jagged lines.
3. The display panel of claim 1, wherein the distances between the orthographic projection outline of the pixel defining blocks on the array substrate and the orthographic projection outline of the anode blocks surrounded by the pixel defining blocks on the array substrate are randomly distributed; the distance between the orthographic projection outer contour line of the pixel limiting block on the array substrate and the orthographic projection outer contour line of the anode block surrounded by the pixel limiting block on the array substrate is greater than or equal to 2.5 micrometers and not greater than 4 micrometers.
4. The display panel according to claim 1, wherein a material of the pixel defining layer is a black organic glue.
5. A display panel as claimed in claim 1 characterized in that the plurality of pixel defining blocks are divided into a plurality of groups of cells, the shape of the outer contour lines of the pixel defining blocks at respective positions in different groups of cells being the same.
6. The display panel of claim 1, further comprising a thin film encapsulation layer filling spaces between adjacent pixel defining blocks.
7. The display panel according to claim 1, wherein the plurality of anode blocks correspond to a plurality of sub-pixels, respectively, the plurality of sub-pixels being arranged in a predetermined manner, the predetermined manner comprising: any one of RGB arrangement, RGBW arrangement, RGB Delta arrangement, Pentile arrangement, and diamond arrangement.
8. A method for manufacturing a display panel, comprising:
providing an array substrate;
preparing an anode layer on the array substrate, wherein the anode layer comprises a plurality of anode blocks;
preparing a pixel defining layer, wherein the pixel defining layer comprises a plurality of pixel defining blocks, each pixel defining block surrounds and exposes at least one anode block to form a pixel opening, each pixel defining block is overlapped with the orthographic projection of the anode block surrounded by the pixel defining block on the array substrate, and the outline of the orthographic projection of the pixel defining block on the array substrate is in a random pattern;
preparing a light emitting layer, wherein the light emitting layer is positioned in the pixel opening;
preparing a cathode layer covering the light emitting layer and the pixel defining layer.
9. The method for manufacturing a display panel according to claim 8, wherein the manufacturing of the pixel defining layer includes a plurality of pixel defining blocks, each of the pixel defining blocks encloses and exposes at least one of the anode blocks to form a pixel opening, each of the pixel defining blocks overlaps with a forward projection of the anode block enclosed by the pixel defining block on the array substrate, and an outline of the forward projection of the pixel defining block on the array substrate is a random pattern including:
preparing a pixel defining material layer on the array substrate, the pixel defining material layer covering the anode layer;
patterning the pixel limiting material layer by adopting a first mask plate to obtain a plurality of pixel openings;
and patterning the pixel limiting material layer by adopting a second mask plate to form a plurality of pixel limiting blocks.
10. The method for manufacturing a display panel according to claim 8, further comprising:
and preparing a thin film packaging layer, wherein the thin film packaging layer fills the intervals among the pixel limiting blocks.
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CN111326636A (en) * 2020-02-27 2020-06-23 京东方科技集团股份有限公司 Array substrate, manufacturing method thereof, display panel and display device
CN111816788A (en) * 2020-06-30 2020-10-23 昆山国显光电有限公司 Display panel and display device
CN112786813A (en) * 2021-02-05 2021-05-11 湖北长江新型显示产业创新中心有限公司 Display panel and display device

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CN110265452A (en) * 2019-06-25 2019-09-20 京东方科技集团股份有限公司 Display base plate and display device
CN111326636A (en) * 2020-02-27 2020-06-23 京东方科技集团股份有限公司 Array substrate, manufacturing method thereof, display panel and display device
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