CN114497415B

CN114497415B - Display panel, manufacturing method thereof and display device

Info

Publication number: CN114497415B
Application number: CN202210081153.8A
Authority: CN
Inventors: 于池; 张微; 石博; 周瑞; 石佺
Original assignee: BOE Technology Group Co Ltd; Chengdu BOE Optoelectronics Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Chengdu BOE Optoelectronics Technology Co Ltd
Priority date: 2022-01-24
Filing date: 2022-01-24
Publication date: 2024-03-19
Anticipated expiration: 2042-01-24
Also published as: CN114497415A

Abstract

The application discloses a display panel, a manufacturing method thereof and a display device, and belongs to the technical field of display. The display panel includes: a substrate, a pixel defining layer, a cathode selecting layer and a cathode layer on the substrate. Within a row of pixel openings in the pixel defining layer, a minimum distance between the first pixel opening and the second pixel opening is greater than a minimum distance between the first pixel opening and the third pixel opening. Since the cathode selection blocks in the cathode selection layer are arranged between the first pixel openings and the second pixel openings, the distance between the first pixel openings and the second pixel openings is larger. Accordingly, the size of the cathode selection block arranged between the first pixel opening and the second pixel opening is larger. Therefore, the area of orthographic projection of the cathode selection layer in the display panel on the substrate is ensured to be larger, and the area of orthographic projection of the cathode layer in the display panel on the substrate is ensured to be smaller, so that the light transmittance of the display panel is effectively improved.

Description

Display panel, manufacturing method thereof and display device

Technical Field

The present disclosure relates to the field of display technologies, and in particular, to a display panel, a manufacturing method thereof, and a display device.

Background

With the development of technology, a display panel in a display device is generally required to have a certain light transmittance.

In one scenario, the display device may be a full-screen display device, where a photosensitive sensor, such as a light sensor and a distance sensor, needs to be located on the back surface of the display panel (i.e., the surface opposite to the display surface of the display panel), so that, in order not to affect the normal operation of the photosensitive assembly, it is necessary to ensure that the area of the display panel opposite to the photosensitive assembly has a certain light transmittance. In another scenario, the display device may be a transparent display device, where all regions within the display panel need to have a certain light transmittance.

However, the light transmittance of the current display panel is poor, resulting in poor reliability of the display device.

Disclosure of Invention

The embodiment of the application provides a display panel, a manufacturing method thereof and a display device. The problem of prior art's display panel's light transmissivity is relatively poor can be solved, technical scheme is as follows:

in one aspect, there is provided a display panel including:

a substrate;

the pixel defining layer is positioned on the substrate and is provided with a plurality of pixel openings which are arrayed, the minimum distance between a first pixel opening and a second pixel opening in one row of the pixel openings is larger than the minimum distance between the first pixel opening and a third pixel opening, the first pixel opening is any pixel opening in one row of the pixel openings, and the second pixel opening and the third pixel opening are two pixel openings adjacent to the first pixel opening in one row of the pixel openings;

The cathode layer is provided with a hollowed-out part, and the orthographic projection of the cathode selection layer on the substrate is at least partially overlapped with the orthographic projection of the hollowed-out part on the substrate;

wherein the cathode selection layer comprises: and the cathode selection blocks are positioned between the first pixel opening and the second pixel opening.

Optionally, a distance between a center point of the orthographic projection of the first pixel opening on the substrate and a center point of the orthographic projection of the second pixel opening on the substrate is greater than a distance between a center point of the orthographic projection of the first pixel opening on the substrate and a center point of the orthographic projection of the third pixel opening on the substrate.

Optionally, the plurality of pixel openings includes: a plurality of first-type pixel openings and a plurality of second-type pixel openings;

the cathode selection block is located between the first pixel opening and the second pixel opening in a column of the first type pixel openings, and between the first pixel opening and the second pixel opening in a row of the second type pixel openings.

Optionally, the center points of orthographic projections of the first-type pixel openings on the substrate of the same column of the first-type pixel openings are collinear with the center points of orthographic projections of a column of the cathode selection blocks on the substrate; the center points of the orthographic projections of each of the second-type pixel openings on the substrate of the same row of the second-type pixel openings, and the center points of the orthographic projections of the cathode selection blocks on the substrate of one row of the cathode selection blocks are collinear.

Optionally, the display panel further includes: a light emitting layer located between the pixel defining layer and the cathode layer, the light emitting layer comprising: a plurality of light emitting blocks in one-to-one correspondence with the plurality of pixel openings;

the front projection of the pixel opening on the substrate is positioned in the front projection of the corresponding light-emitting block on the substrate, and the center point of the front projection of the pixel opening on the substrate is not overlapped with the center point of the front projection of the corresponding light-emitting block on the substrate.

Optionally, the shape of the orthographic projection of each pixel opening on the substrate is triangle, quadrangle, octagon, circle or ellipse.

Optionally, when the shape of the orthographic projection of each pixel opening on the substrate is triangular, a bottom edge of the orthographic projection of the first pixel opening on the substrate is opposite to a bottom edge of the orthographic projection of the second pixel opening on the substrate, and a vertex angle of the orthographic projection of the first pixel opening on the substrate is opposite to a vertex angle of the orthographic projection of the third pixel opening on the substrate.

Optionally, the shape of the orthographic projection of the light-emitting block on the substrate is rectangular, and a diagonal line of the orthographic projection of the light-emitting block on the substrate coincides with a bottom edge of the orthographic projection of the corresponding pixel opening on the substrate.

Optionally, the shape of the orthographic projection of the cathode selection block on the substrate is quadrilateral, and each side of the quadrilateral is parallel to the bottom side of the orthographic projection of the adjacent pixel opening on the substrate.

Optionally, the shape and the size of the orthographic projection of the cathode selection block on the substrate are respectively the same as the shape and the size of the orthographic projection of the hollowed-out part on the substrate.

Optionally, the substrate includes: the anode blocks are in one-to-one correspondence with the pixel openings and in one-to-one correspondence with the pixel driving circuits, orthographic projections of the anode blocks on the substrate are positioned in orthographic projections of the corresponding pixel openings on the substrate, and the anode blocks are electrically connected with the corresponding pixel driving circuits.

Optionally, the display panel further includes: and the packaging layer is positioned on one side of the cathode layer away from the substrate.

Optionally, the substrate has a first display area and a second display area located at the periphery of the first display area, the plurality of pixel openings arranged in an array and the cathode selection layer are both located in the first display area, and the light transmittance of the first display area is greater than that of the second display area.

Optionally, the pixel defining layer further has a plurality of normal pixel openings located in the second display region, and a ratio of an area of orthographic projection of a single one of the pixel openings on the substrate to an area of orthographic projection of a single one of the normal pixel openings on the substrate is 1:2.

Optionally, the plurality of pixel openings arranged in an array are uniformly arranged on the substrate.

In another aspect, there is provided a method of manufacturing a display panel, the method including:

forming a pixel defining layer on a substrate, wherein the pixel defining layer is provided with a plurality of pixel openings which are arranged in an array, the minimum distance between a first pixel opening and a second pixel opening in a row of the pixel openings is larger than the minimum distance between the first pixel opening and a third pixel opening, the first pixel opening is any pixel opening in a row of the pixel openings, and the second pixel opening and the third pixel opening are two pixel openings adjacent to the first pixel opening in a row of the pixel openings;

Sequentially forming a cathode selection layer and a cathode layer on the pixel defining layer, wherein the cathode layer is provided with a hollowed-out part, and the orthographic projection of the cathode selection layer on the substrate is at least partially overlapped with the orthographic projection of the hollowed-out part on the substrate;

In still another aspect, there is provided a display device including: the power supply assembly is used for supplying power to the display panel.

The beneficial effects that technical scheme that this application embodiment provided include at least:

a display panel includes: a substrate, a pixel defining layer, a cathode selecting layer and a cathode layer on the substrate. Within a row of pixel openings in the pixel defining layer, a minimum distance between the first pixel opening and the second pixel opening is greater than a minimum distance between the first pixel opening and the third pixel opening. Since the cathode selection blocks in the cathode selection layer are arranged between the first pixel openings and the second pixel openings, the distance between the first pixel openings and the second pixel openings is larger. Accordingly, the size of the cathode selection block arranged between the first pixel opening and the second pixel opening is larger. Therefore, the area of the orthographic projection of the cathode selection layer in the display panel on the substrate is ensured to be larger, the area of the orthographic projection of the cathode layer in the display panel on the substrate is ensured to be smaller, the light transmittance of the display panel is effectively improved, and the reliability of the display panel is further improved. In addition, when the cathode selection layer is formed by vapor deposition by adopting the FMM, the size of the cathode selection block in the cathode selection layer 300 is larger, so that the opening on the FMM can be ensured to be larger, the manufacturing difficulty of the FMM can be effectively simplified, and the cathode selection layer formed on the pixel definition layer is lower in difficulty.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a partial top view of a display panel formed with a cathode selection material as is currently common;

FIG. 2 is a partial top view of a display panel according to an embodiment of the present application;

FIG. 3 is a cross-sectional view of the film layer at A-A' of the display panel shown in FIG. 2;

FIG. 4 is a partial top view of another display panel provided in an embodiment of the present application;

FIG. 5 is a schematic diagram of a row of first-type pixel openings in the display panel shown in FIG. 4;

FIG. 6 is a schematic diagram of a row of second type pixel openings in the display panel shown in FIG. 4;

FIG. 7 is a cross-sectional view of a film layer at B-B' of the display panel shown in FIG. 4;

FIG. 8 is a partial top view of yet another display panel provided in an embodiment of the present application;

fig. 9 is a top view of a display panel according to an embodiment of the present disclosure;

Fig. 10 is a flowchart of a method for manufacturing a display panel according to an embodiment of the present disclosure;

fig. 11 is a flowchart of a method for manufacturing a display panel according to an embodiment of the present application.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the present application more apparent, the embodiments of the present application will be described in further detail below with reference to the accompanying drawings.

In the related art, a display panel may generally include: an anode layer, a light-emitting layer, and a cathode layer are stacked. The cathode layer is generally disposed in the display panel and may be made of a transparent conductive material, for example, a mg-ag material.

However, the cathode layer made of a transparent conductive material has low transmittance to light. For example, a cathode layer having a thickness of 15 nanometers (nm) has a transmittance of only about 50% for light having a wavelength of 550 nm and a transmittance of only about 30% for light having a wavelength of 940 nm.

Therefore, the cathode layer in the display panel needs to be patterned to improve the transmittance of the cathode layer to light, thereby ensuring better transmittance of the display panel.

Currently, when patterning a cathode layer, a patterned cathode selection material (english: cathode Patterning Material, abbreviated as CPM) is required to be formed before the cathode layer is formed, the CPM is a material selectively deposited only on the cathode material, and the cathode is difficult to adhere to a region where the CPM is formed, so that the adhesion area of the cathode layer can be reduced to improve the transmittance of light.

For example, referring to fig. 1, fig. 1 is a partial top view of a display panel with cathode selection material formed thereon. The display panel 00 may generally include: a substrate 001, a pixel defining layer (not shown) on the substrate 001, and a light emitting layer (not shown) on the pixel defining layer. The pixel defining layer has a plurality of pixel openings 002, the light emitting layer has a plurality of light emitting blocks 003 corresponding to the pixel openings 002 one by one, and the orthographic projection of each pixel opening 002 on the substrate 001 is located in the orthographic projection of the corresponding light emitting block 003 on the substrate 001.

Normally, the area of the orthographic projection of the pixel opening 002 on the substrate 001 is approximately equal to the area of the orthographic projection of the light-emitting block 003 on the substrate 001, and when CPM needs to be provided in the display panel 00, the opening area of the pixel opening 002 needs to be reduced so that the area of the orthographic projection of the pixel opening 002 on the substrate 001 is much smaller than the area of the orthographic projection of the light-emitting block 003 on the substrate 001. In this way, CPM 004 can be disposed on the pixel defining layer with CPM 004 between two adjacent pixel openings 002. In this way, the area where the CPM 004 is attached will not attach to the cathode material, and after the cathode layer is formed, it can be ensured that the cathode material can be attached to the pixel opening 002, so as to ensure that the light-emitting block 003 at the pixel opening 002 can emit light normally. The area between the two pixel openings 002 does not assist the cathode material, so as to ensure that the adhesion area of the cathode layer in the display panel is smaller, and further ensure that the light transmittance of the display panel is better.

However, the pixel openings 002 in the pixel defining layer are reduced in an equal proportion, that is, the center point of the orthographic projection of the pixel openings 002 on the substrate 001 coincides with the center point of the orthographic projection of the corresponding light emitting blocks 003 on the substrate 001. This results in a smaller distance between two adjacent pixel openings 002, for example, a distance between two adjacent pixel openings 002 of only about 16 micrometers (um). The CPM004 on the pixel defining layer is usually formed by vapor deposition using a Fine Metal Mask (FMM for short), and when the distance between two adjacent pixel openings 002 is small, the opening on the FMM is small, which results in a large manufacturing difficulty of the FMM and thus a large difficulty of forming the CPM004 on the pixel defining layer.

Referring to fig. 2 and 3, fig. 2 is a partial top view of a display panel according to an embodiment of the present application, and fig. 3 is a film cross-sectional view of the display panel shown in fig. 2 at A-A'. The display panel 000 includes: the substrate 100, the pixel defining layer 200, the cathode selection layer 300 and the cathode layer 400 on the substrate 100.

The pixel defining layer 200 in the display panel 000 has a plurality of pixel openings 200a arranged in an array. In the row of pixel openings 200a, a minimum distance between the first pixel opening 201 and the second pixel opening 202 is greater than a minimum distance between the first pixel opening 201 and the third pixel opening 203. For example, the plurality of pixel openings 200a in the pixel defining layer 200 may be arranged in an array in a plurality of rows and a plurality of columns, and the row of pixel openings 200a may be one row of pixel openings 200a in the plurality of pixel openings 200a or may be one column of pixel openings 200a in the plurality of pixel openings 200a. The first pixel opening 201 is any pixel opening in the row of pixel openings 200a, and the second pixel opening 202 and the third pixel opening 203 are two pixel openings adjacent to the first pixel opening 201 in the row of pixel openings 200a.

The cathode selection layer 300 and the cathode layer 400 in the display panel 000 are both located at a side of the pixel defining layer 200 facing away from the substrate 100. In this application, the cathode selection layer 300 is made of CPM, and thus, a cathode material is not attached to a region of the display substrate 000 where the cathode selection layer 300 is attached. For this purpose, the cathode layer 400 has a hollowed-out portion 401, and the front projection of the cathode selection layer 300 on the substrate 100 at least partially coincides with the front projection of the hollowed-out portion 401 in the cathode layer 400 on the substrate 100. That is, the orthographic projection of the cathode selection layer 300 onto the substrate 100 is at least partially misaligned with the orthographic projection of the cathode layer 400 onto the substrate 100.

Wherein the cathode selection layer 300 may include: a plurality of cathode selection blocks 301, wherein the front projection of the cathode selection blocks 301 on the substrate 100 is not coincident with the front projection of the pixel openings 200a on the substrate 100, and the cathode selection blocks 301 are located between the first pixel openings 201 and the second pixel openings 202.

In the embodiment of the present application, since the orthographic projection of the cathode selection block 301 in the cathode selection layer 300 on the substrate 100 does not coincide with the orthographic projection of the pixel opening 200a on the substrate 100. Accordingly, the cathode material may be attached within the pixel opening 200a in the pixel defining layer 200 such that the cathode layer 400 is present at the pixel opening 200a, and thus the portion of the display panel 000 located within the pixel opening 200a may normally emit light.

Further, since the cathode selection blocks 301 in the cathode selection layer 300 are arranged between the first pixel openings 201 and the second pixel openings 202, the distance between the first pixel openings 201 and the second pixel openings 202 is larger. Accordingly, the size of the cathode selection block 301 arranged between the first pixel opening 201 and the second pixel opening 202 is large. In this way, the area of the orthographic projection of the cathode selection layer 300 in the display panel 000 on the substrate 100 can be ensured to be larger, and then the area of the orthographic projection of the cathode layer 400 in the display panel 000 on the substrate 100 can be ensured to be smaller, so that the light transmittance of the display panel 000 is effectively improved, and the reliability of the display panel 000 is further improved. In addition, when the cathode selection layer 300 is formed by vapor deposition using the FMM, the cathode selection blocks 301 in the cathode selection layer 300 need to be arranged between the first pixel openings 201 and the second pixel openings 202 having a large distance. Therefore, the cathode selection block 301 has a larger size, so that the opening on the FMM can be ensured to be larger, and the manufacturing difficulty of the FMM can be effectively simplified, so that the difficulty of the cathode selection layer 300 formed on the pixel defining layer 200 is lower.

In summary, the display panel provided in the embodiment of the present application includes: a substrate, a pixel defining layer, a cathode selecting layer and a cathode layer on the substrate. Within a row of pixel openings in the pixel defining layer, a minimum distance between the first pixel opening and the second pixel opening is greater than a minimum distance between the first pixel opening and the third pixel opening. Since the cathode selection blocks in the cathode selection layer are arranged between the first pixel openings and the second pixel openings, the distance between the first pixel openings and the second pixel openings is larger. Accordingly, the size of the cathode selection block arranged between the first pixel opening and the second pixel opening is larger. Therefore, the area of the orthographic projection of the cathode selection layer in the display panel on the substrate is ensured to be larger, the area of the orthographic projection of the cathode layer in the display panel on the substrate is ensured to be smaller, the light transmittance of the display panel is effectively improved, and the reliability of the display panel is further improved. In addition, when the cathode selection layer is formed by vapor deposition by adopting the FMM, the size of the cathode selection block in the cathode selection layer 300 is larger, so that the opening on the FMM can be ensured to be larger, the manufacturing difficulty of the FMM can be effectively simplified, and the cathode selection layer formed on the pixel definition layer is lower in difficulty.

In this application, the shape and size of the orthographic projection of the cathode selection block 301 in the cathode selection layer 300 on the substrate 100 are distributed the same as the shape and size of the orthographic projection of the hollowed-out portion 401 in the cathode layer 400 on the substrate 100. In this case, the boundary of the front projection of the cathode selection block 301 on the substrate 100 may coincide with the boundary of the front projection of the hollowed-out portion 401 on the substrate 100, that is, the front projection of the cathode selection layer 300 on the substrate 100 does not coincide with the front projection of the cathode layer 400 on the substrate 100.

Optionally, referring to fig. 4, fig. 4 is a partial top view of another display panel provided in the embodiment of the present application, in a row of pixel openings 200a in the pixel defining layer 200, a distance d1 between a center of a median projection of the first pixel opening 201 on the substrate 100 and a center of a median projection of the second pixel opening 202 on the substrate 100 is greater than a distance d2 between a center of a median projection of the first pixel opening 201 on the substrate 100 and a center of a median projection of the third pixel opening 203 on the substrate 100. In this way, it can be ensured that the minimum distance between the first pixel opening 201 and the second pixel opening 202 is greater than the minimum distance between the first pixel opening 201 and the third pixel opening 203.

In the embodiment of the present application, the plurality of pixel openings 200a in the pixel defining layer 200 may be divided into: a plurality of first-type pixel openings 200a1 and a plurality of second-type pixel openings 200a2. The plurality of first-type pixel openings 200a1 and the plurality of second-type pixel openings 200a2 may each be arranged in an array in a plurality of rows and a plurality of columns.

The portion of the display panel 000 located in the plurality of first type pixel openings 200a1 can emit light of two colors, and the portion of the display panel 000 located in the plurality of second type pixel openings 200a2 can emit light of one color. For example, among the plurality of first-type pixel openings 200a1, a portion of the first-type pixel openings 200a1 are used to emit red light, and a portion of the first-type pixel openings 200a1 are used to emit blue light; the plurality of second-type pixel openings 200a2 are each for emitting green light. Here, a portion of the display panel 000 where the first type pixel opening 200a1 for emitting red light is located may be a red sub-pixel R, a portion of the display panel 000 where the first type pixel opening 200a1 for emitting blue light is located may be a blue sub-pixel B, and a portion of the display panel 000 where the second type pixel opening 200a2 for emitting green light is located may be a green sub-pixel G. Note that, each sub-pixel in the display panel 000 in the present application adopts an RBGG arrangement, that is, one red sub-pixel R, one blue sub-pixel B, and two green sub-pixels G can form one pixel.

In the present application, as shown in fig. 4 and 5, fig. 5 is a schematic diagram of fig. 4 showing a column of first-type pixel openings in a display panel, and one cathode selection block 301 in the cathode selection layer 300 may be located between the first pixel opening 201 and the second pixel opening 202 in the column of first-type pixel openings 200a 1. As shown in fig. 4 and 6, fig. 6 is a schematic diagram of a row of second-type pixel openings in the display panel shown in fig. 4, and one cathode selection block 301 in the cathode selection layer 300 may also be located between the first pixel opening 201 and the second pixel opening 202 in the row of second-type pixel openings 200a 2. In this way, the cathode selection layer 300 may be formed on the display panel in which the subpixels are arranged in RBGG.

Optionally, in the same column of the first-type pixel openings 200a1, the center points of the orthographic projections of the respective first-type pixel openings 200a1 on the substrate 100 are collinear. But in the same row of the first type pixel openings 200a1, the center points of the orthographic projections of the respective first type pixel openings 200a1 on the substrate 100 are not collinear. In this case, only the position of one first-type pixel opening 200a1 of any two adjacent first-type pixel openings 200a1 in the same column of first-type pixel openings 200a1 needs to be adjusted upwards, and the position of the other first-type pixel opening 200a1 is adjusted downwards, so that the minimum distance between the first pixel opening 201 and the second pixel opening 202 in the column of first-type pixel openings 200a1 can be ensured to be greater than the minimum distance between the first pixel opening 201 and the third pixel opening 203.

In the second-type pixel openings 200a2 of the same row, the center points of the orthographic projections of the respective second-type pixel openings 200a2 on the substrate 100 are collinear. But in the same column of the second type pixel openings 200a2, the center points of the orthographic projections of the respective second type pixel openings 200a2 on the substrate 100 are not collinear. In this case, only the position of one second-type pixel opening 200a2 of any two adjacent second-type pixel openings 200a2 is adjusted to the left and the position of the other second-type pixel opening 200a2 is adjusted to the right in the same row of second-type pixel openings 200a2, so that the minimum distance between the first pixel opening 201 and the second pixel opening 202 in the row of second-type pixel openings 200a2 is ensured to be greater than the minimum distance between the first pixel opening 201 and the third pixel opening 203.

In this application, a plurality of cathode selection blocks 301 in the cathode selection layer 300 are arranged in an array. Wherein the center points of the orthographic projections of a column of cathode selection blocks 301 on the substrate 100 are collinear, for example, the center points of the orthographic projections of a column of cathode selection blocks 301 on the substrate 100 may be collinear with the center points of the orthographic projections of each of the first-type pixel openings 200a1 in the same column of first-type pixel openings 200a1 on the substrate 100; the center points of the orthographic projections of a row of cathode selection blocks 301 on the substrate 100 may be collinear, for example, the center points of the orthographic projections of a row of cathode selection blocks 301 on the substrate 100 may be collinear with the center points of the orthographic projections of each of the second-type pixel openings 200a2 of the same row of second-type pixel openings 200a2 on the substrate 100.

In the embodiment of the present application, as shown in fig. 4 and 7, fig. 7 is a film layer sectional view of the display panel at B-B' shown in fig. 4. The display panel 000 may further include: a light emitting layer 500 located between the pixel defining layer 200 and the cathode layer 400. The light emitting layer 500 may include: a plurality of light emitting blocks 501 in one-to-one correspondence with the plurality of pixel openings 200 a. Wherein, the front projection of each pixel opening 200a on the substrate 100 is located in the front projection of the corresponding light-emitting block 501 on the substrate 100. The center point of the orthographic projection of each pixel opening 200a on the substrate 100 does not coincide with the center point of the orthographic projection of the corresponding light-emitting block 501 on the substrate 100. In this way, it is ensured that the minimum distance between the first pixel opening 201 and the second pixel opening 202 in the row of pixel openings 200a is greater than the minimum distance between the first pixel opening 201 and the third pixel opening 203.

In this application, the plurality of light emitting blocks 501 in the light emitting layer 500 may include: a red light emitting block for emitting red light in the red subpixel R, a blue light emitting block for emitting blue light in the blue subpixel B, and a green light emitting block for emitting green light in the green subpixel G. Wherein, the red light emitting block and the blue light emitting block may correspond to the first type pixel opening 200a1, and the green light emitting block may correspond to the second type pixel opening 200a 2.

Alternatively, the shape of each pixel opening 200a within the pixel defining layer 200 in the display substrate 000 is the same. By way of example, each of the pixel openings 200a in the pixel defining layer 200 may have a triangular, quadrangular, octagonal, circular, elliptical, etc. shape in orthographic projection on the substrate 100. In other possible implementations, when the shape of the orthographic projection of the pixel opening 200a on the substrate 100 is a polygon such as a triangle, a quadrangle, or an octagon, the shape of the orthographic projection of the pixel opening 200a on the substrate 100 is a polygon with rounded corners.

Fig. 4 illustrates an example in which the shape of the orthographic projection of the pixel opening 200a on the substrate 100 is a circle. In this case, the shape of the orthographic projection of each cathode selection block 301 of the cathode selection layer 300 in the display panel 000 on the substrate 100 may be rectangular. Thus, the area of orthographic projection of the cathode selection layer 300 on the substrate 100 occupies about 10% of the area of the light-transmitting region in the display panel 000, so that the light transmittance of the light-transmitting region in the display panel 000 to 940nm can be improved by about 6%. In addition, when the shape of the orthographic projection of the pixel opening 200a on the substrate 100 is circular or elliptical, since the pixel opening 200a is relatively round and has no sharp angle, the effect of the light emitted from the pixel opening 200a is better, and the display effect of the display panel 000 is better.

In the embodiment of the present application, when the front projection of the pixel opening 200a on the substrate 100 is triangular, as shown in fig. 8, fig. 8 is a partial top view of a further display panel provided in the embodiment of the present application. In a row of pixel openings 200a in the pixel defining layer 200, a bottom side of an orthographic projection of the first pixel opening 201 on the substrate 100 is opposite to a bottom side of an orthographic projection of the second pixel opening 202 on the substrate 100, and a top angle of the orthographic projection of the first pixel opening 201 on the substrate 100 is opposite to a top angle of an orthographic projection of the third pixel opening 203 on the substrate 100.

In the present application, the shape of the orthographic projection of the light-emitting block 501 on the substrate 100 in the light-emitting layer 500 is rectangular, and a diagonal line of the orthographic projection of the light-emitting block 501 on the substrate 100 coincides with a bottom edge of the orthographic projection of the corresponding pixel opening 200a on the substrate 100.

Thus, the minimum distance between the first pixel opening 201 and the second pixel opening 202 is: a distance between a bottom edge of the orthographic projection of the first pixel opening 201 on the substrate 100 and a bottom edge of the orthographic projection of the second pixel opening 202 on the substrate 100; the distance between the first pixel opening 201 and the third pixel opening 203 is: the distance between the top angle of the orthographic projection of the first pixel opening 201 on the substrate 100 and the top angle of the orthographic projection of the third pixel opening 203 on the substrate 100. In this way, a minimum distance between the first pixel opening 201 and the second pixel opening 202 may be ensured to be greater than a minimum distance between the first pixel opening 201 and the second pixel opening 202.

In this case, the shape of the orthographic projection of each cathode selection block 301 of the cathode selection layer 300 in the display panel 000 on the substrate 100 may be a quadrangle, for example, it may be an isosceles trapezoid. And each side of the quadrangle may be parallel to the bottom side of the orthographic projection of the adjacent pixel opening 200a on the substrate 100. Thus, the area of orthographic projection of the cathode selection layer 300 on the substrate 100 occupies about 20% of the area of the light-transmitting region in the display panel 000, so that the light transmittance of the light-transmitting region in the display panel 000 to 940nm can be improved by about 10%.

Alternatively, as shown in fig. 7, the substrate 100 may include: a substrate 101, and a plurality of pixel driving circuits 102 and a plurality of anode blocks 103 on the substrate 101. The anode blocks 103 are in one-to-one correspondence with the pixel openings 200a and in one-to-one correspondence with the pixel driving circuits 102. The front projection of each anode block 103 onto the substrate 101 is located within the front projection of the corresponding pixel opening 200a onto the substrate 100, and each anode block 103 is electrically connected to the corresponding pixel drive 102. In this application, the anode block 103, the light emitting block 501, and the cathode layer 400 located in the same pixel opening 200a can constitute one light emitting device. The Light Emitting device may be an Organic Light Emitting Diode (OLED) Light Emitting device, for example. And this light emitting device can be controlled by the pixel driving circuit 102 connected thereto so that the light emitting device can emit light outward.

In an embodiment of the present application, as shown in fig. 7, the display panel 000 may further include: the encapsulation layer 600 is located on the side of the cathode layer 400 away from the substrate 100. The package layer 600 packages the light emitting device disposed on the substrate 100, so as to prevent the outside water oxygen molecules from eroding the light emitting device in the display panel 000, and further improve the service life of the light emitting device, so that the service life of the display panel 000 is longer.

Alternatively, the display panel 000 in the present application may be a partially light-transmitting display panel or a completely light-transmitting display panel. For this purpose, the embodiments of the present application will be schematically illustrated by taking the following two alternative implementation manners as examples:

in a first alternative implementation, when the display panel 000 is a partially light-transmitting display panel, as shown in fig. 9, fig. 9 is a top view of a display panel according to an embodiment of the present application. The substrate 100 in the display panel 000 has a first display region 100a and a second display region 100b located at the periphery of the first display region 100a. The pixel openings 200a of the pixel defining layer 200 and the cathode selection layer 300 are located in the first display region 100a, and the light transmittance of the first display region 100a is greater than the light transmittance of the second display region 100b. In this way, the light transmittance of the first display area 100a can be improved by the cathode selection layer 300 disposed in the first display area 100a, so that the external light can more easily pass through the first display area 100a. In this case, only the portion of the display panel 000 within the first display area 100a can transmit external light.

Optionally, the pixel defining layer 200 further has a plurality of normal pixel openings (not labeled in the figure) in the second display area 100 b. Wherein the light emitting layer 500 further includes: the normal light emitting blocks are in one-to-one correspondence with the normal pixel openings, and the orthographic projection of each normal pixel opening on the substrate 100 is located in the orthographic projection of the corresponding normal light emitting block on the substrate 100. The shape of the orthographic projection of the normal pixel opening on the substrate 100 is similar to the shape of the orthographic projection of the corresponding normal light emitting block on the substrate 100, and the area of the orthographic projection of the normal pixel opening on the substrate 100 is approximately the same as the area of the orthographic projection of the corresponding normal light emitting block on the substrate 100. And the area of the orthographic projection of the pixel opening 200a on the substrate 100 is much smaller than the area of the orthographic projection of the corresponding light-emitting block 501 on the substrate 100. As such, the area of the orthographic projection of the pixel opening 200a on the substrate 100 is smaller than the area of the orthographic projection of the normal pixel opening on the substrate 100, for example, the ratio of the area of the orthographic projection of the single pixel opening 200a on the substrate 100 to the area of the orthographic projection of the single normal pixel opening on the substrate 100 is 1:2.

The front projection of the light-emitting block 501 on the substrate 100 in the light-emitting layer 500 is the same shape and size as the front projection of the normal light-emitting block on the substrate 100.

It should also be noted that the partially transmissive display panel shown in the first alternative implementation is used to fabricate the display device of the off-screen sensor. For example, after the display device is assembled with the partially light-transmitting display panel shown in the first alternative implementation, a sensor (e.g., a camera) in the display device may be disposed below the display panel, and a light sensing surface of the sensor may be directed to the first display area 100a in the display panel, so that the sensor can normally acquire external light.

In a second alternative implementation, when the display panel 000 is a completely transparent display panel, the plurality of pixel openings 200a arranged in an array in the pixel defining layer 200 may be uniformly arranged on the substrate 100. In this case, each portion in the display panel 000 can transmit external light.

It should be noted that the second alternative implementation shows that the entire light-transmitting display panel is used to prepare a transparent display device.

The embodiment of the application also provides a manufacturing method of the display panel, as shown in fig. 10, fig. 10 is a flowchart of the manufacturing method of the display panel provided by the embodiment of the application. The display panel shown in fig. 2 described above can be manufactured by the manufacturing method of the display panel shown in fig. 10. The manufacturing method of the display panel may include:

step S11, forming a pixel defining layer on the substrate.

The pixel defining layer is provided with a plurality of pixel openings which are arranged in an array, and in one row of pixel openings, the minimum distance between the first pixel opening and the second pixel opening is larger than the minimum distance between the first pixel opening and the third pixel opening. Here, the first pixel opening is any pixel opening in a row of pixel openings, and the second pixel opening and the third pixel opening are two pixel openings adjacent to the first pixel opening in a row of pixel openings.

Step S12, sequentially forming a cathode selection layer and a cathode layer on the pixel defining layer.

The cathode layer is provided with a hollowed-out part, and the orthographic projection of the cathode selection layer on the substrate is at least partially overlapped with the orthographic projection of the hollowed-out part on the substrate; the cathode selection layer includes: the front projection of the cathode selection blocks on the substrate is not overlapped with the front projection of the pixel openings on the substrate, and the cathode selection blocks are positioned between the first pixel openings and the second pixel openings.

In summary, the method for manufacturing a display panel according to the embodiments of the present application includes forming a pixel defining layer, a cathode selecting layer, and a cathode layer on a substrate. Within a row of pixel openings in the pixel defining layer, a minimum distance between the first pixel opening and the second pixel opening is greater than a minimum distance between the first pixel opening and the third pixel opening. Since the cathode selection blocks in the cathode selection layer are arranged between the first pixel openings and the second pixel openings, the distance between the first pixel openings and the second pixel openings is larger. Accordingly, the size of the cathode selection block arranged between the first pixel opening and the second pixel opening is larger. Therefore, the area of the orthographic projection of the cathode selection layer in the display panel on the substrate is ensured to be larger, the area of the orthographic projection of the cathode layer in the display panel on the substrate is ensured to be smaller, the light transmittance of the display panel is effectively improved, and the reliability of the display panel is further improved. In addition, when the cathode selection layer is formed by vapor deposition by adopting the FMM, the size of the cathode selection block in the cathode selection layer 300 is larger, so that the opening on the FMM can be ensured to be larger, the manufacturing difficulty of the FMM can be effectively simplified, and the cathode selection layer formed on the pixel definition layer is lower in difficulty.

As shown in fig. 11, fig. 11 is a flowchart of a method for manufacturing a display panel according to an embodiment of the present application. The display panel shown in fig. 4 or 8 described above may be manufactured by the manufacturing method of the display panel shown in fig. 11. The manufacturing method of the display panel may include:

step S21, a substrate is provided.

In an embodiment of the present application, the substrate may include: the display device comprises a substrate, a plurality of pixel driving circuits and a plurality of anode blocks, wherein the pixel driving circuits and the anode blocks are arranged on the substrate, and the pixel driving circuits are connected with the anode blocks in a one-to-one correspondence manner.

Step S22, a pixel defining layer is formed on the substrate.

In the embodiment of the present application, an insulating film may be formed on a substrate, and a patterning process may be performed on the insulating film once to form a pixel defining layer. The pixel defining layer is provided with a plurality of pixel openings which are arranged in an array, and in one row of pixel openings, the minimum distance between the first pixel opening and the second pixel opening is larger than the minimum distance between the first pixel opening and the third pixel opening. Here, the first pixel opening is any pixel opening in a row of pixel openings, and the second pixel opening and the third pixel opening are two pixel openings adjacent to the first pixel opening in a row of pixel openings.

Step S23, forming a light-emitting layer on the pixel defining layer.

In the embodiment of the application, first, a plurality of red light emitting blocks for emitting red light may be formed on a pixel defining layer using an evaporation process; then, a plurality of green light emitting blocks for emitting green light can be formed on the pixel defining layer by adopting an evaporation process; finally, the evaporation process may be continued to form a plurality of blue light emitting blocks for emitting blue light on the pixel defining layer. For this purpose, the light-emitting layer may have a plurality of light-emitting blocks, and the plurality of light-emitting blocks are in one-to-one correspondence with the plurality of pixel openings, and the orthographic projection of each light-emitting block on the substrate is located within the orthographic projection of the corresponding pixel opening on the substrate.

Step S24, forming a cathode selection layer on the light-emitting layer.

In the embodiment of the application, the cathode selection layer can be formed by evaporating CPM on the light-emitting layer by adopting an FMM through an evaporation process. Wherein the cathode selection layer comprises: the front projection of the cathode selection blocks on the substrate is not overlapped with the front projection of the pixel openings on the substrate, and the cathode selection blocks are positioned between the first pixel openings and the second pixel openings.

Step S25, forming a cathode layer on the cathode selection layer.

In the embodiment of the application, the cathode layer can be formed on the cathode selection layer by adopting a whole-layer evaporation mode. The cathode layer formed on the cathode selection layer is provided with a hollowed-out part, and the orthographic projection of the cathode selection layer on the substrate is at least partially overlapped with the orthographic projection of the hollowed-out part on the substrate.

And S26, forming an encapsulation layer on the cathode layer.

In the embodiment of the application, the encapsulation layer may be formed on the cathode layer by adopting a full-layer evaporation manner.

It will be clear to those skilled in the art that, for convenience and brevity, the specific principles of the display panel described above may refer to the corresponding matters in the foregoing structural embodiments of the display panel, which are not described herein again.

The embodiment of the application also provides a display device, which may be: any product or component with display function such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like. The display device may include: the display panel in the above embodiments of the power supply assembly may be, for example, the display panel shown in fig. 2, 4 or 8. The power supply assembly is used for supplying power to the display panel.

It is noted that in the drawings, the size of layers and regions may be exaggerated for clarity of illustration. Moreover, it will be understood that when an element or layer is referred to as being "on" another element or layer, it can be directly on the other element or intervening layers may be present. In addition, it will be understood that when an element or layer is referred to as being "under" another element or layer, it can be directly under the other element or intervening layers or elements may be present. In addition, it will be understood that when a layer or element is referred to as being "between" two layers or elements, it can be the only layer between the two layers or elements, or more than one intervening layer or element may also be present. Like reference numerals refer to like elements throughout.

In this application, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. The term "plurality" refers to two or more, unless explicitly defined otherwise.

The foregoing description of the preferred embodiments is merely exemplary in nature and is in no way intended to limit the invention, since it is intended that all modifications, equivalents, improvements, etc. that fall within the spirit and scope of the invention.

Claims

1. A display panel, comprising:

a substrate;

2. The display panel of claim 1, wherein a distance between a center point of the orthographic projection of the first pixel opening on the substrate and a center point of the orthographic projection of the second pixel opening on the substrate is greater than a distance between a center point of the orthographic projection of the first pixel opening on the substrate and a center point of the orthographic projection of the third pixel opening on the substrate.

3. The display panel of claim 1, wherein the plurality of pixel openings comprises: a plurality of first-type pixel openings and a plurality of second-type pixel openings;

4. A display panel according to claim 3, wherein the center points of the orthographic projections of each of the first-type pixel openings on the substrate in the same column of the first-type pixel openings, and the center points of the orthographic projections of a column of the cathode selection blocks on the substrate are collinear; the center points of the orthographic projections of each of the second-type pixel openings on the substrate of the same row of the second-type pixel openings, and the center points of the orthographic projections of the cathode selection blocks on the substrate of one row of the cathode selection blocks are collinear.

5. The display panel according to any one of claims 2 to 4, further comprising: a light emitting layer located between the pixel defining layer and the cathode layer, the light emitting layer comprising: a plurality of light emitting blocks in one-to-one correspondence with the plurality of pixel openings;

6. The display panel of claim 5, wherein each of the pixel openings has a triangular, quadrilateral, octagonal, circular, or elliptical shape in orthographic projection on the substrate.

7. The display panel of claim 6, wherein when the shape of the orthographic projection of each pixel opening on the substrate is a triangle, a bottom side of the orthographic projection of the first pixel opening on the substrate is opposite to a bottom side of the orthographic projection of the second pixel opening on the substrate, and a top angle of the orthographic projection of the first pixel opening on the substrate is opposite to a top angle of the orthographic projection of the third pixel opening on the substrate.

8. The display panel of claim 7, wherein the orthographic projection of the light-emitting block on the substrate is rectangular in shape, and a diagonal of the orthographic projection of the light-emitting block on the substrate coincides with a bottom edge of the orthographic projection of the corresponding pixel opening on the substrate.

9. The display panel of claim 7, wherein the shape of the orthographic projection of the cathode selection block on the substrate is a quadrilateral, and each side of the quadrilateral is parallel to the bottom side of the orthographic projection of an adjacent pixel opening on the substrate.

10. The display panel of claim 1, wherein the shape and size of the orthographic projection of the cathode selection block on the substrate are the same as the shape and size of the orthographic projection of the hollowed-out portion on the substrate, respectively.

11. The display panel according to any one of claims 1 to 4, 6 to 10, wherein the substrate comprises: the anode blocks are in one-to-one correspondence with the pixel openings and in one-to-one correspondence with the pixel driving circuits, orthographic projections of the anode blocks on the substrate are positioned in orthographic projections of the corresponding pixel openings on the substrate, and the anode blocks are electrically connected with the corresponding pixel driving circuits.

12. The display panel of claim 11, further comprising: and the packaging layer is positioned on one side of the cathode layer away from the substrate.

13. The display panel of claim 12, wherein the substrate has a first display region and a second display region located at a periphery of the first display region, the plurality of array-arranged pixel openings and the cathode selection layer are both located in the first display region, and a light transmittance of the first display region is greater than a light transmittance of the second display region.

14. The display panel of claim 13, wherein the pixel defining layer further has a plurality of normal pixel openings located within the second display region, the ratio of the area of orthographic projection of a single one of the pixel openings onto the substrate to the area of orthographic projection of a single one of the normal pixel openings onto the substrate being 1:2.

15. The display panel of claim 12, wherein the plurality of array-arranged pixel openings are uniformly arranged on the substrate.

16. A method of manufacturing a display panel, the method comprising:

17. A display device, comprising: a power supply assembly for supplying power to the display panel and the display panel of any one of claims 1 to 15.