CN113488602B - Display panel and preparation method thereof - Google Patents

Display panel and preparation method thereof Download PDF

Info

Publication number
CN113488602B
CN113488602B CN202110846410.8A CN202110846410A CN113488602B CN 113488602 B CN113488602 B CN 113488602B CN 202110846410 A CN202110846410 A CN 202110846410A CN 113488602 B CN113488602 B CN 113488602B
Authority
CN
China
Prior art keywords
pixel
layer
block
anode
array substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202110846410.8A
Other languages
Chinese (zh)
Other versions
CN113488602A (en
Inventor
杨星星
邢汝博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hefei Visionox Technology Co Ltd
Original Assignee
Hefei Visionox Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hefei Visionox Technology Co Ltd filed Critical Hefei Visionox Technology Co Ltd
Priority to CN202110846410.8A priority Critical patent/CN113488602B/en
Publication of CN113488602A publication Critical patent/CN113488602A/en
Application granted granted Critical
Publication of CN113488602B publication Critical patent/CN113488602B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/85—Arrangements for extracting light from the devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/86—Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass

Landscapes

  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

The application provides a display panel and a preparation method thereof, which solve the problem that a transparent display area has diffraction phenomenon in the prior art. Wherein, display panel includes transparent display area, and transparent display area includes: an array substrate; the light-emitting device layer is arranged on one side of the array substrate and comprises an anode layer, a light-emitting layer and a cathode layer which are stacked along the light-emitting direction of the light-emitting device layer, and the anode layer comprises a plurality of anode blocks which are arranged at intervals; the pixel limiting layer comprises a plurality of pixel limiting blocks, each pixel limiting block is surrounded and exposes at least one anode block to form a pixel opening, and the light-emitting layer is arranged in the pixel opening; the pixel limiting block is overlapped with the orthographic projection of the anode block surrounded by the pixel limiting block on the array substrate, and the outline of the orthographic projection of the pixel limiting block on the array substrate is a random pattern.

Description

Display panel and preparation method thereof
Technical Field
The application relates to the technical field of display, in particular to a display panel and a preparation method thereof.
Background
In order to improve the screen ratio of the display product, an under-screen camera mode is generally adopted at present, namely a transparent display area with high transmittance is arranged on a screen, and a camera is arranged below the transparent display area. In this case, external light may pass through the transparent display area and enter the camera to realize the image acquisition function. However, since the periodic patterns formed by the metal wiring, the anode, the organic layer, the inorganic layer and the like in the transparent display area are similar to the grating structure, diffraction phenomenon exists in the transparent display area, and the imaging effect of the camera is affected, so that development of display products of the camera under the screen is restricted.
Content of the application
In view of the above, embodiments of the present application are directed to a display panel and a method for manufacturing the same, so as to solve the problem of diffraction phenomenon in the transparent display area in the prior art.
The first aspect of the present application provides a display panel, including a transparent display region, the transparent display region including: an array substrate; the light-emitting device layer is arranged on one side of the array substrate and comprises an anode layer, a light-emitting layer and a cathode layer which are stacked along the light-emitting direction of the light-emitting device layer, and the anode layer comprises a plurality of anode blocks which are arranged at intervals; the pixel limiting layer comprises a plurality of pixel limiting blocks, each pixel limiting block is surrounded and exposes at least one anode block to form a pixel opening, and the light-emitting layer is arranged in the pixel opening; the pixel limiting block is overlapped with the orthographic projection of the anode block surrounded by the pixel limiting block on the array substrate, and the outline of the orthographic projection of the pixel limiting block on the array substrate is a random pattern.
In one embodiment, the outer contour of the pixel defining block is a random saw tooth line.
In one embodiment, the distance between the front projection outline of the pixel limiting block on the array substrate and the front projection outline of the anode block enclosed by the pixel limiting block on the array substrate is randomly distributed; the spacing between the front projection outline of the pixel limiting block on the array substrate and the front projection outline of the anode block surrounded by the pixel limiting block on the array substrate is more than or equal to 2.5 micrometers and not more than 4 micrometers.
In one embodiment, the material of the pixel defining layer is a black organic glue.
In one embodiment, the plurality of pixel defining blocks are divided into a plurality of cell groups, and outer contour lines of the pixel defining blocks at corresponding positions in the different cell groups are identical in shape.
In one embodiment, the display panel further includes a thin film encapsulation layer filling the space between adjacent pixel defining blocks.
In one embodiment, the plurality of anode blocks respectively correspond to a plurality of sub-pixels, and the plurality of sub-pixels are arranged in a predetermined manner, the predetermined manner including: any of RGB arrangement, RGBW arrangement, RGB Delta arrangement, pentille arrangement, diamond arrangement.
The second aspect of the present application provides a method for manufacturing a display panel, including: providing an array substrate; preparing an anode layer on the array substrate, wherein the anode layer comprises a plurality of anode blocks; preparing a pixel limiting layer, wherein the pixel limiting layer comprises a plurality of pixel limiting blocks, each pixel limiting block is surrounded and exposes at least one anode block to form a pixel opening, each pixel limiting block is overlapped with the orthographic projection of the anode block surrounded by the pixel limiting block on the array substrate, and the outline of the orthographic projection of the pixel limiting block on the array substrate is a random pattern; preparing a light-emitting layer, wherein the light-emitting layer is positioned in the pixel opening; a cathode layer is prepared, the cathode layer covering the light emitting layer and the pixel defining layer.
In one embodiment, preparing a pixel defining layer, the pixel defining layer including a plurality of pixel defining blocks, each pixel defining block surrounding and exposing at least one anode block to form a pixel opening, each pixel defining block overlapping with an orthographic projection of the anode block surrounded by the pixel defining block on an array substrate, and an outline of the orthographic projection of the pixel defining block on the array substrate being a random pattern includes: preparing a pixel defining material layer on the array substrate, wherein the pixel defining material layer covers the anode layer; patterning the pixel limiting material layer by adopting a first mask plate to obtain a plurality of pixel openings; and patterning the pixel limiting material layer by adopting a second mask plate to form a plurality of pixel limiting blocks.
In one embodiment, the method for manufacturing a display panel further includes: a thin film encapsulation layer is prepared, the thin film encapsulation layer filling the spaces between the pixel defining blocks.
According to the display panel and the preparation method thereof provided by the application, the pixel limiting layer is implemented into the plurality of pixel limiting blocks, each pixel limiting block surrounds and exposes at least one anode block, the pixel limiting blocks are overlapped with the orthographic projection of the anode blocks surrounded by the pixel limiting blocks on the array substrate, the outline of the orthographic projection of the pixel limiting blocks on the array substrate is a random pattern, and the grating structure formed by periodical arrangement of the anode blocks is broken, so that the diffraction phenomenon is improved.
Drawings
Fig. 1 is a schematic top view of a display product according to an embodiment of the application.
Fig. 2 is a schematic cross-sectional view of the product shown in fig. 1 along the line AB.
Fig. 3 is a schematic cross-sectional structure of a display panel according to a first embodiment of the present application.
Fig. 4a is a schematic cross-sectional structure of a display panel according to a second embodiment of the application.
Fig. 4b is a schematic diagram illustrating a partial top view of the display panel shown in fig. 4a according to an embodiment of the application.
Fig. 4c is a schematic diagram illustrating a partial top view of the display panel shown in fig. 4a according to another embodiment of the application.
Fig. 5 is a schematic cross-sectional structure of a display panel according to a third embodiment of the application.
Fig. 6 is a flowchart of a method for manufacturing a display panel according to an embodiment of the application.
Fig. 7 a-7 c are schematic diagrams illustrating the implementation of step S630 according to an embodiment of the application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
Fig. 1 is a schematic top view of a display product according to an embodiment of the application. Fig. 2 is a schematic cross-sectional view of the product shown in fig. 1 along the line AB. The display product is a mobile phone, a tablet computer, a smart meter and the like. As shown in connection with fig. 1 and 2, the display product employs an under-screen camera. Specifically, the display product includes a display panel 10, and the display panel 10 includes a transparent display area TA and a normal display area CA at least partially surrounding the transparent display area TA. For example, the conventional display area CA includes an annular opening, the transparent display area TA is located within the opening, and the conventional display area CA surrounds the transparent display area TA. For another example, the display panel 10 further includes a bezel area BA, a part of the edge of the transparent display area TA is surrounded by the bezel area BA, and the remaining edge is surrounded by the normal display area CA. The non-display surface side of the transparent display area TA is provided with a camera 11 to form an under-screen camera structure.
Fig. 3 is a schematic cross-sectional structure of a display panel 10 according to a first embodiment of the present application. As shown in fig. 3, the display panel 10 includes a substrate 11, an anode layer 12, a pixel defining layer 13, a light emitting layer 14, and a cathode layer 15 on the substrate 11. Wherein the anode layer 12 is disposed on the substrate 11, the anode layer 11 includes a plurality of anode blocks 121. A pixel defining layer 13 is located on the substrate 11, the pixel defining layer 13 including a plurality of openings, each defining a pixel opening, and each anode block 121 being exposed to one pixel opening. For example, the pixel defining layer 13 covers an edge region of each anode block 121, and a central region of each anode block 121 except for the edge region is exposed to one pixel opening. The light emitting layer 14 includes a plurality of light emitting cells 141 respectively located in the plurality of pixel openings, and the light emitting cells 141 cover the anode block 121. The cathode layer 15 covers the light emitting layer 14 and the pixel defining layer 13. The anode block 121, the light emitting unit 141, and the cathode layer 15 within each pixel opening form one sub-pixel 120.
The adjacent plurality of sub-pixels 120 constitute one pixel unit. For example, adjacent 3 sub-pixels constitute one pixel unit, and the 3 sub-pixels are red, green and blue sub-pixels, respectively. For another example, adjacent 4 sub-pixels constitute one pixel unit, and the 4 sub-pixels are red sub-pixel, green sub-pixel, blue sub-pixel, and white sub-pixel, respectively. The number, the colors and the arrangement modes of the sub-pixels in the pixel unit can be reasonably set according to actual needs.
The substrate 11 may be an array substrate. When the substrate 11 is an array substrate, the array substrate includes a plurality of pixel driving units 110, and each pixel driving unit 110 is connected to one pixel unit for driving the pixel unit to emit light. The circuit configuration of the pixel driving unit 110 may be 2T1C, 3T2C, 7T1C,9T1C, or the like.
The plurality of subpixels 120 in the display panel 10 are arranged in a predetermined manner. The predetermined means mentioned here include: any of RGB arrangement, RGBW arrangement, RGB Delta arrangement, pentille arrangement, diamond arrangement. The arrangement of the sub-pixels 120 is periodic, so that the arrangement of the anode blocks 121 is also periodic. Because the transmittance of the anode layer 12 is low, which is generally metal, the anode layer 12 forms a grating structure, and thus generates diffraction phenomenon, as described in the background art.
In order to solve the diffraction phenomenon caused by the periodic pattern of the anode layer 12, the present application provides a display panel, which breaks the periodic structure of the anode layer 12 by improving the structure of the pixel defining layer 13, thereby improving the diffraction phenomenon.
Fig. 4a is a schematic cross-sectional structure of a display panel according to a second embodiment of the application. Fig. 4b is a schematic top view of the display panel shown in fig. 4a according to an embodiment of the application. For convenience of explanation, only the structures of the pixel defining layer and the anode layer are shown in fig. 4b, and the two-dot chain line a in fig. 4b 1 A 2 The corresponding section is shown in fig. 4 a. As shown in connection with fig. 4a and 4b, the display panel 20 differs from the display panel 10 shown in fig. 1 only in the structure of the pixel defining layer. In the display panel 20, the pixel defining layer 23 includes a plurality of pixel defining blocks 231, each pixel defining block 231 being independent of the other, the plurality of pixel defining blocks 231 being spaced apart from each other. Each pixel limiting block 231 encloses and exposes one anode block 121 to form a pixel opening, the pixel limiting blocks 231 overlap with the orthographic projection of the anode blocks 121 enclosed by the pixel limiting blocks 231 on the array substrate, and the outline of the orthographic projection of the pixel limiting blocks 231 on the array substrate is a random pattern.
For example, the pixel defining blocks 231 are ring-shaped structures disposed around the anode block 121, each pixel defining block 231 defines one pixel opening, the pixel defining block 231 is located on the substrate 11 and covers an edge region of the anode block 121, and regions of the anode block 121 other than the edge region are exposed to the pixel openings.
The pixel defining blocks 231 are irregularly shaped, and the distance m between the outer contour line L of the orthographic projection of each pixel defining block 231 in the direction perpendicular to the substrate 11 and the edge line S of the anode block 121 surrounded thereby is randomly distributed, i.e., the distance m between the outer contour line L and the edge line S in the circumferential direction of the anode block 121 has an irregular variation tendency. The calculating process of the distance between the outer contour line L and the edge line S comprises the following steps: firstly, a first point on an edge line S is selected, a tangent is made at the first point, the normal line of the tangent and an outer contour line L are intersected with a second point, and a distance m between the first point and the second point is the distance between the outer contour line L and the edge line S.
In an example, the outer contour line L of the orthographic projection of the pixel defining block 231 in the direction perpendicular to the substrate 11 is a random saw tooth line, and the saw tooth may be shaped as a broken line saw tooth or a curved saw tooth, or may include both broken line saw tooth and curved saw tooth.
For example, the pixel defining block 231 includes oppositely disposed top and bottom surfaces, which are disposed in parallel in a direction parallel to the substrate 11. The pixel defining block 231 further includes an inner side C connecting the top and bottom surfaces 1 And outer side C 2 As shown in fig. 4a, the inner side C 1 Compared with the outer side surface C 2 Closer to the anode block 121. Depending on the shape of the pixel opening formed, the inner side C 1 Either smooth or non-smooth. For example, inner side C 1 In this case, the inner side C is a smooth curved surface 1 The enclosed pixel openings may be cylindrical or frustoconical. It should be appreciated that the inner side C 1 The shape of the opening of the pixel is determined by the shape of the opening of the pixel, and the embodiment of the application is directed to the inner side C 1 The specific structure of (2) is not limited. Outer side C 2 Is a concave-convex surface to form an orthographic projection with a random saw-tooth shaped outer contour L on the substrate 11.
According to the display panel provided by the embodiment, the pixel defining layer is implemented as the plurality of pixel defining blocks 231, each pixel defining block 231 encloses and exposes one anode block 121, the pixel defining block 231 overlaps with the orthographic projection of the anode block 121 enclosed by the pixel defining block 231 on the array substrate, and the outline of the orthographic projection of the pixel defining block 231 on the array substrate is a random pattern, so that the grating structure formed by the periodic arrangement of the anode blocks 121 is broken, and the diffraction phenomenon is improved. At the same time, the interval region between adjacent pixel defining blocks 231 is reduced by one pixel defining layer compared to a conventional display panel, and the transmittance is improved.
In one embodiment, the material of the pixel defining layer 23 is a black organic gel having a transmittance of greater than or equal to 20% and less than or equal to 50%. The transmittance of the conventional pixel defining layer 23 is high, and the transmittance of the pixel defining layer 23 is reduced by replacing the material of the pixel defining layer 23 with black organic glue, so that the damage to the periodic structure of the anode block 121 is more intense, and the inhibiting effect on the diffraction phenomenon is further improved.
In one embodiment, as shown in fig. 4a and 4b, the distance m between the outer contour L of the orthographic projection of the pixel defining block 231 in the direction perpendicular to the substrate 11 and the edge line S of the anode block 121 surrounded thereby is greater than or equal to 2.5 micrometers and not greater than 4 micrometers, for example 3 micrometers or 3.5 micrometers. In this way, the periodic structure of the anode block 121 is broken, and the pixel defining block 231 is ensured to have sufficient strength.
In one embodiment, as shown in fig. 4b, the plurality of pixel defining blocks 231 in the display panel 20 are divided into a plurality of cell groups 230, and the outer contour lines L of the pixel defining blocks 231 at corresponding positions in the different cell groups 230 are identical in shape, i.e., one cell group 230 is one repeating unit, the plurality of cell groups 230 are stacked, and the plurality of pixel defining blocks 231 in the different cell groups 230 are overlapped. The number of pixel defining blocks 231 in the cell group 230 may be reasonably set according to actual circumstances. The outer contour L of at least one pixel defining block 231 in the same cell group 230 in the direction perpendicular to the substrate 11 is different in shape. In one example, one cell group 230 includes 8 pixel defining blocks 231. By arranging the repeating units, the layout difficulty can be simplified, and the process is easy to realize.
It should be understood that the display panels shown in fig. 4a and 4b are only exemplified by RGB Dalta pixel arrangements, and the structure of the pixel defining layer 23 according to any embodiment of the present application is also applicable to other pixel arrangements.
Fig. 4c is a schematic diagram illustrating a partial top view of the display panel shown in fig. 4a according to another embodiment of the application. Two-dot chain line B in FIG. 4c 1 B 2 The corresponding section is shown in fig. 4 a. As shown in fig. 4c, the display panel provided according to the present embodiment is different from the display panel shown in fig. 4b in that, in the present embodiment, one pixel defining block 231 encloses and exposes two anode blocks 121, and the outline of the orthographic projection of the pixel defining block 231 on the array substrate is a random pattern.
In one example, the outline of the orthographic projection of the pixel defining block 231 on the array substrate is randomly zigzag. The saw teeth can be in the shape of broken line saw teeth, curved saw teeth, and can also comprise broken line saw teeth and curved saw teeth.
The colors of the sub-pixels corresponding to the anode blocks 121 surrounded by the different pixel defining blocks 231 may be the same or different. The positional relationship of the two anode blocks 121 surrounded by the different pixel defining blocks 231 may be the same or different. For example, as shown in fig. 4c, the positional relationship of the two anode blocks 121 enclosed by the different pixel defining blocks 231 is the same.
It should be understood that different pixel defining blocks 231 in the display panel may also be provided enclosing a different number of anode blocks 121. For example, a part of the pixel defining blocks 231 encloses 1 anode block 121, and the remaining pixel defining blocks 231 enclose 2 anode blocks 121.
Fig. 5 is a schematic diagram illustrating an internal structure of a display panel according to a third embodiment of the present application. As shown in fig. 5, the display panel 30 further includes a thin film encapsulation layer 16 on the basis of the display panel 20 shown in fig. 4a and 4b, the thin film encapsulation layer 16 filling the space between the adjacent pixel defining blocks 231.
Specifically, the thin film encapsulation layer 16 includes stacked organic layers and inorganic layers. For example, as shown in fig. 5, the thin film encapsulation layer 16 includes a first inorganic layer 161, an organic layer 162, and a second inorganic layer 163, which are sequentially stacked. The first inorganic layer 161 covers the cathode layer 15, the thickness of the first inorganic layer 161 is uniform, and the first inorganic layer 161 fills the space between the adjacent pixel defining blocks 231. The organic layer 162 covers the first inorganic layer 161, and a surface of the organic layer 162 remote from the first inorganic layer 161 is a flat surface. The second inorganic layer 163 covers the organic layer 162, and the second inorganic layer 163 has a uniform thickness.
The application also provides a preparation method of the display panel, which can be used for preparing the display panel provided by any embodiment. Fig. 6 is a flowchart of a method for manufacturing a display panel according to an embodiment of the application. Referring to fig. 4a, 4b, 5 and 6, the manufacturing method 600 of the display panel includes:
in step S610, the substrate 11 is provided. The substrate 11 may be an array substrate including a plurality of pixel driving units 110. The circuit configuration of the pixel driving unit 110 may be 2T1C, 3T2C, 7T1C,9T1C, or the like.
In step S620, an anode layer 12 is prepared on the substrate, the anode layer 12 including a plurality of anode blocks 121.
The anode layer is prepared by a patterning process. For example, first, an anode material layer is prepared by a vacuum coating process such as an evaporation process, a chemical vapor deposition process, etc.; and then, patterning the anode material layer by adopting a photoetching process to obtain the anode layer.
In step S630, the pixel defining layer 23 is prepared, the pixel defining layer 23 includes a plurality of pixel defining blocks 231 spaced from each other, each pixel defining block 231 encloses and exposes at least one anode block 121 to form a pixel opening, each pixel defining block 231 overlaps with the orthographic projection of the anode block 121 enclosed by the pixel defining block 231 in the direction perpendicular to the substrate 11, and the outline of the orthographic projection of the pixel defining block 231 on the array substrate is a random pattern.
In one embodiment, the distances m between the outer contour line L of the orthographic projection of the pixel defining block 231 on the array substrate and the edge line S of the anode block 121 surrounded thereby are randomly distributed, i.e., the distances m between the outer contour line L and the edge line S in the circumferential direction of the anode block 121 have an irregular variation tendency. The calculating process of the distance between the outer contour line L and the edge line S comprises the following steps: firstly, a first point on an edge line S is selected, a tangent is made at the first point, the normal line of the tangent and an outer contour line L are intersected at a second point, and the distance between the first point and the second point is the distance between the outer contour line L and the edge line S.
In an example, the outer contour line L of the orthographic projection of the pixel defining block 231 in the direction perpendicular to the substrate 11 is a random saw tooth line, and the saw tooth may be shaped as a broken line saw tooth or a curved saw tooth, or may include both broken line saw tooth and curved saw tooth.
In step S640, the light emitting layer 14 is prepared, and the light emitting layer 14 is located in the pixel opening. In an example, the light emitting layer 14 includes a plurality of light emitting cells 141, each light emitting cell 141 being located within one pixel opening and covering the anode block 121. In one embodiment, the luminescent layer 14 is prepared using an inkjet printing process.
In step S650, the cathode layer 15 is prepared, and the cathode layer 15 covers the light emitting layer 14 and the pixel defining layer 23. In one embodiment, the cathode layer is prepared using a vacuum coating process such as an evaporation process, a chemical vapor deposition process, or the like. Up to this point, the anode block 121, the light emitting unit 141, and the cathode layer 15 in each pixel opening form one sub-pixel 120, and a plurality of adjacent sub-pixels 120 constitute one pixel unit. Each pixel unit is connected to one pixel driving unit 110, and the pixel driving unit 110 is used for driving the pixel units to emit light.
In one embodiment, the manufacturing method 600 of the display panel further includes:
in step S660, the thin film encapsulation layer 16 is prepared, and the thin film encapsulation layer 16 fills the spaces between the pixel defining blocks 231. The thin film encapsulation layer 16 includes stacked organic and inorganic layers. For example, as shown in fig. 5, the thin film encapsulation layer 16 includes a first inorganic layer 161, an organic layer 162, and a second inorganic layer 163, which are sequentially stacked. The first inorganic layer 161 covers the cathode layer 15, the thickness of the first inorganic layer 161 is uniform, and the first inorganic layer 161 fills the space between the adjacent pixel defining blocks 231. The organic layer 162 covers the first inorganic layer 161, and a surface of the organic layer 162 remote from the first inorganic layer 161 is a flat surface. The second inorganic layer 163 covers the organic layer 162, and the second inorganic layer 163 has a uniform thickness.
Fig. 7 a-7 c are schematic diagrams illustrating the implementation of step S630 according to an embodiment of the application. As shown in fig. 7, step S630 is specifically performed as:
first, referring to fig. 7a, a pixel defining material layer 201 is prepared on a substrate 11, and the pixel defining material layer 201 covers an anode layer 12. In one embodiment, the material of the element defining material layer 201 is a black organic gel, and the transmittance of the black organic gel is greater than or equal to 20% and less than or equal to 50%.
Next, referring to fig. 7b, the pixel defining material layer 201 is patterned by using a first mask to obtain a plurality of pixel openings 202, where each pixel opening 202 exposes one anode block 121.
Next, referring to fig. 7c, the pixel defining material layer 201 is patterned by using a second mask to form a plurality of pixel defining blocks 231 spaced apart from each other, where each pixel defining block 231 defines one pixel opening 202, so as to obtain a pixel defining layer 23.
The preparation method of the display panel provided according to any embodiment of the present application and the display panel provided by any embodiment of the present application belong to the same inventive concept, and details not described in the preparation method embodiment may refer to the display panel embodiment, and are not repeated here.
The previous description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present application. Various modifications to these aspects will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other aspects without departing from the scope of the application. Thus, the present application is not intended to be limited to the aspects shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
It should be understood that the terms "first", "second", "third", "fourth", "fifth" and "sixth" used in the description of the embodiments of the present application are used for more clearly describing the technical solutions, and are not intended to limit the scope of the present application.
The foregoing description has been presented for purposes of illustration and description. Furthermore, this description is not intended to limit embodiments of the application to the form disclosed herein. Although a number of example aspects and embodiments have been discussed above, a person of ordinary skill in the art will recognize certain variations, modifications, alterations, additions, and subcombinations thereof.

Claims (10)

1. A display panel comprising a transparent display region, the transparent display region comprising:
an array substrate;
the light-emitting device layer is arranged on one side of the array substrate and comprises an anode layer, a light-emitting layer and a cathode layer which are stacked along the light-emitting direction of the light-emitting device layer, and the anode layer comprises a plurality of anode blocks which are arranged at intervals;
the pixel limiting layer comprises a plurality of pixel limiting blocks, each pixel limiting block is surrounded and exposes at least one anode block to form a pixel opening, and the light-emitting layer is arranged in the pixel opening;
the pixel limiting block is overlapped with the orthographic projection of the anode block on the array substrate, and the outline of the orthographic projection of the pixel limiting block on the array substrate is a random pattern.
2. The display panel of claim 1, wherein the outer contour of the pixel defining block is a random saw tooth line.
3. The display panel according to claim 1, wherein distances between an outer outline of orthographic projection of the pixel defining block on the array substrate and an outer outline of orthographic projection of the anode block enclosed by the pixel defining block on the array substrate are randomly distributed; the distance between the front projection outline of the pixel limiting block on the array substrate and the front projection outline of the anode block surrounded by the pixel limiting block on the array substrate is more than or equal to 2.5 micrometers and not more than 4 micrometers.
4. The display panel according to claim 1, wherein the material of the pixel defining layer is a black organic glue.
5. The display panel according to claim 1, wherein the plurality of pixel defining blocks are divided into a plurality of cell groups, and outer contours of the pixel defining blocks at respective positions in the cell groups are identical in shape.
6. The display panel of claim 1, further comprising a thin film encapsulation layer filling a space between adjacent ones of the pixel defining blocks.
7. The display panel of claim 1, wherein the plurality of anode blocks respectively correspond to a plurality of sub-pixels, the plurality of sub-pixels being arranged in a predetermined manner, the predetermined manner comprising: any of RGB arrangement, RGBW arrangement, RGB Delta arrangement, pentille arrangement, diamond arrangement.
8. A method for manufacturing a display panel, comprising:
providing an array substrate;
preparing an anode layer on the array substrate, wherein the anode layer comprises a plurality of anode blocks;
preparing a pixel limiting layer, wherein the pixel limiting layer comprises a plurality of pixel limiting blocks, each pixel limiting block surrounds and exposes at least one anode block to form a pixel opening, each pixel limiting block overlaps with the orthographic projection of the anode block surrounded by the pixel limiting block on the array substrate, and the outline of the orthographic projection of the pixel limiting block on the array substrate is a random pattern;
preparing a light emitting layer, wherein the light emitting layer is positioned in the pixel opening;
a cathode layer is prepared, the cathode layer covering the light emitting layer and the pixel defining layer.
9. The method of manufacturing a display panel according to claim 8, wherein the manufacturing a pixel defining layer includes a plurality of pixel defining blocks, each pixel defining block encloses and exposes at least one anode block to form a pixel opening, each pixel defining block overlaps with an orthographic projection of the anode block enclosed by the pixel defining block on the array substrate, and an outline of the orthographic projection of the pixel defining block on the array substrate is a random pattern, including:
preparing a pixel defining material layer on the array substrate, wherein the pixel defining material layer covers the anode layer;
patterning the pixel limiting material layer by adopting a first mask plate to obtain a plurality of pixel openings;
and patterning the pixel limiting material layer by adopting a second mask plate to form a plurality of pixel limiting blocks.
10. The method of manufacturing a display panel according to claim 8, further comprising:
a thin film encapsulation layer is prepared, which fills the spaces between the pixel defining blocks.
CN202110846410.8A 2021-07-26 2021-07-26 Display panel and preparation method thereof Active CN113488602B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110846410.8A CN113488602B (en) 2021-07-26 2021-07-26 Display panel and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110846410.8A CN113488602B (en) 2021-07-26 2021-07-26 Display panel and preparation method thereof

Publications (2)

Publication Number Publication Date
CN113488602A CN113488602A (en) 2021-10-08
CN113488602B true CN113488602B (en) 2023-10-03

Family

ID=77942804

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110846410.8A Active CN113488602B (en) 2021-07-26 2021-07-26 Display panel and preparation method thereof

Country Status (1)

Country Link
CN (1) CN113488602B (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110265452A (en) * 2019-06-25 2019-09-20 京东方科技集团股份有限公司 Display base plate and display device
CN110767674A (en) * 2018-08-06 2020-02-07 昆山维信诺科技有限公司 Display panel, display screen and display terminal
CN111326636A (en) * 2020-02-27 2020-06-23 京东方科技集团股份有限公司 Array substrate, manufacturing method thereof, display panel and display device
CN111816788A (en) * 2020-06-30 2020-10-23 昆山国显光电有限公司 Display panel and display device
CN112786813A (en) * 2021-02-05 2021-05-11 湖北长江新型显示产业创新中心有限公司 Display panel and display device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110767674A (en) * 2018-08-06 2020-02-07 昆山维信诺科技有限公司 Display panel, display screen and display terminal
CN110265452A (en) * 2019-06-25 2019-09-20 京东方科技集团股份有限公司 Display base plate and display device
CN111326636A (en) * 2020-02-27 2020-06-23 京东方科技集团股份有限公司 Array substrate, manufacturing method thereof, display panel and display device
CN111816788A (en) * 2020-06-30 2020-10-23 昆山国显光电有限公司 Display panel and display device
CN112786813A (en) * 2021-02-05 2021-05-11 湖北长江新型显示产业创新中心有限公司 Display panel and display device

Also Published As

Publication number Publication date
CN113488602A (en) 2021-10-08

Similar Documents

Publication Publication Date Title
CN110289298B (en) Display device, display panel thereof and transparent display panel
CN110767712B (en) OLED array substrate, display panel and display device
US20220028900A1 (en) Transparent display substrates, transparent display panels and display devices
CN110797385B (en) Display panel, display device and preparation method
EP4131453A1 (en) Display substrate, fabrication method therefor, and display device
CN109509779B (en) Pixel arrangement, organic light-emitting display panel comprising same and display device
CN117098422A (en) Display panel and electronic equipment
CN108321178B (en) Pixel structure, mask plate and display device
WO2019210629A1 (en) Display substrate and display apparatus
CN108630733B (en) Display panel
CN113921585B (en) Display panel and preparation method thereof
CN107402469B (en) Color film substrate and manufacturing method thereof, display panel and display device
CN115472658A (en) Display panel, preparation method thereof and display device
CN110634909A (en) Display substrate, display panel and display device
CN113299855B (en) Display device, display panel and manufacturing method thereof
CN113488602B (en) Display panel and preparation method thereof
CN110211996B (en) Pixel structure, display panel and display device
CN114843331A (en) Pixel arrangement structure and display device
JP4392113B2 (en) Organic electroluminescence display panel and organic electroluminescence display panel manufacturing method
WO2023108783A1 (en) Display panel and display device
CN115576442A (en) Display substrate and touch display device
CN117062489B (en) Display panel and display device
CN113097273B (en) Display panel and display device
CN215220728U (en) Pixel arrangement structure, display panel and display device
CN220326167U (en) Display panel, evaporation mask and display device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant