CN113471347A - LED embedded packaging substrate and manufacturing method thereof - Google Patents

LED embedded packaging substrate and manufacturing method thereof Download PDF

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Publication number
CN113471347A
CN113471347A CN202110530362.1A CN202110530362A CN113471347A CN 113471347 A CN113471347 A CN 113471347A CN 202110530362 A CN202110530362 A CN 202110530362A CN 113471347 A CN113471347 A CN 113471347A
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Prior art keywords
layer
transparent
led chip
metal
substrate
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CN202110530362.1A
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Chinese (zh)
Inventor
陈先明
冯磊
黄本霞
宝玥
洪业杰
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Nantong Yueya Semiconductor Co ltd
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Nantong Yueya Semiconductor Co ltd
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Priority to CN202110530362.1A priority Critical patent/CN113471347A/en
Publication of CN113471347A publication Critical patent/CN113471347A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52Encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64Heat extraction or cooling elements
    • H01L33/641Heat extraction or cooling elements characterized by the materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64Heat extraction or cooling elements
    • H01L33/647Heat extraction or cooling elements the elements conducting electric current to or from the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • H01L2933/005Processes relating to semiconductor body packages relating to encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • H01L2933/0066Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • H01L2933/0075Processes relating to semiconductor body packages relating to heat extraction or cooling elements

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)

Abstract

The present disclosure provides an LED embedded package substrate and a method of manufacturing the same. Specifically, the substrate includes: a transparent frame having opposing first and second surfaces with a through cavity therebetween; an LED chip disposed within the through cavity; a transparent encapsulation layer covering the LED chip and filling a gap between the transparent frame and the LED chip, wherein the transparent encapsulation layer is coplanar with the first surface; and a first wiring layer formed on the first surface and connected to electrode terminals of the LED chip.

Description

LED embedded packaging substrate and manufacturing method thereof
Technical Field
The disclosure relates to the technical field of semiconductor packaging, in particular to an LED embedded packaging substrate and a manufacturing method thereof.
Background
With the improvement of LED design and process technology, the brightness of LED illumination is continuously improved, and by virtue of the characteristics of environmental protection and energy conservation, the LED illumination has strong competition with the existing incandescent lamps, fluorescent lamps and halogen lamps. However, with the development requirements of Mini-LED and Micro-LED, the existing LED device packaging scheme is difficult to realize the miniaturization of LED packaging, and cannot ensure good light-emitting rate.
Disclosure of Invention
In view of the above, the present disclosure provides an LED embedded package substrate and a method for manufacturing the same.
In view of the above object, in a first aspect, the present disclosure provides an LED embedded package substrate, the substrate including:
a transparent frame having opposing first and second surfaces with a through cavity therebetween;
an LED chip disposed within the through cavity;
a transparent encapsulation layer covering the LED chip and filling a gap between the transparent frame and the LED chip, wherein the transparent encapsulation layer is coplanar with the first surface; and
a first wiring layer formed on the first surface and connected to electrode terminals of the LED chip.
In some embodiments, the substrate further comprises a second circuit layer on the second surface of the transparent frame.
In some implementations, the first and second line layers are electrically connected by a metal conductive via that penetrates the transparent frame.
In some embodiments, the second circuitry layer comprises a heat spreading layer in contact with the back side of the LED chip.
In some embodiments, the transparent frame is made of glass or silicone.
In some embodiments, the transparent encapsulation layer comprises a light sensitive transparent encapsulation material or a thermosetting transparent encapsulation material.
Optionally, the photosensitive transparent packaging material is selected from polyimide photosensitive resin or polyphenyl ether photosensitive resin; the thermosetting transparent packaging material is selected from polybenzocyclobutene or polyparaphenylene benzobisoxazole.
In some embodiments, at least two LED chips are disposed within one through cavity. The at least two LED chips may be connected in parallel through the first line layer.
In a second aspect, a method for manufacturing an LED embedded package substrate is provided, which includes the following steps:
a) preparing a transparent frame including a through cavity; wherein the transparent frame has opposing first and second surfaces; the through cavity is positioned between the first surface and the second surface;
b) placing a second surface of the transparent frame on a carrier;
c) an LED chip is arranged in the through cavity, wherein the back surface of the LED chip is attached to the bearing piece;
d) applying a transparent encapsulation layer on a first surface of the transparent frame such that the transparent encapsulation layer covers the LED chip and fills a gap between the transparent frame and the LED chip; opening the transparent packaging layer to form an electrode opening window exposing the electrode of the LED chip; removing the carrier;
e) and forming a first circuit layer on the transparent packaging layer, wherein the first circuit layer is connected with the electrode terminal of the LED chip by virtue of an electrode windowing.
In some embodiments, step a) further comprises preparing a through via through the transparent frame.
In some embodiments, the carrier is selected from the group consisting of a pyrolytic or photolytic tape, a sacrificial copper foil coated with a pyrolytic or photolytic adhesive on a surface, a glass carrier plate, or a single-sided copper clad plate.
In some embodiments, step d) further comprises:
applying a photosensitive transparent encapsulation layer on the first surface;
exposing and developing the photosensitive transparent packaging layer, and forming an electrode window for exposing the electrode of the LED chip by opening a hole;
removing the carrier.
In some embodiments, step d) further comprises:
applying a thermosetting transparent encapsulation layer on the first surface;
laser or mechanical hole opening is carried out on the thermosetting transparent packaging layer to form an electrode window exposing the electrode of the LED chip;
removing the carrier.
In some embodiments, step e) further comprises:
forming a seed layer on the transparent packaging layer, wherein the seed layer covers the electrode window;
electroplating metal on the seed layer to form a first metal layer;
and applying photoresist on the first metal layer, and etching the first metal layer by a photoetching method to form the first circuit layer.
In some embodiments, step e) further comprises:
and filling metal in the through hole to form a metal conduction column, and forming a second circuit layer on the second surface of the transparent frame, wherein the first circuit layer and the second circuit layer are connected through the metal conduction column.
In some embodiments, said step e) further comprises:
forming a seed layer on the transparent encapsulation layer and the second surface, wherein the seed layer covers the electrode window and the through hole;
electroplating metal on the seed layer to form a first metal layer on the transparent packaging layer and a second metal layer on the second surface respectively and fill the metal conduction column formed by the through hole;
applying photoresist on the first metal layer and the second metal layer, and etching the first metal layer and the second metal layer by a photoetching method to form a first circuit layer and a second circuit layer respectively, so that the first circuit layer and the second circuit layer are connected through the metal conduction column.
In some embodiments, the second circuitry layer further comprises a heat spreading layer, and the back side of the LED chip is in contact with the heat spreading layer.
Drawings
In order to more clearly illustrate the technical solutions in the present disclosure or related technologies, the drawings needed to be used in the description of the embodiments or related technologies are briefly introduced below, and it is obvious that the drawings in the following description are only embodiments of the present disclosure, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic diagram of an LED package structure provided in the prior art;
FIG. 2 is a schematic diagram of yet another LED package structure provided by the prior art;
fig. 3 is a cross-sectional view of an LED embedded package substrate according to an embodiment of the disclosure;
FIG. 4 is a top view of the LED embedded package substrate shown in FIG. 3;
fig. 5a to 5h are schematic intermediate structures of a manufacturing process of an LED embedded package substrate according to an embodiment of the disclosure.
Detailed Description
For the purpose of promoting a better understanding of the objects, aspects and advantages of the present disclosure, reference is made to the following detailed description taken in conjunction with the accompanying drawings.
It is to be noted that, unless otherwise defined, technical or scientific terms used herein shall have the ordinary meaning as understood by those of ordinary skill in the art to which this disclosure belongs. The use of "first," "second," and similar terms in this disclosure is not intended to indicate any order, quantity, or importance, but rather is used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", and the like are used merely to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationships may also be changed accordingly.
In the prior art, there are two main ways for packaging an LED chip: and (5) carrying out bracket routing packaging and flip packaging. Fig. 1 shows a solution of the bracket wire bonding package. Specifically, the LED chip 104 'is disposed inside the concave cup 101' of the support, and is electrically connected to the package support 100 'by wire bonding, and then packaged by the package glue 103' coated with phosphor. The LED chip is placed on the surface of the support 100 ', and the wire bonding and the existence of the support concave cup 101' increase the volume of the packaging body, so that the requirement of miniaturization of the packaging body is difficult to meet. Moreover, since the package support 100 ' and the support concave cup 101 ' are not made of transparent materials, the LED chip 104 ' can emit light only from the top surface after being packaged, which affects the light-emitting efficiency. Fig. 2 shows a flip-chip packaging solution. Specifically, an optical anti-reflection film layer 4 ' is directly manufactured on a substrate 5 ' through a vapor deposition technology, a metal circuit layer 3 ' is manufactured on the optical anti-reflection film layer 4 ' through the vapor deposition technology, then an LED chip 2 ' is inversely welded on the metal circuit layer 3 ', and finally the LED chip is packaged by a fluorescent glue layer 1 '. The packaging mode is to package the LED chip 2 'on the surface of the substrate 5', the stacked arrangement increases the volume of the package, and the efficiency of flip-chip bonding of the LED chip is relatively low.
Particularly, the Mini-LED is also used as a backlight source, so that higher heat intensity is brought in the process of meeting the requirement of further upgrading the Mini-LED backlight, and the heat dissipation requirement of the product is correspondingly higher. Heat not only affects the brightness of the LED, but may also change the color of the emitted light, causing the LED to fail. However, the conventional LED display and backlight adopts the PCB substrate, which has a limit in heat dissipation performance and cannot be infinitely thinned — especially when facing a large-sized LED single screen or liquid crystal backlight display, the thermal deformation of the PCB ultra-thinning and the LED crystal itself "form an unprecedented contradiction" with the miniaturization of the integration process thereof.
Thus, the present disclosure provides an LED embedded package substrate. Fig. 3 is a cross-sectional view of an LED embedded package substrate according to an embodiment of the disclosure, and fig. 4 is a top view of the LED embedded package substrate shown in fig. 3. As shown, the LED embedded package substrate 800 includes a transparent frame 100 having first and second opposing surfaces (not labeled); a through cavity 101 is arranged between the first surface and the second surface; the LED chip 201 is arranged in the through cavity 101; the transparent encapsulating layer 301 covers the electrode end faces of the LED chips 201 and the first surface of the transparent frame 100, and fills the gap between the transparent frame 100 and the LED chips 201; the first wiring layer 601 is disposed on the transparent encapsulation layer 301 and connected to the electrode terminals of the LED chip 201 through the electrode windows.
The electrode end face refers to a surface of the LED chip 201 on which the electrode terminal is provided, and for example, the electrode end face of the LED chip is a surface facing the back surface thereof.
According to the LED embedded packaging substrate provided by the disclosure, the LED chip 201 is arranged in the through cavity 101 of the transparent frame 100, and then the transparent packaging layer 301 is combined to embed the LED chip in the transparent frame 100, so that the size of a packaging body is reduced, and the packaging miniaturization of the LED chip 201 is realized. Meanwhile, the transparent frame 100 and the transparent packaging layer 301 can realize multi-angle light emission of the LED chip, and the light-emitting rate of the LED chip 201 is improved. In addition, the electrode terminals connected with the LED chip 201 through the first circuit layer 601 can obtain a fan-out configuration, so as to realize panel-level fan-out, which is beneficial to improving the processing efficiency and reducing the processing cost.
As shown in fig. 3, the substrate 800 may further include a second circuit layer 602, and the second circuit layer 602 is located on the second surface of the transparent frame 100. The first circuit layer 601 and the second circuit layer 602 are located on two sides of the transparent frame 100 and are connected to each other through the metal conductive via 603, so that the circuit layer of the LED substrate has a larger design space, and the flexibility of wiring is improved.
The metal conductive via 603 may be a copper pillar. The metal conductive column 603 can connect the first circuit layer 601 and the second circuit layer 602, and can be used for heat conduction as a heat conduction structure, so that the heat dissipation efficiency of the substrate is improved.
Optionally, the second circuit layer 602 may include a heat dissipation layer. The heat dissipation layer can be a heat dissipation copper layer directly contacted with the back surface of the LED chip, and can quickly conduct heat generated by the LED chip to the outside. The heat dissipation layer can obviously increase the heat dissipation area and improve the heat dissipation effect.
In some embodiments, the transparent frame 100 is made of glass or hard silicone. Optionally, the shore hardness of the hard silicone rubber is greater than or equal to 60. The glass, the hard silica gel and the LED chip are closer to each other in the thermal effect deformation coefficient, and the LED chip is packaged in a transparent frame made of the glass or the hard silica gel, so that the product reliability is better.
In some embodiments, transparent encapsulation layer 301 is made of a photosensitive transparent encapsulation material or a thermosetting transparent encapsulation material. Alternatively, the photosensitive transparent encapsulating material is selected from polyimide photosensitive resins or polyphenylene ether photosensitive resins, such as Microsystems HD-4100, Hitachi PVF-02, and the like. Optionally, the thermosetting transparent packaging material is selected from benzocyclobutene (BCBG) or poly-p-Phenylene Benzobisoxazole (PBO).
At least two LED chips 201 may be simultaneously disposed in the through cavity 101, and fig. 3 and 4 show that 3 LED chips 201 are simultaneously disposed. The disclosed embodiment is not limited thereto, and the number and type of the LED chips 201 may be determined according to the size of the through cavity, the structure of the LED chips, the use of the substrate, and the like. The plurality of LED chips 201 are arranged in the same penetrating cavity 101, so that the density of the LED chips can be increased, and the space utilization rate is improved. Optionally, the at least two LED chips 201 are connected in parallel through the first circuit layer to ensure that each LED chip can work normally. The arrangement of at least two LED chips 201 may be embedded side by side or mixed, and is not limited herein. Fig. 3 and 4 show that 3 LED chips 201 are embedded side by side.
Fig. 5a-5h show schematic diagrams of intermediate structures of steps in the method of manufacturing the LED-embedded package substrate 800 shown in fig. 3.
As shown in fig. 5a to 5h, the method for manufacturing the LED embedded package substrate includes the following steps:
as shown in fig. 5a and its top view 5b, a transparent frame 100 including a through cavity 101 and a through via 102 is prepared (step a). Wherein the transparent frame 100 has a first surface 103 and a second surface 104 opposite to each other; the through cavity 101 and the through via 102 are located between the first surface 103 and the second surface 104.
Fig. 5a and 5b show one through-cavity 101 and two through-holes 102. It should be understood that the number and distribution of the through cavities 101 and the through holes 102 may be designed according to actual requirements. The through cavities 101 may be rectangular, prismatic, trapezoidal, etc.
Here, the transparent frame 100 is made of glass or hard silicone. The thickness of the transparent frame 100 may be determined according to actual requirements.
Optionally, a glass plate is provided, which comprises a first surface 103 and a second surface 104 opposite to each other, and the through cavity 101 and the through via 102 are prepared between the first surface 103 and the second surface 104 by means of laser and/or etching. Alternatively, the etching agent may be hydrofluoric acid.
Next, as shown in fig. 5c and its top view 5d, the second surface 104 of the transparent frame 100 is placed on the carrier 202 (step b). The carrier 202 may be an adhesive tape, such as a pyrolytic or photolytic adhesive tape, a sacrificial copper foil coated with a pyrolytic or photolytic adhesive, a glass carrier, or a single-sided copper clad laminate.
Then, as shown in fig. 5c and a plan view 5d thereof, the back surface of the LED chip 201 is attached to the carrier 202 exposed through the cavity 101 (step c). Here, the carrier 202 serves to adhere and temporarily support the LED chip 201. As mentioned above, the LED chips 201 may be single, multiple, side by side, or mixed. It should be noted that the arrangement of the plurality of LED chips 201 may be satisfied to implement parallel connection after wiring.
Next, as shown in fig. 5e, a transparent encapsulation layer 301 embedding the LED chip 201 is formed on the first surface of the transparent frame 100. The transparent encapsulation layer 301 is opened to expose the conductive via 303 and the electrode opening 302. The via hole 303 is located in the through via 102 (step d).
The material of the transparent encapsulating layer 301 may be a photosensitive transparent encapsulating material or a thermosetting transparent encapsulating material.
As an optional scheme, the step d) specifically includes: applying a photosensitive transparent encapsulation layer 301 on the first surface; so that the transparent encapsulation layer 301 fills the through via 102 and the gap between the LED chip 201 and the transparent frame 100; then, windowing is carried out through exposure and development to form a conductive through hole 303 and an electrode windowing 302; then, the carrier 202 is removed. Here, the electrode terminals of the LED chip 201 are exposed by the electrode windows 302. Here, the LED chip 201 is encapsulated with a photosensitive type transparent encapsulating material. Alternatively, the photosensitive transparent encapsulating material may be a polyimide photosensitive resin or a polyphenylene ether photosensitive resin.
Alternatively, step d) may further comprise: applying a thermosetting transparent encapsulating material on the first surface; then, forming a conductive via hole 303 and an electrode window 302 through laser or mechanical hole opening; then, the carrier 202 is removed. Here, the LED chip is encapsulated with a thermosetting transparent encapsulating material. Alternatively, the thermosetting transparent encapsulating material may be benzocyclobutene (BCBG) or Polyparaphenylene Benzobisoxazole (PBO).
Then, as shown in fig. 5f-5h, a metal via 603 is formed by filling a metal, such as copper, in the via hole 303, a first circuit layer 601 is formed on the transparent packaging layer 301, and a second circuit layer 602 is formed on the exposed second surface of the removed carrier 202, wherein the first circuit layer 601 is connected to the electrode terminal of the LED chip 201 via the electrode opening 302 (step e).
In some embodiments, step e) specifically comprises:
as shown in fig. 5f, a seed layer 401 is formed on both sides of the structure obtained in step d), the seed layer 401 covering the inside of the via hole 303 and the electrode window 302.
Optionally, a seed layer 401 is formed on both sides of the structure of step d). The seed layer 401 can be formed by deposition, electroless plating, or ion sputtering. The metal of the seed layer 401 may be selected from, for example, titanium, copper, and titanium tungsten alloy, but is not limited thereto.
Next, as shown in fig. 5g, metal is electroplated on the seed layer 401 to form a first metal layer 501, a second metal layer 502, and a metal via 603 in the via hole 303. The metal to be plated may be, for example, copper, a titanium copper alloy, or the like, and is not limited thereto. The first metal layer 501 is located on the first surface side, and the second metal layer 502 is located on the second surface side. The thickness of the plated metal can be adjusted according to the requirement of the thickness of the circuit, and is not limited herein.
Then, as shown in fig. 5h, photoresist may be applied on the surfaces of the first metal layer 501 and the second metal layer 502, respectively, and after exposure and development, etching is performed to form a first circuit layer 601 and a second circuit layer 602, respectively.
Alternatively, the first wiring layer 601 includes connection lines connected in parallel between electrode terminals of the plurality of LED chips 201. The second circuit layer 602 includes a heat dissipation layer; the back surface of the LED chip 201 is in close contact with the heat dissipation layer, so that heat generated by the LED chip 201 is transferred to the outside, and the heat dissipation efficiency is improved.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, is limited to these examples; within the idea of the present disclosure, also technical features in the above embodiments or in different embodiments may be combined, steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present disclosure as described above, which are not provided in detail for the sake of brevity.
The disclosed embodiments are intended to embrace all such alternatives, modifications and variances which fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalents, improvements, and the like that may be made within the spirit and principles of the embodiments of the disclosure are intended to be included within the scope of the disclosure.

Claims (18)

1. An LED embedded package substrate, wherein the substrate comprises:
a transparent frame having opposing first and second surfaces with a through cavity therebetween;
an LED chip disposed within the through cavity;
a transparent encapsulation layer covering the LED chip and filling a gap between the transparent frame and the LED chip, wherein the transparent encapsulation layer is coplanar with the first surface; and
a first wiring layer formed on the first surface and connected to electrode terminals of the LED chip.
2. The substrate of claim 1, wherein the substrate further comprises a second circuit layer on a second surface of the transparent frame.
3. The substrate of claim 2, wherein the first and second line layers are electrically connected by a metal conductive via that penetrates the transparent frame.
4. The substrate of claim 2, wherein the second circuitry layer comprises a heat spreading layer in contact with the back side of the LED chip.
5. The substrate of claim 1, wherein the transparent frame is made of glass or silicone.
6. The substrate of claim 1, wherein the transparent encapsulation layer comprises a photo-sensitive transparent encapsulation material or a thermosetting transparent encapsulation material.
7. The substrate according to claim 6, wherein the photosensitive transparent encapsulating material is selected from a polyimide photosensitive resin or a polyphenylene ether photosensitive resin; the thermosetting transparent packaging material is selected from polybenzocyclobutene or polyparaphenylene benzobisoxazole.
8. The substrate of claim 1, wherein at least two LED chips are disposed in one through cavity.
9. The substrate of claim 8, wherein the at least two LED chips are connected in parallel by the first circuit layer.
10. A manufacturing method of an LED embedded packaging substrate comprises the following steps:
a) preparing a transparent frame including a through cavity; wherein the transparent frame has opposing first and second surfaces; the through cavity is positioned between the first surface and the second surface;
b) placing a second surface of the transparent frame on a carrier;
c) an LED chip is arranged in the through cavity, wherein the back surface of the LED chip is attached to the bearing piece;
d) applying a transparent encapsulation layer on a first surface of the transparent frame such that the transparent encapsulation layer covers the LED chip and fills a gap between the transparent frame and the LED chip; opening the transparent packaging layer to form an electrode opening window exposing the electrode of the LED chip; removing the carrier;
e) and forming a first circuit layer on the transparent packaging layer, wherein the first circuit layer is connected with the electrode terminal of the LED chip by virtue of an electrode windowing.
11. The manufacturing method according to claim 10, wherein step a) further comprises preparing a through via hole penetrating the transparent frame.
12. The manufacturing method according to claim 10, wherein the carrier is selected from the group consisting of a pyrolytic or photolytic tape, a sacrificial copper foil coated with a pyrolytic or photolytic adhesive on the surface, a glass carrier plate, and a single-sided copper clad plate.
13. The method of manufacturing of claim 10, wherein step d) further comprises:
applying a photosensitive transparent encapsulation layer on the first surface;
exposing and developing the photosensitive transparent packaging layer, and forming an electrode window for exposing the electrode of the LED chip by opening a hole;
removing the carrier.
14. The method of manufacturing of claim 10, wherein step d) further comprises:
applying a thermosetting transparent encapsulation layer on the first surface;
laser or mechanical hole opening is carried out on the thermosetting transparent packaging layer to form an electrode window exposing the electrode of the LED chip;
removing the carrier.
15. The method of manufacturing of claim 10, wherein step e) further comprises:
forming a seed layer on the transparent packaging layer, wherein the seed layer covers the electrode window;
electroplating metal on the seed layer to form a first metal layer;
and applying photoresist on the first metal layer, and etching the first metal layer by a photoetching method to form the first circuit layer.
16. The method of manufacturing of claim 11, wherein step e) further comprises:
and filling metal in the through hole to form a metal conduction column, and forming a second circuit layer on the second surface of the transparent frame, wherein the first circuit layer and the second circuit layer are connected through the metal conduction column.
17. The method of manufacturing of claim 16, wherein step e) further comprises:
forming a seed layer on the transparent encapsulation layer and the second surface, wherein the seed layer covers the electrode window and the through hole;
electroplating metal on the seed layer to form a first metal layer on the transparent packaging layer and a second metal layer on the second surface respectively and fill the metal conduction column formed by the through hole;
applying photoresist on the first metal layer and the second metal layer, and etching the first metal layer and the second metal layer by a photoetching method to form a first circuit layer and a second circuit layer respectively, so that the first circuit layer and the second circuit layer are connected through the metal conduction column.
18. The manufacturing method of claim 17, wherein the second wiring layer further comprises a heat dissipation layer, and the back surface of the LED chip is in contact with the heat dissipation layer.
CN202110530362.1A 2021-05-14 2021-05-14 LED embedded packaging substrate and manufacturing method thereof Pending CN113471347A (en)

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