CN113471063A - Preparation method of InGaN single layer - Google Patents
Preparation method of InGaN single layer Download PDFInfo
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- CN113471063A CN113471063A CN202110754202.5A CN202110754202A CN113471063A CN 113471063 A CN113471063 A CN 113471063A CN 202110754202 A CN202110754202 A CN 202110754202A CN 113471063 A CN113471063 A CN 113471063A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02458—Nitrides
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/301—AIII BV compounds, where A is Al, Ga, In or Tl and B is N, P, As, Sb or Bi
- C23C16/303—Nitrides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
Abstract
The present disclosure provides a method for preparing an InGaN single layer, comprising: growing a GaN nucleating layer on the substrate; annealing the GaN nucleating layer; growing a GaN epitaxial layer in the GaN nucleating layer after annealing treatment, and introducing TMIn in the process of growing the GaN epitaxial layer; introducing NH on the GaN epitaxial layer3TMGa and TMIn, resulting in an InGaN monolayer. According to the preparation method of the InGaN single layer, the quality of the InGaN single layer is improved and enhanced on the premise of guaranteeing the promotion of indium components in the InGaN by reducing the incorporation of unintentionally doped gallium sources.
Description
Technical Field
The disclosure relates to the technical field of epitaxial growth of semiconductor materials, in particular to a preparation method of an InGaN single layer.
Background
The InGaN material is widely applied to photoelectric devices such as GaN-based lasers, detectors, solar cells and the like, and has high practical value.
The InGaN growth method in the prior art is mainly based on an organic metal chemical vapor deposition device (MOCVD device), and realizes InGaN growth by providing a nitrogen source by ammonia gas, providing a gallium source by TMGa and providing an indium source by TMIn at a certain temperature. Because the bond energy of In-N is weak, the actual growth temperature is generally controlled within 600-800 ℃, the In-N is decomposed due to the ultra-high temperature of about 1100 ℃, the indium In InGaN is rapidly reduced, and even only GaN can be grown.
After the conventional MOCVD equipment grows the GaN material, more unintentionally doped gallium sources inevitably remain in a chamber of the MOCVD equipment, and the gallium sources participate in the growth reaction of InGaN together with the subsequently introduced TMGa. However, this process tends to result in poor quality of the above-mentioned unintentionally doped gallium source, since many impurities are present in the form of polymers having low mobility.
Disclosure of Invention
Technical problem to be solved
Based on the above research, the present disclosure proposes a method for preparing an InGaN single layer, to at least solve the above problems in the prior art.
(II) technical scheme
In order to achieve the above object, the present disclosure provides a method for preparing an InGaN single layer, including:
growing a GaN nucleating layer on the substrate;
annealing the GaN nucleating layer;
growing a GaN epitaxial layer in the GaN nucleating layer after annealing treatment, and introducing TMIn in the process of growing the GaN epitaxial layer;
introducing NH on the GaN epitaxial layer3TMGa and TMIn, resulting in an InGaN monolayer.
In some embodiments of the present disclosure, the flow rate of the TMIn is 20 to 30 μmol/min.
In some embodiments of the present disclosure, the TMIn is gaseous.
In some embodiments of the present disclosure, the growth temperature of the GaN nucleation layer is: 520 ℃ to 560 ℃.
In some embodiments of the present disclosure, the substrate material is Al2O3SiC or Si or a combination thereof.
In some embodiments of the present disclosure, the growth temperature of the GaN epitaxial layer is: 1000 ℃ to 1200 ℃.
In some embodiments of the present disclosure, the temperature at which the growth yields an InGaN monolayer is: 600-800 ℃.
In some embodiments of the present disclosure, the annealing temperature of the GaN nucleation layer is: 1000-1200 deg.C
In some embodiments of the present disclosure, during the growing of the GaN epitaxial layer within the annealed GaN nucleation layer, turning on the TMGa source provides a gallium source for the growth of the GaN epitaxial layer.
(III) advantageous effects
According to the technical scheme, the preparation method of the InGaN single layer disclosed by the invention at least has one or part of the following beneficial effects:
according to the preparation method of the InGaN single layer, the quality of the InGaN single layer is improved and enhanced on the premise of guaranteeing the promotion of indium components in the InGaN by reducing the incorporation of unintentionally doped gallium sources.
Drawings
Fig. 1 is a flow chart of a method of fabricating an InGaN monolayer in an embodiment of the present disclosure;
FIG. 2 is a graph of the intensity of the interference curve and growth temperature over time for sample 1 of InGaN monolayer;
FIG. 3 is a graph of the intensity of the interference curve and growth temperature over time for sample 2 of an InGaN monolayer;
FIG. 4 is the results of an omega-2theta scan of InGaN monolayer sample 1 and sample 2 in the 002 plane direction;
FIG. 5 is the results of an omega scan of InGaN monolayer sample 1 and sample 2 in the 002 plane direction;
fig. 6 is PL test results for InGaN monolayer sample 1 at a temperature of 30K;
fig. 7 is the PL test results for InGaN monolayer sample 2 at a temperature of 30K;
FIG. 8 is an AFM surface topography (2X 2 μm) of InGaN single layer sample 12)；
FIG. 9 is an AFM surface topography (2X 2 μm) of InGaN single layer sample 22)；
Fig. 10 is a histogram of the depth percentage distribution of InGaN monolayer samples 1 and 2.
Detailed Description
The present disclosure provides a method for preparing an InGaN single layer, comprising: growing a GaN nucleating layer on the substrate; annealing the GaN nucleating layer; growing a GaN epitaxial layer in the annealed GaN nucleating layer, and introducing TMIn in the process of growing the GaN epitaxial layer; introducing NH on the GaN epitaxial layer3TMGa and TMIn, resulting in an InGaN monolayer. The method improves and improves the quality of the InGaN single layer by reducing the incorporation of the unintentionally doped gallium source on the premise of ensuring the improvement of the indium component in the InGaN, is simple to operate, only needs to additionally introduce a certain amount of TMIn when the high-temperature GaN layer grows, and is simple and easy to operate.
For the purpose of promoting a better understanding of the objects, aspects and advantages of the present disclosure, reference is made to the following detailed description taken in conjunction with the accompanying drawings. This disclosure may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity, and like reference numerals designate like elements throughout.
Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood that the description is illustrative only and is not intended to limit the scope of the present disclosure. In the following detailed description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the embodiments of the disclosure. It may be evident, however, that one or more embodiments may be practiced without these specific details. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present disclosure.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. The terms "comprises," "comprising," and the like, as used herein, specify the presence of stated features, steps, operations, and/or components, but do not preclude the presence or addition of one or more other features, steps, operations, or components.
All terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art unless otherwise defined. It is noted that the terms used herein should be interpreted as having a meaning that is consistent with the context of this specification and should not be interpreted in an idealized or overly formal sense.
Where a convention analogous to "at least one of A, B and C, etc." is used, in general such a construction is intended in the sense one having skill in the art would understand the convention (e.g., "a system having at least one of A, B and C" would include but not be limited to systems that have a alone, B alone, C alone, a and B together, a and C together, B and C together, and/or A, B, C together, etc.). Where a convention analogous to "A, B or at least one of C, etc." is used, in general such a construction is intended in the sense one having skill in the art would understand the convention (e.g., "a system having at least one of A, B or C" would include but not be limited to systems that have a alone, B alone, C alone, a and B together, a and C together, B and C together, and/or A, B, C together, etc.).
Conventional MOCVD tools inevitably leave a lot of unintentionally doped gallium sources in the chamber after the GaN material is grown. These gallium sources will participate in the InGaN growth reaction with the TMGa subsequently introduced. However, unintentionally doped gallium sources are generally considered to be of poor quality, mainly because of the high amount of impurities and the high presence of polymers with low mobility. Reducing the incorporation of this portion of the unintentionally doped gallium source could theoretically improve the quality of the InGaN material.
The present disclosure provides a method for preparing an InGaN single layer, as shown in fig. 1, including operations S1 to S5:
operation S1: a GaN nucleation layer is grown on the substrate.
Operation S2: and annealing the GaN nucleating layer.
Operation S3: and growing a GaN epitaxial layer in the GaN nucleating layer after annealing treatment, and introducing TMIn in the process of growing the GaN epitaxial layer.
Operation S4: introducing NH on the GaN epitaxial layer3TMGa and TMIn, resulting in an InGaN monolayer.
In operation S1, the substrate material is sapphire, SiC or Si, or a combination thereof, and the growth temperature of the GaN nucleation layer is: 520 ℃ to 560 ℃.
In operation S3, the growth temperature of the GaN epitaxial layer is 1000 ℃ to 1200 ℃.
In operation S4, TMIn is in a gaseous state and is introduced at a flow rate of 20-30 μmol/min, and the TMIn can be used as an indium source for InGaN single layer growth.
The temperature at which the InGaN monolayer is grown in operation S4 is: 600-800 ℃.
In operation S2, the GaN nucleation layer is annealed at a temperature of 1000 to 1200 ℃.
And in the process of growing the GaN epitaxial layer in the annealed GaN nucleating layer, switching on a TMGa source to provide a gallium source for the growth of the GaN epitaxial layer.
The first embodiment is as follows:
the following detailed description of the preparation method of the InGaN single layer is provided in connection with the specific growth example of the InGaN single layer, and the specific steps are as follows:
firstly, a GaN nucleating layer is grown on a sapphire GaN-based material substrate in a low-temperature environment of 540 ℃ in MOCVD equipment.
And then, carrying out rapid thermal annealing treatment on the GaN nucleating layer, wherein the annealing temperature is controlled to be about 1100 ℃, and growing a GaN epitaxial layer at a high temperature, namely growing a GaN buffer layer by a traditional two-step method (high-low temperature method). TMIn with the flow rate of 25 mu mol/min is additionally introduced near the end of the high-temperature growth of the GaN epitaxial layer. The temperature of the high-temperature grown GaN layer needs to provide enough energy to break the In-N bonds so that InGaN cannot be grown substantially. The high temperature (1100 ℃) corresponding to the conventional two-step growth is sufficient.
And secondly, introducing TMGa, TMIn and ammonia gas to grow an InGaN single layer on the GaN layer at the temperature of 600-800 ℃ according to a conventional growth method.
In the above steps, the flow rate and time of introducing TMIn can be adjusted according to the difference of different MOCVD equipment conditions. Generally, the TMIn supply time is appropriately extended and the flow rate of TMIn is increased in order to displace as much of the gallium source remaining in the chamber as possible.
InGaN growth relies on ammonia gas to provide a nitrogen source, TMGa to provide a gallium source, and TMIn to provide an indium source for growth at a certain temperature. Because the bond energy of In-N is weak, the actual growth temperature is generally controlled to be around 600 ℃ and 800 ℃. The ultra high temperature (about 1100 ℃) causes In-N to decompose and indium In InGaN to drop sharply and even grow only GaN.
Because the bond energy of InN in the InGaN material is very weak, the InGaN material cannot grow at 1100 ℃. However, TMIn is introduced in advance, and the activity of gallium metal is higher than that of indium metal, so that the residual unintentionally doped low-quality gallium source in the reaction chamber can be taken out. By reducing the incorporation of this portion of unintentionally doped gallium source, the quality of the InGaN monolayer can be improved on the premise of increasing the indium component in the InGaN.
Example two:
to fully demonstrate the effectiveness of the method of making InGaN monolayers in the present disclosure, reference is now made in detail to the following examples.
The specific contents of this example are as follows:
operation S6: the GaN nucleating layer is grown on the sapphire at low temperature of about 540 ℃, and then rapid thermal annealing is carried out at high temperature, and then high-temperature GaN is grown at high temperature of about 1100 ℃. An InGaN monolayer was finally grown and recorded as sample 1.
Operation S7: a GaN nucleation layer is grown on sapphire at a low temperature of about 540 c, followed by rapid thermal annealing at a high temperature, followed by growth of high temperature GaN at about 1100 c (the same conditions as in operation S6), with an additional amount of TMIn being introduced during the high temperature GaN growth process, and recorded as sample 2.
Operation S8: the intensity of the interference curve and the temperature of the samples 1 and 2 were measured as a function of time with light of about 633nm, as shown in FIGS. 2 and 3. In fig. 2, the ordinate value points such as b and d are extreme points, and c is an extreme point. It can be seen that b to c and c to d are 707.7s and 1184.8s respectively in use, i.e. the reaction rate is fast first and slow later, which is a side evidence of the involvement of the depleted gallium source in the reaction. A, c, e, f in fig. 2 and 3 are all extreme points. And times a to c in fig. 2 and e to f in fig. 3 are 1129.2s and 1900.5s, respectively. Demonstrating that the new method employed in sample 2 does reduce the reaction rate, which is a side-evidence of the new method removing the extra gallium source.
Operation S9: the omega-2theta curve was obtained using HRXRD scanning of the 002 face as shown in FIG. 4. Wherein, the crystal face index is 002 face, and the omega-2theta curve in the direction reflects the distribution condition of the lattice constant c.
From FIG. 4, sample 2 can be seen
The thickness fringes are clearer, indicating better crystal quality, and the calculated indium composition is 5.964% and 6.615%, respectively.
Fig. 5 shows the results of the 002 plane Omega scan, and the full widths at half maximum of InGaN of sample 1 and sample 2 are 296.86arcsec and 293.79arcsec, respectively. Fig. 6 and 7 show InGaN full width at half maximum at 9.679nm and 9.296nm for sample 1 and sample 2 in fig. 6 and 7, respectively, at a temperature of 30K. The full widths at half maximum for both tests are slightly smaller, and the smaller full width at half maximum in the PL test results for sample 2 in fig. 7 represents fewer defects and the like.
Fig. 8 and 9 are two-dimensional surface topography maps obtained by AFM testing of sample 1 and sample 2, respectively, and fig. 10 is a histogram of the percentage of height distribution of InGaN single layer sample 1 and sample 2 transformed by the testing software. The roughness of the two samples was 0.574nm and 0.293nm, respectively. It can be seen that the surface topography of sample 2 would also be better, with lower roughness and less pit density. These test results all indicate that sample 2 material quality is improved. Also, the indium composition of sample 2 was improved as a result of XRD and PL tests.
It should also be noted that directional terms, such as "upper", "lower", "front", "rear", "left", "right", and the like, used in the embodiments are only directions referring to the drawings, and are not intended to limit the scope of the present disclosure. Throughout the drawings, like elements are represented by like or similar reference numerals. In the event of possible confusion for understanding of the present disclosure, conventional structures or configurations will be omitted, and the shapes and sizes of the components in the drawings do not reflect actual sizes and proportions, but merely illustrate the contents of the embodiments of the present disclosure.
Unless otherwise indicated, the numerical parameters set forth in the specification and attached claims are approximations that can vary depending upon the desired properties sought to be obtained by the present disclosure. In particular, all numbers expressing quantities of ingredients, reaction conditions, and so forth used in the specification and claims are to be understood as being modified in all instances by the term "about". Generally, the expression is meant to encompass variations of ± 10% in some embodiments, 5% in some embodiments, 1% in some embodiments, 0.5% in some embodiments by the specified amount.
The use of ordinal numbers such as "first," "second," "third," etc., in the specification and claims to modify a corresponding element does not by itself connote any ordinal number of the element or any ordering of one element from another or the order of manufacture, and the use of the ordinal numbers is only used to distinguish one element having a certain name from another element having a same name.
In addition, unless steps are specifically described or must occur in sequence, the order of the steps is not limited to that listed above and may be changed or rearranged as desired by the desired design. The embodiments described above may be mixed and matched with each other or with other embodiments based on design and reliability considerations, i.e., technical features in different embodiments may be freely combined to form further embodiments.
The above-mentioned embodiments are intended to illustrate the objects, aspects and advantages of the present disclosure in further detail, and it should be understood that the above-mentioned embodiments are only illustrative of the present disclosure and are not intended to limit the present disclosure, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present disclosure should be included in the scope of the present disclosure.
Claims (9)
1. A method of fabricating an InGaN monolayer, comprising:
growing a GaN nucleating layer on the substrate;
annealing the GaN nucleating layer;
growing a GaN epitaxial layer in the GaN nucleating layer after annealing treatment, and introducing TMIn in the process of growing the GaN epitaxial layer;
introducing NH on the GaN epitaxial layer3TMGa and TMIn, resulting in an InGaN monolayer.
2. The method of claim 1, wherein the flow rate of TMIn is 20-30 μmol/min.
3. The method of claim 1 wherein the TMIn is in a gaseous state.
4. A method of fabricating an InGaN monolayer as set forth in claim 1, wherein the GaN nucleation layer is grown at a temperature of: 520 ℃ to 560 ℃.
5. The method of claim 1 wherein the substrate material is Al2O3SiC or Si or a combination thereof.
6. A method of fabricating an InGaN monolayer as set forth in claim 1, wherein the GaN epitaxial layer is grown at a temperature of: 1000 ℃ to 1200 ℃.
7. A method of fabricating an InGaN monolayer as set forth in claim 1, wherein the temperature at which the InGaN monolayer is grown is: 600-800 ℃.
8. A method of fabricating an InGaN monolayer as set forth in claim 1, wherein the GaN nucleation layer is annealed at: 1000 ℃ to 1200 ℃.
9. A method of fabricating an InGaN monolayer as set forth in claim 1, wherein the TMGa source is turned on to provide a gallium source for the growth of the GaN epitaxial layer during the growth of the GaN epitaxial layer within the annealed GaN nucleation layer.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105870269A (en) * | 2016-05-26 | 2016-08-17 | 湘能华磊光电股份有限公司 | LED (light-emitting diode) epitaxial growth method capable of improving hole injection |
| CN108336195A (en) * | 2018-01-11 | 2018-07-27 | 太原理工大学 | A kind of preparation method of InGaN films |
| CN111785817A (en) * | 2020-08-25 | 2020-10-16 | 北京蓝海创芯智能科技有限公司 | InGaN/(In) GaN quantum well structure and method for improving luminous uniformity of quantum well |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105870269A (en) * | 2016-05-26 | 2016-08-17 | 湘能华磊光电股份有限公司 | LED (light-emitting diode) epitaxial growth method capable of improving hole injection |
| CN108336195A (en) * | 2018-01-11 | 2018-07-27 | 太原理工大学 | A kind of preparation method of InGaN films |
| CN111785817A (en) * | 2020-08-25 | 2020-10-16 | 北京蓝海创芯智能科技有限公司 | InGaN/(In) GaN quantum well structure and method for improving luminous uniformity of quantum well |
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