CN113467143B - Array substrate manufacturing method, array substrate and display panel - Google Patents
Array substrate manufacturing method, array substrate and display panel Download PDFInfo
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- CN113467143B CN113467143B CN202110715990.7A CN202110715990A CN113467143B CN 113467143 B CN113467143 B CN 113467143B CN 202110715990 A CN202110715990 A CN 202110715990A CN 113467143 B CN113467143 B CN 113467143B
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- 239000000758 substrate Substances 0.000 title claims abstract description 109
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 25
- 239000010410 layer Substances 0.000 claims abstract description 154
- 239000002245 particle Substances 0.000 claims abstract description 64
- 230000005684 electric field Effects 0.000 claims abstract description 62
- 239000011241 protective layer Substances 0.000 claims abstract description 50
- 239000004973 liquid crystal related substance Substances 0.000 claims abstract description 26
- 239000010409 thin film Substances 0.000 claims abstract description 26
- 239000011248 coating agent Substances 0.000 claims abstract description 14
- 238000000576 coating method Methods 0.000 claims abstract description 14
- 238000000034 method Methods 0.000 claims description 32
- 239000010408 film Substances 0.000 claims description 31
- 229910052751 metal Inorganic materials 0.000 claims description 29
- 239000002184 metal Substances 0.000 claims description 29
- 239000000126 substance Substances 0.000 claims description 20
- 238000009826 distribution Methods 0.000 claims description 12
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 5
- 238000005086 pumping Methods 0.000 claims description 4
- 230000000694 effects Effects 0.000 abstract 1
- 239000007789 gas Substances 0.000 description 16
- 210000002381 plasma Anatomy 0.000 description 13
- 238000001312 dry etching Methods 0.000 description 9
- 238000010586 diagram Methods 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 7
- 239000011521 glass Substances 0.000 description 6
- 230000010354 integration Effects 0.000 description 5
- 238000012986 modification Methods 0.000 description 5
- 230000004048 modification Effects 0.000 description 5
- 239000004215 Carbon black (E152) Substances 0.000 description 4
- 229930195733 hydrocarbon Natural products 0.000 description 4
- 150000002430 hydrocarbons Chemical class 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 239000003344 environmental pollutant Substances 0.000 description 3
- 238000002161 passivation Methods 0.000 description 3
- 231100000719 pollutant Toxicity 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 238000005336 cracking Methods 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 239000012528 membrane Substances 0.000 description 2
- 239000005416 organic matter Substances 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000013618 particulate matter Substances 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical group [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 206010047571 Visual impairment Diseases 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000000356 contaminant Substances 0.000 description 1
- 238000013524 data verification Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136222—Colour filters incorporated in the active matrix substrate
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Liquid Crystal (AREA)
- Optical Filters (AREA)
Abstract
The invention discloses an array substrate and a manufacturing method thereof, wherein the manufacturing method of the array substrate comprises the following steps: coating a first protective layer on the thin film transistor substrate; sequentially forming a light shielding layer and a color resistance layer on the first protective layer; applying an alternating electric field with preset electric field parameters above the color resistance layer to eliminate particles on the surface of the color resistance layer; and forming the array substrate according to the thin film transistor substrate after the particles are eliminated. The technical problem that the protective layer is broken due to rough particles on the surface of the color resistance layer of the array substrate, so that bubbles are generated in liquid crystal is solved, and the technical effect of improving the color resistance layer is achieved.
Description
Technical Field
The invention relates to the technical field of display, in particular to an array substrate manufacturing method, an array substrate and a display panel.
Background
The COA (Color Filter On Array, Array substrate integrated with Color Filter) technology is an integrated technology that integrates an original Color Filter substrate and a thin film transistor substrate, i.e., coats a Color resistor On a completed Array substrate to form a Color Filter layer.
Disclosure of Invention
The embodiment of the invention provides an array substrate manufacturing method, an array substrate and a display panel, and aims to solve the technical problem that in the prior art, bubbles are generated in liquid crystal due to the fact that a protective layer is broken due to rough particles on the surface of a color resistance layer of the array substrate.
In order to achieve the above object, an embodiment of the present invention provides a method for manufacturing an array substrate, including:
coating a first protective layer on the thin film transistor substrate;
sequentially forming a light shielding layer and a color resistance layer on the first protective layer;
applying an alternating electric field with preset electric field parameters above the color resistance layer to eliminate particles on the surface of the color resistance layer;
and forming the array substrate according to the thin film transistor substrate after the particles are eliminated.
Optionally, the step of applying an alternating electric field with preset electric field parameters above the color-resistance layer to eliminate particles on the surface of the color-resistance layer includes:
applying an alternating electric field with preset electric field parameters above the color resistance layer to enable the particles on the surface of the color resistance layer to generate volatile substances;
and pumping away the volatile substances to eliminate the particles on the surface of the color resistance layer.
Optionally, the step of applying an alternating electric field with preset electric field parameters above the color filter to enable the particles on the surface of the color resistance layer to generate volatile substances is preceded by:
acquiring electric field parameters;
and applying an alternating electric field according to the preset electric field parameters so as to enable the particles on the surface of the color resistance layer to generate volatile substances.
Optionally, the step of acquiring the electric field parameters includes:
scanning the particles on the surface of the color resistance layer to obtain distribution information of the particles, wherein the distribution information of the particles comprises the size and the number of the particles;
and determining the preset electric field parameters according to the distribution information of the particles.
Optionally, the preset electric field parameters include a preset plasma energy parameter, a preset gas flow parameter, and a preset duration of the alternating electric field.
Optionally, the thin film transistor substrate and the color resistance layer are in a vacuum state.
Optionally, the alternating electric field is generated by a radio frequency power supply.
Optionally, the particulate matter on the surface of the color-resist layer comprises a hydrocarbon-containing contaminant or organic matter.
Optionally, the step of forming the array substrate according to the thin film transistor substrate after eliminating the particles includes:
coating a second protective layer above the color resistance layer for eliminating surface particles;
coating a metal electrode film layer above the second protective layer;
coating liquid crystal on the metal electrode film layer to form the array substrate.
In order to achieve the above object, an embodiment of the present invention further provides an array substrate, where the array substrate includes:
a thin film transistor substrate;
the first protective layer is coated on the thin film transistor substrate;
the color resistance layer is coated on the first protective layer;
the second protective layer is coated on the color resistance layer;
the metal electrode film layer is coated on the second protective layer;
the liquid crystal layer is coated on the metal electrode film layer; the array substrate is manufactured according to the manufacturing method of the array substrate.
In the method for manufacturing an array substrate, the array substrate, and the display panel provided in this embodiment, during the manufacturing process of the array substrate, before the second protective layer is coated on the color resistance layer, the alternating electric field with preset electric field parameters is applied to the surface of the color resistance layer to chemically react the surface particles into volatile substances, so as to eliminate the particles on the surface of the color resistance layer and improve the surface smoothness of the color resistance layer, thereby preventing the second protective layer and the metal electrode film layer from being broken to cause gas in the color resistance layer to leak into the liquid crystal and cause the liquid crystal to generate bubbles.
Drawings
FIG. 1 is a schematic view of an array substrate and a display panel according to the present invention;
FIG. 2 is a schematic diagram of a dry etching process in an embodiment of the invention;
FIG. 3 is a schematic diagram of an array substrate and color filter manufacturing process with dry etching added in the array substrate and color filter integration technology of the invention;
FIG. 4 is a schematic flow chart illustrating a method for manufacturing an array substrate according to a first embodiment of the present invention;
FIG. 5 is a schematic flow chart illustrating a manufacturing method of an array substrate according to a second embodiment of the present invention;
FIG. 6 is a schematic diagram of a test design and a dry etching process recipe of the first protective layer and the second protective layer in the manufacturing method of the array substrate according to the present invention;
FIG. 7 is a table showing data verification of an array substrate after a dry etching process and an ultraviolet process on the surface of a color resist;
fig. 8 is a schematic view of a gate/source structure on one side of an array substrate of the invention.
Detailed Description
The existing integrated process of the array substrate and the color filter often causes the passivation layer on the color resistance layer to crack or the transparent electrode film to crack unevenly due to the rough surface particles of the color resistance layer, so that the gas of the color resistance layer overflows to the liquid crystal layer through the passivation layer, and further the liquid crystal generates bubbles. In order to solve the above technical problem, the present invention provides a method for manufacturing an array substrate, including: coating a first protective layer on the thin film transistor substrate; sequentially forming a light shielding layer and a color resistance layer on the first protective layer; applying an alternating electric field with preset electric field parameters above the color resistance layer to eliminate particles on the surface of the color resistance layer; and forming the array substrate according to the array substrate after the particulate matters are eliminated. Thus, the working gas is dissociated into active excitons and plasma 202 by the alternating electric field, and the plasma chemically reacts with the active excitons and the particles on the surface of the color resistance layer to generate volatile substances so as to eliminate the particles on the surface of the color resistance layer, thereby improving the smoothness of the surface of the color light composition and further preventing the liquid crystal from generating bubbles due to the rupture of the protective layer.
For a better understanding of the above technical solutions, exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
Referring to fig. 1, fig. 1 is a schematic view of an array substrate and a display panel according to the present invention, where the array substrate includes: a thin film transistor substrate 101; a first protective layer 102 coated on the thin film transistor substrate; a color resist layer 103 coated on the first protective layer; a second protective layer 104 coated on the color resist layer; a metal electrode film layer 105 coated on the second protective layer; the liquid crystal layer 106 is coated on the metal electrode film layer; the array substrate is manufactured according to the manufacturing method of the array substrate, the display panel is integrated by the array substrate and the color filter integration technology, the array substrate and the color filter integration technology is that after a first protective layer 102 is coated on the thin film transistor substrate 101, a color resistance layer 103 is prepared on the first protective layer 102, the color resist layer 103 is a color resist block disposed at an interval from each other and a light shielding layer disposed between adjacent color resist blocks, applying an alternating electric field on the surface of the color resistance layer 103 through a dry etching process to chemically react surface particles into volatile substances so as to eliminate the particles on the surface of the color resistance layer 103, plating a second protective layer 104 on the color resistance layer 103 after the particulate matter is eliminated, plating a metal electrode film layer 105 on the second protective layer 104, a liquid crystal layer 106 is coated on the metal electrode film layer 105, and the metal electrode film layer 105 and the glass substrate 107 are sequentially coated.
In this embodiment, an alternating electric field is applied to the surface of the color resist layer 103 to chemically react the surface particles into volatile substances, so as to eliminate the particles on the surface of the color resist layer 103 and improve the surface smoothness of the color resist layer 103, thereby preventing the second protective layer 104 and the metal electrode film layer 105 from being broken to cause the gas in the color resist layer 103 to leak into the liquid crystal 106 and cause the liquid crystal 106 to generate bubbles.
Referring to fig. 2, fig. 2 is a schematic diagram of a dry etching process in an embodiment of the invention. The thin film transistor substrate after being coated with the color resist layer 103 is placed in a vacuum environment, for example, placed in a glass container, and air in the container is completely pumped out by an air pump 201 so that the thin film transistor substrate after being coated with the color resist layer is in the vacuum environment. Referring to fig. 2, an alternating electric field is applied above the color-resist layer 103, the alternating electric field is generated by a radio frequency power supply, the alternating electric field dissociates a working gas such as oxygen in a substrate to generate active excitons and plasmas 202, the active excitons and plasmas 202 physically bombard the surface of the color-resist layer, the active excitons and plasmas 202 chemically react with a hydrocarbon-containing pollutant or organic matter deposited on the surface of the color-resist layer to generate volatile substances, and the volatile substances are pumped away by an air pump 201 to eliminate particles on the surface of the color-resist layer 103.
Referring to fig. 3, fig. 3 is a schematic diagram of the array substrate and color filter manufacturing process with the addition of a dry etching process in the array substrate and color filter integration technology of the invention. The process flow of one side of the array substrate and color filter integration technology is as follows: form glass substrate, first metal electrode, grid insulating layer, active layer, ohmic contact layer, second metal electrode, first protective layer, colour resistance layer, dry-type etching process, second protective layer and transparent metal electrode rete in proper order, and the processing procedure of colour filter side simplifies to: sequentially forming a glass substrate, a shading layer, a transparent metal electrode film layer and a spacer.
In this embodiment, the tft substrate plated with the color resist layer 103 is placed in a vacuum environment to prevent other gases from being dissociated by an electric field to generate impurities, an alternating electric field is applied to the surface of the color resist layer 103 to chemically react surface particles to generate a volatile substance, so as to eliminate the particles on the surface of the color resist layer 103 and improve the surface smoothness of the color resist layer 103, thereby preventing the second protective layer 104 from being broken to cause the gas in the color resist layer 103 to leak into the liquid crystal 106 and cause the liquid crystal 106 to generate bubbles.
Referring to fig. 4, fig. 4 is a first embodiment of a method for manufacturing an array substrate according to the present invention, the method for manufacturing an array substrate includes the following steps:
step S10, coating a first protective layer on the thin film transistor substrate;
optionally, the first protection layer may be a silicon nitride material.
Step S20, forming a color resistance layer on the first protective layer;
the thin film transistor substrate and the color resistance layer are in a vacuum state;
step S30, applying an alternating electric field with preset electric field parameters above the color resistance layer to eliminate particles on the surface of the color resistance layer;
the alternating electric field is generated by a radio frequency power supply; the color resistance layer is the color resistance layer, and the particles on the surface of the color resistance layer comprise hydrocarbon-containing pollutants or organic matters. And placing the thin film transistor substrate after being plated with the color resistance layer in a vacuum environment, such as a glass container, and completely pumping out air in the container through an air pump so that the thin film transistor substrate after being plated with the color resistance layer is in the vacuum environment. Applying an alternating electric field above the color resistance layer, wherein the alternating electric field is generated by a radio frequency power supply, the alternating electric field dissociates working gas such as oxygen in the substrate to generate active excitons and plasmas 202, the active excitons and plasmas 202 physically bombard the surface of the color resistance layer, the active excitons and plasmas 202 and hydrocarbon-containing pollutants or organic matters deposited on the surface of the color resistance layer undergo a chemical reaction to generate volatile substances, and the volatile substances are pumped out by an air pump to eliminate particles on the surface of the color resistance layer.
And step S40, forming the array substrate according to the thin film transistor substrate after the particles are eliminated.
Optionally, the step S40 includes:
coating a second protective layer above the color resistance layer for eliminating surface particles;
optionally, the second protective layer may be a silicon nitride material, and the silicon nitride material is used to replace a conventional organic insulating film, so that the contact between the liquid crystal layer and the color resistance layer can be reduced, the usage amount of liquid crystal can be reduced, and the production cost is reduced.
Coating a metal electrode film layer above the second protective layer;
and coating liquid crystal above the metal electrode film layer to form a liquid crystal array substrate.
In this embodiment, in the process of manufacturing the array substrate, before the second protective layer is coated on the color resistance layer, the alternating electric field is applied to the surface of the color resistance layer to chemically react the surface particles into volatile substances, so as to eliminate the particles on the surface of the color resistance layer and improve the surface smoothness of the color resistance layer, thereby preventing the second protective layer and the metal electrode film layer from cracking to cause gas in the color resistance layer to leak into the liquid crystal and cause the liquid crystal to generate bubbles.
Referring to fig. 5, fig. 5 is a second embodiment of the manufacturing method of the array substrate according to the present invention, and based on the first embodiment, the step S30 includes:
step S31, applying an alternating electric field with preset electric field parameters above the color resistance layer to enable the particles on the surface of the color resistance layer to generate volatile substances;
optionally, the step S31 includes:
acquiring electric field parameters;
optionally, scanning the particles on the surface of the color resistance layer to obtain distribution information of the particles, wherein the distribution information of the particles comprises the size and the number of the particles;
and determining the preset electric field parameters according to the distribution information of the particles.
The preset electric field parameters comprise preset plasma energy parameters, preset gas flow parameters and preset duration of the alternating electric field. Alternatively, quantitative fixed values may be made in advance for the distribution information of the particles, the distribution information may be associated with the preset electric field parameters, for example, the area size and the number of the particles are associated, corresponding electric field parameters are preset for the area size and the number of the particles and stored in association, and when the area size and the number of the particles on the surface of the color resistance layer are scanned, the electric field parameters stored in advance may be obtained.
Alternatively, referring to fig. 6, fig. 6 is a schematic diagram illustrating a test design and a dry etching process of the first protective layer and the second protective layer in the manufacturing method of the array substrate of the invention. The Power is a preset plasma energy parameter and can be used for controlling the Power of a radio frequency Power supply and improving the uniformity of film quality, the Speed is a preset gas flow parameter and is used for controlling the gas flow rate and improving the roughness of the film quality of the surface of the color resistance layer and the uniformity of other film qualities, the THK is the thickness of the film quality and is used for enabling the insulativity of the second protective layer to be better, so that the color resistance layer is protected, and the Time is preset duration for an electric field. Alternatively, the predetermined plasma energy parameter may be 6-10(kw), the predetermined gas flow parameter may be 6000-.
And applying an alternating electric field according to the preset electric field parameters so as to enable the particles on the surface of the color resistance layer to generate volatile substances.
And step S32, pumping away the volatile substances to eliminate the particles on the surface of the color resistance layer.
Alternatively, referring to fig. 7, fig. 7 is a verification table of data of an afterimage experiment of the array substrate after the dry etching process and the ultraviolet process are performed on the surface of the color resist layer. As can be seen from the figure, the array substrate after the color resist process (before the metal electrode layer transparent process) has lower image sticking and higher performance than the array substrate after the uv process.
In the technical solution provided in this embodiment, the distribution of particles on the surface of the color resist layer is scanned in advance, thereby obtaining electric field parameters, applying an alternating electric field on the surface of the color resistance layer according to the preset electric field parameters so as to chemically react the surface particles into a hair-growing substance and eliminate the particles on the surface of the color resistance layer, but not adopt ultraviolet rays as a pretreatment procedure of the process of the metal electrode film layer, can effectively solve the problems that the cleaning capability of the surface of the color resistance layer is not good due to the over-low energy of the ultraviolet rays or the structure of the color resistance layer is damaged due to the over-high energy of the ultraviolet rays, under the condition of well controlling the plasma energy parameter and the gas flow parameter of the alternating electric field and the preset duration of the alternating electric field, the smoothness of the surface of the color resistance layer can be effectively improved, therefore, the film quality of the second protective layer and the metal electrode film layer is improved so as to prevent gas in the color resistance layer from leaking into the liquid crystal to cause the liquid crystal to generate bubbles. And the ghost shadow of the array substrate is reduced, and the performance of the array substrate is improved.
Alternatively, referring to fig. 8, fig. 8 is a schematic diagram of a gate/source structure on one side of the array substrate of the invention. Based on the first embodiment and/or the second embodiment of the present invention, the gate/source structure includes a glass substrate 901, a metal electrode layer copper/molybdenum structure 902, a gate insulating layer 903, an amorphous silicon layer 904, an ohmic contact layer 905, an aluminum layer 906, a passivation layer 907, and a transparent metal electrode film layer 908, which are sequentially disposed, where the metal electrode layer copper/molybdenum structure 902 includes a copper structure 921 and a molybdenum structure 922. The metal electrode layer adopts a copper/molybdenum structure, so that the creep property of the material can be effectively improved, and the uniformity of the membrane quality is improved, thereby avoiding the membrane quality from cracking. And the capacitance delay of the array substrate can be reduced, the resolution is improved, and the method can be used for producing products with large size, high resolution and high refresh rate.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (8)
1. The manufacturing method of the array substrate is characterized by comprising the following steps of:
coating a first protective layer on the thin film transistor substrate;
forming a color resist layer on the first protective layer;
scanning the particles on the surface of the color resistance layer to obtain distribution information of the particles, wherein the distribution information of the particles comprises the size and the number of the particles;
determining the preset electric field parameters according to the distribution information of the particles;
applying an alternating electric field with preset electric field parameters above the color resistance layer to enable the particles on the surface of the color resistance layer to generate volatile substances;
pumping away the volatile substances to eliminate the particles on the surface of the color resistance layer;
and forming the array substrate according to the thin film transistor substrate after the particles are eliminated.
2. The method of claim 1, wherein the predetermined electric field parameters comprise a predetermined plasma energy parameter, a predetermined gas flow parameter, and a predetermined duration of the alternating electric field.
3. The method of claim 1, wherein an alternating electric field with preset electric field parameters is applied above the color-resist layer in a vacuum environment to remove particles on the surface of the color-resist layer.
4. The method of claim 1, wherein the alternating electric field is generated by a radio frequency power source.
5. The method of manufacturing an array substrate according to claim 1, wherein the step of forming the array substrate based on the thin film transistor substrate after removing the particles comprises:
coating a second protective layer above the color resistance layer for eliminating surface particles;
coating a metal electrode film layer above the second protective layer;
coating liquid crystal on the metal electrode film layer to form the array substrate.
6. An array substrate, comprising:
a thin film transistor substrate;
the first protective layer is coated on the thin film transistor substrate;
the color resistance layer is coated on the first protective layer;
the second protective layer is coated on the color resistance layer;
the metal electrode film layer is coated on the second protective layer;
the liquid crystal layer is coated on the metal electrode film layer;
wherein the array substrate is manufactured according to the method of any one of claims 1 to 5.
7. The array substrate of claim 6, wherein the thin film transistor substrate is further coated with a gate electrode, wherein the gate electrode is of a copper/molybdenum structure.
8. A display panel, comprising an array substrate, a color film substrate integrated with the array substrate, and a liquid crystal layer coated on the array substrate and the color film substrate, wherein the array substrate is manufactured according to the method of any one of claims 1 to 5.
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| JPH07151911A (en) * | 1994-10-20 | 1995-06-16 | Toppan Printing Co Ltd | Color filter and its production |
| JPH08286024A (en) * | 1995-04-12 | 1996-11-01 | Toshiba Corp | Formation of color filter substrate |
| CN101556346A (en) * | 2007-05-08 | 2009-10-14 | 住友橡胶工业株式会社 | Planarizing sheet and process for preparation of color filter using the same |
| CN113140577A (en) * | 2021-04-21 | 2021-07-20 | 滁州惠科光电科技有限公司 | Array substrate preparation method, array substrate and display panel |
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| CN101556346A (en) * | 2007-05-08 | 2009-10-14 | 住友橡胶工业株式会社 | Planarizing sheet and process for preparation of color filter using the same |
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