CN113451345B - Hybrid imaging detector chip based on semiconductor integrated circuit CMOS (complementary Metal oxide semiconductor) process - Google Patents
Hybrid imaging detector chip based on semiconductor integrated circuit CMOS (complementary Metal oxide semiconductor) process Download PDFInfo
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- 238000003384 imaging method Methods 0.000 title claims abstract description 35
- 239000004065 semiconductor Substances 0.000 title claims abstract description 16
- 238000000034 method Methods 0.000 title claims description 15
- 230000008569 process Effects 0.000 title claims description 14
- 230000000295 complement effect Effects 0.000 title description 4
- 229910044991 metal oxide Inorganic materials 0.000 title description 4
- 150000004706 metal oxides Chemical class 0.000 title description 4
- 239000000758 substrate Substances 0.000 claims abstract description 49
- WYTGDNHDOZPMIW-RCBQFDQVSA-N alstonine Natural products C1=CC2=C3C=CC=CC3=NC2=C2N1C[C@H]1[C@H](C)OC=C(C(=O)OC)[C@H]1C2 WYTGDNHDOZPMIW-RCBQFDQVSA-N 0.000 claims abstract description 39
- 230000008859 change Effects 0.000 claims abstract description 24
- 239000010408 film Substances 0.000 claims description 51
- 239000003990 capacitor Substances 0.000 claims description 47
- 229910052751 metal Inorganic materials 0.000 claims description 16
- 239000002184 metal Substances 0.000 claims description 16
- 230000003287 optical effect Effects 0.000 claims description 15
- 239000010409 thin film Substances 0.000 claims description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 8
- 239000010703 silicon Substances 0.000 claims description 8
- 229910052710 silicon Inorganic materials 0.000 claims description 8
- 239000011159 matrix material Substances 0.000 claims description 3
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical group [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 3
- 229910052721 tungsten Inorganic materials 0.000 claims description 3
- 239000010937 tungsten Substances 0.000 claims description 3
- 239000007772 electrode material Substances 0.000 claims description 2
- 238000010521 absorption reaction Methods 0.000 description 12
- 238000010586 diagram Methods 0.000 description 12
- 230000035945 sensitivity Effects 0.000 description 6
- 238000001514 detection method Methods 0.000 description 5
- 238000002955 isolation Methods 0.000 description 5
- 238000003331 infrared imaging Methods 0.000 description 2
- 230000006978 adaptation Effects 0.000 description 1
- 230000001174 ascending effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000004927 fusion Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000001931 thermography Methods 0.000 description 1
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- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
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- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
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- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
- H01L27/14649—Infrared imagers
- H01L27/1465—Infrared imagers of the hybrid type
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Abstract
The application provides a hybrid imaging detector chip based on semiconductor integrated circuit CMOS technology, includes: the structure comprises a substrate, a visible light sensing area positioned at the bottom of the substrate, CMOS reading circuits positioned at two sides of the visible light sensing area, an upper suspended micro-bridge structure and a lower suspended micro-bridge structure positioned on the top of the substrate, an air gap transistor formed between the lower micro-bridge structure and the substrate, an upper power connection supporting structure, an upper serpentine beam structure and a voltage variable resistor positioned at the contact position of the upper serpentine beam structure and the upper power connection supporting structure, wherein a diode is arranged in the visible light sensing area, and the lower micro-bridge structure absorbs the up-and-down deviation of the position of infrared light to cause the height change of an air gap of the air gap transistor, so that the source-drain current of the air gap transistor changes, and the sensing of visible light and infrared light is realized.
Description
Technical Field
The application relates to the technical field of semiconductors, in particular to a hybrid imaging detector chip based on a CMOS (complementary metal oxide semiconductor) process of a semiconductor integrated circuit.
Background
An infrared imaging sensor is a product widely applied in the technical field of infrared detection, and generally adopts a microbridge structure integrated on a Complementary Metal Oxide Semiconductor (CMOS) circuit, a thermistor is used for absorbing infrared rays, and a changed signal is converted into an electric signal through the CMOS circuit to be amplified and output, so that a thermal imaging function is realized.
With the development of the industrial and living standards, the requirement cannot be met by pure infrared imaging, and the imaging technology with wider wave bands is more and more concerned, especially the imaging technology which can be sensitive to visible light and infrared light at the same time.
Disclosure of Invention
The application provides a hybrid imaging detector chip based on a semiconductor integrated circuit CMOS process, and aims to provide a high-sensitivity hybrid imaging detector chip.
An embodiment of the present application provides a hybrid imaging detector chip based on a semiconductor integrated circuit CMOS process, including: the CMOS readout circuit comprises a substrate, a visible light sensing area, CMOS readout circuits, suspended upper and lower micro-bridge structures, an upper electrically-connected support structure, an upper serpentine beam structure, a voltage variable resistor and an air gap transistor, wherein the visible light sensing area is positioned at the bottom of the substrate, the CMOS readout circuits are positioned at two sides of the visible light sensing area, the suspended upper and lower micro-bridge structures are positioned on the top of the substrate, the voltage variable resistor is positioned at the contact position of the upper serpentine beam structure and the upper electrically-connected support structure, and the air gap transistor is formed between the lower micro-bridge structure and the substrate;
wherein, a diode is arranged in the visible light sensing area; when the lower micro-bridge structure absorbs the upper and lower offset of the position where infrared light occurs, the height of an air gap of the air gap transistor is changed, and therefore source-drain current of the air gap transistor is changed.
In one embodiment, the diode is a silicon-based PN junction diode or a contact diode formed by metal and silicon substrates.
In one embodiment, the channel of the air gap transistor is formed on top of the substrate, and the electrode material on the lower microbridge structure is tungsten.
In one embodiment, the chip further comprises: an upper serpentine beam structure;
the upper micro-bridge structure comprises an upper electrode structure, and the upper electrode structure comprises an upper flat electrode and an upper interdigital electrode; the lower micro-bridge structure comprises a lower electrode structure, and the lower electrode structure comprises a lower flat electrode and a lower interdigital electrode; the upper plate electrode and the lower plate electrode form a plate capacitor; the upper interdigital electrode and the lower interdigital electrode form an interdigital capacitor;
the upper electrode structure is connected with an upper electric connection supporting structure through an upper snake-shaped beam structure, and the upper electric connection supporting structure is positioned on the substrate; a metal through hole is arranged in the substrate and is connected with the CMOS reading circuit, and the metal through hole is also connected with an electrode layer in the upper electric connection supporting structure;
the upper deformation structure is arranged at the connecting part of the upper serpentine beam structure and the upper electrode structure and is used for deforming when receiving an optical signal so as to drive the upper electrode structure to move up and down in parallel relative to the lower electrode structure, so that the capacitance of the interdigital capacitor is changed linearly, and the capacitance of the flat capacitor is changed in an inverse proportion function.
In one embodiment, the upper deformable structure comprises a multi-layer thin film structure; wherein the coefficient of deformation of the film on the top layer is different from the coefficient of deformation of the film on the bottom layer.
In one embodiment, the amount of deformation of the film on the top layer is less than the amount of deformation of the film on the bottom layer upon receiving the optical signal.
In one embodiment, the chip further comprises: a lower serpentine beam structure and a lower deformation structure;
the lower electrode structure is connected with the upper electric connection supporting structure through the lower snake-shaped beam structure, a lower deformation structure is arranged at the connecting part of the lower snake-shaped beam structure and the lower electrode structure and is used for deforming when receiving an optical signal so as to drive the lower electrode structure to move up and down in parallel relative to the lower electrode structure, so that the capacitance of the interdigital capacitor is changed linearly, and the capacitance of the plate capacitor is changed in an inverse proportion function;
or
The chip further comprises: the lower serpentine beam structure, the lower deformation structure and the lower electric connection support structure;
the lower electrode structure is connected with the lower electric connection supporting structure through the lower snake-shaped beam structure, a lower deformation structure is arranged at the connecting part of the lower snake-shaped beam structure and the lower electrode structure, and the lower deformation structure is used for deforming when receiving an optical signal so as to drive the lower electrode structure to move up and down in parallel relative to the lower electrode structure, so that the capacitance of the interdigital capacitor is changed linearly, and the capacitance of the flat capacitor is changed in an inverse proportion function.
In one embodiment, the plane of serpentine extension of the upper serpentine beam structure is perpendicular to the plane of the upper plate electrode; the snake-shaped extension plane of the lower snake-shaped beam structure is vertical to the plane of the lower flat plate electrode.
In one embodiment, the lower deformable structure comprises a multi-layer thin film structure; upon receiving an optical signal, the amount of deformation of the film on the top layer is greater than the amount of deformation of the film on the bottom layer.
In one embodiment, the upper microbridge structure further comprises a sensitive layer, the sensitive layer is positioned on the infrared absorption layer, the infrared absorption layer is positioned on the upper flat electrode, and the sensitive layer comprises a multilayer thin film structure; wherein the deformation coefficient of the film on the top layer is the same as that of the film on the bottom layer.
In one embodiment, the upper interdigital electrode and the lower interdigital electrode form a multilayer structure from inside to outside, the lower interdigital electrode on the innermost layer is disc-shaped, the upper interdigital electrode and the lower interdigital electrode outside the innermost layer are ring-shaped, and the upper interdigital electrode is adjacent to at least one lower interdigital electrode.
In one embodiment, the upper interdigital electrode and the lower interdigital electrode form a multilayer structure from inside to outside, the innermost plurality of lower interdigital electrodes in a sector shape form a disc-shaped structure, the plurality of lower interdigital electrodes in a sector shape outside the innermost layer form an annular structure, a part of the upper interdigital electrode is in an annular shape, a part of the upper interdigital electrode is in a radial shape, the annular upper interdigital electrode is adjacent to the plurality of lower interdigital electrodes in a sector shape, the radial upper interdigital electrode is located between two adjacent lower interdigital electrodes in a sector shape, and the radial upper interdigital electrode and the annular upper interdigital electrode are connected with each other.
In one embodiment, the upper interdigital electrodes and the lower interdigital electrodes are both in a strip shape, the upper interdigital electrodes are distributed in a # -shape, the lower interdigital electrodes are distributed in a matrix shape, the upper interdigital electrodes distributed transversely are positioned between two rows of the lower interdigital electrodes, and the upper interdigital electrodes distributed longitudinally are positioned between two columns of the lower interdigital electrodes.
The application provides a hybrid imaging detector chip based on a semiconductor integrated circuit CMOS process, which comprises a substrate, a visible light sensing area positioned at the bottom of the substrate, CMOS reading circuits positioned at two sides of the visible light sensing area, an upper suspended micro-bridge structure and a lower suspended micro-bridge structure positioned on the top of the substrate, an air gap transistor formed between the lower micro-bridge structure and the substrate, an upper electric connection supporting structure, an upper snake-shaped beam structure and a voltage-variable resistor positioned at the contact position of the upper snake-shaped beam structure and the upper electric connection supporting structure. The substrate is internally provided with the visible light sensing area, the visible light sensing area is internally provided with the diode, the diode is used for detecting the intensity of visible light, the air-gap transistor is arranged in the chip, the height of an air gap of the air-gap transistor is changed due to the fact that a lower micro-bridge structure absorbs the position of infrared light to enable the source-drain current of the air-gap transistor to be changed, the infrared light intensity is obtained by reading the source-drain current of the air-gap transistor, the sensing of the intensity of the visible light and the infrared light is achieved, in addition, the voltage-variable resistor is additionally arranged at the contact position between the upper serpentine beam structure and the upper electric connection supporting structure, the infrared light intensity is obtained through the current change of the voltage-variable resistor and the source-drain current change of the air-gap transistor, and the sensitivity of infrared light detection can be improved.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and together with the description, serve to explain the principles of the application.
Fig. 1 is a schematic structural diagram of a hybrid imaging detector chip based on a CMOS process of a semiconductor integrated circuit according to an embodiment of the present disclosure;
FIG. 2 is a schematic diagram of a power-on connection support in the hybrid imaging detector chip shown in FIG. 1;
FIG. 3 is a schematic diagram of a serpentine beam structure in the hybrid imaging detector chip shown in FIG. 1;
FIG. 4 is another structural schematic diagram of a serpentine beam structure in the hybrid imaging detector chip shown in FIG. 1;
FIG. 5 is a schematic diagram of an operating principle of the hybrid imaging detector chip shown in FIG. 1;
FIG. 6 is a schematic diagram of another operating principle of the hybrid imaging detector chip shown in FIG. 1;
fig. 7 is a schematic structural diagram of a hybrid imaging detector chip based on a CMOS process of a semiconductor integrated circuit according to another embodiment of the present application;
fig. 8 is a schematic structural diagram of an upper interdigital electrode and a lower interdigital electrode in a hybrid imaging detector chip provided in an embodiment of the present application;
fig. 9 is a schematic structural diagram of an upper interdigital electrode and a lower interdigital electrode in a hybrid imaging detector chip provided in another embodiment of the present application;
fig. 10 is a schematic structural diagram of an upper interdigital electrode and a lower interdigital electrode in a hybrid imaging detector chip provided by yet another embodiment of the present application.
With the above figures, there are shown specific embodiments of the present application, which will be described in more detail below. These drawings and written description are not intended to limit the scope of the inventive concepts in any manner, but rather to illustrate the inventive concepts to those skilled in the art by reference to specific embodiments.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.
As shown in fig. 1 to 3, an embodiment of the present application provides a hybrid imaging detector chip based on a semiconductor integrated circuit CMOS process, which includes a substrate 100, an upper electrically connecting support structure 120, an upper serpentine beam structure 130, a visible light sensing region 160, CMOS readout circuits 150 located at two sides of the visible light sensing region 160, upper and lower flying micro-bridge structures located at the top of the substrate, an air gap transistor formed between the lower flying micro-bridge structure and the substrate, and a voltage variable resistor located at a contact position of the upper serpentine beam structure 130 and the upper electrically connecting support structure 120.
The visible light sensing region 160 is provided with a diode, and the diode is a silicon-based PN junction diode or a contact diode formed by metal and a silicon substrate. A channel 201 of the air gap transistor is formed on the top of the substrate, a source 202 and a drain 203 are arranged on two sides of the channel 201, the lower plate electrode 116 on the lower micro-bridge structure is made of tungsten, and air between the lower micro-bridge structure and the substrate is used as a gate dielectric layer 204, so that the air gap transistor is formed between the lower micro-bridge structure and the substrate 100.
When incident light is incident to the visible light diode from the bottom, the visible light is absorbed by the visible light diode and filtered by the substrate, and only infrared signals are left to be incident to the upper micro-bridge structure and the lower micro-bridge structure on the top, so that a hybrid imaging effect is achieved, pixels of the visible light detector are in one-to-one correspondence with pixels of the infrared detector, and no deviation is generated after image fusion. In addition, when the lower microbridge structure absorbs the upper and lower offset of the position where infrared light occurs, the height of an air gap of the air gap transistor is changed, so that the source-drain current of the air gap transistor is changed, namely the thickness of a grid dielectric layer is changed, the source-drain current of the grid dielectric layer is changed, and a high-sensitivity single-chip integrated hybrid imaging detector is formed.
In the technical scheme, the visible light sensing area comprising the diode is arranged at the bottom of the substrate to sense the intensity of visible light, the air-gap transistor is formed between the substrate and the lower micro-bridge structure, the lower micro-bridge structure moves up and down after absorbing infrared light, so that the source-drain current of the air-gap transistor changes, the infrared light intensity can be obtained by detecting the source-drain current of the air-gap transistor, the detection of infrared light and visible light is realized, in addition, the voltage-variable resistor is additionally arranged at the contact position between the upper serpentine beam structure and the upper power connection supporting structure, the infrared light intensity is obtained through the current change of the voltage-variable resistor and the source-drain current change of the air-gap transistor, and the sensitivity of infrared light detection can be improved.
The upper micro-bridge structure comprises an upper electrode structure, and the lower micro-bridge structure comprises a lower electrode structure. The upper electrode structure comprises an upper flat plate electrode 112 and an upper interdigital electrode 111, the lower electrode structure comprises a lower flat plate electrode 116 and a lower interdigital electrode 117, the upper flat plate electrode 112 and the lower flat plate electrode 116 form a flat plate capacitor, and the upper interdigital electrode 111 and the lower interdigital electrode 117 form an interdigital capacitor.
The upper electrode structure is connected to the upper electrical connection support structure 120 through the upper serpentine beam structure 130, and the upper electrical connection support structure 120 is located on the substrate 100, so as to suspend the upper electrode structure above the substrate 100. A metal via 121 is provided in the substrate, the metal via 121 is connected to the CMOS read circuit 150, and the metal via 121 is further connected to an electrode layer in the upper electrical connection support structure 120.
With continued reference to fig. 2, the upper electrical connection support structure 120 is a multi-layer hollow structure, the upper electrical connection support structure 120 includes an electrode layer 123, a dielectric layer 125 and an isolation protection layer 124, the isolation protection layer 124 is used for buffering the dielectric layer and blocking etching, the dielectric layer 125 is used for isolating the electrode layer 123, and the electrode layer 123 is used for leading out electrical signals on the upper micro-bridge structure. A through hole 121 is formed on the substrate 100 through a through silicon via process, a metal layer 122 is also grown on the silicon substrate, an electrode layer 123 in the upper electrically connecting support structure 120 is connected with the metal through hole 121 through the metal layer 122 in the substrate 100, and the metal through hole 121 is connected with the CMOS read circuit 150, so that an electric signal on the upper micro-bridge structure is introduced into the CMOS read circuit. The CMOS reading circuit is used for converting the change of the capacitance and/or the resistance value conversion of the voltage variable resistor into an image signal.
Fig. 3 is a view of the hybrid imaging detector chip along the direction a, and fig. 4 is a view of the hybrid imaging detector chip along the direction B, and as shown in fig. 3 and fig. 4, the serpentine extension plane of the upper serpentine beam structure refers to a projection plane along the direction B, and the serpentine extension plane of the upper serpentine beam structure is perpendicular to the plane of the upper flat electrode. Through so setting up, can reduce snakelike beam structure at the ascending projection area of A side for increase the area of flat plate electrode under the projection area of mixed imaging detector chip in A side not increasing, thereby increase the photosensitive area of mixed imaging detector chip.
Referring to fig. 1 to 4, an upper deformation structure 140 is disposed at a connection portion between the upper serpentine beam structure 130 and the upper electrode structure, and the upper deformation structure 140 is configured to deform when receiving an optical signal, so as to drive the upper electrode structure to move up and down in parallel with respect to the lower electrode structure, so that a distance between the upper plate electrode 112 and the lower plate electrode 116 of the plate capacitor changes, so that an effective area between the upper interdigital electrode 111 and the lower interdigital electrode 117 of the interdigital capacitor changes, that is, capacitance of the interdigital capacitor changes linearly, and capacitance of the plate capacitor changes in an inverse proportional function, which is beneficial to analyzing light intensity according to capacitance change.
In one embodiment, the upper micro-bridge structure includes an upper electrode structure including an upper interdigital electrode 111 and an upper plate electrode 112, an infrared absorption layer 114, and a sensitive layer 115. The lower electrode structure includes a lower plate electrode 116 and a lower interdigital electrode 117.
The infrared absorption layer 114 is located on the upper flat electrode 112, the sensitive layer 115 is located on the infrared absorption layer 114, the infrared absorption layer 114 is used for absorbing infrared light signals and then generates heat, the sensitive layer 115 comprises a multi-layer thin film structure, a thin film located on the top layer and a thin film structure located on the bottom layer can deform along with temperature changes, the thin film located in the middle plays a supporting role, the deformation coefficient of the thin film located on the top layer is the same as that of the thin film located on the bottom layer, so that the sensitive layer 115 cannot deform when the temperature of the infrared absorption layer 114 changes, namely after the infrared absorption layer 114 absorbs infrared light, the upper flat electrode 112 and the lower flat electrode 116 are still arranged in parallel, and the upper interdigital electrode 111 and the lower interdigital electrode 117 are still arranged in parallel.
As shown in fig. 1 to 4, an upper deformation structure 140 is disposed at the connection position of the upper electrode structure and the upper serpentine beam structure 130, and the upper deformation structure 140 is connected to the infrared absorption layer 114 disposed on the upper electrode structure. When infrared light irradiates the detector, the infrared absorption layer 114 absorbs the infrared light signal to generate heat, and conducts the heat to the upper deformation structure 140, causing the upper deformation structure 140 to deform.
In one embodiment, the length of the upper deformation structure is much smaller than the length of the serpentine beam to ensure that the upper deformation structure 140 is a point with respect to the upper electrode structure and the upper serpentine beam structure, so that when the upper deformation structure 140 is subjected to heat conduction to cause deformation, the upper plate electrode moves up and down with respect to the lower plate electrode, and the upper plate electrode cannot warp with respect to the lower plate electrode.
In one embodiment, the upper deformable structure 140 includes a multi-layer film structure, the film structure on the top layer and the film structure on the bottom layer deform with temperature change, and the film structure in the middle functions as a support. By the arrangement, when the infrared irradiation is carried out on the hybrid imaging detector chip, the upper deformation structure 140 is deformed and warped, and the surface of the upper microbridge structure is not deformed, so that the capacitance of the interdigital capacitor is linearly changed, the capacitance of the flat capacitor is changed in an inverse proportion function, and the infrared intensity can be analyzed according to the capacitance change.
In one embodiment, the amount of deformation of the film on the top layer is less than the amount of deformation of the film on the bottom layer upon receiving the optical signal. That is, the multi-layer films of the upper deformation structure 140 are configured to be films with mismatched thermal expansion coefficients, the film of the upper deformation structure 140 located at the top layer is a film with a smaller thermal expansion coefficient, and the film of the upper deformation structure 140 located at the bottom layer is a film with a larger thermal expansion coefficient, so as to ensure that the deformation amount of the film located at the top layer is smaller than that of the film located at the bottom layer.
Because the capacitance calculation formula of the capacitor is C = ε A/4 π kd, when the hybrid imaging detector chip receives infrared radiation, the distance between two electrodes of the plate capacitor changes, that is, the capacitance change rule of the plate capacitor is y-1/x, where-represents the direct ratio. The relative area between two electrodes of the interdigital capacitor changes, namely the capacitance change rule of the interdigital capacitor is y-x relation. On the whole, the change rule of the plate capacitor and the interdigital capacitor is linear, and the capacitance can be more easily analyzed into an infrared light signal.
Under the general condition, in the detector that uses interdigital capacitor and flat capacitor's variation to detect the infrared light simultaneously, if the capacitance change law of interdigital capacitor and/or the capacitance change law of flat capacitor is more complicated, can make the capacitance analytic process more complicated, and guarantee in this application that the capacitance of flat capacitor and interdigital capacitor is linear, can simplify the analytic process of capacitance, and the signal analytic process of sensor is the important link that the sensor was used, this application provides the scheme and more does benefit to the product of detector and produces the performance promotion.
In an embodiment, with continued reference to fig. 1, the lower electrode structure is located in a lower electrode isolation region in the substrate 100 to achieve electrical and thermal isolation between the substrate 100 and the lower electrode structure. The lower electrode structure comprises a lower flat electrode 116 and a lower interdigital electrode 117, and an isolation medium can be further arranged between the lower interdigital electrode 117 and the upper interdigital electrode 111 to avoid discharge between the upper interdigital electrode 111 and the lower interdigital electrode 117.
In one embodiment, the hybrid imaging detector chip further includes a lower electrical connection support structure 180, and the lower electrode structure is directly interconnected with the lower electrical connection support structure 180. A metal through hole 181 is further formed on the substrate, the metal through hole 181 is electrically connected to the lower electrical connection support structure 180, and the specific structure of the lower electrical connection support structure 180 is the same as that of the upper electrical connection support structure 120, which is not described herein again.
In an embodiment, the substrate 100 is provided with the visible light sensing area 160, when the detection light signal is incident through the bottom of the substrate 100, the visible light sensing area 160 absorbs visible light in the light signal and then continuously emits the visible light into the upper micro-bridge structure, and after the infrared absorption layer 114 on the upper micro-bridge structure absorbs the infrared light signal, the heat is transferred to the upper deformation structure 140, so that the upper deformation structure 140 is deformed, and the plate capacitance and the interdigital capacitance are changed.
In one embodiment, a voltage variable resistor 113 is disposed at a contact position between the upper serpentine beam structure 130 and the upper electrical connection support structure, and when the upper deformation structure 140 is deformed, a resistance value of the voltage variable resistor 113 changes, that is, a resistance value of the resistor changes correspondingly in addition to a capacitance change.
In the technical scheme, the deformation beam between the upper snake-shaped beam structure and the upper electrode structure is deformed under infrared irradiation, the surface of the upper micro-bridge structure is not deformed, the upper interdigital electrode is driven by the upper deformation structure to move in parallel along the vertical direction, the capacitance formed by the upper interdigital electrode and the capacitance formed by the lower interdigital electrode are linearly changed, the distance between the two flat electrodes is changed, namely the capacitance of the interdigital capacitor is linearly changed, so that the flat capacitors are changed in an inverse proportion function, the change rule of the two capacitances is easily obtained, and the infrared light intensity is easily analyzed according to the capacitance change.
With continued reference to fig. 1, in an embodiment, the hybrid imaging detector chip further includes: a lower serpentine beam structure and a lower deformation structure 190. The snake-shaped extension plane of the lower snake-shaped beam structure is a projection plane along the direction B, and the snake-shaped extension plane of the lower snake-shaped beam structure is perpendicular to the plane of the lower flat plate electrode. The lower serpentine beam structure can refer to fig. 2 and 3, and is not described in detail here.
The lower electrode structure is connected with the lower electric connection supporting structure 180 through the lower snake-shaped beam structure, a lower deformation structure 190 is arranged at the connecting part of the lower snake-shaped beam structure and the lower electrode structure, and the lower deformation structure 190 is used for deforming when receiving an optical signal so as to drive the lower electrode structure to move up and down in parallel relative to the upper electrode structure, so that the capacitance of the interdigital capacitor is changed linearly, and the capacitance of the plate capacitor is changed in an inverse proportion function.
In one embodiment, the upper deformable structure 140 and the lower deformable structure 190 each comprise a multi-layer film structure. In the multilayer film structure, the film positioned at the top layer and the film positioned at the bottom layer can deform along with the change of temperature, and the film positioned in the middle plays a supporting role. When receiving an optical signal, the deformation amount of the film positioned at the top layer in the upper deformation structure 140 is smaller than that of the film positioned at the bottom layer. The lower deformable structure 190 has a greater amount of deformation in the top layer of film than in the bottom layer of film. Fig. 5 is a schematic diagram of the upper and lower deformed structures 140 and 190 without deformation, and fig. 6 is a schematic diagram of the upper and lower deformed structures 140 and 190 after deformation. The multi-layer film of the upper deformation structure is configured into a structure with unmatched thermal expansion coefficients, the top layer film of the upper deformation structure is a film with a smaller thermal expansion coefficient, and the bottom layer film of the upper deformation structure is a film with a larger thermal expansion coefficient. Through such setting, go up the surface absorption infrared light of micro-bridge structure and arouse the temperature rise after, go up snakelike roof beam structure and take place upwards warpage, drive micro-bridge structure translation upwards.
The thermal expansion coefficients of the multiple layers of films of the lower deformation structure are not matched, and the film setting mode is opposite to that of the films of the upper deformation structure. That is, the top film of the lower deformation structure is a film with a larger thermal expansion coefficient, the bottom film of the lower deformation structure is a film with a smaller thermal expansion coefficient, and the lower deformation structure 190 is deformed and bent downward. The sensitive layer on the surface of the upper microbridge is made of materials with the same thermal expansion coefficient, and does not deform when the temperature rises. When the joint of the upper snake-shaped beam structure and the upper electrode structure is warped or the joint of the lower snake-shaped beam structure and the lower electrode structure is warped, the corresponding electrode structure is driven to move up and down in parallel, so that the capacitance of the flat capacitor and the capacitance of the interdigital capacitor are changed linearly, the capacitance change of the whole structure is easier to simulate and calculate by using a model, and the performance of a product is improved.
Through letting go up electric connection support structure 120 through last snakelike beam structure 130 and last electrode structure be connected, let down electric connection support structure 180 through snakelike beam structure 170 and lower electrode structure be connected, form two cantilever beam structures, under same shining, two cantilever beam structures's the capacitance variation is bigger than single cantilever beam structure's capacitance variation, and the sensitivity of mixing imaging detector chip is higher, and the performance is more excellent.
In one embodiment, as shown in fig. 7, the lower electrode structure is connected to the upper electrode connection support structure 120 through the lower serpentine beam structure 170, and a lower deformation structure 190 is disposed at a connection portion between the lower serpentine beam structure 170 and the lower electrode structure, the lower deformation structure 190 is configured to deform when receiving an optical signal, so as to drive the lower electrode structure to move up and down in parallel with the upper electrode structure, so that the capacitance of the interdigital capacitor changes linearly, and the capacitance of the plate capacitor changes in an inverse proportional function. That is, the upper electrode structure and the lower electrode structure are connected with the same electric connection supporting structure, the lower electric connection supporting structure 180 is not required to be arranged, a CMOS reading circuit connected with the lower electric connection supporting structure 180 is not required to be arranged, and the structure of the hybrid imaging detector chip can be simplified.
Because the upper deformation structure 140 is arranged at the connection position of the upper serpentine beam structure 130 and the upper electrode structure, the upper interdigital electrode 111 can move up and down in parallel relative to the lower interdigital electrode 117, compared with a scheme that the upper interdigital electrode 111 rotates relative to the lower interdigital electrode 117 due to the fact that a sensitive layer on the surface of the upper electrode structure warps, the distance between the upper interdigital electrode 111 and the lower interdigital electrode 117 can be designed to be more compact, the upper interdigital electrode and the lower interdigital electrode are distributed more densely, the interdigital capacitance and the variation thereof are larger, and the brightness of the detector mixed with imaging is higher. Based on the above technical concept, the present application also provides the structure of the upper interdigital electrode 111 and the lower interdigital electrode 117 shown in fig. 8 to 10.
As shown in fig. 1 and 8, the upper interdigital electrode 111 and the lower interdigital electrode 117 form a multilayer structure from inside to outside, the lower interdigital electrode 117 at the innermost layer is disc-shaped, the lower interdigital electrode 117 located outside the lower interdigital electrode at the innermost layer is annular, the upper interdigital electrode 111 is also annular, and the upper interdigital electrode 111 is adjacent to at least one lower interdigital electrode 117, so that an interdigital capacitor is formed between two adjacent upper interdigital electrodes and lower interdigital electrodes, the upper interdigital electrode 111 is connected to the upper flat plate electrode 112, and the lower interdigital electrode 117 is connected to the lower flat plate electrode 116.
In an embodiment, when the upper interdigital electrode 111 and the lower interdigital electrode 117 are annular, the thickness d2 of the upper interdigital electrode 111 is smaller than the thickness d1 of the lower interdigital electrode 117, and by such an arrangement, the torque borne by the cantilever beam can be reduced, so that the structural reliability of the detector is improved.
As shown in fig. 1 and 9, the upper interdigital electrode 111 and the lower interdigital electrode 117 form a multilayer structure from the inside to the outside, the plurality of lower interdigital electrodes 117 having a sector shape at the innermost layer form a disc-shaped structure, the lower interdigital electrodes 117 having a sector shape outside the innermost layer form an annular ring-shaped structure, a portion of the upper interdigital electrode 111 has an annular ring shape, the annular upper interdigital electrode 111 is adjacent to the plurality of lower interdigital electrodes 117 having a sector shape, another portion of the upper interdigital electrode 111 is further radial, the radial upper interdigital electrode 111 is located between two adjacent lower interdigital electrodes 117 having a sector shape, the radial upper interdigital electrode 111 and the annular upper interdigital electrode 111 are connected to each other and then connected to the upper plate electrode 112, the lower interdigital electrode 117 and the lower plate electrode 116 are connected, and by such arrangement, the arrangement density of the upper interdigital electrode and the lower interdigital electrode can be made higher under the same projection area, therefore, the capacitance variation caused by infrared irradiation can be increased, and the sensitivity of the detector is improved.
In an embodiment, the thickness d2 of the annular upper interdigital electrode 111 is smaller than the thickness d1 of the sector-shaped lower interdigital electrode 117, and by such arrangement, the torque borne by the cantilever beam can be reduced, thereby improving the structural reliability of the detector.
As shown in fig. 1 and 10, the upper interdigital electrode 111 and the lower interdigital electrode 117 are both in a strip shape, the upper interdigital electrode 111 is distributed in a grid shape, and the lower interdigital electrode 117 is distributed in a matrix shape. In the upper interdigital electrodes 111 arranged in a grid shape, the upper interdigital electrodes 111 arranged in a transverse direction are located between two rows of lower interdigital electrodes 117, and the upper interdigital electrodes 111 arranged in a longitudinal direction are located between two columns of lower interdigital electrodes 117. The upper interdigital electrode 111 is connected to the upper plate electrode 112, and the lower interdigital electrode 117 is connected to the lower plate electrode 116. Through so setting up, can make under the same projection area and go up interdigital electrode and interdigital electrode down set up the density higher to can increase and arouse the electric capacity variation quantity after the infrared irradiation, and then improve the sensitivity of detector.
In an embodiment, the thickness d2 of the upper interdigital electrode 111 in the shape of the # -is smaller than the thickness d1 of the lower interdigital electrode 117 in the shape of the rectangular array, so that the torque borne by the cantilever beam can be reduced, and the structural reliability of the detector can be improved.
In the above technical scheme, a deformation structure is arranged at the position where the upper serpentine beam structure is connected with the electrode of the upper micro-bridge structure, and deformation is generated under the irradiation of an optical signal, and the sensitive layer on the upper micro-bridge structure is not deformed, that is, the surface of the upper micro-bridge structure is not deformed, through the arrangement, the upper interdigital electrode is driven by the deformation structure to move in parallel along the vertical direction, the relative area between the upper interdigital electrode and the lower interdigital electrode is changed, the distance between the upper flat plate electrode and the lower flat plate electrode is changed, so that the capacitance formed by the upper interdigital electrode and the lower interdigital electrode is changed linearly, the change rule of the flat plate capacitance formed by the flat plate electrode is also easily obtained, and the infrared light intensity is easily obtained according to the change amount of the capacitance. And then the upper interdigital electrode and the lower interdigital electrode are in a circular ring array, a sector array and a # -shaped array, so that the upper interdigital electrode and the lower interdigital electrode are more closely arranged, the electrode density is higher under the same projection area, the capacitance change of a capacitor formed by the upper interdigital electrode and the lower interdigital electrode is larger when deformation occurs, and the sensitivity of the infrared detector is improved.
Other embodiments of the present application will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the invention following, in general, the principles of the application and including such departures from the present disclosure as come within known or customary practice within the art to which the invention pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the application being indicated by the following claims.
It will be understood that the present application is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the application is limited only by the appended claims.
Claims (13)
1. A hybrid imaging detector chip based on a semiconductor integrated Circuit (CMOS) process, comprising: the CMOS readout circuit comprises a substrate, a visible light sensing area, CMOS readout circuits, an upper suspended micro-bridge structure, a lower suspended micro-bridge structure, an upper power connection support structure, an upper serpentine beam structure, a voltage variable resistor and an air gap transistor, wherein the visible light sensing area is positioned at the bottom of the substrate, the CMOS readout circuits are positioned at two sides of the visible light sensing area, the upper suspended micro-bridge structure and the lower suspended micro-bridge structure are positioned at the top of the substrate, the voltage variable resistor is positioned at the contact position of the upper serpentine beam structure and the upper power connection support structure, and the air gap transistor is formed between the lower micro-bridge structure and the substrate;
a channel of the air gap transistor is formed on the top of the substrate, a source electrode and a drain electrode are arranged on two sides of the channel, and air between the lower micro-bridge structure and the substrate is used as a grid dielectric layer so as to form the air gap transistor between the lower micro-bridge structure and the substrate;
wherein a diode is arranged in the visible light sensing area; when the lower microbridge structure absorbs the upper and lower offset of the position where infrared light occurs, so that the height of the air gap transistor is changed, the source-drain current of the air gap transistor is changed.
2. The chip of claim 1, wherein the diode is a diode provided with a silicon-based PN junction or a contact diode composed of a metal and a silicon substrate.
3. The chip of claim 2, wherein a channel of an air gap transistor is formed on top of the substrate, and the electrode material on the lower microbridge structure is tungsten.
4. The chip according to any of claims 1 to 3, wherein the chip further comprises: an upper deformation structure;
the upper micro-bridge structure comprises an upper electrode structure, and the upper electrode structure comprises an upper flat electrode and an upper interdigital electrode; the lower micro-bridge structure comprises a lower electrode structure, and the lower electrode structure comprises a lower flat electrode and a lower interdigital electrode; the upper flat plate electrode and the lower flat plate electrode form a flat plate capacitor; the upper interdigital electrode and the lower interdigital electrode form an interdigital capacitor;
the upper electrode structure is connected with the upper electric connection supporting structure through an upper snake-shaped beam structure, and the upper electric connection supporting structure is positioned on the substrate; a metal through hole is arranged in the substrate and is connected with a CMOS reading circuit, and the metal through hole is also connected with an electrode layer in the upper electric connection supporting structure;
go up serpentine beam structure with the connecting portion of last electrode structure are equipped with go up deformation structure, go up deformation structure and be used for taking place deformation when receiving the light signal, in order to drive go up electrode structure relative lower electrode structure parallel translation from top to bottom, so that the electric capacity of interdigital capacitor is linear change, so that the electric capacity of plate capacitor is the inverse proportion function change.
5. The chip of claim 4, wherein the upper deformable structure comprises a multilayer thin film structure; wherein the coefficient of deformation of the film on the top layer is different from the coefficient of deformation of the film on the bottom layer.
6. The chip of claim 5, wherein the amount of deformation of the film on the top layer is less than the amount of deformation of the film on the bottom layer upon receiving the optical signal.
7. The chip of claim 4, wherein the chip further comprises: a lower serpentine beam structure and a lower deformation structure;
the lower electrode structure is connected with the upper electrode connecting and supporting structure through a lower snake-shaped beam structure, a lower deformation structure is arranged at the connecting part of the lower snake-shaped beam structure and the lower electrode structure, and the lower deformation structure is used for deforming when receiving an optical signal so as to drive the lower electrode structure to move up and down in parallel relative to the upper electrode structure, so that the capacitance of the interdigital capacitor is changed linearly, and the capacitance of the flat capacitor is changed in an inverse proportion function;
or
The chip further comprises: the lower serpentine beam structure, the lower deformation structure and the lower electric connection support structure;
the lower electrode structure is connected with the lower electric connection supporting structure through a lower snake-shaped beam structure, the lower snake-shaped beam structure and the connecting part of the lower electrode structure are provided with a lower deformation structure, and the lower deformation structure is used for deforming when receiving an optical signal so as to drive the lower electrode structure to move up and down in parallel relative to the upper electrode structure, so that the capacitance of the interdigital capacitor is linearly changed, and the capacitance of the flat capacitor is changed in an inverse proportion function.
8. The chip of claim 7, wherein a plane of serpentine extension of the upper serpentine beam structure is perpendicular to a plane of the upper plate electrode; and the snake-shaped extension plane of the lower snake-shaped beam structure is vertical to the plane of the lower flat plate electrode.
9. The chip of claim 7, wherein the lower deformable structure comprises a multilayer thin film structure;
upon receiving an optical signal, the amount of deformation of the film on the top layer is greater than the amount of deformation of the film on the bottom layer.
10. The chip of claim 4, wherein the upper microbridge structure further comprises a sensitive layer on an infrared absorbing layer on the upper plate electrode; the sensitive layer comprises a multilayer thin film structure; the coefficient of deformation of the film on the top layer is the same as the coefficient of deformation of the film on the bottom layer.
11. The chip according to claim 4, wherein the upper interdigital electrode and the lower interdigital electrode form a multilayer structure from inside to outside, the lower interdigital electrode on the innermost layer is disc-shaped, the upper interdigital electrode and the lower interdigital electrode outside the innermost layer are both ring-shaped, and each upper interdigital electrode is adjacent to at least one lower interdigital electrode.
12. The chip according to claim 4, wherein the upper interdigital electrode and the lower interdigital electrode form a multilayer structure from inside to outside, the innermost plurality of lower interdigital electrodes in a sector shape form a disc-shaped structure, the plurality of lower interdigital electrodes in a sector shape outside the innermost layer form a circular ring-shaped structure, a part of the upper interdigital electrode is circular ring-shaped, a part of the upper interdigital electrode is radial, each circular ring-shaped upper interdigital electrode is adjacent to the plurality of lower interdigital electrodes in a sector shape, the radial upper interdigital electrode is located between two adjacent lower interdigital electrodes in a sector shape, and the radial upper interdigital electrode and the circular ring-shaped upper interdigital electrode are connected with each other.
13. The chip according to claim 4, wherein the upper interdigital electrode and the lower interdigital electrode are both in a strip shape, the upper interdigital electrode is distributed in a shape like a Chinese character jing, the lower interdigital electrode is distributed in a matrix, the upper interdigital electrode distributed transversely is located between two rows of lower interdigital electrodes, and the upper interdigital electrode distributed longitudinally is located between two columns of lower interdigital electrodes.
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