CN113421870B - Metal bump packaging structure and preparation method thereof - Google Patents

Metal bump packaging structure and preparation method thereof Download PDF

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Publication number
CN113421870B
CN113421870B CN202110978426.4A CN202110978426A CN113421870B CN 113421870 B CN113421870 B CN 113421870B CN 202110978426 A CN202110978426 A CN 202110978426A CN 113421870 B CN113421870 B CN 113421870B
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metal
layer
step surface
metal layer
disposed
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CN113421870A (en
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何正鸿
徐玉鹏
钟磊
李利
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Forehope Electronic Ningbo Co Ltd
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Forehope Electronic Ningbo Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/11011Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
    • H01L2224/11019Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for protecting parts during the process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13005Structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/1301Shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/1301Shape
    • H01L2224/13016Shape in side view
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/1302Disposition
    • H01L2224/13023Disposition the whole bump connector protruding from the surface

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)

Abstract

The embodiment of the invention provides a metal bump packaging structure and a preparation method thereof, and relates to the technical field of semiconductor packaging. According to the invention, by arranging the first drainage groove, the liquid residue in the etching process of the metal conductive layer region at the bottom of the welding bulge can be more effectively reduced, so that the problem of undercut opening of the metal conductive layer region at the bottom of the welding bulge is avoided, and meanwhile, the protective layer can have a certain deformation allowance in the horizontal direction, and the buffer effect can be achieved. Meanwhile, the surface roughness of the protective layer can be increased by arranging the first drainage groove, so that the bonding strength between the underfill adhesive and the protective layer is improved, and the structural stability of the product is improved.

Description

Metal bump packaging structure and preparation method thereof
Technical Field
The invention relates to the technical field of semiconductor packaging, in particular to a metal bump packaging structure and a preparation method thereof.
Background
With the rapid development of the semiconductor industry, the flip chip package structure is widely applied to the semiconductor industry, and the flip chip package utilizes the bumps to electrically connect the chip and the substrate. The bump comprises a copper column, a metal layer (UBM), a protective layer (Polyimide), and a tin Cap (Sn Cap), wherein after the UBM is manufactured, the redundant metal layer needs to be etched and removed, and the Polyimide is extremely easy to absorb water, so that etching liquid on the side wall of the UBM at the bottom of the metal column is remained, so that the bottom of the bump of the copper column is excessively corroded to form an undercut opening, and the bump chip has the problem that the bump of the copper column falls off when a reliability test is carried out.
In addition, in carrying out packaging technology to flip-chip copper post lug, on flip-chip welding and the base plate, along with copper post lug's interval is littleer and more, often adopt underfill to fill the protection to the flip-chip bottom, in order to increase the adhesive strength of underfill and chip surface protection layer, often use plasma bombardment organic surface, borrow this roughness on improvement organic matter surface, promote the adhesive strength of underfill, the technology is complicated. However, if silicon nitride or silicon nitride is used as the passivation layer, the plasma bombardment has a poor effect on the surface roughness, which results in a decrease in the adhesion strength between the underfill and the passivation layer, and is not favorable for the stability of the product.
Disclosure of Invention
The present invention provides a metal bump package structure and a method for manufacturing the same, which can improve the reliability of the structure, prevent the copper pillar bump from dropping, and improve the stability of the product.
Embodiments of the invention may be implemented as follows:
in a first aspect, the present invention provides a metal bump package structure, including:
a substrate chip;
the conductive bonding pad is arranged on the surface of the substrate chip;
the protective layer is arranged on the surface of the substrate chip, a pad opening is arranged on the protective layer, and the pad opening corresponds to the conductive pad, so that at least part of the surface of the conductive pad is positioned in the pad opening;
the metal conducting layer is arranged on the surface of the conducting pad;
a solder bump disposed on the metal conductive layer;
the surface of the protective layer is provided with a first step surface and a second step surface, the first step surface surrounds the welding lug, the second step surface surrounds the first step surface, the first step surface is larger than the height of the substrate chip, the second step surface is larger than the height of the substrate chip, the first step surface is connected with the second step surface through a slope, and at least one first drainage groove is formed in the slope.
In an alternative embodiment, the first step surface is provided with at least one second drainage groove, and the second drainage groove is spaced from the welding lug.
In an alternative embodiment, at least one third drain groove is provided on the second step surface.
In an optional embodiment, a waterproof layer is further disposed on the slope, and the waterproof layer is recessed at the first drainage groove and covers the side wall and the bottom wall of the first drainage groove.
In an optional embodiment, a containing groove is formed in the slope, the first water drainage groove is formed in the bottom wall of the containing groove, and the thickness of the containing groove is the same as that of the waterproof layer.
In an alternative embodiment, the number of the first drain grooves is three, and each of the three first drain grooves is recessed downward in a direction perpendicular to the slope surface.
In an optional embodiment, the metal conductive layer includes a first metal layer and a second metal layer, the first metal layer is disposed on the conductive pad, the second metal layer is disposed on the first metal layer, the solder bump is disposed on a side of the second metal layer away from the substrate chip, the first metal layer is used for bonding the second metal layer and the conductive pad, and the second metal layer is used for blocking diffusion atoms between the first metal layer and the solder bump.
In an optional embodiment, the metal conductive layer further includes a third metal layer, the third metal layer is disposed between the second metal layer and the solder bump, and the third metal layer is used for wetting the solder bump and the second metal layer in a transition manner, so as to improve a bonding force between the second metal layer and the solder bump.
In an optional embodiment, the solder bump includes a metal pillar, a fourth metal layer, and a cap layer, the metal pillar is disposed on the metal conductive layer, the fourth metal layer is disposed on the metal pillar, the cap layer is disposed on the fourth metal layer, and the fourth metal layer is used to block diffusion atoms between the cap layer and the metal pillar.
In a second aspect, the present invention provides a method for manufacturing a metal bump package structure, for manufacturing the metal bump package structure according to any one of the foregoing embodiments, including:
providing a substrate chip with a conductive pad;
forming a protective layer on the surface of the substrate chip;
etching a pad opening and at least one first drainage groove on the surface of the protective layer, wherein the pad opening corresponds to the conductive pad so that at least part of the surface of the conductive pad is positioned in the pad opening;
forming a metal conducting layer on the surface of the conducting pad;
forming a welding lug on the metal conducting layer;
the surface of the protective layer is provided with a first step surface and a second step surface, the first step surface surrounds the welding lug, the second step surface surrounds the first step surface, the height of the first step surface relative to the substrate chip is larger than that of the second step surface relative to the substrate chip, the first step surface is connected with the second step surface through a slope, and the first drainage groove is formed in the slope.
The beneficial effects of the embodiment of the invention include, for example:
according to the metal bump packaging structure and the manufacturing method thereof provided by the embodiment of the invention, the first step surface and the second step surface of the protective layer are connected through the slope, the slope is provided with the at least one first drainage groove, the first drainage groove is formed, the liquid residue in the etching process of the metal conducting layer region at the bottom of the welding protrusion can be effectively reduced, the etching liquid can be discharged along the first drainage groove, the problem of undercut opening of the metal conducting layer region at the bottom of the welding protrusion is avoided, and meanwhile, the etching liquid can better flow into the first drainage groove by adopting the design of the slope. Moreover, the first drainage groove is formed, so that the protective layer has a certain deformation allowance in the horizontal direction, the stress in the horizontal direction is absorbed, the buffering effect can be achieved, and the structural stability of the product is facilitated. Simultaneously, can increase the surface roughness of protective layer through seting up first drainage tank, when pasting the dress chip, the underfill can be filled in first drainage tank to promote the adhesive strength between underfill and the protective layer, promoted the structural stability of product, it has also avoided adopting the mode on plasma bombardment surface to improve the surface roughness of protective layer. Compared with the prior art, the invention can improve the reliability of the packaging structure, avoid the welding projection from falling off, and simultaneously has higher structural stability of the product.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
Fig. 1 is a general schematic view of a metal bump package structure according to a first embodiment of the invention;
FIG. 2 is an enlarged partial view of II in FIG. 1;
fig. 3 is a partial schematic view of a metal bump package structure according to a first embodiment of the invention;
fig. 4 is a schematic view of a metal bump package structure according to a second embodiment of the invention;
fig. 5 is a schematic view of a metal bump package structure according to a third embodiment of the invention;
fig. 6 is an assembly diagram of a metal bump package structure according to a third embodiment of the invention;
fig. 7 is a block diagram illustrating a method for manufacturing a metal bump package structure according to a fourth embodiment of the invention;
fig. 8 to fig. 11 are process flow diagrams of a method for manufacturing a metal bump package structure according to a fourth embodiment of the invention.
Icon: 100-metal bump package structure; 110-substrate chip; 130-a conductive pad; 150-a protective layer; 151-pad opening; 153-a first step face; 1531 — a second drainage channel; 155-a second step face; 1551-third drainage tank; 157-ramp; 1571-first drain tank; 159-a waterproof layer; 1591-holding groove; 170-metal conductive layer; 171-a first metal layer; 173-second metal layer; 175-a third metal layer; 190-solder bumps; 191-a metal post; 193-a fourth metal layer; 195-a cap layer; 200-a substrate; 210-filling glue.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. The components of embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
In the description of the present invention, it should be noted that if the terms "upper", "lower", "inside", "outside", etc. indicate an orientation or a positional relationship based on that shown in the drawings or that the product of the present invention is used as it is, this is only for convenience of description and simplification of the description, and it does not indicate or imply that the device or the element referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and thus should not be construed as limiting the present invention.
Furthermore, the appearances of the terms "first," "second," and the like, if any, are used solely to distinguish one from another and are not to be construed as indicating or implying relative importance.
As disclosed in the background, the conventional flip chip is usually electrically connected to the substrate in the form of a copper pillar bump, and the copper pillar bump structure usually includes a copper pillar, a metal layer, a protective layer and a tin cap, wherein the protective layer is usually Polyimide (Polyimide). The existing copper pillar bump structure generally has the following problems:
1. after the metal layer UBM is manufactured, the redundant metal layer is usually required to be etched and removed, the metal layer above the aluminum pad is reserved, at the moment, due to the fact that Polyimide (Polyimide) is extremely easy to absorb water, etching liquid of a UBM side wall at the bottom of the metal column is remained, the problem that the bottom of a copper column lug is excessively corroded to generate an undercut opening is caused, and when a reliability test is carried out on a lug chip, the copper column lug has the risk of falling.
2. The flip-chip bottom needs to be filled the protection, often adopts the underfill to fill, in order to increase the adhesive strength of underfill and chip surface protection layer, often uses plasma bombardment organic surface, borrows this roughness that improves the organic matter surface, promotes the adhesive strength of underfill, and the technology is complicated, and the effect is improved relatively poorly. Meanwhile, if a material such as silicon nitride or silicon nitride is used as the passivation layer, the plasma bombardment has a poor effect on the surface roughness.
3. If the bottom of the copper pillar bump in the prior art is completely connected with the chip electrode, the stress on the copper pillar bump is easily caused to directly act on the chip electrode, and the problem of chip electrode cracking exists.
In order to solve the above problems, the present invention provides a novel metal bump package structure and a method for manufacturing the same, and it should be noted that, in a non-conflicting manner, features in the embodiments of the present invention may be combined with each other.
First embodiment
Referring to fig. 1 and fig. 2 in combination, the present embodiment provides a metal bump package structure 100, which can improve the reliability of the package structure and has higher structural stability of the product.
The metal bump package structure 100 provided by this embodiment includes a substrate chip 110, a conductive pad 130, a protection layer 150, a metal conductive layer 170 and a solder bump 190, wherein the conductive pad 130 is disposed on a surface of the substrate chip 110, the protection layer 150 is disposed on the surface of the substrate chip 110, the protection layer 150 is provided with a pad opening 151, the pad opening 151 corresponds to the conductive pad 130, so that at least a portion of a surface of the conductive pad 130 is located in the pad opening 151, the conductive pad 130 is exposed out of the protection layer 150, the metal conductive layer 170 is disposed on the surface of the conductive pad 130 and extends from the pad opening 151 to the surface of the protection layer 150, the solder bump 190 is disposed on the metal conductive layer 170, wherein the surface of the protection layer 150 has a first step surface 153 and a second step surface 155, the first step surface 153 is disposed around the solder bump 190, the second step surface 155 is disposed around the first step surface 153, the height of the first step surface 153 relative to the substrate chip 110 is greater than the height of the second step surface 155 relative to the substrate chip 110, the first step surface 153 and the second step surface 155 are connected through a slope 157, and at least one first drainage groove 1571 is arranged on the slope 157.
In the present embodiment, the substrate chip 110 is a conventional flip chip, the conductive pads 130 are electrically connected to electrodes of the flip chip and are electrically connected to the solder bumps 190 through the metal conductive layer 170, and the solder bumps 190 are used for being connected to pads on the substrate, so as to realize the electrical connection between the flip chip and the substrate.
Here, the protection layer 150 is made of Polyimide (Polyimide) material, when forming the protection layer 150, a coater is used to uniformly coat the liquid Polyimide on the surface of the substrate chip 110 by spin coating, a Hot plate (Hot plate) is used to perform soft baking (soft cake) for forming a film, an exposure machine is used to shield the position of the predetermined opening of the protection layer 150 (Polyimide) by a mask in a Proximity (Proximity) method without exposing to light, and a developing method is used to Spray (Spray) a developing solution to remove the unexposed area from the position of the pad opening 151 and the drainage groove, wherein the first step surface 153, the second step surface 155 and the slope 157 can be etched by different etching solutions to different depths. Then, an Oven (Oven) is used to heat and cure the protection layer 150 (Polyimide) to a stable state of complete curing, and a plasma photoresist remover (Descum) is used to remove organic contaminants on the surface of the protection layer 150 (Polyimide) or residues in the opening, thereby completing the process of leaking out the conductive bonding pad. Of course, the passivation layer may be silicon nitride or silicon nitride.
In this embodiment, the first step surface 153 and the second step surface 155 are both parallel to the surface of the substrate chip 110, the first step surface 153 is higher than the second step surface 155, and the first step surface 153 and the second step surface 155 are connected by a slope 157, so that the etching solution after etching is performed can flow from the first step surface 153 to the second step surface 155 along the slope 157 under the action of gravity, and when the etching solution flows through the slope 157, the etching solution can flow into the first water drainage tank 1571, which accelerates the flowing of the etching solution from the first step surface 153, thereby avoiding the accumulation of the etching solution on the first step surface 153, avoiding the occurrence of an undercut opening in the metal conductive layer 170, and improving the bonding strength of the solder bump 190. That is to say, the first water drainage groove 1571 is provided here, so that liquid residue generated during etching of the metal conductive layer 170 area at the bottom of the solder bump 190 can be reduced more effectively, the etching liquid can be discharged along the first water drainage groove 1571, the problem of undercut opening in the metal conductive layer 170 area at the bottom of the solder bump 190 is avoided, and meanwhile, the etching liquid can better flow into the first water drainage groove 1571 by adopting the design of the slope 157.
In this embodiment, the number of the first drainage grooves 1571 is plural, preferably 3, and 3 first drainage grooves 1571 are recessed downward along a direction perpendicular to the slope 157, and by forming the plural first drainage grooves 1571, the protection layer 150 can have a certain deformation margin in the horizontal direction, absorb the stress in the horizontal direction, play a role of buffering, and contribute to the structural stability of the product. Moreover, the plurality of first drainage grooves 1571 are formed, so that the surface roughness of the protective layer 150, particularly the slope 157 is improved, when a chip is mounted, the filling adhesive at the bottom can be filled in the first drainage grooves 1571, the bonding strength between the filling adhesive and the protective layer 150 is improved, the structural stability of a product is improved, the surface roughness of the protective layer 150 is prevented from being improved by adopting a plasma bombardment surface mode, and the process is simplified.
In this embodiment, the slope 157 is further provided with a waterproof layer 159, and the waterproof layer 159 is recessed at the first drain groove 1571 and covers the side wall and the bottom wall of the first drain groove 1571. Specifically, the thickness of the waterproof layer 159 is smaller than the width of the first drain groove 1571, and the waterproof layer 159 is recessed downward at the first drain groove 1571 to cover the side wall and the bottom wall of the first drain groove 1571. Here, the waterproof layer 159 may be formed by coating or electroplating, and a waterproof material is used, and the waterproof layer 159 is formed on the first water drainage groove 1571 and the slope 157, so that the hydrophobicity of the surfaces of the first water drainage groove 1571 and the slope 157 can be improved, and thus the etching solution can be better drained, and an undercut opening at the bottom metal conductive layer 170 is further avoided.
Here, the waterproof layer 159 may be formed by plating using a metal material such as titanium, gold, or chromium, or may be formed by coating using a non-metal material such as a polymer such as polyvinyl chloride, polyisobutylene, polyurethane, or resin. Preferably, the waterproof layer 159 is made of a non-metallic material, so that the material of the waterproof layer 159 can also be used as a buffer material to achieve a certain buffer effect, and further prevent the generation of local stress after the encapsulation is completed.
In this embodiment, the slope 157 is further provided with an accommodating groove 1591, the first water drainage groove 1571 is disposed on the bottom wall of the accommodating groove 1591, and the thickness of the accommodating groove 1591 is the same as the thickness of the waterproof layer 159. Specifically, the accommodating groove 1591 may be formed together with the first water drainage groove 1571, and by providing the accommodating groove 1591, after the waterproof layer 159 is formed, the upper and lower sides of the waterproof layer 159 may be respectively aligned with the first step surface 153 and the second step surface 155, so that it is ensured that the etching solution on the first step surface 153 may flow down to the slope 157 and flow down to the second step surface 155, and it is avoided that the edge of the first step surface 153 or the edge of the second step surface 155 blocks and remains a small amount of etching solution.
In the embodiment, the slope of the slope 157 is 5-20 °, and the size (length, width, and depth) of the first drainage groove 1571 is 2 μm × 3 μm × 5 μm, wherein the slope of the slope 157 and the size of the first drainage groove 1571 can be modified as required.
Referring to fig. 3, the metal conductive layer 170 includes a first metal layer 171 and a second metal layer 173, the first metal layer 171 is disposed on the conductive pad 130, the second metal layer 173 is disposed on the first metal layer 171, the solder bump 190 is disposed on a side of the second metal layer 173 away from the substrate chip 110, the first metal layer 171 is used for adhering the second metal layer 173 and the conductive pad 130, and the second metal layer 173 is used for blocking diffusion atoms between the first metal layer 171 and the solder bump 190.
Further, the metal conductive layer 170 further includes a third metal layer 175, the third metal layer 175 is disposed between the second metal layer 173 and the solder bump 190, and the third metal layer 175 is used for wetting the solder bump 190 and the second metal layer 173 to improve the bonding force between the second metal layer 173 and the solder bump 190.
It should be noted that, here, the first metal layer 171, the second metal layer 173, and the third metal layer 175 are sequentially stacked, wherein the conductive pad 130 is an aluminum pad, the first metal layer 171 plays a role in adhesion, the material of the first metal layer is titanium (Ti), the titanium layer has a very high metal adhesion performance, which can greatly improve the bonding force between the second metal layer 173 and the conductive pad 130, and the thickness of the first metal layer 171 is between 4 μm and 6 μm. The second metal layer 173 is made of metal materials such as nickel, vanadium, chromium, etc., the second metal layer 173 can play a role in blocking, so as to prevent an atomic diffusion phenomenon between the first metal layer 171 and the solder bump 190, and the thickness of the second metal layer 173 is between 4 μm and 6 μm. The third metal layer 175 is made of the same material as the bottom of the solder bump 190, both of which are made of copper, and the third metal layer 175 plays a role in wetting and can play a role in transitionally wetting the upper solder bump 190 and the lower second metal layer 173, so that the bottom bonding force of the solder bump 190 is further improved, and the third metal layer 175 is prevented from falling off, and has a thickness of 2-4 μm.
In the present embodiment, the solder bump 190 includes a metal pillar 191, a fourth metal layer 193, and a cap layer 195, the metal pillar 191 is disposed on the metal conductive layer 170, the fourth metal layer 193 is disposed on the metal pillar 191, the cap layer 195 is disposed on the fourth metal layer 193, and the fourth metal layer 193 is used to block diffusion atoms between the cap layer 195 and the metal pillar 191. Specifically, the metal pillar 191 is a copper pillar, the copper pillar extends into the pad opening 151 and contacts the third metal layer 175, and the cap layer 195 is made of tin material and forms a ball shape, so as to form a solder ball, which is conveniently soldered on the pad of the substrate. The fourth metal layer 193 is at least one of nickel and vanadium, and can prevent tin atoms on the top solder ball from diffusing to the copper pillar.
In summary, the embodiment provides a metal bump package structure 100, by providing the first water drainage groove 1571 on the slope 157, the liquid residue generated during etching of the metal conductive layer 170 area at the bottom of the solder bump 190 can be more effectively reduced, and the etching liquid can be discharged along the first water drainage groove 1571, so that the problem of undercut opening in the metal conductive layer 170 area at the bottom of the solder bump 190 is avoided, and meanwhile, the etching liquid can better flow into the first water drainage groove 1571 by adopting the design of the slope 157. In addition, the first drainage groove 1571 is provided, so that the protective layer 150 has a certain deformation margin in the horizontal direction, absorbs the stress in the horizontal direction, plays a role in buffering, and contributes to the structural stability of the product. Meanwhile, the surface roughness of the protective layer 150 can be increased by arranging the first drainage groove 1571, and when a chip is mounted, the underfill can be filled in the first drainage groove 1571, so that the bonding strength between the underfill and the protective layer 150 is improved, the structural stability of a product is improved, and the surface roughness of the protective layer 150 is also improved in a mode of bombarding the surface by plasma.
Second embodiment
Referring to fig. 4, the basic structure and principle of the metal bump package structure 100 and the technical effects thereof are the same as those of the first embodiment, and for the sake of brief description, reference may be made to the corresponding contents of the first embodiment for the parts not mentioned in this embodiment.
In this embodiment, the metal bump package structure 100 includes a substrate chip 110, a conductive pad 130, a protection layer 150, a metal conductive layer 170 and a solder bump 190, the conductive pad 130 is disposed on a surface of the substrate chip 110, the protection layer 150 is disposed on the surface of the substrate chip 110, and a pad opening 151 is disposed on the protection layer 150, the pad opening 151 corresponds to the conductive pad 130, so that at least a portion of a surface of the conductive pad 130 is located in the pad opening 151, so that the conductive pad 130 is exposed out of the protection layer 150, the metal conductive layer 170 is disposed on the surface of the conductive pad 130 and extends from the pad opening 151 to the surface of the protection layer 150, the solder bump 190 is disposed on the metal conductive layer 170, wherein the surface of the protection layer 150 has a first step surface 153 and a second step surface 155, the first step surface 153 is disposed around the solder bump 190, the second step surface 155 is disposed around the first step surface 153, the height of the first step surface 153 relative to the substrate chip 110 is greater than the height of the second step surface 155 relative to the substrate chip 110, the first step surface 153 and the second step surface 155 are connected through a slope 157, and at least one first drainage groove 1571 is arranged on the slope 157.
In this embodiment, at least one second drainage groove 1531 is disposed on the first step surface 153, and the second drainage groove 1531 is spaced apart from the solder bump 190. Specifically, the second water drainage groove 1531 may be a plurality of second water drainage grooves 1531 disposed at intervals on the first step surface 153 and located at the edge of the metal conductive layer 170, and the second water drainage groove 1531 is designed to allow the underfill to be better adhered to the first step surface 153 and to better fill the edge of the protection metal conductive layer 170. Meanwhile, by arranging the first water drainage groove 1571 and the second water drainage groove 1531, the adhesiveness can be greatly increased, and the surface roughness of the protective layer 150 of the chip is increased by using the water drainage grooves, so that the process steps of reducing the plasma bombardment are achieved, and the adhesive strength of the filling colloid is improved.
Third embodiment
Referring to fig. 5, the basic structure and principle of the metal bump package structure 100 and the technical effects thereof are the same as those of the first embodiment, and for the sake of brief description, reference may be made to the corresponding contents of the first embodiment for the parts not mentioned in this embodiment.
In this embodiment, the metal bump package structure 100 includes a substrate chip 110, a conductive pad 130, a protection layer 150, a metal conductive layer 170 and a solder bump 190, wherein the conductive pad 130 is disposed on a surface of the substrate chip 110, the protection layer 150 is disposed on the surface of the substrate chip 110, a pad opening 151 is disposed on the protection layer 150, the pad opening 151 corresponds to the conductive pad 130, so that at least a portion of a surface of the conductive pad 130 is located in the pad opening 151, the conductive pad 130 is exposed out of the protection layer 150, the metal conductive layer 170 is disposed on the surface of the conductive pad 130 and extends from the pad opening 151 to the surface of the protection layer 150, and the solder bump 190 is disposed on the metal conductive layer 170.
In this embodiment, the surface of the protection layer 150 has a first step surface 153 and a second step surface 155, the first step surface 153 is disposed around the solder bump 190, the second step surface 155 is disposed around the first step surface 153, the height of the first step surface 153 relative to the substrate chip 110 is greater than the height of the second step surface 155 relative to the substrate chip 110, the first step surface 153 and the second step surface 155 are connected by a slope 157, and at least one first drain groove 1571 is disposed on the slope 157. The first step surface 153 is provided with at least one second water drainage groove 1531, the second water drainage groove 1531 is spaced apart from the welding bump 190, and the second step surface 155 is provided with at least one third water drainage groove 1551.
In this embodiment, the first drain groove 1571, the second drain groove 1531 and the third drain groove 1551 are all three, the first drain groove 1571 is recessed downward in a direction perpendicular to the surface of the slope 157, the second drain groove 1531 is recessed downward in a direction perpendicular to the first step surface 153, the third drain groove 1551 is recessed downward in a direction perpendicular to the second step surface 155, the third drain groove 1551 is disposed at a lower side of the slope 157 to enable an underfill to be introduced onto the slope 157 by capillary action, the first drain groove 1571 is disposed on the slope 157 to enable a gel to be introduced into the second drain groove 1531, and the second drain groove 1531 is designed at an edge region of the metal conductive layer 170, wherein the underfill is capable of better filling down the edge of the protective metal conductive layer 170.
Specifically, referring to fig. 6, in actual mounting, the substrate chip 110 is mounted on the substrate 200, the filling adhesive layer 210 is disposed between the substrate 200 and the substrate chip 110, and the filling adhesive layer can be filled in the first drainage groove 1571 during dispensing, so that the adhesive strength between the underfill adhesive and the protective layer 150 is improved, the structural stability of the product is improved, the surface roughness of the protective layer 150 is prevented from being improved by adopting a plasma bombardment surface mode, and the process is simplified. Of course, the metal bump package structures 100 provided in the first and second embodiments have the same package form, and are not shown here.
The metal bump package structure 100 provided by this embodiment utilizes the three-section groove structure to greatly increase the adhesion, and utilizes the first water drainage groove 1571, the second water drainage groove 1531 and the third water drainage groove 1551 to increase the surface roughness of the protection layer 150 of the chip, so as to reduce the plasma bombardment process and improve the adhesion strength of the filling colloid. In addition, by adopting the three-stage structure, the protective layer 150 can have a certain deformation margin in the horizontal direction, absorb the stress in the horizontal direction, and play a role in buffering.
Fourth embodiment
Referring to fig. 7, the method for manufacturing a metal bump package structure provided in this embodiment is used to manufacture the metal bump package structure 100 provided in the first embodiment, the second embodiment, or the third embodiment.
In this embodiment, the method for manufacturing a metal bump package structure includes the following steps:
s1: a substrate die 110 with electrically conductive pads 130 is provided.
Referring to fig. 8 in combination, specifically, a substrate chip 110 prepared with a conductive pad 130 in advance is provided, wherein the substrate chip 110 may be a silicon wafer with an aluminum pad.
S2: a protective layer 150 is formed on the surface of the substrate chip 110.
Referring to fig. 9, specifically, the protection layer 150 is made of Polyimide (Polyimide) material, and when the protection layer 150 is formed, a coater is used to uniformly coat the liquid Polyimide on the surface of the substrate chip 110 by spin coating, and then a Hot plate (Hot plate) is used to perform soft baking (soft cake) to form a film.
S3: pad openings 151 and at least one first drain groove 1571 are etched into the surface of the protective layer 150.
Wherein the pad opening 151 corresponds to the conductive pad 130 such that at least a portion of the surface of the conductive pad 130 is located within the pad opening 151.
Referring to fig. 10, specifically, after the protective layer 150 is formed into a film, the position of the predetermined opening of the protective layer 150 (Polyimide) is masked by a mask in a Proximity type (Proximity) method without exposure to light by an exposure machine, and the unexposed region is removed by spraying (Spray) a developing solution in a developing manner to form the first drain groove 1571 and the position of the pad opening 151, wherein the first step surface 153, the second step surface 155 and the slope 157 can be obtained by etching different depths with different etching solutions. Then, an Oven (Oven) is used to heat and cure the protection layer 150 (Polyimide) to a stable state of complete curing, and a plasma photoresist remover (Descum) is used to remove organic contaminants on the surface of the protection layer 150 (Polyimide) or residues in the opening, thereby completing the process of leaking out the conductive bonding pad. Of course, the passivation layer may be silicon nitride or silicon nitride.
In this embodiment, the surface of the protective layer 150 is formed to have a first step surface 153 and a second step surface 155, the first step surface 153 is disposed around the solder bump 190, the second step surface 155 is disposed around the first step surface 153, the height of the first step surface 153 relative to the substrate chip 110 is greater than the height of the second step surface 155 relative to the substrate chip 110, the first step surface 153 and the second step surface 155 are connected by a slope 157, and the first drain groove 1571 is disposed on the slope 157.
Here, the pad opening 151 and the first water drainage groove 1571 are formed by exposure and development, and when the metal bump package structure 100 according to the second or third embodiment is prepared, the second water drainage groove 1531 and the third water drainage groove 1551 may be formed by exposure and development.
It should be noted that, after the first water drainage groove 1571 is formed, the accommodating groove 1591 with a certain depth may be etched with respect to the position of the water-proof layer 159, and the water-proof layer 159 may be formed in the accommodating groove 1591 by a sputtering process.
S4: a metal conductive layer 170 is formed on the surface of the conductive pad 130.
Referring to fig. 11 in combination, specifically, the metal conductive layer 170 includes a first metal layer 171, a second metal layer 173, and a third metal layer 175 that are sequentially stacked, the first metal layer 171 performs an adhesion function, and is made of titanium (Ti), and the titanium layer has an extremely high metal adhesion performance, so that a bonding force between the second metal layer 173 and the conductive pad 130 can be greatly improved. The second metal layer 173 is made of metal materials such as nickel, vanadium, and chromium, and the second metal layer 173 can play a role in blocking, thereby preventing an atomic diffusion phenomenon from occurring between the first metal layer 171 and the solder bump 190. The third metal layer 175 is made of the same material as the bottom of the solder bump 190, both of which are made of copper, and the third metal layer 175 plays a role in wetting, so that the solder bump 190 on the upper layer and the second metal layer 173 on the lower layer can be wetted in a transitional manner, thereby further improving the bottom bonding force of the solder bump 190 and avoiding falling off.
After the pad opening 151 and the first drain groove 1571 are formed, a photoresist/protective resist (photoresist) is coated on the surface of the substrate chip 110 again, a photolithography process (exposure/development/baking) is used to open the pad opening 151, and then an electroplating process is used to electroplate the first metal layer 171 in the pad opening 151, wherein the first metal layer 171 is a titanium layer with a thickness of 4 μm to 6 μm, and the titanium layer has an extremely high metal adhesion property. Compared with the conventional mode of firstly covering the metal layer and then etching to remove the redundant part, the peripheral area is covered by the photoresist, and the etching process is avoided by the pad opening 151 at the opening of the photoetching process, so that the problem of over-etching is avoided, and the formation of an undercut opening is avoided.
After the first metal layer 171 is formed, a second metal layer 173 is formed by an electroplating process, and the second metal layer 173 is a barrier layer, and may be made of nickel, vanadium, chromium, or the like, and has a thickness of 4 μm to 6 μm. After the second metal layer 173 is formed, an electroplating process is used to form a third metal layer 175, where the third metal layer 175 is a wetting layer made of a copper layer with a thickness of 2 μm to 4 μm, and the wetting layer is used to wet the upper copper pillar, thereby improving the bondability of the electroplated copper pillar.
S5: a solder bump 190 is formed on the metal conductive layer 170.
With continued reference to fig. 1, in particular, the solder bump 190 includes a metal pillar 191, a fourth metal layer 193, and a cap layer 195, wherein the metal pillar 191 is a copper layer, and the copper pillar is formed in the pad opening 151 by electroplating after the third metal layer 175 is formed. After the copper pillar is formed, a plasma photoresist stripper (Descum) is used to remove the excess photoresist, so as to form the structure with the copper pillar. The metal layer UBM sputtering and the formation of the electroplated copper column are simultaneously realized by utilizing the photoresist layer once, the process flow (the conventional process flow needs to independently carry out the electroplating of the metal layer and the copper column needs several photoresist processes) is greatly reduced, and the residual photoresist removing machine (Descum) is utilized again to remove the redundant photoresist to form the structure with the copper column.
After the copper pillar is formed, the photoresist layer is used again to cover the substrate chip 110, the opening of the copper pillar is opened by the photolithography process, then the electroplating process is used again to electroplate and form a fourth metal layer 193 in the pad opening 151, and the fourth metal layer 193 is used as a stop layer to prevent the atomic diffusion phenomenon. Specifically, the fourth metal layer 193 is at least one of nickel and vanadium, and plays a role of blocking, thereby preventing the top tin ball atoms from diffusing to the copper pillar.
After the fourth metal layer 193 is formed, the opening area is filled with solder by using an electroplating process or a printing process again, and the filling of the solder is completed by controlling an electroplating parameter or a printing thickness. And then removing the redundant photoresist by using a plasma photoresist remover (Descum) to form a copper column with solder, reflowing again, and bonding the wire to form a solder ball to finish the process.
According to the preparation method of the metal bump packaging structure provided by the embodiment of the invention, by arranging the first water drainage groove 1571, the liquid residue generated when the metal conducting layer 170 area at the bottom of the welding bump 190 is etched can be effectively reduced, and the etching liquid can be discharged along the first water drainage groove 1571, so that the problem of undercut opening generated in the metal conducting layer 170 area at the bottom of the welding bump 190 is avoided, and meanwhile, the etching liquid can better flow into the first water drainage groove 1571 by adopting the design of the slope 157. In addition, the first drainage groove 1571 is provided, so that the protective layer 150 has a certain deformation margin in the horizontal direction, absorbs the stress in the horizontal direction, plays a role in buffering, and contributes to the structural stability of the product. Meanwhile, the surface roughness of the protective layer 150 can be increased by arranging the first drainage groove 1571, and when a chip is mounted, the underfill can be filled in the first drainage groove 1571, so that the bonding strength between the underfill and the protective layer 150 is improved, the structural stability of a product is improved, and the surface roughness of the protective layer 150 is also improved in a mode of bombarding the surface by plasma.
The above description is only for the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.

Claims (10)

1. A metal bump package structure, comprising:
a substrate chip;
the conductive bonding pad is arranged on the surface of the substrate chip;
the protective layer is arranged on the surface of the substrate chip, a pad opening is arranged on the protective layer, and the pad opening corresponds to the conductive pad, so that at least part of the surface of the conductive pad is positioned in the pad opening;
the metal conducting layer is arranged on the surface of the conducting pad;
a solder bump disposed on the metal conductive layer;
the surface of the protective layer is provided with a first step surface and a second step surface, the first step surface surrounds the welding lug, the second step surface surrounds the first step surface, the first step surface is larger than the height of the substrate chip, the second step surface is larger than the height of the substrate chip, the first step surface is connected with the second step surface through a slope, and at least one first drainage groove is formed in the slope.
2. The metal bump package structure according to claim 1, wherein the first step surface is provided with at least one second drainage groove, and the second drainage groove is spaced apart from the solder bump.
3. The metal bump package structure according to claim 1, wherein at least one third drainage groove is disposed on the second step surface.
4. The metal bump package structure according to any one of claims 1 to 3, wherein a waterproof layer is further disposed on the slope, and the waterproof layer is recessed at the first drainage groove and covers the side wall and the bottom wall of the first drainage groove.
5. The metal bump package structure according to claim 4, wherein a receiving groove is disposed on the slope, the first drainage groove is disposed on a bottom wall of the receiving groove, and a thickness of the receiving groove is the same as a thickness of the waterproof layer.
6. The metal bump package structure according to any one of claims 1 to 3, wherein the number of the first drainage grooves is three, and all three first drainage grooves are recessed downward in a direction perpendicular to the slope surface.
7. The metal bump package structure of claim 1, wherein the metal conductive layer comprises a first metal layer and a second metal layer, the first metal layer is disposed on the conductive pad, the second metal layer is disposed on the first metal layer, the solder bump is disposed on a side of the second metal layer away from the substrate chip, the first metal layer is used for bonding the second metal layer and the conductive pad, and the second metal layer is used for blocking diffusion atoms between the first metal layer and the solder bump.
8. The metal bump package structure of claim 7, wherein the metal conductive layer further comprises a third metal layer disposed between the second metal layer and the solder bump, and the third metal layer is used for over wetting the solder bump and the second metal layer to improve the bonding force between the second metal layer and the solder bump.
9. The metal bump package structure according to any one of claims 1 to 3, wherein the solder bump comprises a metal pillar, a fourth metal layer, and a cap layer, the metal pillar is disposed on the metal layer, the fourth metal layer is disposed on the metal pillar, the cap layer is disposed on the fourth metal layer, and the fourth metal layer is used for blocking diffusion atoms between the cap layer and the metal pillar.
10. A method for manufacturing a metal bump package structure according to any one of claims 1 to 9, comprising:
providing a substrate chip with a conductive pad;
forming a protective layer on the surface of the substrate chip;
etching a pad opening and at least one first drainage groove on the surface of the protective layer, wherein the pad opening corresponds to the conductive pad so that at least part of the surface of the conductive pad is positioned in the pad opening;
forming a metal conducting layer on the surface of the conducting pad;
forming a welding lug on the metal conducting layer;
the surface of the protective layer is provided with a first step surface and a second step surface, the first step surface surrounds the welding lug, the second step surface surrounds the first step surface, the height of the first step surface relative to the substrate chip is larger than that of the second step surface relative to the substrate chip, the first step surface is connected with the second step surface through a slope, and the first drainage groove is formed in the slope.
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Citations (2)

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CN105448829A (en) * 2016-01-02 2016-03-30 北京工业大学 Manufacturing method for wafer level chip packaging body
CN106328618A (en) * 2015-06-30 2017-01-11 台湾积体电路制造股份有限公司 Under bump metallurgy (UBM) and methods of forming same

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JP4247690B2 (en) * 2006-06-15 2009-04-02 ソニー株式会社 Electronic parts and manufacturing method thereof
US9768135B2 (en) * 2015-12-16 2017-09-19 Monolithic Power Systems, Inc. Semiconductor device having conductive bump with improved reliability

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Publication number Priority date Publication date Assignee Title
CN106328618A (en) * 2015-06-30 2017-01-11 台湾积体电路制造股份有限公司 Under bump metallurgy (UBM) and methods of forming same
CN105448829A (en) * 2016-01-02 2016-03-30 北京工业大学 Manufacturing method for wafer level chip packaging body

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