CN113421824A - Process for controlling COP FREE depth of argon annealing sheet - Google Patents

Process for controlling COP FREE depth of argon annealing sheet Download PDF

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Publication number
CN113421824A
CN113421824A CN202110506475.8A CN202110506475A CN113421824A CN 113421824 A CN113421824 A CN 113421824A CN 202110506475 A CN202110506475 A CN 202110506475A CN 113421824 A CN113421824 A CN 113421824A
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polishing
silicon wafer
cleaning
depth
argon
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王虎
杜金生
袁长宏
王彦君
孙晨光
谢江华
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Zhonghuan Advanced Semiconductor Materials Co Ltd
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Zhonghuan Advanced Semiconductor Materials Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B08—CLEANING
    • B08B—CLEANING IN GENERAL; PREVENTION OF FOULING IN GENERAL
    • B08B3/00—Cleaning by methods involving the use or presence of liquid or steam
    • B08B3/04—Cleaning involving contact with liquid
    • B08B3/08—Cleaning involving contact with liquid the liquid having chemical or dissolving effect
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67253—Process monitoring, e.g. flow or thickness monitoring

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

The invention discloses a process for controlling the COP FREE depth of an argon annealing sheet, which comprises the following steps: s1, firstly, weighing the 8-inch straight-pull acid etching silicon wafer, a rough polishing solution, a fine polishing solution, a wax removing agent, a middle polishing solution, potassium hydroxide, ammonia water, hydrochloric acid, hydrogen peroxide, hydrofluoric acid and deionized water according to the weight parts of the components, and placing the components in corresponding storage vessels for later use; s2, then placing the 8-inch straight-pull acid etching silicon wafer on a polishing machine to perform silicon wafer front polishing treatment, properly adding corresponding polishing liquid according to needs in the polishing process, after the front polishing treatment is completed, guiding the weighed and proportioned 8-inch straight-pull acid etching silicon wafer, ammonia water, hydrochloric acid, hydrogen peroxide, hydrofluoric acid, potassium hydroxide and deionized water into a cleaning machine to perform cleaning treatment on the polished silicon wafer, and adding proper cleaning liquid medicine in the cleaning process; s3, finally, placing the cleaned 8-inch Czochralski acid-etched silicon wafer under a strong light.

Description

Process for controlling COP FREE depth of argon annealing sheet
Technical Field
The invention relates to the technical field of semiconductors, in particular to a process for controlling the COP FREE depth of an argon annealing sheet.
Background
The development of semiconductors to present day, silicon materials occupy a very important position, the growth of third generation semiconductor material GaN developed vigorously nowadays basically uses silicon-based substrates, semiconductor single crystals are drawn to have two categories of czochralski and zone melting, the czochralski single crystals have higher oxygen content in vivo than zone melting single crystals due to the use of quartz crucibles, the mechanical properties of silicon wafers are superior to those of zone melting single crystals, the application field is far wider than that of zone melting single crystals, the continuous development of the processing technology of the czochralski single crystals and the silicon wafers is driven by the demand of devices for no defect and internal impurity of the czochralski silicon wafers, and the defects of the czochralski silicon wafers can be divided into 4 categories: (1) point defect: vacancies, interstitial atoms, substitutional atoms; (2) line defects: dislocations and the like; (3) surface defect: stacking faults, grain boundaries, etc.; (4) body defect: d defects (crystal primary particles, COP for short), in-vivo micro defects (BMD) and the like, wherein linear defects and surface defects are harmful to the application of the czochralski silicon wafer and are solved in the development process of the single crystal technology in the middle and middle of the 20 th century, the COP always troubles the development of the single crystal technology in the middle and later stages of the 20 th century, and the hydrogen annealing technology is developed by TOSHIBA Ceramics Co. Because the hydrogen danger is higher, the hydrogen annealing technology is gradually developed into argon annealing, a DZ (clean zone) layer and a BMD layer are formed in the silicon wafer while the argon annealing technology solves the COP on the surface layer of the silicon wafer, the requirement of the device on internal gettering is met, in the later stage of 20 th century, crystal experts gradually optimize a single crystal process and an annealing technology, the COP FREE depth and the BMD density of the silicon wafer are controlled to meet the requirements of different device processes, colleges and enterprises such as the university, Zhejiang university, and the Ministry of semiconductor material GmbH, and the like, make comprehensive systematic researches on the COP, the DZ depth and the BMD density of an argon annealing wafer, but the researches on the COP FREE depth are less, the quality improvement and cost always promote the development of the semiconductor industry, if the depth of the annealing wafer COP FREE is uniformly controlled at a higher level, the product cost is greatly increased, and if the COP FREE depth is lower than the requirement of the device process, therefore, in order to meet the requirements of different device processes on the COP FREE depth and balance the cost of the argon annealing sheet, the process for controlling the COP FREE depth of the argon annealing sheet is researched and developed, and the process has important practical significance.
Disclosure of Invention
The invention aims to provide a process for controlling the COP FREE depth of an argon annealing sheet so as to solve the problems in the background technology.
In order to achieve the purpose, the invention provides the following technical scheme: a process for controlling the COP FREE depth of an argon annealing sheet comprises the following steps:
s1, firstly, weighing the 8-inch straight-pull acid etching silicon wafer, a rough polishing solution, a fine polishing solution, a wax removing agent, a middle polishing solution, potassium hydroxide, ammonia water, hydrochloric acid, hydrogen peroxide, hydrofluoric acid and deionized water according to the weight parts of the components, and placing the components in corresponding storage vessels for later use.
S2, then placing the 8-inch straight-pull acid etching silicon wafer on a polishing machine to perform silicon wafer front polishing treatment, properly adding corresponding polishing liquid according to needs in the polishing process, after the front polishing treatment is completed, guiding the weighed and proportioned 8-inch straight-pull acid etching silicon wafer, ammonia water, hydrochloric acid, hydrogen peroxide, hydrofluoric acid, potassium hydroxide and deionized water into a cleaning machine to perform cleaning treatment on the polished silicon wafer, and adding proper cleaning liquid medicine in the cleaning process.
S3, finally, the cleaned 8-inch straight-pull acid etching silicon wafer can be placed under a strong light lamp, the surface defect condition of the silicon wafer is inspected through real-time observation, the silicon wafer is placed under a microscope, the surface defect condition of the silicon wafer is inspected through real-time observation again by the microscope, after the observation is finished, the silicon wafer is placed inside an annealing furnace for argon annealing treatment, the surface of the silicon wafer is subjected to particle testing by a particle tester, relevant data and images of the testing are recorded and compared, and a corresponding experimental result is obtained through data image comparison and analysis.
Preferably, the process for controlling the depth of the argon annealing sheet COP FREE comprises the following experimental raw materials:
8-inch Czochralski acid etching silicon wafer: CZ/MCZ;
polishing solution: WP 2010K;
purity of Ar: 99.9999 percent;
analytical pure concentration of potassium hydroxide: 45 percent;
ammonia water analysis pure content: 28% -30%;
analytically pure content of hydrochloric acid: 35% -38%;
hydrogen peroxide analytically pure content: 30% -32%;
analytically pure concentration of hydrofluoric acid: 49 percent of
Rough polishing liquid: NP 6504;
middle polishing liquid: GLANZOX-1306;
fine polishing liquid: GLANZOX-3108;
dewaxing agent: KILALA;
deionized water.
Preferably, the polishing machine model adopted by the process is SPM-23, a COP FREE argon annealing sheet with the depth larger than 15 mu m is developed, the polishing sheet LLS-0.065 before entering the furnace is controlled to be not more than 5, the COP FREE argon annealing sheet with the depth of 10-15 mu m is developed, the polishing sheet LLS-0.065 before entering the furnace is controlled to be 15 +/-10, the COP FREE argon annealing sheet with the depth of 5-10 mu m is developed, the polishing sheet LLS-0.065 before entering the furnace is controlled to be 200 +/-100, the argon annealing temperature is 1200 ℃, the annealing time is 1h, and the temperature rising and falling rate between 1150 ℃ and 1200 ℃ is 1 ℃/min.
Preferably, the mixture ratio of the wax removing agent liquid medicine is KILALA to DIW being 1 to 50, the cleaning temperature is 30 +/-5 ℃, and the cleaning time is 300 sec.
Preferably, the post-polishing cleaning process QDR, OVF and OVF are in DIW ratio, the cleaning temperature can be determined by adding and observing according to real-time conditions, and the experimental time is 300 sec.
Preferably, the chemical liquid ratio of the cleaning process SC1-1 after polishing is NH 4. H2O: H2O 2: DIW ═ 0.8: 3: 30, the experimental temperature is 70 +/-5 ℃, the experimental time is 300sec, and the mixture ratio of SC1-2 liquid medicine is HCL, H2O 2: DIW 1: 3: 30, the experimental temperature is 45 +/-5 ℃, and the experimental time is 300 s.
Compared with the prior art, the invention has the beneficial effects that: after the processing technology, by controlling the COP of the acid corrosion wafer, adopting a double-precision polishing technology for polishing, controlling the annealing temperature and time by argon annealing, and controlling the cleaning life of the liquid medicine by cleaning after the argon annealing, the invention can develop the argon annealing wafers with different COP FREE depths, and simultaneously, under the condition of not changing the processing flow, the cost is greatly optimized while the COP FREE depths meet the processing requirements of different devices.
Drawings
FIG. 1 is a table of parameters for a polishing process of the present invention;
FIG. 2 is a table of parameters for the argon annealing process of the present invention;
FIG. 3 is a table of experimental results of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention are clearly and completely described below, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The first embodiment is as follows:
the experimental process of this example includes the following steps:
s1, firstly, weighing the 8-inch straight-pull acid etching silicon wafer, a rough polishing solution, a fine polishing solution, a wax removing agent, a middle polishing solution, potassium hydroxide, ammonia water, hydrochloric acid, hydrogen peroxide, hydrofluoric acid and deionized water according to the weight parts of the components, and placing the components in corresponding storage vessels for later use.
S2, then placing the 8-inch straight-pull acid etching silicon wafer on a polishing machine to perform silicon wafer front polishing treatment, properly adding corresponding polishing liquid according to needs in the polishing process, after the front polishing treatment is completed, guiding the weighed and proportioned 8-inch straight-pull acid etching silicon wafer, ammonia water, hydrochloric acid, hydrogen peroxide, hydrofluoric acid, potassium hydroxide and deionized water into a cleaning machine to perform cleaning treatment on the polished silicon wafer, and adding proper cleaning liquid medicine in the cleaning process.
S3, finally, the cleaned 8-inch straight-pull acid etching silicon wafer can be placed under a strong light lamp, the surface defect condition of the silicon wafer is inspected through real-time observation, the silicon wafer is placed under a microscope, the surface defect condition of the silicon wafer is inspected through real-time observation again by the microscope, after the observation is finished, the silicon wafer is placed inside an annealing furnace for argon annealing treatment, the surface of the silicon wafer is subjected to particle testing by a particle tester, relevant data and images of the testing are recorded and compared, and a corresponding experimental result is obtained through data image comparison and analysis.
In this embodiment, an experimental material composition of a process for controlling the COP FREE depth of an argon annealing sheet is as follows:
8-inch Czochralski acid etching silicon wafer: CZ/MCZ;
polishing solution: WP 2010K;
purity of Ar: 99.9999 percent;
analytical pure concentration of potassium hydroxide: 45 percent;
ammonia water analysis pure content: 28% -30%;
analytically pure content of hydrochloric acid: 35% -38%;
hydrogen peroxide analytically pure content: 30% -32%;
analytically pure concentration of hydrofluoric acid: 49 percent of
Rough polishing liquid: NP 6504;
middle polishing liquid: GLANZOX-1306;
fine polishing liquid: GLANZOX-3108;
dewaxing agent: KILALA;
deionized water.
In this embodiment, the model of the polishing machine used in the process is SPM-23, and 5 silicon wafers of 3 groups of different LLS levels are prepared: (1) the LLS-0.065 of the polished slices before entering the furnace is less than or equal to 5; (2) putting the LLS-0.065-15 +/-10 into a furnace front polishing piece; (3) the LLS-0.065 is 200 + -100. The argon annealing temperature is 1200 ℃, the annealing time is 1h, and the temperature rise and fall rate in the temperature range of 1150 ℃ to 1200 ℃ is 1 ℃/min.
In this embodiment, the ratio of the dewaxing agent solution to the cleaning agent solution is KILALA: DIW 1:50, the cleaning temperature is 30 ℃ ± 5 ℃, and the cleaning time is 300 sec.
In this embodiment, the post-polishing cleaning process QDR, OVF, and OVF are in a DIW ratio, and the cleaning temperature can be determined by adding and observing according to a real-time condition, and the experiment time is 300 sec.
In the embodiment, the liquid medicine ratio of the cleaning process SC1-1 after polishing is NH 4. H2O: H2O 2: DIW ═ 0.8: 3: 30, the experimental temperature is 70 +/-5 ℃, the experimental time is 300sec, and the mixture ratio of SC1-2 liquid medicine is HCL, H2O 2: DIW 1: 3: 30, the experimental temperature is 45 +/-5 ℃, and the experimental time is 300 s.
Example two:
the difference characteristic from the first embodiment is that:
the experimental process of this example includes the following steps:
s1, firstly, weighing the 8-inch straight-pull acid etching silicon wafer, a rough polishing solution, a fine polishing solution, a wax removing agent, a middle polishing solution, potassium hydroxide, ammonia water, hydrochloric acid, hydrogen peroxide, hydrofluoric acid and deionized water according to the weight parts of the components, and placing the components in corresponding storage vessels for later use.
S2, then placing the 8-inch straight-pull acid etching silicon wafer on a polishing machine to perform silicon wafer front polishing treatment, properly adding corresponding polishing liquid according to needs in the polishing process, after the front polishing treatment is completed, guiding the weighed and proportioned 8-inch straight-pull acid etching silicon wafer, ammonia water, hydrochloric acid, hydrogen peroxide, hydrofluoric acid, potassium hydroxide and deionized water into a cleaning machine to perform cleaning treatment on the polished silicon wafer, and adding proper cleaning liquid medicine in the cleaning process.
S3, finally, the cleaned 8-inch straight-pull acid etching silicon wafer can be placed under a strong light lamp, the surface defect condition of the silicon wafer is inspected through real-time observation, the silicon wafer is placed under a microscope, the surface defect condition of the silicon wafer is inspected through real-time observation again by the microscope, after the observation is finished, the silicon wafer is placed inside an annealing furnace for argon annealing treatment, the surface of the silicon wafer is subjected to particle testing by a particle tester, relevant data and images of the testing are recorded and compared, and a corresponding experimental result is obtained through data image comparison and analysis.
In this embodiment, an experimental material composition of a process for controlling the COP FREE depth of an argon annealing sheet is as follows:
8-inch Czochralski acid etching silicon wafer: CZ/MCZ;
polishing solution: WP 2010K;
purity of Ar: 99.9999 percent;
analytical pure concentration of potassium hydroxide: 45 percent;
ammonia water analysis pure content: 28% -30%;
analytically pure content of hydrochloric acid: 35% -38%;
hydrogen peroxide analytically pure content: 30% -32%;
analytically pure concentration of hydrofluoric acid: 49 percent of
Rough polishing liquid: NP 6504;
middle polishing liquid: GLANZOX-1306;
fine polishing liquid: GLANZOX-3108;
dewaxing agent: KILALA;
deionized water.
In the embodiment, the model of the polishing machine adopted by the process is SPM-23, the LLS-0.065 of the polished wafer before the wafer is put into the furnace is more than 500, the argon annealing temperature is 1200 ℃, the annealing time is 1h, and the temperature rise and fall rate in the temperature range from 1150 ℃ to 1200 ℃ is 1 ℃/min. .
In this embodiment, the ratio of the dewaxing agent solution to the cleaning agent solution is KILALA: DIW 1:50, the cleaning temperature is 30 ℃ ± 5 ℃, and the cleaning time is 300 sec.
In this embodiment, the post-polishing cleaning process QDR, OVF, and OVF are in a DIW ratio, and the cleaning temperature can be determined by adding and observing according to a real-time condition, and the experiment time is 300 sec.
In the embodiment, the liquid medicine ratio of the cleaning process SC1-1 after polishing is NH 4. H2O: H2O 2: DIW ═ 0.8: 3: 30, the experimental temperature is 70 +/-5 ℃, the experimental time is 300sec, and the mixture ratio of SC1-2 liquid medicine is HCL, H2O 2: DIW 1: 3: 30, the experimental temperature is 45 +/-5 ℃, and the experimental time is 300 s.
To sum up: the experimental result of the invention in the first embodiment shows that, compared with the experimental result of the process in the second embodiment, after the processing process of the invention is adopted, argon annealing sheets with different COP FREE depths can be developed, and the COP FREE depths are all more than 5 μm.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, article, or apparatus.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.

Claims (6)

1. A process for controlling the COP FREE depth of an argon annealing sheet is characterized in that: the experimental process comprises the following steps:
s1, firstly, weighing the 8-inch straight-pull acid etching silicon wafer, a rough polishing solution, a fine polishing solution, a wax removing agent, a middle polishing solution, potassium hydroxide, ammonia water, hydrochloric acid, hydrogen peroxide, hydrofluoric acid and deionized water according to the weight parts of the components, and placing the components in corresponding storage vessels for later use;
s2, then placing the 8-inch straight-pull acid etching silicon wafer on a polishing machine to perform silicon wafer front polishing treatment, properly adding corresponding polishing liquid according to needs in the polishing process, after the front polishing treatment is completed, guiding the weighed and proportioned 8-inch straight-pull acid etching silicon wafer, ammonia water, hydrochloric acid, hydrogen peroxide, hydrofluoric acid, potassium hydroxide and deionized water into a cleaning machine to perform cleaning treatment on the polished silicon wafer, and adding proper cleaning liquid medicine in the cleaning process;
s3, finally, the cleaned 8-inch straight-pull acid etching silicon wafer can be placed under a strong light lamp, the surface defect condition of the silicon wafer is inspected through real-time observation, the silicon wafer is placed under a microscope, the surface defect condition of the silicon wafer is inspected through real-time observation again by the microscope, after the observation is finished, the silicon wafer is placed inside an annealing furnace for argon annealing treatment, the surface of the silicon wafer is subjected to particle testing by a particle tester, relevant data and images of the testing are recorded and compared, and a corresponding experimental result is obtained through data image comparison and analysis.
2. A process for controlling the COP FREE depth of an argon annealing sheet is characterized in that: the experimental raw materials of the process for controlling the depth of the COP FREE of the argon annealing sheet comprise:
8-inch Czochralski acid etching silicon wafer: CZ/MCZ;
polishing solution: WP 2010K;
purity of Ar: 99.9999 percent;
analytical pure concentration of potassium hydroxide: 45 percent;
ammonia water analysis pure content: 28% -30%;
analytically pure content of hydrochloric acid: 35% -38%;
hydrogen peroxide analytically pure content: 30% -32%;
analytically pure concentration of hydrofluoric acid: 49 percent of
Rough polishing liquid: NP 6504;
middle polishing liquid: GLANZOX-1306;
fine polishing liquid: GLANZOX-3108;
dewaxing agent: KILALA;
deionized water.
3. The process of claim 1 for controlling the depth of an argon annealed wafer COP FREE, wherein: the polishing machine model adopted by the process is SPM-23, an argon annealing sheet with COP FREE depth larger than 15 mu m is developed, polishing sheet LLS-0.065 before entering a furnace is controlled to be not more than 5, an argon annealing sheet with COP FREE depth of 10-15 mu m is developed, polishing sheet LLS-0.065 before entering the furnace is controlled to be 15 +/-10, an argon annealing sheet with COP FREE depth of 5-10 mu m is developed, polishing sheet LLS-0.065 before entering the furnace is controlled to be 200 +/-100, the argon annealing temperature is 1200 ℃, the annealing time is 1h, and the temperature rising and falling rate between 1150 ℃ and 1200 ℃ is 1 ℃/min.
4. The process of claim 1 for controlling the depth of an argon annealed wafer COP FREE, wherein: the liquid medicine ratio of the dewaxing agent is KILALA to DIW 1 to 50, the cleaning temperature is 30 +/-5 ℃, and the cleaning time is 300 sec.
5. The process of claim 1 for controlling the depth of an argon annealed wafer COP FREE, wherein: the post-polishing cleaning process QDR, OVF and OVF are in DIW proportion, the cleaning temperature can be determined by adding and observing according to real-time conditions, and the experimental time is 300 sec.
6. The process of claim 1 for controlling the depth of an argon annealed wafer COP FREE, wherein: the liquid medicine proportion of the cleaning process SC1-1 after polishing is NH 4. H2O: H2O 2: DIW ═ 0.8: 3: 30, the experimental temperature is 70 +/-5 ℃, the experimental time is 300sec, and the mixture ratio of SC1-2 liquid medicine is HCL, H2O 2: DIW 1: 3: 30, the experimental temperature is 45 +/-5 ℃, and the experimental time is 300 s.
CN202110506475.8A 2021-05-10 2021-05-10 Process for controlling COP FREE depth of argon annealing sheet Pending CN113421824A (en)

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CN113421824A true CN113421824A (en) 2021-09-21

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Application publication date: 20210921