JP2011042536A5 - - Google Patents

Description

Epitaxial silicon wafer manufacturing method

  The present invention relates to a method for manufacturing an epitaxial silicon wafer, and more particularly to a method for manufacturing an epitaxial silicon wafer in which an epitaxial film is vapor-grown on a mirror-polished surface of a silicon wafer.

  For example, an epitaxial silicon wafer is known as a substrate for manufacturing a bipolar IC device. This is obtained by vapor-phase-growing an n-type epitaxial film made of single crystal silicon and having a thickness of several μm on a p-type low-resistance (about 0.01 Ω · cm) silicon wafer.

A silicon wafer with a mirror-finished surface is obtained by slicing a single crystal silicon ingot grown by the Czochralski (CZ) method, chamfering, lapping (grinding), etching on the obtained silicon wafer, Manufactured by polishing the wafer surface.
According to a general polishing method, primary polishing, secondary polishing, finish polishing, and cleaning after each polishing step are sequentially performed on the surface of a silicon wafer. For each polishing step, the wafer surface is subjected to a multi-step polishing process so that, for example, the polishing abrasive grains become finer, the polishing cloth is reduced in hardness, and the surface roughness of the wafer surface becomes a low value.
However, in such a precise polishing method over multiple stages, polishing and cleaning are repeated at each stage. Therefore, the polishing time becomes longer as the hardness of the low-resistance wafer becomes higher. As a result, the flatness of the surface of the silicon wafer was lowered, pits were generated on the wafer surface, and sagging and periodic irregularities were generated on the outer periphery of the silicon wafer. In addition, there is a problem that the multi-stage polishing process for the silicon wafer such as primary polishing, secondary polishing, and finish polishing is costly.

  Thus, for example, Patent Document 1 is known as a conventional technique for solving this problem. This is a technique in which only the primary mirror polishing is performed on the surface of the silicon wafer after etching, and an epitaxial film is vapor-phase grown on the polished surface. In the primary mirror polishing step, for example, a polishing liquid containing free abrasive grains such as colloidal silica is used. The roughness of the primary mirror-polished surface was 0.3 nm or more and 1.2 nm or less in RMS (Root Mean Square) display when an area of 1 μm × 1 μm was measured using an atomic force microscope.

Japanese Patent No. 3120825

However, the polishing liquid used in the primary mirror polishing of Patent Document 1 contains loose abrasive grains. Therefore, when measuring a measurement area of 1 μm × 1 μm with an atomic force microscope, the surface roughness was 0.3 nm or more in RMS display. This figure is not enough to support today's rapid device integration.
In addition, when the surface of the silicon wafer is first mirror-polished using a polishing liquid containing loose abrasive grains, new mechanical damage is introduced into the wafer surface layer due to the mechanical action during mirror polishing, and the oxide film pressure resistance is reduced. There was a problem to do. Further, due to agglomeration of free abrasive grains in the polishing liquid, defects caused by processing such as micro scratches also occur on the primary mirror polished surface of the silicon wafer. Therefore, many LPDs (Light Point Defects) have occurred on the primary mirror polished surface. Specifically, 1000 or more LPDs having a size of 130 nm or more appeared per silicon wafer having a diameter of 300 mm. If an epitaxial film is formed on the surface of such a silicon wafer, there is a problem that the LPD density observed on the surface of the epitaxial film increases.

Therefore, as a result of diligent research, the inventors first used a primary polishing liquid mainly composed of an alkaline aqueous solution, and removed the oxide film formed on the wafer surface in the presence of abrasive grains by primary polishing. Using a secondary polishing liquid in which a water-soluble polymer is added to an alkaline aqueous solution containing no abrasive grains, the surface of the silicon wafer is mirror-polished by secondary polishing, and then an epitaxial film is vapor-grown on the wafer surface. Then, it was found that all the above-mentioned problems were solved, and the present invention was completed.
The present invention makes it possible to manufacture an epitaxial silicon wafer by omitting the finish polishing, thereby increasing the productivity by simplifying the polishing process and reducing the cost. Further, only the primary polishing including free abrasive grains is performed. Compared to the case, the object is to provide an epitaxial silicon wafer manufacturing method capable of reducing the density of LPD due to processing generated on the mirror-polished wafer surface and reducing the surface roughness of the wafer surface. Yes.

  The present invention uses a primary polishing liquid mainly composed of an alkaline aqueous solution, interposes abrasive grains, removes the oxide film formed on the surface of the silicon wafer by primary polishing, and then contains no abrasive grains. Using a secondary polishing liquid in which a water-soluble polymer is added to an aqueous solution, the surface of the silicon wafer is mirror-polished by secondary polishing, and after the secondary polishing, the surface of the silicon wafer is epitaxially polished. This is a method of manufacturing an epitaxial silicon wafer in which a film is vapor-phase grown.

According to the present invention, only the primary polishing and the secondary polishing can be performed, and the finish polishing can be omitted to manufacture the epitaxial silicon wafer. Therefore, the polishing process is simplified and the productivity of the epitaxial silicon wafer is increased. Cost reduction is possible. In addition, the density of LPD due to processing generated on the mirror-polished wafer surface can be reduced and the surface roughness of the wafer surface can be reduced as compared with the case where only primary polishing including loose abrasive grains is performed. .
Furthermore, since the oxide film is removed in a short time by mechanical action through abrasive grains during primary polishing, which is a pretreatment for secondary polishing, the chemical action of alkaline etching using an alkaline aqueous solution during secondary polishing. The mirror polishing by can be performed at a high polishing rate. That is, a natural oxide film generally exists on the surface of the silicon wafer before the primary polishing, and it is difficult to remove the natural oxide film only by chemical polishing of secondary polishing using only an alkaline aqueous solution. . Therefore, by performing primary polishing using abrasive grains before secondary polishing, the natural oxide film can be removed in a short time.

  In addition, since the wafer surface during secondary polishing is mirror-polished by chemical action, processing damage due to mechanical action such as mirror-polishing using abrasive grains can be avoided, and the oxide film withstand voltage characteristics are extremely high. An excellent wafer can be obtained. Moreover, since polishing is performed without using abrasive grains, it is possible to greatly reduce the occurrence of defects due to processing such as micro scratches due to abrasive grain aggregation, and the LPD density generated on the surface of the epitaxial film formed thereafter Can be reduced.

  In addition, since the secondary polishing liquid is obtained by adding a water-soluble polymer to an alkaline aqueous solution that does not contain abrasive grains, the water-soluble polymer receives a part of the polishing load during polishing to reduce the friction coefficient. be able to. As a result, it is possible to reduce not only the RMS value in a small measurement area area of 1 μm × 1 μm but also the RMS value in a large measurement area area of 10 μm × 10 μm by using an atomic force microscope, thereby improving the surface roughness quality. An epitaxial silicon wafer having an excellent epitaxial film can be manufactured.

  In addition, since the water-soluble polymer is added to the alkaline aqueous solution during the secondary polishing, the elastic deformation of the carrier plate is suppressed, and noise generated from the carrier plate can be reduced. Further, since abrasive grains are not used in the secondary polishing, the phenomenon that the abrasive grains in the polishing liquid are concentrated on the outer peripheral portion of the silicon wafer does not occur, and as a result, the polishing of the outer peripheral portion of the wafer proceeds excessively and the outer peripheral sagging occurs. Will not occur.

As the silicon wafer, for example, a single crystal silicon wafer, a polycrystalline silicon wafer, or the like can be employed.
Examples of the diameter of the silicon wafer include 100 mm, 125 mm, 150 mm, 200 mm, 300 mm, and 450 mm.
As an oxide film, a natural oxide film (SiO ₂ ), A thermal oxide film or the like can be employed. The thickness of the oxide film is 5 to 20 mm in the case of a natural oxide film.

At the time of primary polishing, “the oxide film formed on the surface of the silicon wafer is removed by primary polishing by interposing abrasive grains” means (1) primary polishing including abrasive grains (free abrasive grains). Polishing with a polishing cloth that uses a liquid and does not contain abrasive grains, or (2) A polishing cloth that uses a primary polishing liquid that does not contain abrasive grains, and to which abrasive grains (fixed abrasive grains) are fixed Or (3) polishing using a primary polishing liquid containing abrasive grains and using a polishing cloth containing abrasive grains.
As materials for the abrasive grains (free abrasive grains and fixed abrasive grains), for example, diamond, silica (colloidal silica), SiC, or the like can be employed.
The particle diameter (average particle diameter) of the abrasive grains (free abrasive grains and fixed abrasive grains) is 5 to 200 nm. If it is less than 5 nm, the polishing rate is low, and it takes a long time to remove the oxide film. Moreover, if it exceeds 200 nm, scratches are likely to occur on the polished surface of the silicon wafer from which the oxide film has been removed. The preferable particle diameter of the abrasive grains is 10 to 100 nm. Within this range, scratches are unlikely to occur on the polished surface of the silicon wafer from which the oxide film has been removed, and a high polishing rate can be maintained.

The alkaline aqueous solution that is the main agent of the primary polishing liquid and the alkaline aqueous solution that does not contain abrasive grains of the secondary polishing liquid are alkaline aqueous solutions that are adjusted within the range of pH 8 to pH 14, and include basic ammonia as a pH adjusting agent. An alkaline aqueous solution or an alkaline carbonate aqueous solution to which any of a salt, a basic potassium salt and a basic sodium salt is added, or an alkaline aqueous solution to which hydrazine or an amine is added is desirable. If the alkaline aqueous solution is less than pH 8, the etching action is too low, and defects due to processing such as scratches and scratches are likely to occur on the surface of the silicon wafer. Further, if the pH exceeds 14 as in a strong base aqueous solution, it becomes difficult to handle the polishing liquid. As the pH adjuster, an aqueous ammonia solution, an alkaline hydroxide aqueous solution of potassium hydroxide or sodium hydroxide, or an alkaline carbonate aqueous solution can be employed. In addition, aqueous solutions of hydrazine and amines can be employed. From the viewpoint of increasing the polishing rate, it is particularly desirable to use an amine.

As the water-soluble polymer to be added to the alkaline aqueous solution, it is desirable to use hydroxyethyl cellulose or polyethylene glycol. In particular, since hydroxyethyl cellulose can be obtained with high purity relatively easily and has a large molecular weight, it can function as a bearing between the polishing pad and the carrier plate, and can reduce the coefficient of friction more efficiently. .
The concentration of the water-soluble polymer added to the alkaline aqueous solution is desirably adjusted to a range of 0.01 ppm to 1000 ppm. When the concentration of the water-soluble polymer is less than 0.01 ppm, the friction during polishing becomes excessively large, and there is a possibility that defects due to processing may occur on the mirror-polished wafer surface. Moreover, if it exceeds 1000 ppm, a polishing rate will fall extremely and a mirror polishing process will require much time.

In addition, from the viewpoint of removing metal ions contained in the polishing liquid, it is desirable to add a chelate agent to the polishing liquid. By adding a chelating agent, metal ions are captured and complexed, and then discarded, whereby the degree of metal contamination of the polished silicon wafer can be reduced. Any chelating agent can be used as long as it has a chelating ability for metal ions. A chelate refers to a bond (coordination) to a metal ion by a ligand having a plurality of coordination sites.

Examples of chelating agents that can be used include phosphonic acid chelating agents and aminocarboxylic acid chelating agents. However, in view of solubility in an alkaline aqueous solution, an aminocarboxylic acid chelating agent is preferred. Furthermore, in view of the chelating ability of heavy metal ions, aminocarboxylates such as ethylenediaminetetraacetic acid EDTA (Ethylene Diamine Tetraacetic Acid) or diethylenetriaminepentaacetic acid DTPA (Diethylene Triamine Pentaacetic Acid) are more preferable. In addition, nitrilotriacetic acid (NTA) may be used. The chelating agent is preferably added in a concentration range of 0.1 ppm to 1000 ppm, whereby metal ions such as Cu, Zn, Fe, Cr, Ni, and Al can be captured.

Further, in the present invention, after the secondary polishing, the surface roughness of the surface of the silicon wafer is 0.3 nm or less in RMS display when measuring a measurement area of 10 μm × 10 μm with an atomic force microscope. Is desirable. Further, after the secondary polishing, the surface roughness of the wafer surface is preferably less than 0.3 nm in RMS display when measuring a measurement area of 1 μm × 1 μm with an atomic force microscope. Thereby, the epitaxial surface roughness quality formed after that can be improved.
In the present invention, at the time of secondary polishing, a secondary polishing liquid in which a water-soluble polymer is added to an alkaline aqueous solution not containing abrasive grains is used, and the surface of the silicon wafer is mirror-polished, thereby 1 μm × 1 μm square and 10 μm. When measuring a measurement area area of × 10 μm square, both can be set to 0.3 nm or less in RMS display, and the quality of the epitaxial surface roughness formed thereafter can be improved.

In the present invention, after the secondary polishing, in the oxide film breakdown voltage characteristic evaluation of the silicon wafer, it is desirable that the C + mode occupancy rate by TZDB measurement is 99% or more.
Generally, as a method for evaluating the presence or absence of processing damage on the surface of a silicon wafer, a non-defective product or a defective product is determined by C-mode evaluation based on TZDB measurement. However, for example, even a silicon wafer determined to be 99% or higher by C-mode evaluation, when evaluated with a stricter C + mode occupancy ratio, the occupancy ratio is greatly reduced and the oxide film withstand voltage characteristic is low. It became clear. For this reason, it is extremely important to have excellent oxide film breakdown voltage characteristics such that the C + mode occupancy is 99% or more, and further 100%.

In the present invention, at the time of secondary polishing, by using a polishing liquid in which a water-soluble polymer is added to an alkaline aqueous solution not containing abrasive grains, processing damage such as scratches caused by mechanical factors such as abrasive grain agglomeration can be obtained. It can be effectively reduced, and the occurrence of defects caused by processing such as micro scratching can also be reduced. Therefore, the occupancy rate of C + mode by TZDB is 99% or more, which can be almost 100%. Thereby, the LPD density on the surface of the epitaxial film can be greatly reduced.
Note that the oxide oxide breakdown voltage (GOI) characteristic is that an oxide film (gate oxide film) and an electrode are formed on a surface of a silicon wafer to form a MOS (Metal Oxide Semiconductor) structure, and then a voltage is applied to the electrode. This is applied to break the oxide film and measure the breakdown voltage and current.

The C + mode occupancy rate by TZDB (Time Zero Dielectric Beerdown) evaluation employed in the present invention is calculated under the following measurement conditions.
<Measurement conditions>
An oxide film having a gate oxide film thickness of 25 nm is formed on the wafer surface, and a gate electrode area of 10 mm is formed on the surface of the oxide film. ² A polysilicon electrode is formed, and a voltage is applied to each electrode by a step voltage application method (SV method). When the voltage is increased in steps of 0.5 MV / cm (voltage application time of each step: 200 msec) and a voltage of 8 MV / cm or higher is applied, the current density flowing through the oxide film is 10 μA / cm. ² The current density flowing through the oxide film is 1 μA / cm when the applied voltage is once lowered to 0 MV / cm and then 2 MV / cm is applied again. ² The following cells are called C + mode, and the ratio of the number of C + modes is the C + mode occupation ratio.

As the material for the polishing cloth for primary polishing and secondary polishing, for example, polyurethane is desirable, and in particular, foamable polyurethane having excellent mirror surface precision on the silicon wafer surface is desirably used. In addition, a suede type polyurethane, a polyester nonwoven fabric, or the like can also be used. Moreover, it is desirable to use an abrasive cloth having a hardness of 75 to 85 and a compression rate of 2 to 3%.
The primary polishing rate of the silicon wafer is 0.05 to 0.6 μm / min.
The secondary polishing rate of the silicon wafer is 0.1 to 0.6 μm / min. If it is less than 0.1 μm / min, the polishing rate is low and it takes a long time for polishing.

The amount of polishing of the silicon wafer during the primary polishing is 0.05 to 2 μm. If the thickness is less than 0.05 μm, the oxide film is not sufficiently removed, and there is a concern about a partial oxide film residue. On the other hand, if the thickness exceeds 2 μm, there is a concern that mechanical damage due to abrasive grains may occur on the surface of the silicon wafer.
The surface pressure with respect to the silicon wafer in the primary polishing and the secondary polishing is 50 to 500 g / cm ² . If it is less than 50 g / cm ² , the polishing rate is low, and a long time is required for polishing. Further, if it exceeds 500 g / cm ² , scratches are likely to occur on the polished surface of the silicon wafer.

For the primary polishing and secondary polishing of the silicon wafer, a single wafer type polishing apparatus or a batch type polishing apparatus for simultaneously polishing a plurality of silicon wafers may be used.
Further, the primary polishing and the secondary polishing may be single-side polishing of only the front surface or double-side polishing in which the front and back surfaces of the wafer are simultaneously polished. As a double-side polishing apparatus, a sun gear (planetary gear) system or a non-sun gear system that simultaneously polishes both the front and back surfaces of a silicon wafer by causing the carrier plate to perform a circular motion without rotation can be employed. In particular, when a double-side polishing apparatus is used, not only the wafer surface but also the wafer back surface can be highly flattened with a single polishing process, which is effective in providing an epitaxial wafer with high cost and low cost.

  Further, in the secondary polishing, the wafer surface may be mirror-polished to the end under the same secondary polishing (mirror polishing) processing conditions. Further, in the secondary polishing, the secondary polishing in which the chemical composition and the polishing conditions are changed may be performed a plurality of times in the same polishing apparatus. When performing multi-stage secondary polishing, for example, in the initial stage of secondary polishing, an alkaline aqueous solution or water-soluble polymer is used so as to quickly remove the processing damage of the wafer surface layer introduced by slicing or grinding. Polishing is performed at a high polishing rate by controlling the concentration of the chemical solution and the number of rotations of the polishing platen. Thereafter, each secondary polishing condition may be changed, and polishing may be performed under a condition where the polishing rate is low so that new processing damage is not introduced into the wafer surface layer during the secondary polishing.

  The secondary polished silicon wafer is subjected to a cleaning process before the epitaxial growth process in order to remove chemicals and particles adhering to the surface of the silicon wafer. As this cleaning treatment, known repeated SC1 cleaning, cleaning with a mixed solution of ozone and hydrofluoric acid, or repeated cleaning in which ozone water cleaning and hydrofluoric acid solution cleaning are alternately performed can be employed. The type, concentration, treatment time, etc. of each cleaning solution used at that time are the cleaning conditions that can remove the silicon wafer surface by about 0.2 to 10 nm so that the epitaxial film to be grown is not contaminated and particles can be removed. I just need it.

As a material for the epitaxial film, for example, single crystal silicon, polycrystalline silicon, or the like can be employed.
As a vapor phase epitaxial film forming method of the epitaxial film, for example, an atmospheric pressure vapor phase epitaxial method, a low pressure vapor phase epitaxial method, a metal organic vapor phase epitaxial method, or the like can be employed. In the vapor phase epitaxial method, for example, an epitaxial silicon wafer is stored in a wafer storage unit in a horizontally placed state (a state where the front and back surfaces are horizontal), and a susceptor that is circular in plan view and on which one or more wafers can be mounted is provided. used. The vapor phase epitaxial method may be homoepitaxy for epitaxially growing the same material as the wafer or heteroepitaxy for epitaxially growing a material different from the wafer. Since the properties of the epitaxial film are greatly affected by the surface properties of the wafer, a film thickness of a certain thickness or more is required. For example, it is desirable to form an epitaxial film having a thickness of 1 to 10 μm.

According to the present invention, only the primary polishing and the secondary polishing can be performed, and the finish polishing can be omitted to manufacture the epitaxial silicon wafer. Therefore, the polishing process is simplified and the productivity of the epitaxial silicon wafer is increased. Cost reduction is possible. In addition, compared to the case where only primary polishing including loose abrasive grains is performed, the density of LPD caused by processing generated on the wafer surface subjected to secondary polishing (mirror polishing) is reduced, and the surface roughness of the wafer surface is reduced. Can be small. Furthermore, since the primary polishing of the oxide film with abrasive grains is performed as a pretreatment for the secondary polishing, mirror polishing by the chemical action of alkaline etching using an alkaline aqueous solution can be performed at a high polishing rate during the secondary polishing. it can.

Further, since the water-soluble polymer is added to the secondary polishing liquid, the water-soluble polymer receives a part of the polishing load during polishing, and the friction coefficient can be reduced. As a result, the oxide film withstand voltage characteristics are excellent, and the occurrence of defects due to processing such as micro scratching can be significantly reduced. As a result, the occupancy rate of C + mode by TZDB can be 99% or more, and the density of LPD on the surface of the epitaxial film formed thereafter can be reduced.
In the secondary polishing, the surface of the silicon wafer is mirror-polished using a polishing liquid in which a water-soluble polymer is added to an alkaline aqueous solution not containing abrasive grains, thereby measuring 1 μm × 1 μm square and 10 μm × 10 μm square. Even when the area is measured, both can be set to 0.3 nm or less in RMS display, and the quality of the surface roughness of the epitaxial film formed thereafter can be improved.

It is a flow sheet of the manufacturing method of the epitaxial silicon wafer of Example 1 which concerns on this invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a perspective view of a non-sun gear type double-side polishing apparatus used in a method for manufacturing an epitaxial silicon wafer of Example 1 according to the present invention. It is a principal part longitudinal cross-sectional view of the sun gear-less double-side polish apparatus used for the manufacturing method of the epitaxial silicon wafer of Example 1 which concerns on this invention. In the manufacturing method of the epitaxial silicon wafer of Example 1 which concerns on this invention, the processing pressure and polishing rate at the time of grind | polishing the surface of a silicon wafer using the polishing liquid containing an abrasive grain and the polishing liquid not containing an abrasive grain, It is a graph which shows the relationship. It is a principal part expanded longitudinal cross-sectional view of the vapor phase epitaxial growth apparatus used for the manufacturing method of the epitaxial silicon wafer of Example 1 which concerns on this invention. Mirror polishing for the case where the wafer was polished using a polishing liquid containing no abrasive grains under the conditions of Example 1 of the present invention and the case where the wafer was polished using a polishing liquid containing two conventional abrasive grains It is a graph which shows the evaluation result when evaluating the oxide-film pressure | voltage resistant characteristic of a subsequent silicon wafer (PW). It is a LPD distribution map of the surface of the silicon wafer of this invention which performed mirror surface polishing using the polishing liquid which does not contain an abrasive grain, and the surface of the epitaxial silicon wafer which formed the epitaxial film in this wafer surface. It is a LPD distribution map of the surface of the conventional silicon wafer which carried out mirror surface polishing using the polishing liquid containing an abrasive grain, and the surface of the epitaxial silicon wafer which formed the epitaxial film in this wafer surface. Atomic force is applied to the surface of the silicon wafer (PW) of the present invention that has been mirror-polished using a polishing liquid that does not contain abrasive grains, and the surface of the epitaxial silicon wafer (EW) that has an epitaxial film formed on the wafer surface. It is a three-dimensional graph which shows surface roughness when observing the measurement area area | region of 10 micrometers x 10 micrometers with a microscope. Measurement area of 10 μm × 10 μm with an atomic force microscope for the surface of a conventional silicon wafer that has been mirror-polished using a polishing liquid containing abrasive grains and the surface of an epitaxial silicon wafer on which an epitaxial film is formed. It is a three-dimensional graph which shows surface roughness when an area | region is observed. With respect to the surface of the silicon wafer of the present invention that has been mirror-polished using a polishing liquid that does not contain abrasive grains, and the surface of the epitaxial silicon wafer in which an epitaxial film is formed on the wafer surface, an atomic force microscope measures 1 μm × 1 μm. It is a three-dimensional graph which shows surface roughness when observing a measurement area area. Measurement area of 1 μm × 1 μm by an atomic force microscope on the surface of a conventional silicon wafer that has been mirror-polished using a polishing liquid containing abrasive grains and the surface of an epitaxial silicon wafer on which an epitaxial film is formed. It is a three-dimensional graph which shows surface roughness when an area | region is observed.

  Examples of the present invention will be specifically described below. Here, the manufacturing method of the epitaxial silicon wafer which produces the device for bipolar IC is demonstrated.

With reference to the flow sheet of FIG. 1, the manufacturing method of the epitaxial silicon wafer which concerns on Example 1 of this invention is demonstrated.
That is, the epitaxial silicon wafer manufacturing method of Example 1 includes a crystal pulling process, a crystal processing process, a slicing process, a chamfering process, a lapping process, an etching process, a primary polishing process, a cleaning process, a secondary polishing process, a cleaning process, Epitaxial growth process and final cleaning process are provided.

Hereafter, each said process is demonstrated concretely.
In the crystal pulling step, from a silicon melt doped with a predetermined amount of boron in the crucible, the diameter is 306 mm, the length of the straight body is 2500 mm, the specific resistance is 0.01 Ω · cm, and the initial oxygen concentration by the Czochralski method. A single crystal silicon ingot of 1.0 × 10 ¹⁸ atoms / cm ³ is pulled up.

Next, in the crystal processing step, after a single crystal silicon ingot is cut into a plurality of crystal blocks, outer peripheral grinding of each crystal block is performed. Specifically, the outer peripheral portion of the crystal block is subjected to outer peripheral grinding by 6 mm by an outer peripheral grinding apparatus having a resinoid grinding wheel containing # 200 abrasive grains (SiC). Thereby, each crystal block is formed in a cylindrical shape.
In the slicing step, a wire saw in which a wire is wound around three groove rollers arranged in a triangle is used. A large number of silicon wafers having a diameter of 300 mm and a thickness of 775 μm are sliced from the silicon single crystal by a wire saw.

In the next chamfering step, the rotating chamfering grindstone is pressed against the outer peripheral portion of the silicon wafer to chamfer.
In the lapping step, both sides of the silicon wafer are simultaneously lapped by a double-side lapping apparatus. That is, the both sides of the silicon wafer are lapped between the upper and lower lapping platen rotating at a predetermined speed.
In the etching step, the silicon wafer after lapping is immersed in an acidic etching solution in an etching tank and etched to remove damage due to chamfering and lapping.

  Next, in the primary polishing process, silicon is used using a primary polishing liquid composed of an aqueous amine solution (alkaline aqueous solution) containing colloidal silica particles (free abrasive grains) having an average particle diameter of 70 nm, using a sun gear-free double-side polishing apparatus. The front and back surfaces of the wafer are simultaneously subjected to primary polishing. Thereby, the natural oxide film formed on the front and back surfaces of the silicon wafer is removed by the mechanical action of the abrasive grains.

Hereinafter, the sun-gearless double-side polishing apparatus will be described in detail with reference to FIGS.
As shown in FIGS. 2 and 3, the upper surface plate 120 of the double-side polishing apparatus is rotationally driven in the horizontal plane by the upper rotary motor 16 via the rotating shaft 12 a extending upward. Further, the upper surface plate 120 is moved up and down in the vertical direction by the lifting and lowering device 18 that moves forward and backward in the axial direction. The elevating device 18 is used when the silicon wafer 11 is supplied to and discharged from the carrier plate 110. The upper surface plate 120 and the lower surface plate 130 are pressed against the front and back surfaces of the silicon wafer 11 by a pressing means such as an airbag system (not shown) incorporated in the upper surface plate 120 and the lower surface plate 130. The lower surface plate 130 is rotated in the horizontal plane by the lower rotation motor 17 through the output shaft 17a. The carrier plate 110 moves circularly in a plane (horizontal plane) parallel to the surface of the plate 110 by the carrier circular motion mechanism 19 so that the plate 110 itself does not rotate.

The carrier circular motion mechanism 19 has an annular carrier holder 20 that holds the carrier plate 110 from the outside. The carrier circular motion mechanism 19 and the carrier holder 20 are connected via a connection structure.
Four bearing portions 20b protruding outward every 90 ° are disposed on the outer peripheral portion of the carrier holder 20. In each bearing portion 20b, a tip portion of an eccentric shaft 24a protruding at an eccentric position on the upper surface of the small-diameter disc-shaped eccentric arm 24 is rotatably inserted. Further, a rotating shaft 24b is suspended from the center of each of the lower surfaces of the four eccentric arms 24. Each rotary shaft 24b is rotatably inserted into a bearing portion 25a arranged in a total of four on the annular device base 25 every 90 ° with the tip portion protruding downward. Sprockets 26 are fixed to the tip portions protruding downward from the respective rotary shafts 24b. A timing chain 27 is stretched across each sprocket 26 in a horizontal state. The four sprockets 26 and the timing chain 27 rotate the four rotating shafts 24b at the same time so that the four eccentric arms 24 perform a circular motion in synchronization.

Of the four rotating shafts 24 b, one rotating shaft 24 b is formed to be longer, and the tip end portion projects downward from the sprocket 26. A power transmission gear 28 is fixed to this portion. The gear 28 is meshed with a large-diameter driving gear 30 fixed to an output shaft extending upward of the circular motion motor 29.
Therefore, when the circular motion motor 29 is activated, the rotational force is transmitted to the timing chain 27 via the gears 30 and 28 and the sprocket 26 fixed to the long rotating shaft 24b. As the timing chain 27 rotates, the four eccentric arms 24 rotate in a horizontal plane around the rotation shaft 24b in synchronization with the other three sprockets 26. As a result, the carrier holder 20 collectively connected to each eccentric shaft 24a, and thus the carrier plate 110 held by the holder 20, performs a circular motion without rotation in a horizontal plane parallel to the plate 110.

That is, the carrier plate 110 turns while maintaining a state that is eccentric from the axis e of the upper surface plate 120 and the lower surface plate 130 by a distance L. A urethane-type polishing cloth 15 having a hardness of 80 and a compression rate of 2.5% is pasted on the opposing surfaces of both surface plates 120 and 130.
The distance L is the same as the distance between the eccentric shaft 24a and the rotating shaft 24b. By this circular motion without rotation, all the points on the carrier plate 110 draw a locus of a small circle having the same size (radius r). As a result, the silicon wafer 11 accommodated in the wafer accommodating portion 11a formed on the carrier plate 110 has the rotation directions of the polishing surface plates 120 and 130 opposite to each other, the rotation speed of the polishing surface plates 120 and 130, the polishing pressure, By adjusting the polishing time and the like, both-side simultaneous primary polishing is performed so that the polishing amount becomes 0.5 μm on one side (both sides 1 μm). During the primary polishing on both sides, a primary polishing liquid in which 3 wt% of colloidal silica particles having an average particle diameter of 70 nm are added to an aqueous amine solution having a pH of 10.5% is supplied to both polishing cloths 15.

As described above, as the polishing liquid for primary polishing, the one to which an aqueous amine solution containing abrasive grains is added is employed. Therefore, the pre-treatment for secondary polishing without interposing abrasive grains is present on the front and back surfaces of the silicon wafer 11. The natural oxide film of about 10 mm each can be removed in a short time by the mechanical action of the abrasive grains. Thereby, in the secondary polishing, mirror polishing by the chemical action of alkali etching using an alkaline aqueous solution can be performed at a high polishing rate.
That is, in the primary polishing performed after a predetermined time has elapsed after etching, a natural oxide film generally exists on the wafer surface. It is difficult to remove the natural oxide film only by chemical secondary polishing without the presence of abrasive grains. This is apparent from the fact that when polishing with a polishing solution containing only an alkaline aqueous solution, the polishing rate is almost equal to 0 even if the processing pressure (polishing pressure) is increased (FIG. 4). Therefore, in Example 1, primary polishing using abrasive grains was performed before secondary polishing. As a result, the removal time of the natural oxide film can be shortened and the productivity of the epitaxial silicon wafer can be prevented from being lowered.

  Next, in the secondary polishing step, hydroxyethyl cellulose (water-soluble polymer) was added to an amine aqueous solution (alkaline aqueous solution) that did not contain abrasive grains, using a sun gear-free double-side polishing apparatus used in the primary polishing. Using a secondary polishing liquid, the front and back surfaces of the silicon wafer 11 are subjected to secondary polishing (mirror polishing). That is, the silicon wafer 11 accommodated in the wafer accommodating portion 11a of the carrier plate 110 has the rotational directions of the polishing surface plates 120 and 130 opposite to each other, and the rotational speed, polishing pressure, and polishing time of the polishing surface plates 120 and 130 are set. By adjusting, secondary polishing is performed simultaneously on both sides so that the polishing amount is 6 μm on one side (12 μm on both sides). At the time of this secondary polishing, a secondary polishing liquid obtained by adding 100 ppm of hydroxyethyl cellulose to an aqueous amine solution having a pH of 10.5% is supplied to both polishing cloths 15.

  As described above, as the polishing liquid for secondary polishing, a solution in which hydroxyethyl cellulose is added to an amine aqueous solution that does not contain abrasive grains is employed. Can be small. As a result, the oxide film withstand voltage characteristics are excellent, and the occurrence of defects due to processing such as micro scratching can be significantly reduced. As a result, the occupancy ratio of C + mode by TZDB can be 99% or more, the surface roughness of the surface of the silicon wafer 11 is reduced, and the surface roughness quality of the epitaxial film formed thereafter can be improved. it can.

In addition, by adding hydroxyethyl cellulose to the aqueous amine solution, elastic deformation of the carrier plate 110 is suppressed, and noise generated from the carrier plate 110 can be reduced. Furthermore, due to the fact that the abrasive grains in the polishing liquid are likely to be concentrated on the outer peripheral portion of the silicon wafer 11, the polishing of the outer peripheral portion of the silicon wafer 11 proceeds excessively, and the possibility of the occurrence of outer peripheral sag is reduced. Can do.
Furthermore, you may add diethylenetriaminepentaacetic acid (DTPA; chelating agent) with respect to alkaline aqueous solution to this polishing liquid. By adding the chelating agent, metal ions such as copper ions contained in the polishing liquid are captured and complexed by the chelating agent, and the degree of metal contamination of the polished silicon wafer 11 can be reduced.
The silicon wafer 11 subjected to the secondary polishing is cleaned. Here, SC1 cleaning using an alkaline solution and an acid solution is performed on each silicon wafer 11.

Next, an epitaxial growth process using a single wafer type vapor phase epitaxial growth apparatus will be described in detail with reference to FIG.
As shown in FIG. 5, in the vapor phase epitaxial growth apparatus 60, a susceptor 61, which is circular in a plan view and can be loaded with one silicon wafer 11, is horizontally arranged at the center of a chamber in which heaters are arranged above and below. It is a thing. The susceptor 61 is a carbon substrate coated with SiC.
A concave counterbore (wafer storage portion) 62 for storing the silicon wafer 11 in a horizontally placed state (a state where the front and back surfaces are horizontal) is formed on the inner peripheral portion of the upper surface of the susceptor 61. The counterbore 62 includes a peripheral wall 62a, an annular step 62b in plan view having a width of 6 mm, and a bottom plate (bottom wall surface of the counterbore) 62c.
A gas supply port for allowing a predetermined carrier gas (H ₂ gas) and a predetermined source gas (SiHCl ₃ gas) to flow in parallel to the wafer surface is disposed in one side of the chamber in the upper space of the chamber. ing. A gas exhaust port is formed on the other side of the chamber.

At the time of epitaxial growth, the silicon wafer 11 is placed horizontally on the counterbore 62 with the front and back surfaces of the wafer being horizontal. Next, for the purpose of removing the natural oxide film and particles on the surface of the silicon wafer 11, hydrogen gas is supplied into the chamber and hydrogen baking is performed at a temperature of 1150 ° C. for 60 seconds. Thereafter, a carrier gas (H ₂ gas) and a source gas (SiHCl ₃ gas) are supplied into the chamber instead of the hydrogen gas, and the epitaxial film 12 is grown on the surface of the silicon wafer 11. That is, the carrier gas and the source gas are introduced into the reaction chamber through the corresponding gas supply ports. Silicon generated by thermal decomposition or reduction of the source gas is applied to the surface (upper surface) of the silicon wafer 11 heated to a high temperature of 1000 ° C. to 1150 ° C. with a furnace pressure of 100 ± 20 KPa. Precipitate at 4.5 μm / min. Thereby, an epitaxial film 12 of a silicon single crystal thickness of about 10 μm is grown on the surface of the silicon wafer 11. In this way, the epitaxial silicon wafer 10 is produced.
In the subsequent final cleaning step, each epitaxial silicon wafer 10 immediately after the appearance inspection is finally cleaned. Specifically, each epitaxial silicon wafer 10 is cleaned using an alkaline solution and an acid solution.

  Thus, only the primary polishing and the secondary polishing are performed, and the final polishing is omitted so that the epitaxial silicon wafer 10 can be manufactured. Therefore, the polishing process is simplified and the productivity of the epitaxial silicon wafer 10 is increased. Cost reduction is possible. Moreover, compared to the case where only the primary polishing including the conventional loose abrasive grains is performed, the density of LPD due to processing generated on the wafer surface subjected to the secondary polishing is reduced, and the surface roughness of the wafer surface is reduced. be able to.

Next, referring to FIG. 6, in accordance with the conditions of Example 1 of the method of the present invention, when secondary polishing not including abrasive grains is performed after primary polishing including abrasive grains, and general primary Polishing, secondary polishing, and tertiary polishing are sequentially performed (conventional method 1), and when only primary polishing including abrasive grains (colloidal silica) is performed (conventional method 2), silicon after mirror polishing The result of evaluating the oxide film breakdown voltage characteristic (C + mode occupation rate by TZDB measurement) of the wafer (PW) is reported. The results here are all evaluation results after SC1 cleaning. The cleaning condition is cleaning that removes each wafer surface by 4 nm using an SC1 cleaning solution prepared by mixing at a volume ratio of NH ₄ OH: H ₂ O ₂ : H ₂ O = 1: 2: 7.
As apparent from the graph of FIG. 6, in the conventional method 2 using the polishing liquid containing abrasive grains, the C + mode occupation ratio was less than 30%. In contrast, in the method of the present invention using a polishing liquid in which a water-soluble polymer is added to an alkaline aqueous solution not containing abrasive grains after removing the natural oxide film on the wafer surface by primary polishing containing abrasive grains, The C + mode occupation ratio was 99.7%, which was almost the same as that of the general conventional method 1 in which the first to third polishing was performed.

Next, referring to the LPD distribution diagrams of FIGS. 7 and 8, the wafer 1 when the surface of the silicon wafer (PW) is mirror-polished according to the method of the present invention (FIG. 7) and the conventional method (FIG. 8). The number of LPDs per wafer, or the number of LPDs per wafer existing on the surface of the epitaxial film deposited on each mirror-polished surface (both counted 130 nm or more) was measured using a particle counter. Report. Here, the method of the present invention uses the polishing liquid containing abrasive grains during the primary polishing on the surface of the silicon wafer under the conditions of Example 1, and the polishing liquid not containing abrasive grains during the secondary polishing. This is a two-step polishing method. Further, the conventional method is a method of performing only primary polishing using an alkaline aqueous polishing solution containing abrasive grains.
In each figure, the left side shows the result of the silicon wafer (PW), and the right side shows the result of the epitaxial silicon wafer (EW). The results here are evaluation results after the wafer surface is SC1 cleaned. The cleaning conditions at this time are conditions for removing each surface by 4 nm using an SC1 cleaning solution prepared by mixing at a volume ratio of NH ₄ OH: H ₂ O ₂ : H ₂ O = 1: 2: 7.

  As an LPD measuring apparatus, “SP2XP” of Surfscan SP2 manufactured by KLA Tencor was adopted. This particle counter collects scattered photons of laser light irradiated from an oblique angle of 20 ° with respect to the surface of the sample wafer by a collector, and amplifies the obtained photons by a photomultiplier tube to produce an electrical signal. Convert. Thereafter, the electrical signal is converted into a scattering intensity, and the scattered light having a threshold value or more is converted into a predetermined size according to a calibration curve. The measured value here was an average value of five wafers.

  As a result of the measurement, the number of detected LPDs was 142.60 / wf on the surface of the silicon wafer subjected to the secondary polishing without the abrasive grains after the primary polishing with the abrasive grains according to the present invention interposed (FIG. 7 PW), the number of detected LPDs on the surface of the epitaxial silicon wafer was 2.7500 / wf (EW in FIG. 7). On the other hand, the number of detected LPDs on the surface of a silicon wafer mirror-polished using a polishing solution containing abrasive grains of the conventional method is 1851.00 / wf (PW in FIG. 8), and the LPD on the surface of the epitaxial silicon wafer. Was detected at 10.5000 / wf (EW in FIG. 8).

  As is clear from the LPD distribution diagrams of FIGS. 7 and 8, the method of the present invention in which the secondary polishing without interposing abrasive grains after the primary polishing with interposing abrasive grains is more effective than the polishing liquid containing abrasive grains. Compared with the conventional method using only primary polishing, the number of LPDs generated on the mirror-polished surface of the silicon wafer and the number of LPDs generated on the surface of the epitaxial film formed on the mirror-polished surface were reduced. In addition, in the LPD evaluation result of the silicon wafer (PW) of the method of the present invention shown in FIG. 7, a slight LPD was observed, but as shown in the previous experimental result, the oxide film breakdown voltage of the silicon wafer (PW) was observed. Since the characteristic (C + mode occupancy by TZDB measurement) is almost 100% (FIG. 6), the LPD observed in FIG. 7 is considered to be a particle, not an LPD due to processing such as processing damage. Even if the LPD is caused by processing, it can be specified that the processing damage is very small in size without affecting the C + mode occupancy, and there is little possibility of affecting the surface quality of the epitaxial film.

Next, referring to FIGS. 9 to 12, in accordance with the method of the present invention (FIGS. 9 and 11) and the conventional method (FIGS. 10 and 12), the surface of the silicon wafer (PW) and the epitaxial growth after epitaxial growth are performed. When the measurement area of 10 μm × 10 μm (FIGS. 9 and 10) or the measurement area of 1 μm × 1 μm (FIGS. 11 and 12) is observed with an atomic force microscope with respect to the surface of the silicon wafer (EW) The roughness of each surface is reported. In addition, the result shown here is an evaluation result after carrying out SC1 washing | cleaning of the surface of both a silicon wafer (PW) and an epitaxial silicon wafer (EW). The cleaning conditions at this time are SC1 (Standard Cleaning 1) cleaning solution prepared by mixing at a volume ratio of NH ₄ OH: H ₂ O ₂ : H ₂ O = 1: 2: 7, and each surface is removed by 4 nm. It is cleaning.

  For observation of the surface roughness (roughness), “Multi-mode AFM” which is an atomic force microscope manufactured by Veeco was adopted. This apparatus is a tapping AFM that vibrates a cachi-lever in the vicinity of a resonance frequency (amplitude 20 to 100 nm) and observes irregularities on the surface of the wafer while intermittently contacting the cachi-lever with the surface of the sample wafer. The force detection mode is dynamic, the resolution is 1 nm, the force acting on the sample wafer is 0.1 to 1 nN in the atmosphere, the measurement point is 1 point / wf (Center), and the roughness index (the amplitude average parameter in the height direction) Is the root mean square roughness (former RMS).

As a result of observation, the surface roughness of the 10 μm × 10 μm measurement area area on the surface of the silicon wafer mirror-polished in accordance with the first and second two-stage polishing of the method of the present invention is 0.277 nm in RMS display ( PW) in FIG. Further, the surface roughness of the same measurement area on the surface of the epitaxial silicon wafer was 0.100 nm in RMS display (EW in FIG. 9).
On the other hand, the surface roughness of a 10 μm × 10 μm measurement area area on the surface of a silicon wafer that has been subjected to primary mirror polishing using a polishing liquid containing conventional abrasive grains is 0.458 nm in RMS display (see FIG. 10). PW). Further, the surface roughness of the same measurement area on the surface of the epitaxial silicon wafer was 0.132 nm in RMS display (EW in FIG. 10).
As is apparent from FIGS. 9 and 10, the method of the present invention in which the two-stage polishing is performed is mirror-polished on a silicon wafer as compared with the conventional method using only a primary polishing using a polishing liquid containing loose abrasive grains. It was found that the surface roughness of the surface and the surface of the epitaxial film formed on this mirror-polished surface was improved (reduced).

Further, the surface roughness of the measurement area of 1 μm × 1 μm on the surface of the silicon wafer subjected to the two-step polishing of the present invention was 0.223 nm (PW in FIG. 11) in RMS display. Further, the surface roughness of the measurement area of 1 μm × 1 μm on the surface of the epitaxial silicon wafer was 0.097 nm in RMS display (EW in FIG. 11).
On the other hand, the surface roughness of a 1 μm × 1 μm measurement area on the surface of a silicon wafer that has been subjected to primary mirror polishing using a polishing liquid containing conventional abrasive grains is 0.311 nm in RMS display (see FIG. 12). PW). Further, the surface roughness of the same measurement area on the surface of the epitaxial silicon wafer was 0.103 nm in RMS display (EW in FIG. 12).
As is apparent from FIGS. 11 and 12, the method of the present invention was able to reduce the surface roughness of the mirror polished surface of the silicon wafer and the surface of the epitaxial film compared to the conventional method.

  The present invention is useful as an epitaxial silicon wafer serving as a substrate for manufacturing devices such as bipolar ICs, MOSs, and discretes.

10 Epitaxial silicon wafer,
11 Silicon wafer.

Claims (6)

Using a primary polishing liquid mainly composed of an alkaline aqueous solution, with the abrasive grains interposed, the oxide film formed on the surface of the silicon wafer is removed by primary polishing,
Then, using a secondary polishing liquid in which a water-soluble polymer is added to an alkaline aqueous solution not containing abrasive grains, the surface of the silicon wafer is secondarily polished to be mirror-finished,
A method of manufacturing an epitaxial silicon wafer, wherein after the secondary polishing, an epitaxial film is vapor-phase grown on the mirror-finished surface of the silicon wafer. The method for producing an epitaxial silicon wafer according to claim 1, wherein the water-soluble polymer added to the alkaline aqueous solution is hydroxyethyl cellulose or polyethylene glycol. The alkaline aqueous solution that is the main agent of the primary polishing liquid and the alkaline aqueous solution that does not contain abrasive grains of the secondary polishing liquid are alkaline aqueous solutions that are adjusted within the range of pH 8 to pH 14, and include basic ammonia as a pH adjusting agent. 3. The epitaxial silicon wafer according to claim 1, which is an alkaline aqueous solution or an alkaline carbonate aqueous solution to which any one of a salt, a basic potassium salt, and a basic sodium salt is added, or an alkaline aqueous solution to which hydrazine or an amine is added. Manufacturing method. The surface roughness of the surface of the silicon wafer after the secondary polishing is less than 0.3 nm in terms of RMS when measuring a measurement area of 1 μm × 1 μm with an atomic force microscope. The manufacturing method of the epitaxial silicon wafer of any one of these. The surface roughness of the surface of the silicon wafer after the secondary polishing is 0.3 nm or less in RMS display when a measurement area of 10 μm × 10 μm is measured with an atomic force microscope. The manufacturing method of the epitaxial silicon wafer of any one of these. The epitaxial silicon wafer production according to any one of claims 1 to 5, wherein, after the secondary polishing, a C + mode occupancy rate by TZDB measurement is 99% or more in an oxide film pressure resistance evaluation of the silicon wafer. Method.