CN113392054B - Interface integrated circuit and server - Google Patents
Interface integrated circuit and server Download PDFInfo
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- CN113392054B CN113392054B CN202110939955.3A CN202110939955A CN113392054B CN 113392054 B CN113392054 B CN 113392054B CN 202110939955 A CN202110939955 A CN 202110939955A CN 113392054 B CN113392054 B CN 113392054B
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- 238000012423 maintenance Methods 0.000 abstract description 16
- 230000010354 integration Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 8
- 238000000034 method Methods 0.000 description 6
- 230000006870 function Effects 0.000 description 4
- 230000002093 peripheral effect Effects 0.000 description 4
- 230000009471 action Effects 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
Abstract
The invention discloses an interface integrated circuit and a server, comprising: the interface selection circuit is respectively connected with the display interface of the BMC and the plurality of USB interfaces of the PCH; an integration interface; the control circuit is respectively connected with the BMC serial port and the system serial port of the BMC, the serial port of the expansion device in the server and the interface selection circuit and used for connecting the correspondingly selected serial port to the interface selection circuit according to the serial port selection instruction and controlling the interface selection circuit to connect the correspondingly selected interface to the integrated interface according to the interface selection instruction. Therefore, the integrated interface can replace each debugging and maintaining interface, the space of a server panel is saved, the equipment maintenance cost is reduced, the integrated interface is arranged on the panel of the server, the problem that a fault site is damaged due to the fact that the debugging and maintaining interface is designed inside the server is solved, the fault site is saved, the complexity of operation is reduced, and therefore fault location of the server is facilitated.
Description
Technical Field
The present invention relates to the field of servers, and in particular, to an interface integrated circuit and a server.
Background
With the gradual wide application of the server, the stability requirement of the user for the server gradually increases, and therefore when the server fails, the server needs to be quickly positioned, analyzed and solved.
Referring to fig. 1, fig. 1 is a schematic diagram of a debugging maintenance interface of a server in the prior art. When a server fails, a maintainer acquires a working log of a Baseboard Management Controller (BMC) through a BMC Serial port on the BMC, and acquires a system working log in a PCH (Platform Controller Hub) interacting with the BMC (integrated south bridge chip) through a system Serial port on the BMC (Enhanced Serial Peripheral interface) (the two are interacted through an Enhanced Serial Peripheral interface (eSPI)), so as to analyze the failure reason of the server through the acquired working log. In addition, the maintainer usually connects the display interface of the BMC to the display, and connects a plurality of USB (Universal Serial Bus) interfaces (two types of interfaces, USB2.0 and USB 3.0) of the PCH to the system disk, the keyboard, and the mouse, so as to be used for debugging the server and assisting the fault location of the server.
At present, a display interface of the BMC and a plurality of USB interfaces of the PCH are usually designed on a panel of a server, and occupy more space of the server panel, so that the server panel has no space for adding more configurations such as a PCIE (peripheral component interconnect express, high speed serial computer expansion bus standard) card and a hard disk. The BMC serial port and the system serial port of the BMC are usually designed in a server, and are realized in a common pin mode, but the serial port design has the following problems in the server: when the server is debugged, the case needs to be opened after the server is powered off, the server is restarted after the corresponding contact pin is found and the serial port tool is connected, so that the work log analysis is obtained through the serial port, the maintenance time is long, the maintenance difficulty is high, the fault is difficult to reappear after the server is powered off, and the fault positioning difficulty of the server is increased.
Therefore, how to provide a solution to the above technical problem is a problem that needs to be solved by those skilled in the art.
Disclosure of Invention
The invention aims to provide an interface integrated circuit and a server, wherein an integrated interface can replace a display interface of a BMC, a serial port of the BMC, a system serial port, a serial port of an expansion device and a plurality of USB interfaces of a PCH, so that the space of a server panel is saved, the cost of equipment maintenance is reduced, and the integrated interface is arranged on the panel of the server, so that the problem that a fault site is damaged due to the fact that a debugging maintenance interface is designed in the server is avoided, the fault site is saved, the complexity of operation is reduced, and the fault positioning of the server is facilitated.
In order to solve the above technical problem, the present invention provides an interface integrated circuit, which is applied to a server including a BMC and a PCH, and includes:
the interface selection circuit is respectively connected with the display interface of the BMC and the plurality of USB interfaces of the PCH;
the integrated interface is arranged on a panel of the server and connected with the interface selection circuit;
the control circuit is respectively connected with the BMC serial port and the system serial port of the BMC, the serial port of the expansion device in the server and the interface selection circuit and is used for connecting the correspondingly selected serial port to the interface selection circuit according to a serial port selection instruction and controlling the interface selection circuit to connect the correspondingly selected interface to the integrated interface according to an interface selection instruction.
Preferably, the plurality of USB interfaces of the PCH includes a USB3.0 interface and a first USB2.0 interface;
the interface selection circuit includes:
the multiplexer is respectively connected with the display interface, the USB3.0 interface, the integrated interface and the control circuit;
the serial port connected with the control circuit is converted into a USB chip;
the USB2.0 switch chip is respectively connected with the serial port-to-USB chip, the first USB2.0 interface, the integrated interface and the control circuit;
the control circuit is specifically configured to connect the two serial ports to the serial-to-USB chip according to the two serial ports selected correspondingly according to the serial port selection instruction, so that the serial-to-USB chip combines and converts signals of the two serial ports into USB2.0 signals, and the USB2.0 signals are output through a second USB2.0 interface of the serial-to-USB chip; and according to an interface selection instruction, connecting the correspondingly selected interface to the integrated interface by controlling the multiplexer and the USB2.0 switch chip.
Preferably, the integrated interface is a USB Type-C interface, and the display interface is a DP interface including 2 pairs of DP signal lines; the USB3.0 interface and the USB2.0 interface output by the USB2.0 switch chip respectively occupy a pair of D +/D-pins of the USB Type-C interface;
the interface selection instruction comprises five selection modes; wherein, the first selection mode is output without interface; the second selection mode is the combined output of the USB3.0 interface, the 1 pair of DP signal lines and the first USB2.0 interface; the third selection mode is the combined output of the USB3.0 interface, the 1 pair of DP signal lines and the second USB2.0 interface; the fourth selection mode is that 2 pairs of DP signal lines and the first USB2.0 interface are output in a combined mode; the fifth selection mode is that 2 pairs of DP signal lines and the second USB2.0 interface are output in a combined mode.
Preferably, the interface integrated circuit further comprises:
one end is equipped with USB Type-C interface connection's Type-C connector, the other end are equipped with the debugging cable of the three output interface of USB3.0 Type-A interface, mini DP interface, USB2.0 Type-A interface.
Preferably, the control circuit includes:
the instruction trigger circuit is used for outputting a corresponding interface selection instruction according to the interface selection requirement;
the controller is respectively connected with the BMC serial port, the system serial port, the serial port of the expansion device, the instruction trigger circuit and the interface selection circuit and is used for connecting the correspondingly selected serial port to the interface selection circuit according to a serial port selection instruction and controlling the interface selection circuit to connect the correspondingly selected interface to the integrated interface according to the interface selection instruction.
Preferably, the controller comprises a first pull-down resistor and a second pull-down resistor; the instruction trigger circuit comprises a first dial switch, a second dial switch, a first resistor, a second resistor and a third resistor; wherein:
a first end of the first resistor is connected with a direct-current power supply, a second end of the first resistor is connected with a first end of the first dial switch, a second end of the first dial switch is connected with a first end of the first pull-down resistor, a common end of the first dial switch is connected with the controller, and a second end of the first pull-down resistor is grounded; a first end of the second resistor is connected with a direct-current power supply, a second end of the second resistor is connected with a first end of the second dial switch, a second end of the second dial switch is respectively connected with a first end of the third resistor and a first end of the second pull-down resistor, a common end of the second dial switch is connected with the controller, a second end of the third resistor is connected with the direct-current power supply, and a second end of the second pull-down resistor is grounded; the instruction trigger circuit outputs a first voltage signal to the controller based on the switching-on condition of the first dial switch, and outputs a second voltage signal to the controller based on the switching-on condition of the second dial switch;
the controller is specifically configured to determine, according to a voltage mode correspondence, a target selection mode corresponding to a current voltage value of the first voltage signal and the second voltage signal, and control the interface selection circuit to connect the target interface to the integrated interface according to a target interface correspondingly selected in the target selection mode.
Preferably, the expansion device comprises a network card and a storage expansion card.
Preferably, the controller comprises a simulation serial port for transmitting the controller log;
the controller is specifically configured to select a corresponding serial port from the BMC serial port, the system serial port, the serial port of the expansion device, and the analog serial port to connect to the interface selection circuit according to a serial port selection instruction.
Preferably, the controller is an FPGA.
In order to solve the above technical problem, the present invention further provides a server, which includes a BMC, a PCH and any one of the above interface integrated circuits.
The invention provides an interface integrated circuit, which is applied to a server containing BMC and PCH, and comprises: the interface selection circuit is respectively connected with the display interface of the BMC and the plurality of USB interfaces of the PCH; the integrated interface is arranged on a panel of the server and connected with the interface selection circuit; the control circuit is respectively connected with the BMC serial port and the system serial port of the BMC, the serial port of the expansion device in the server and the interface selection circuit and used for connecting the correspondingly selected serial port to the interface selection circuit according to the serial port selection instruction and controlling the interface selection circuit to connect the correspondingly selected interface to the integrated interface according to the interface selection instruction. Therefore, the integrated interface can replace a display interface of a BMC, a BMC serial port, a system serial port, a serial port of an expansion device and a plurality of USB interfaces of a PCH, the space of a server panel is saved, the equipment maintenance cost is reduced, the integrated interface is arranged on the panel of the server, the problem that a fault site is damaged due to the fact that the debugging maintenance interface is designed inside the server is avoided, the fault site is saved, the complexity of operation is reduced, and therefore fault location of the server is facilitated.
The invention also provides a server which has the same beneficial effect with the interface integrated circuit.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed in the prior art and the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
FIG. 1 is a schematic diagram of a debugging and maintenance interface design of a server in the prior art;
fig. 2 is a schematic structural diagram of an interface integrated circuit according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of an interface integrated circuit according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of an instruction triggering circuit according to an embodiment of the present invention.
Detailed Description
The core of the invention is to provide an interface integrated circuit and a server, an integrated interface can replace a display interface of BMC, a serial port of BMC, a system serial port, a serial port of an expansion device and a plurality of USB interfaces of PCH, thereby saving the space of a server panel, reducing the cost of equipment maintenance, avoiding the problem that the fault site is damaged because the debugging maintenance interface is designed in the server, not only preserving the fault site, but also reducing the complexity of operation, thereby facilitating the fault location of the server.
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 2, fig. 2 is a schematic structural diagram of an interface integrated circuit according to an embodiment of the present invention.
The interface integrated circuit is applied to a server containing BMC and PCH, and comprises the following components:
the interface selection circuit 1 is respectively connected with a display interface of the BMC and a plurality of USB interfaces of the PCH;
an integrated interface 2 arranged on the panel of the server and connected with the interface selection circuit 1;
and the control circuit 3 is respectively connected with the BMC serial port and the system serial port of the BMC, the serial port of the expansion device in the server and the interface selection circuit 1, and is used for connecting the correspondingly selected serial port to the interface selection circuit 1 according to a serial port selection instruction, and controlling the interface selection circuit 1 to connect the correspondingly selected interface to the integrated interface 2 according to the interface selection instruction.
Specifically, the interface integrated circuit of the present application includes an interface selection circuit 1, an integrated interface 2, and a control circuit 3, and its working principle is:
the control circuit 3 is respectively connected with a BMC serial port and a system serial port of the BMC and a serial port (a UART (Universal Asynchronous Receiver/Transmitter) interface) of an extension device in the server. After receiving the serial port selection instruction, the control circuit 3 may connect the serial port selected by the serial port selection instruction corresponding to the serial port selection instruction to the interface selection circuit 1 from the BMC serial port, the system serial port, and the serial port of the expansion device.
The interface selection circuit 1 is connected with serial ports selected by the control circuit 3 from a BMC serial port, a system serial port and a serial port of the expansion device on one hand, and is connected with a display interface of the BMC and a plurality of USB interfaces of the PCH on the other hand. Based on this, after receiving the interface selection instruction, the control circuit 3 may control the interface selection circuit 1 to connect the interface selected by the interface selection instruction corresponding to the interface selection instruction to the integrated interface 2 from the interfaces connected to the control circuit, at this time, the integrated interface 2 may be used as the interface selected by the interface selection instruction corresponding to the interface selection instruction, and the integrated interface 2 is disposed on the panel of the server, so as to facilitate the server fault analysis.
The invention provides an interface integrated circuit, which is applied to a server containing BMC and PCH, and comprises: the interface selection circuit is respectively connected with the display interface of the BMC and the plurality of USB interfaces of the PCH; the integrated interface is arranged on a panel of the server and connected with the interface selection circuit; the control circuit is respectively connected with the BMC serial port and the system serial port of the BMC, the serial port of the expansion device in the server and the interface selection circuit and used for connecting the correspondingly selected serial port to the interface selection circuit according to the serial port selection instruction and controlling the interface selection circuit to connect the correspondingly selected interface to the integrated interface according to the interface selection instruction. Therefore, the integrated interface can replace a display interface of a BMC, a BMC serial port, a system serial port, a serial port of an expansion device and a plurality of USB interfaces of a PCH, the space of a server panel is saved, the equipment maintenance cost is reduced, the integrated interface is arranged on the panel of the server, the problem that a fault site is damaged due to the fact that the debugging maintenance interface is designed inside the server is avoided, the fault site is saved, the complexity of operation is reduced, and therefore fault location of the server is facilitated.
On the basis of the above-described embodiment:
referring to fig. 3, fig. 3 is a schematic structural diagram of an interface integrated circuit according to an embodiment of the present invention.
As an alternative embodiment, the plurality of USB interfaces of the PCH includes a USB3.0 interface and a first USB2.0 interface;
the interface selection circuit 1 includes:
a multiplexer 11 respectively connected with the display interface, the USB3.0 interface, the integrated interface 2 and the control circuit 3;
a serial port-to-USB chip 12 connected with the control circuit 3;
a USB2.0 switch chip 13 respectively connected with the serial port-to-USB chip 12, the first USB2.0 interface, the integrated interface 2 and the control circuit 3;
the control circuit 3 is specifically configured to connect the two serial ports to the serial-to-USB chip 12 according to the two serial ports selected correspondingly according to the serial port selection instruction, so that the serial-to-USB chip 12 combines and converts the signals of the two serial ports into USB2.0 signals, and the USB2.0 signals are output through a second USB2.0 interface of the serial-to-USB chip; according to the interface selection instruction, the corresponding selected interface is connected to the integrated interface 2 through the control multiplexer 11 and the USB2.0 switch chip 13.
Specifically, the plurality of USB interfaces of the PCH of the present application include a USB3.0 interface and a USB2.0 interface (referred to as a first USB2.0 interface); the interface selection circuit 1 includes a multiplexer 11 (such as TUSB 546-DCI), a serial-to-USB chip 12, and a USB2.0 switch chip 13, and its working principle is:
the multiplexer 11 is controlled by the control circuit 3, and can select a corresponding interface signal line from the display interface of the BMC and the USB3.0 interface of the PCH to be connected to the integrated interface 2. The USB2.0 switch chip 13 is controlled by the control circuit 3, and can select a corresponding interface signal line from the USB2.0 interface (referred to as the second USB2.0 interface) of the serial-to-USB chip 12 and the first USB2.0 interface of the PCH to connect to the integrated interface 2.
The control circuit 3 specifically selects two paths of serial ports (selected from the BMC serial port, the system serial port and the serial port of the expansion device, and generally selects the BMC serial port and the system serial port of the BMC by default) correspondingly selected according to the serial port selection instruction, and connects the two paths of serial ports to the serial port-to-USB chip 12. The serial-to-USB chip 12 combines the two serial signals, converts the combined serial signal into a USB2.0 signal, and outputs the converted USB2.0 signal to the USB2.0 switch chip 13 through the second USB2.0 interface. Based on this, the control circuit 3 connects the interface selected correspondingly to the integrated interface 2 through controlling the multiplexer 11 and the USB2.0 switch chip 13 according to the interface selection instruction.
As an alternative embodiment, the integrated interface 2 is a USB Type-C interface, and the display interface is a DP interface including 2 pairs of DP signal lines; the USB3.0 interface and the USB2.0 interface output by the USB2.0 switch chip 13 respectively occupy a pair of D +/D-pins of the USB Type-C interface;
the interface selection instruction includes five selection modes; wherein, the first selection mode is output without interface; the second selection mode is the combined output of a USB3.0 interface, a 1-pair DP signal line and a first USB2.0 interface; the third selection mode is the combined output of a USB3.0 interface, a 1-pair DP signal line and a second USB2.0 interface; the fourth selection mode is that 2 pairs of DP signal lines and the first USB2.0 interface are combined and output; the fifth selection mode is that 2 pairs of DP signal lines and the second USB2.0 interface are output in a combined mode.
Specifically, the integrated interface 2 of the present application is a USB Type-C (Type of USB interface) interface, and the PIN definition of the USB Type-C interface is shown in table 1:
TABLE 1
| PIN | Function(s) | PIN | Function(s) |
| A1 | GND | B12 | GND |
| A2 | TX1+ | B11 | RX1+ |
| A3 | TX1- | B10 | RX1- |
| A4 | Vbus | B9 | Vbus |
| A5 | CC1 | B8 | SBU2 |
| A6 | D+ | B7 | D- |
| A7 | D- | B6 | D+ |
| A8 | SBU1 | B5 | CC2 |
| A9 | Vbus | B4 | Vbus |
| A10 | RX2- | B3 | TX2- |
| A11 | RX2+ | B2 | TX2+ |
| A12 | GND | B1 | GND |
The USB3.0 interface of the PCH requires 1 pair of TX/RX (transmit/receive) signal lines and 1 pair of D +/D-signal lines to the USB Type-C interface; the Display interface of the BMC is a DP interface including 2 pairs of DP (Display Port) signal lines (1 pair of DP signal lines = two high-speed signal lines +1 AUX (audio input) signal line), and the Display interface needs to use 2 pairs of TX/RX signal lines (connected to the high-speed signal line) and 2 SBU (side band, Auxiliary function) signal lines (connected to the AUX signal line) of the USB Type-C interface; the USB2.0 interface output by the USB2.0 switch chip 13 requires 1 pair of D +/D-signal lines to the USB Type-C interface. It should be noted that the USB3.0 interface and the USB2.0 interface output by the USB2.0 switch chip 13 respectively occupy a pair of D +/D-pins of the USB Type-C interface, so that the two interfaces do not conflict when in use.
Based on this, the multiplexer 11 and the USB2.0 switch chip 13 are connected to the USB Type-C interface, which is satisfied by: when the USB3.0 interface of the PCH is selected, the multiplexer 11 connects the USB3.0 interface of the PCH to 1 pair of TX/RX signal lines and 1 pair of D +/D-signal lines of the USB Type-C interface, so that the 1 pair of TX/RX signal lines and the 1 pair of D +/D-signal lines of the USB Type-C interface are combined to replace the USB3.0 interface of the PCH. Similarly, when 1 pair of DP signal lines of the DP interface of the BMC is selected (1 pair of DP signal lines can implement display operation of a display), the multiplexer 11 connects the 1 pair of DP signal lines of the DP interface to 1 pair of TX/RX signal lines and 1 SBU signal line of the USB Type-C interface, so that the 1 pair of TX/RX signal lines and the 1 SBU signal line of the USB Type-C interface are combined to replace the 1 pair of DP signal lines of the DP interface. When the 2 pairs of DP signal lines of the DP interface of the BMC are selected, the multiplexer 11 connects the 2 pairs of DP signal lines of the DP interface to the 2 pairs of TX/RX signal lines and the 2 SBU signal lines of the USB Type-C interface, respectively, so that the 2 pairs of TX/RX signal lines and the 2 SBU signal lines of the USB Type-C interface are combined to replace the entire DP interface. When the first USB2.0 interface of the PCH is selected, the USB2.0 switch chip 13 connects the first USB2.0 interface of the PCH to 1 pair of D +/D-signal lines of the USB Type-C interface, so that the 1 pair of D +/D-signal lines of the USB Type-C interface replaces the first USB2.0 interface of the PCH. When the second USB2.0 interface of the serial-to-USB chip 12 is selected, the USB2.0 switch chip 13 connects the second USB2.0 interface of the serial-to-USB chip 12 to 1 pair of D +/D-signal lines of the USB Type-C interface, so that the 1 pair of D +/D-signal lines of the USB Type-C interface replaces the second USB2.0 interface of the serial-to-USB chip 12.
The interface selection instruction may include five selection modes: the first selection mode is output without interface; the second selection mode is that the USB3.0 interface, 1 pair of DP signal lines of the DP interface and the first USB2.0 interface are combined and output; the third selection mode is that the USB3.0 interface, 1 pair of DP signal lines of the DP interface and the second USB2.0 interface are combined and output; the fourth selection mode is that the 2 pairs of DP signal lines of the DP interface and the first USB2.0 interface are output in a combined mode; the fifth selection mode is that the 2 pairs of DP signal lines of the DP interface and the second USB2.0 interface are output in a combined mode. In the same selection mode, the signal lines of the USB Type-C interface used for each interface do not collide with each other.
As an alternative embodiment, the interface integrated circuit further comprises:
one end is equipped with the Type-C connector with USBType-C interface connection, the other end is equipped with the debugging cable of the three output interface of USB3.0 Type-A interface, mini DP interface, USB2.0 Type-A interface.
Further, the interface integrated circuit of the present application further includes a debug cable, and its operating principle is:
the one end of debugging cable is equipped with the Type-C connector with USBType-C interface connection, and the other end is equipped with the three output interface of USB3.0 Type-A (the Type of USB interface) interface, mini DP interface (small-size DP interface), USB2.0 Type-A interface.
Based on this, when the USB3.0 interface of the PCH is selected, the multiplexer 11 connects the USB3.0 interface of the PCH to the USB Type-C interface, and then connects to the USB3.0 Type-a interface through the debug cable. When the DP interface of the BMC is selected, the multiplexer 11 connects the DP interface to the USB Type-C interface and then to the mini DP interface through the debugging cable. When the first USB2.0 interface of the PCH is selected, the USB2.0 switch chip 13 connects the first USB2.0 interface to the USB Type-C interface, and then connects to the USB2.0 Type-a interface via the debug cable. When the second USB2.0 interface of the serial-to-USB chip 12 is selected, the USB2.0 switch chip 13 connects the second USB2.0 interface to the USB Type-C interface, and then connects to the USB2.0 Type-a interface via the debug cable.
Therefore, the debugging and maintenance work of the server can be completed by only one customized debugging cable, the burden and the work complexity of maintenance personnel are reduced, multiple tools do not need to be prepared, and the equipment maintenance cost is reduced.
As an alternative embodiment, the control circuit 3 comprises:
the instruction trigger circuit is used for outputting a corresponding interface selection instruction according to the interface selection requirement;
the controller 31 is respectively connected with the BMC serial port, the system serial port, the serial port of the expansion device, the instruction trigger circuit and the interface selection circuit 1, and is used for connecting the correspondingly selected serial port to the interface selection circuit 1 according to the serial port selection instruction and controlling the interface selection circuit 1 to connect the correspondingly selected interface to the integrated interface 2 according to the interface selection instruction.
Specifically, the control circuit 3 of the present application includes an instruction trigger circuit and a controller 31, and its operating principle is:
the command trigger circuit may output a corresponding interface selection command to the controller 31 according to the interface selection requirement. After receiving the interface selection command, the controller 31 may output a control signal to the interface selection circuit 1 through a GPIO (General-purpose input/output) interface, so as to control the interface selection circuit 1 to connect the interface selected by the interface selection command to the integrated interface 2 from the interfaces connected to the interface selection circuit 1.
Referring to fig. 4, fig. 4 is a schematic structural diagram of an instruction triggering circuit according to an embodiment of the present invention.
As an alternative embodiment, the controller 31 includes a first pull-down resistor and a second pull-down resistor; the instruction trigger circuit comprises a first dial switch K1, a second dial switch K2, a first resistor R1, a second resistor R2 and a third resistor R3; wherein:
a first end of the first resistor R1 is connected with a direct current power supply, a second end of the first resistor R1 is connected with a first end of the first dial switch K1, a second end of the first dial switch K1 is connected with a first end of the first pull-down resistor, a common end of the first pull-down resistor is connected with the controller 31, and a second end of the first pull-down resistor is grounded; a first end of the second resistor R2 is connected to a direct-current power supply, a second end of the second resistor R2 is connected to a first end of the second dial switch K2, a second end of the second dial switch K2 is respectively connected to a first end of the third resistor R3 and a first end of the second pull-down resistor, a common end of the second dial switch K2 is connected to the controller 31, a second end of the third resistor R3 is connected to the direct-current power supply, and a second end of the second pull-down resistor is grounded; the instruction trigger circuit outputs a first voltage signal to the controller 31 based on the on condition of the first dial switch K1, and outputs a second voltage signal to the controller 31 based on the on condition of the second dial switch K2;
the controller 31 is specifically configured to determine a target selection mode corresponding to the current voltage values of the first voltage signal and the second voltage signal according to the voltage mode corresponding relationship, and control the interface selection circuit 1 to connect the target interface to the integrated interface 2 according to a target interface correspondingly selected in the target selection mode.
Specifically, the controller 31 of the present application includes a first pull-down resistor and a second pull-down resistor; the instruction trigger circuit comprises a first dial switch K1, a second dial switch K2, a first resistor R1, a second resistor R2 and a third resistor R3, and the working principle is as follows:
the command trigger circuit outputs a first voltage signal to the controller 31 based on the on condition of the first dip switch K1, and outputs a second voltage signal to the controller 31 based on the on condition of the second dip switch K2. The controller 31 may determine a target selection mode corresponding to the current voltage values of the first voltage signal and the second voltage signal according to the voltage mode corresponding relationship, and control the interface selection circuit 1 to connect the target interface to the integrated interface 2 according to the target interface correspondingly selected in the target selection mode.
More specifically, the command trigger circuit may be disposed in the customized debug cable mentioned in the above embodiment, wherein the first end of the first resistor R1, the first end of the second resistor R2, and the second end of the third resistor R3 are connected to a Vbus (power supply) signal line of the USB Type-C interface one by one through a Type-C connector of the debug cable, and a dc power supply is connected to the Vbus signal line of the USB Type-C interface to provide corresponding dc power for the command trigger circuit; the second end of the first dial-up switch K1 is connected to a CC1 signal line of a USB Type-C interface through a Type-C connector of a debugging cable, and a CC1 signal line of the USB Type-C interface is connected with the first end of a first pull-down resistor in the controller 31; on the second end of second dip switch K2 and the first end of third resistance R3 inserted the CC2 signal line of USB Type-C interface through the Type-C connector of debugging cable, the CC2 signal line of USB Type-C interface was connected with the first end of the interior second pull-down resistance of controller 31, can realize above-mentioned instruction trigger circuit's function. It is understood that in the present design, there are 5 operation modes, and the controller 31 can confirm the current operation mode by recognizing the voltages of CC1 and CC2 (the default first pull-down resistor and the second pull-down resistor are 100K Ω), and set the operation modes of the multiplexer 11 and the USB2.0 switch chip 13, as shown in table 2:
TABLE 2
| CC1 PIN | CC2 PIN | MODE |
| <0.2V | <0.2V | Power Down |
| <0.2V | 0.8~1.2V | USB 3.0 + 2 Lane DP + USB2.0(PCH) |
| <0.2V | 2.3~2.6V | USB 3.0 + 2 Lane DP + USB2.0(UART) |
| >3V | 0.8~1.2V | 4 Lane DP + USB2.0 (PCH) |
| >3V | 2.3~2.6V | 4 Lane DP + USB2.0(UART) |
The first working mode is a Power Down mode (without interface output), at this time, the USB Type-C interface is not connected to the debugging cable, the voltage collected by the controller 31 from the CC1 and the CC2 is 0V, and the USB Type-C interface does not output any signal to the outside.
The second working mode is USB3.0 + 2 Lane DP (1 to DP signal line) + USB2.0(PCH) mode, at this time, the USB Type-C interface is connected to the debug cable, both the first toggle switch K1 and the second toggle switch K2 are turned off, the voltage that the controller 31 acquires CC1 is 0V, CC2 is 1V, and then the multiplexer 11 is controlled to connect the 1 pair of DP signal lines in the DP interface of the BMC and the USB3.0 interface of the PCH to the USB Type-C interface, and the USB2.0 switch chip 13 is controlled to connect the first USB2.0 of the PCH to the USB Type-C interface.
The third working mode is USB3.0 + 2 Lane DP + USB2.0(UART) mode, at this moment, the USB Type-C interface is accessed to the debug cable, the first dial-up switch K1 is closed, the second dial-up switch K2 is opened, the voltage that the controller 31 collected the CC1 is 0V, CC2 is 2.5V, and then the multiplexer 11 is controlled to connect the 1 pair of DP signal lines in the DP interface of the BMC, the USB3.0 interface of the PCH to the USB Type-C interface, and the USB2.0 switch chip 13 is controlled to connect the second USB2.0 of the serial to USB chip 12 to the USB Type-C interface.
The fourth working mode is 4 Lane DP (2 to DP signal line) + USB2.0(PCH) mode, the USB Type-C interface access debugging cable this moment, first dip switch K1 is opened, second dip switch K2 is closed, the voltage that CC1 was gathered to controller 31 is 1V for the voltage of 3.3V, CC2, and then control multiplexer 11 is connected to the USB Type-C interface with 2 in the DP interface of BMC to the DP signal line, and control USB2.0 switch chip 13 is connected to the USB Type-C interface with the first USB2.0 of PCH.
The fifth working mode is 4 Lane DP + USB2.0(UART) mode, at this moment, USB Type-C interface access debugging cable, first dial-up switch K1 and second dial-up switch K2 are all opened, the voltage that CC1 was gathered to controller 31 is 3.3V, CC2 is 2.5V, and then control multiplexer 11 is connected to USB Type-C interface with 2 in the DP interface of BMC to the DP signal line, and control serial ports to USB chip 12's second USB2.0 is connected to USB Type-C interface.
As an alternative embodiment, the expansion device includes a network card and a storage expansion card.
Specifically, the expansion device of the present application includes a network card and a storage expansion card, and may also include other devices connected by a serial port, which is not particularly limited herein.
As an alternative embodiment, the controller 31 includes an analog serial port for transmitting the controller log;
the controller 31 is specifically configured to select a corresponding serial port from the BMC serial port, the system serial port, the serial port of the expansion device, and the analog serial port to connect to the interface selection circuit 1 according to the serial port selection instruction.
Further, the controller 31 of the present application includes its own analog serial port, and the controller 31 specifically selects a corresponding serial port from the BMC serial port, the system serial port, the serial port of the expansion device, and the analog serial port to connect to the interface selection circuit 1.
It should be noted that the controller 31 is connected to the flash memory through an SPI (Serial Peripheral Interface) Interface and is configured to store a log of the controller, and the controller 31 specifically outputs the log stored in the flash memory through its own analog Serial port.
As an alternative embodiment, the controller 31 is an FPGA.
Specifically, the controller 31 of the present application may select an FPGA (Field Programmable Gate Array) in the server to fully utilize the advantage of the FPGA being Programmable.
The application also provides a server which comprises a BMC, a PCH and any one of the interface integrated circuits.
For the introduction of the server provided in the present application, reference is made to the above-mentioned embodiment of the interface integrated circuit, and details of the application are not repeated herein.
It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (8)
1. An interface Integrated Circuit (IC) for a server including a BMC (baseboard management controller) and a PCH (PCH), the PCH being an integrated south bridge chip (IC), comprising:
the interface selection circuit is respectively connected with the display interface of the BMC and the plurality of USB interfaces of the PCH;
the integrated interface is arranged on a panel of the server and connected with the interface selection circuit;
the control circuit is respectively connected with the BMC serial port and the system serial port of the BMC, the serial port of the expansion equipment in the server and the interface selection circuit and is used for connecting the correspondingly selected serial port to the interface selection circuit according to a serial port selection instruction and controlling the interface selection circuit to connect the correspondingly selected interface to the integrated interface according to an interface selection instruction;
the control circuit includes:
the instruction trigger circuit is used for outputting a corresponding interface selection instruction according to the interface selection requirement;
the controller is respectively connected with the BMC serial port, the system serial port, the serial port of the expansion device, the instruction trigger circuit and the interface selection circuit and is used for connecting the correspondingly selected serial port to the interface selection circuit according to a serial port selection instruction and controlling the interface selection circuit to connect the correspondingly selected interface to the integrated interface according to the interface selection instruction;
the controller comprises a first pull-down resistor and a second pull-down resistor; the instruction trigger circuit comprises a first dial switch, a second dial switch, a first resistor, a second resistor and a third resistor; wherein:
a first end of the first resistor is connected with a direct-current power supply, a second end of the first resistor is connected with a first end of the first dial switch, a second end of the first dial switch is connected with a first end of the first pull-down resistor, a common end of the first dial switch is connected with the controller, and a second end of the first pull-down resistor is grounded; a first end of the second resistor is connected with a direct-current power supply, a second end of the second resistor is connected with a first end of the second dial switch, a second end of the second dial switch is respectively connected with a first end of the third resistor and a first end of the second pull-down resistor, a common end of the second dial switch is connected with the controller, a second end of the third resistor is connected with the direct-current power supply, and a second end of the second pull-down resistor is grounded; the instruction trigger circuit outputs a first voltage signal to the controller based on the switching-on condition of the first dial switch, and outputs a second voltage signal to the controller based on the switching-on condition of the second dial switch;
the controller is specifically configured to determine, according to a voltage mode correspondence, a target selection mode corresponding to a current voltage value of the first voltage signal and the second voltage signal, and control the interface selection circuit to connect the target interface to the integrated interface according to a target interface correspondingly selected in the target selection mode.
2. The interface integrated circuit of claim 1, wherein the plurality of USB interfaces of the PCH comprises a USB3.0 interface and a first USB2.0 interface;
the interface selection circuit includes:
the multiplexer is respectively connected with the display interface, the USB3.0 interface, the integrated interface and the control circuit;
the serial port connected with the control circuit is converted into a USB chip;
the USB2.0 switch chip is respectively connected with the serial port-to-USB chip, the first USB2.0 interface, the integrated interface and the control circuit;
the control circuit is specifically configured to connect the two serial ports to the serial-to-USB chip according to the two serial ports selected correspondingly according to the serial port selection instruction, so that the serial-to-USB chip combines and converts signals of the two serial ports into USB2.0 signals, and the USB2.0 signals are output through a second USB2.0 interface of the serial-to-USB chip; and according to an interface selection instruction, connecting the correspondingly selected interface to the integrated interface by controlling the multiplexer and the USB2.0 switch chip.
3. The interface integrated circuit of claim 2, wherein the integrated interface is a USB Type-C interface, and the display interface is a DP interface comprising 2 pairs of DP signal lines; the USB3.0 interface and the USB2.0 interface output by the USB2.0 switch chip respectively occupy a pair of D +/D-pins of the USB Type-C interface;
the interface selection instruction comprises five selection modes; wherein, the first selection mode is output without interface; the second selection mode is the combined output of the USB3.0 interface, the 1 pair of DP signal lines and the first USB2.0 interface; the third selection mode is the combined output of the USB3.0 interface, the 1 pair of DP signal lines and the second USB2.0 interface; the fourth selection mode is that 2 pairs of DP signal lines and the first USB2.0 interface are output in a combined mode; the fifth selection mode is that 2 pairs of DP signal lines and the second USB2.0 interface are output in a combined mode.
4. The interface integrated circuit of claim 3, wherein the interface integrated circuit further comprises:
one end is equipped with USB Type-C interface connection's Type-C connector, the other end are equipped with the debugging cable of the three output interface of USB3.0 Type-A interface, mini DP interface, USB2.0 Type-A interface.
5. The interface integrated circuit of claim 1, wherein the expansion device comprises a network card and a memory expansion card.
6. The interface integrated circuit of claim 1, wherein the controller includes an analog serial port for transmitting controller logs;
the controller is specifically configured to select a corresponding serial port from the BMC serial port, the system serial port, the serial port of the expansion device, and the analog serial port to connect to the interface selection circuit according to a serial port selection instruction.
7. The interface integrated circuit of claim 1, wherein the controller is an FPGA.
8. A server comprising a BMC, a PCH and an interface integrated circuit according to any of claims 1-7.
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