CN113391836B - Firmware program upgrading method and device and electronic equipment - Google Patents

Firmware program upgrading method and device and electronic equipment Download PDF

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Publication number
CN113391836B
CN113391836B CN202110792791.6A CN202110792791A CN113391836B CN 113391836 B CN113391836 B CN 113391836B CN 202110792791 A CN202110792791 A CN 202110792791A CN 113391836 B CN113391836 B CN 113391836B
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upgrading
program
control chip
signal
firmware program
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CN113391836A (en
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周选光
刘春刚
宋振广
钟景辉
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Weihai New Beiyang Technology Service Co Ltd
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Weihai New Beiyang Technology Service Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/60Software deployment
    • G06F8/65Updates
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/3003Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/302Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a software system
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/3051Monitoring arrangements for monitoring the configuration of the computing system or of the computing system component, e.g. monitoring the presence of processing resources, peripherals, I/O links, software programs
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/70Software maintenance or management
    • G06F8/71Version control; Configuration management

Abstract

The invention provides a method and a device for upgrading a firmware program and electronic equipment, wherein the method comprises the following steps: entering a program upgrading mode when a program upgrading signal is received, and receiving an upgrading data packet corresponding to a firmware program; upgrading the firmware program based on a pre-configured upgrading program and an upgrading data packet; monitoring the upgrading process of the firmware program, restarting the upgrading program when monitoring that the upgrading process is abnormal, and upgrading the firmware program based on the restarted upgrading program and the upgrading data packet until the upgrading of the firmware program is successful. The invention can effectively improve the stability of the firmware program upgrading process.

Description

Firmware program upgrading method and device and electronic equipment
Technical Field
The present invention relates to the field of program upgrading technologies, and in particular, to a firmware program upgrading method and apparatus, and an electronic device.
Background
With the continuous development of computer technology, the update iteration speed of the firmware program is gradually increased, and better use experience can be provided for users by continuously optimizing the firmware program. At present, when firmware program upgrading is needed, a corresponding upgrading packet can be obtained in a wired or wireless manner, so that the upgrading packet is installed to realize firmware program upgrading, but in an actual upgrading process, if a system is disturbed by some kind, program running may deviate from a normal running path, that is, the stability of the upgrading process of the firmware program is poor, firmware program upgrading failure is easily caused, and even other unpredictable consequences are affected.
Disclosure of Invention
In view of this, the present invention provides a method, an apparatus and an electronic device for upgrading a firmware program, which can effectively improve the stability of the firmware program upgrading process.
In a first aspect, an embodiment of the present invention provides a firmware program upgrading method, where the method is applied to a control motherboard, where a firmware program is installed on the control motherboard, and the method includes: entering a program upgrading mode when a program upgrading signal is received, and receiving an upgrading data packet corresponding to the firmware program; upgrading the firmware program based on a pre-configured upgrading program and the upgrading data packet; monitoring the upgrading process of the firmware program, restarting the upgrading program when monitoring that the upgrading process is abnormal, and upgrading the firmware program based on the restarted upgrading program and the upgrading data packet until the upgrading of the firmware program is successful.
In one embodiment, the control mainboard comprises a control chip and a hardware interface electrically connected with the control chip, wherein the hardware interface comprises a signal receiving interface and a data packet receiving port; the step of entering a program upgrading mode when receiving a program upgrading signal and receiving an upgrading data packet corresponding to the firmware program comprises the following steps: monitoring whether the hardware interface is connected with an external program editor or not through the control chip; if yes, receiving a program upgrading signal sent by the peripheral program editor through the signal interface; and setting the running mode of the control chip as a program upgrading mode, and receiving an upgrading data packet sent by the peripheral program editor through the data packet receiving port.
In one embodiment, the control main board further comprises a monitoring circuit, wherein a level monitoring pin of the monitoring circuit is electrically connected with a level output pin of the control chip; the steps of monitoring the upgrading process of the firmware program and restarting the upgrading program when the upgrading process is monitored to be abnormal comprise the following steps: monitoring the level at the level output pin through a level monitoring pin of the monitoring circuit; judging whether the level at the level output pin is kept unchanged within a first preset time length through the monitoring circuit; if yes, restarting the upgrading program through the control chip.
In one embodiment, a signal sending pin of the monitoring circuit is electrically connected with a signal receiving pin of the control chip; the step of restarting the upgrade program through the control chip includes: generating a first reset signal through the monitoring circuit, and sending the first reset signal to the signal receiving pin through a signal sending pin; and when the signal receiving pin receives the first reset signal, restarting the upgrading program through the control chip.
In one embodiment, the method further comprises: if the firmware program is successfully upgraded, generating a second reset signal through the monitoring circuit, and sending the second reset signal to the signal receiving pin through the signal sending pin; and when the signal receiving pin receives the second reset signal, restarting the firmware program through the control chip.
In one embodiment, the control main board further comprises an indicator light connected with the control chip; the method further comprises the following steps: and during the program upgrading mode, the indicator light is controlled to flash at a preset frequency through the control chip.
In one embodiment, the firmware program includes one or more of a monitor program, a configuration program, and a boot program.
In a second aspect, an embodiment of the present invention further provides an apparatus for upgrading a firmware program, where the apparatus is applied to a control motherboard, where the firmware program is installed on the control motherboard, and the apparatus includes: the data packet receiving module is used for entering a program upgrading mode when a program upgrading signal is received and receiving an upgrading data packet corresponding to the firmware program; the first upgrading module is used for upgrading the firmware program based on a preconfigured upgrading program and the upgrading data packet; and the second upgrading module is used for monitoring the upgrading process of the firmware program, restarting the upgrading program when the upgrading process is monitored to be abnormal, and upgrading the firmware program based on the restarted upgrading program and the upgrading data packet until the firmware program is upgraded successfully.
In a third aspect, an embodiment of the present invention further provides an electronic device, which includes a processor and a memory, where the memory stores computer-executable instructions that can be executed by the processor, and the processor executes the computer-executable instructions to implement any one of the methods provided in the first aspect.
In a fourth aspect, embodiments of the present invention also provide a computer-readable storage medium storing computer-executable instructions that, when invoked and executed by a processor, cause the processor to implement any one of the methods provided in the first aspect.
The firmware program upgrading method, the firmware program upgrading device and the electronic equipment provided by the embodiment of the invention enter a program upgrading mode when a program upgrading signal is received, receive an upgrading data packet corresponding to the firmware program, upgrade the firmware program based on the pre-configured upgrading program and the upgrading data packet, monitor the upgrading process of the firmware program, restart the upgrading program when the upgrading process is monitored to be abnormal, and upgrade the firmware program based on the restarted upgrading program and the upgraded data packet until the firmware program is upgraded successfully. In addition, the upgrading program can be restarted in time when the upgrading process is abnormal through monitoring the upgrading process, and the firmware program is upgraded again, so that the stability of the upgrading process of the firmware program is effectively improved, the success rate of upgrading the firmware program is improved, and unpredictable results caused by the failure of upgrading the firmware program are avoided.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
In order to make the aforementioned and other objects, features and advantages of the present invention comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a schematic flowchart of a method for upgrading a firmware program according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a hardware interface according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a control chip according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a monitoring circuit according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of an apparatus for upgrading a firmware program according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
At present, the existing firmware program upgrading method has the problem of poor stability, so that the firmware program upgrading is easy to fail, and other unpredictable results are even affected. Therefore, the invention provides the firmware program upgrading method, the firmware program upgrading device and the electronic equipment, which can effectively improve the stability of the firmware program upgrading process.
To facilitate understanding of the present embodiment, first, a detailed description is given of an upgrading method of a firmware program disclosed in the embodiment of the present invention, the method is applied to a control motherboard, and the control motherboard is installed with the firmware program, where the firmware program may include one or more of a monitor program (XP), a configuration program (EProom), and a boot program (boot), and referring to a flowchart of the upgrading method of the firmware program shown in fig. 1, the method mainly includes the following steps S102 to S106:
and step S102, entering a program upgrading mode when a program upgrading signal is received, and receiving an upgrading data packet corresponding to a firmware program. The program upgrade signal is used for indicating the control mainboard to enter a program upgrade mode, and the upgrade data packet may include a Clock data packet and a Date data packet. In one embodiment, the control motherboard may be connected to a peripheral program editor (or emulator), where the peripheral program editor sends a program upgrade signal to the control motherboard, and the control motherboard may enter a program upgrade mode when receiving the program upgrade signal, and continue to receive an upgrade data packet sent by the peripheral program editor in the program upgrade mode.
And step S104, upgrading the firmware program based on the pre-configured upgrading program and the upgrading data packet. In one embodiment, the upgrade program may be executed to install the upgrade data package to the control motherboard, thereby implementing the upgrade of the firmware program.
And S106, monitoring the upgrading process of the firmware program, restarting the upgrading program when the upgrading process is monitored to be abnormal, and upgrading the firmware program based on the restarted upgrading program and the upgrading data packet until the upgrading of the firmware program is successful. In practical application, the upgrading process of the firmware program may have a condition that the program runs away in the upgrading process of the firmware program, so that the upgrading of the firmware program fails, and in order to improve the problem, the control mainboard provided by the embodiment of the invention can be configured with a monitoring circuit (such as a watchdog chip), monitors the upgrading process through the monitoring circuit, and triggers the control mainboard to restart the upgrading program in time when an abnormality is monitored, so that the upgrading program and the upgrading data packet are reused to upgrade the firmware program until the upgrading of the firmware program is successful.
In addition, by monitoring the upgrading process, the upgrading program can be restarted in time when the upgrading process is abnormal, and the firmware program is upgraded again, so that the stability of the upgrading process of the firmware program is effectively improved, the success rate of upgrading the firmware program is improved, and unpredictable consequences caused by the failure of upgrading the firmware program are avoided.
To facilitate understanding of the upgrading method of the firmware program provided in the foregoing embodiment, an embodiment of the present invention provides a control motherboard, where the control motherboard includes a control Chip (CPU) and a hardware interface electrically connected to the control chip, and referring to a schematic structural diagram of a hardware interface shown in fig. 2, the hardware interface may include multiple interfaces and at least include a signal receiving interface and a packet receiving port, the packet receiving port may include an interface for receiving a Clock packet and an interface for receiving a Date packet, and exemplary pins of the hardware interface shown in fig. 2 are defined as follows: the RST interface is an interface for receiving a program upgrade signal (which may be referred to as a reset signal), the C2D interface is an interface for receiving a Date packet (which may be referred to as a burst signal), and the C2D interface is an interface for receiving a Clock packet (which may be referred to as a burst signal).
In addition, referring to the structural schematic diagram of a control chip shown in fig. 3, the control chip shown in fig. 3 has a model number of C8051F340, where a 13 th pin of the control chip is connected to a C2CK interface of the hardware interface and also connected to a/RST interface of the hardware interface via a resistor, and a 14 th pin of the control chip is connected to a C2D interface of the hardware interface.
Based on the foregoing fig. 2 and fig. 3, an embodiment of the present invention provides an implementation manner that enters a program upgrade mode when receiving a program upgrade signal and receives an upgrade data packet corresponding to a firmware program, where the implementation manner is as follows, in step 1 to step 3:
step 1, monitoring whether a hardware interface is connected with an external program editor or not through a control chip. If yes, executing step 2; if not, ending. In one embodiment, when the port of the peripheral program editor is connected to the RST interface, the C2D interface, and the C2D interface according to the interface connection rule, the data between the control chip and the peripheral program editor may be transmitted normally, and the control chip may perform subsequent operations.
And 2, receiving a program upgrading signal sent by the peripheral program editor through the signal interface. In one embodiment, the program upgrade signal may be received through the/RST interface and transmitted to the control chip.
And 3, setting the running mode of the control chip as a program upgrading mode, and receiving an upgrading data packet sent by the peripheral program editor through a data packet receiving port. In an embodiment, when the program upgrade signal is received, the control chip enters a program upgrade mode, at this time, the upgrade data packet may be received through the C2D interface and the C2D interface, and the upgrade data packet is transmitted to the control chip, and the control chip runs a pre-configured upgrade program to install the upgrade data packet, thereby implementing upgrade of the firmware program.
In an embodiment, the control motherboard further includes a monitoring circuit, referring to a schematic structural diagram of the monitoring circuit shown in fig. 4, the monitoring circuit includes an SP706 chip, where the control motherboard further includes a monitoring circuit, a level monitoring pin of the monitoring circuit is electrically connected to a level output pin of the control chip, a signal sending pin of the monitoring circuit is electrically connected to a signal receiving pin of the control chip, in combination with fig. 3 and fig. 4, that is, a 7 th pin (level monitoring pin) of the SP706 chip is connected to a 13 th pin (level output pin) of the control chip, a 6 th pin (signal sending pin) of the SP706 chip is connected to a 14 th pin (signal receiving pin) of the control chip, and the monitoring circuit may cooperate with the control motherboard to enter a program upgrade mode, and may also prevent a firmware program from accidentally running away after the firmware program is upgraded.
On the basis of fig. 4, an embodiment of the present invention further provides an implementation manner for monitoring an upgrade process of a firmware program and restarting the upgrade program when it is monitored that there is an exception in the upgrade process, which refers to the following steps a to c:
and a, monitoring the level at the level output pin through a level monitoring pin of the monitoring circuit. In practical application, if the upgrading process of the firmware program is not abnormal, the upgrading program timely turns over the state of the level output pin, namely the level of the level output pin is changed repeatedly; if the upgrading process of the firmware program is abnormal, the level at the level data pin is fixed to a HIGH level (HIGH) or a LOW Level (LOW).
And b, judging whether the level at the level output pin is kept unchanged within a first preset time length through the monitoring circuit. If yes, executing step c; if not, ending. For example, if it is monitored that the level at the level output pin is fixed to a high level or a low level and the duration exceeds 1.6s, it may be determined that an exception occurs in the upgrade process of the firmware program and the upgrade program needs to be restarted.
And c, restarting the upgrading program through the control chip. In one embodiment, (1) a first reset signal is generated by the monitoring circuit and is sent to the signal receiving pin through the signal sending pin, wherein the first reset signal is used for instructing the control chip to restart the upgrade program. (2) And when the signal receiving pin receives the first reset signal, restarting the upgrading program through the control chip. In practical application, when the control mainboard is powered on, the SP706 chip automatically generates a low-level reset signal of 200us, so that the control chip is automatically reset. The control chip configures one of the I/O pins as an output (i.e., the signal receiving pin described above) and connects to the WDI pin (i.e., the aforementioned pin 6) of the SP706 chip. If the level at the I/O pin is fixed to a HIGH or LOW level, the SP706 chip internal watchdog timer overflows after 1.6S and causes the/WDO pin (pin 8) to output a LOW level, and the/WDO pin has been connected to the manual reset/MR. Therefore, the RST pin is caused to output a low level reset signal to reset the control chip, and it should be noted that when the control chip is not in the program upgrading mode, that is, when the control chip is in normal operation, the monitoring circuit will not be allowed to send the first reset signal, or the related program will not be restarted when the first reset signal is received, so that the state of the I/O must be timely reversed when the upgrading program is running, which is visually called "dog feeding". In practical application, once the program runs by accident and is likely to fall into a dead loop without a feeding dog, the program is automatically reset to be reset after exceeding 1.6S and is not always in a fault state.
In practical application, in order to avoid the situation that the firmware program runs away accidentally after the firmware program is upgraded, a second reset signal can be generated through the monitoring circuit, the second reset signal is sent to the signal receiving pin through the signal sending pin, and when the signal receiving pin receives the second reset signal, the firmware program is restarted through the control chip. In practical application, after the firmware program is upgraded, the monitoring circuit sends the second reset signal to the control chip, so that the control program restarts the firmware program, and the firmware program is put into subsequent use.
In an optional implementation manner, the control main board further comprises an indicator light connected with the control chip, and on this basis, during the program upgrading mode, the indicator light is controlled by the control chip to flash according to a preset frequency. In another alternative embodiment, when the peripheral program editor is connected to the hardware interface, the control indicator lamp is turned off, and when the firmware program is successfully upgraded and the restart is completed, the control indicator lamp is turned on and off to inform the user that the firmware program is completely upgraded.
As to the firmware program upgrading method provided in the foregoing embodiment, an embodiment of the present invention provides a firmware program upgrading apparatus, which is applied to a control motherboard, where the firmware program is installed on the control motherboard, and referring to a schematic structural diagram of the firmware program upgrading apparatus shown in fig. 5, the apparatus includes the following parts:
a data packet receiving module 502, configured to enter a program upgrade mode when receiving a program upgrade signal, and receive an upgrade data packet corresponding to a firmware program;
a first upgrade module 504, configured to upgrade a firmware program based on a preconfigured upgrade program and an upgrade data packet;
and the second upgrading module 506 is configured to monitor an upgrading process of the firmware program, restart the upgrading program when it is monitored that the upgrading process is abnormal, and upgrade the firmware program based on the restarted upgrading program and the upgrading data packet until the firmware program is upgraded successfully.
In addition, by monitoring the upgrading process, the upgrading program can be restarted in time when the upgrading process is abnormal, and the firmware program is upgraded again, so that the stability of the upgrading process of the firmware program is effectively improved, the success rate of upgrading the firmware program is improved, and unpredictable consequences caused by the failure of upgrading the firmware program are avoided.
In one embodiment, the control main board comprises a control chip and a hardware interface electrically connected with the control chip, wherein the hardware interface comprises a signal receiving interface and a data packet receiving port; the packet receiving module 502 is further configured to: monitoring whether the hardware interface is connected with an external program editor or not through a control chip; if yes, receiving a program upgrading signal sent by an external program editor through a signal interface; the operation mode of the control chip is set as a program upgrading mode, and an upgrading data packet sent by an external program editor is received through a data packet receiving port.
In one embodiment, the control mainboard further comprises a monitoring circuit, wherein a level monitoring pin of the monitoring circuit is electrically connected with a level output pin of the control chip; the second upgrade module 506 is further configured to: monitoring the level at the level output pin through a level monitoring pin of the monitoring circuit; judging whether the level at the level output pin is kept unchanged within a first preset time length through a monitoring circuit; if yes, restarting the upgrading program through the control chip.
In one embodiment, a signal sending pin of the monitoring circuit is electrically connected with a signal receiving pin of the control chip; the second upgrade module 506 is further configured to: generating a first reset signal through a monitoring circuit, and sending the first reset signal to a signal receiving pin through a signal sending pin; and when the signal receiving pin receives the first reset signal, restarting the upgrading program through the control chip.
In one embodiment, the apparatus further includes a firmware program restart module configured to: if the firmware program is successfully upgraded, generating a second reset signal through the monitoring circuit, and sending the second reset signal to the signal receiving pin through the signal sending pin; and when the signal receiving pin receives a second reset signal, restarting the firmware program through the control chip.
In one embodiment, the control main board further comprises an indicator light connected with the control chip; the device also comprises an indicator light control module used for: and during the program upgrading mode, the indicator light is controlled by the control chip to flash according to the preset frequency.
In one embodiment, the firmware program includes one or more of a monitor program, a configuration program, and a boot program.
The device provided by the embodiment of the present invention has the same implementation principle and the same technical effects as those of the foregoing method embodiments, and for the sake of brief description, reference may be made to corresponding contents in the foregoing method embodiments for the parts of the device embodiments that are not mentioned.
The embodiment of the invention provides electronic equipment, which particularly comprises a processor and a storage device; the storage means has stored thereon a computer program which, when executed by the processor, performs the method of any of the above embodiments.
Fig. 6 is a schematic structural diagram of an electronic device 100 according to an embodiment of the present invention, where the electronic device 100 includes: a processor 60, a memory 61, a bus 62 and a communication interface 63, wherein the processor 60, the communication interface 63 and the memory 61 are connected through the bus 62; the processor 60 is arranged to execute executable modules, such as computer programs, stored in the memory 61.
The Memory 61 may include a high-speed Random Access Memory (RAM) and may also include a non-volatile Memory (non-volatile Memory), such as at least one disk Memory. The communication connection between the network element of the system and at least one other network element is realized through at least one communication interface 63 (which may be wired or wireless), and the internet, a wide area network, a local network, a metropolitan area network, and the like can be used.
The bus 62 may be an ISA bus, PCI bus, EISA bus, or the like. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, only one double-headed arrow is shown in FIG. 6, but that does not indicate only one bus or one type of bus.
The memory 61 is used for storing a program, the processor 60 executes the program after receiving an execution instruction, and the method executed by the apparatus defined by the flow process disclosed in any of the foregoing embodiments of the present invention may be applied to the processor 60, or implemented by the processor 60.
The processor 60 may be an integrated circuit chip having signal processing capabilities. In implementation, the steps of the above method may be performed by integrated logic circuits of hardware or instructions in the form of software in the processor 60. The Processor 60 may be a general-purpose Processor, and includes a Central Processing Unit (CPU), a Network Processor (NP), and the like; the Integrated Circuit may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic device, or discrete hardware components. The various methods, steps, and logic blocks disclosed in the embodiments of the present invention may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of the method disclosed in connection with the embodiments of the present invention may be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor. The software module may be located in ram, flash memory, rom, prom, or eprom, registers, etc. storage media as is well known in the art. The storage medium is located in a memory 61, and the processor 60 reads the information in the memory 61 and, in combination with its hardware, performs the steps of the above method.
The computer program product of the readable storage medium provided in the embodiment of the present invention includes a computer readable storage medium storing a program code, where instructions included in the program code may be used to execute the method described in the foregoing method embodiment, and specific implementation may refer to the foregoing method embodiment, which is not described herein again.
The functions may be stored in a computer-readable storage medium if they are implemented in the form of software functional units and sold or used as separate products. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
Finally, it should be noted that: the above-mentioned embodiments are only specific embodiments of the present invention, which are used for illustrating the technical solutions of the present invention and not for limiting the same, and the protection scope of the present invention is not limited thereto, although the present invention is described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: those skilled in the art can still make modifications or changes to the embodiments described in the foregoing embodiments, or make equivalent substitutions for some features, within the scope of the disclosure; such modifications, changes or substitutions do not depart from the spirit and scope of the embodiments of the present invention, and they should be construed as being included therein. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (8)

1. A method for upgrading a firmware program, the method being applied to a control mainboard on which the firmware program is installed, the method comprising:
entering a program upgrading mode when a program upgrading signal is received, and receiving an upgrading data packet corresponding to the firmware program;
upgrading the firmware program based on a pre-configured upgrading program and the upgrading data packet;
monitoring the upgrading process of the firmware program, restarting the upgrading program when monitoring that the upgrading process is abnormal, and upgrading the firmware program based on the restarted upgrading program and the upgrading data packet until the upgrading of the firmware program is successful;
the control main board comprises a control chip and a hardware interface electrically connected with the control chip, wherein the hardware interface comprises a signal receiving interface and a data packet receiving port;
the step of entering a program upgrading mode when receiving a program upgrading signal and receiving an upgrading data packet corresponding to the firmware program comprises the following steps:
monitoring whether the hardware interface is connected with an external program editor or not through the control chip;
if yes, receiving a program upgrading signal sent by the peripheral program editor through the signal interface;
setting the running mode of the control chip as a program upgrading mode, and receiving an upgrading data packet sent by the peripheral program editor through the data packet receiving port;
the control mainboard further comprises a monitoring circuit, and a level monitoring pin of the monitoring circuit is electrically connected with a level output pin of the control chip;
the step of monitoring the upgrading process of the firmware program and restarting the upgrading program when the upgrading process is monitored to have abnormity comprises the following steps:
monitoring the level at the level output pin through a level monitoring pin of the monitoring circuit;
judging whether the level at the level output pin is kept unchanged within a first preset time length through the monitoring circuit;
if yes, restarting the upgrading program through the control chip.
2. The method of claim 1, wherein a signal sending pin of the monitoring circuit is electrically connected with a signal receiving pin of the control chip;
the step of restarting the upgrade program through the control chip includes:
generating a first reset signal through the monitoring circuit, and sending the first reset signal to the signal receiving pin through a signal sending pin;
and when the signal receiving pin receives the first reset signal, restarting the upgrading program through the control chip.
3. The method of claim 2, further comprising:
if the firmware program is successfully upgraded, generating a second reset signal through the monitoring circuit, and sending the second reset signal to the signal receiving pin through the signal sending pin;
and when the signal receiving pin receives the second reset signal, restarting the firmware program through the control chip.
4. The method of claim 1, wherein the control motherboard further comprises an indicator light connected to the control chip;
the method further comprises the following steps:
and during the program upgrading mode, the indicator light is controlled by the control chip to flash according to a preset frequency.
5. The method of claim 1, wherein the firmware program comprises one or more of a monitor program, a configuration program, and a boot program.
6. An upgrading apparatus of firmware program, characterized in that the apparatus is applied to a control mainboard, the control mainboard is installed with firmware program, the apparatus includes:
the data packet receiving module is used for entering a program upgrading mode when a program upgrading signal is received and receiving an upgrading data packet corresponding to the firmware program;
the first upgrading module is used for upgrading the firmware program based on a preconfigured upgrading program and the upgrading data packet;
the second upgrading module is used for monitoring the upgrading process of the firmware program, restarting the upgrading program when monitoring that the upgrading process is abnormal, and upgrading the firmware program based on the restarted upgrading program and the upgrading data packet until the firmware program is upgraded successfully;
the control main board comprises a control chip and a hardware interface electrically connected with the control chip, wherein the hardware interface comprises a signal receiving interface and a data packet receiving port;
the data packet receiving module is further configured to:
monitoring whether the hardware interface is connected with an external program editor or not through the control chip;
if yes, receiving a program upgrading signal sent by the peripheral program editor through the signal interface;
setting the running mode of the control chip as a program upgrading mode, and receiving an upgrading data packet sent by the peripheral program editor through the data packet receiving port;
the control mainboard further comprises a monitoring circuit, and a level monitoring pin of the monitoring circuit is electrically connected with a level output pin of the control chip;
the second upgrade module is further configured to:
monitoring the level at the level output pin through a level monitoring pin of the monitoring circuit;
judging whether the level at the level output pin is kept unchanged within a first preset time length through the monitoring circuit;
if yes, restarting the upgrading program through the control chip.
7. An electronic device comprising a processor and a memory, the memory storing computer-executable instructions executable by the processor, the processor executing the computer-executable instructions to implement the method of any of claims 1 to 5.
8. A computer-readable storage medium having computer-executable instructions stored thereon which, when invoked and executed by a processor, cause the processor to perform the method of any of claims 1 to 5.
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