CN113380211B - Display panel, driving method thereof and display device - Google Patents
Display panel, driving method thereof and display device Download PDFInfo
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- CN113380211B CN113380211B CN202110720106.9A CN202110720106A CN113380211B CN 113380211 B CN113380211 B CN 113380211B CN 202110720106 A CN202110720106 A CN 202110720106A CN 113380211 B CN113380211 B CN 113380211B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
Abstract
The embodiment of the invention discloses a display panel, a driving method thereof and a display device. The display device comprises at least two driving circuits, wherein a first shift register of the first driving circuit outputs a first grid driving signal which comprises a first high-level signal VGH1 and a first low-level signal VGL1; the second shift register of the second driving circuit outputs a second gate driving signal, which includes a second high level signal VGH2 and a second low level signal VGL2; Δ V1= VGH1-VGL1, Δ V2= VGH2-VGL2, Δ V1 ≠ Δ V2; and the first shift register and the second shift register of the same stage are connected to different positions of the same grid signal line. According to the technical scheme provided by the embodiment of the invention, the grid signal wire is multiplexed into the heating wire, so that the normal work of the display panel in a low-temperature environment is ensured, and the problems of cost increase and thickness increase of the display panel can be avoided.
Description
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a display panel, a driving method thereof and a display device.
Background
With the development of Display technology, liquid Crystal Display (LCD) panels are widely used in Display devices such as mobile phones, tablet computers and the like by virtue of their characteristics of long service life, no radiation and thin body. The liquid crystal display panel generally includes a color film substrate, an array substrate, and a liquid crystal sandwiched therebetween, and the light-emitting brightness of the pixels is controlled by controlling the deflection of the liquid crystal.
However, at a special temperature, for example, a low temperature of several tens of degrees below zero, the viscosity of the liquid crystal is reduced, the response speed is lowered, and normal display of the display panel is affected. In the prior art, a metal layer is usually added in a display panel to provide a heating line, so as to ensure that the display panel can work in a low-temperature environment. However, the addition of the heating line metal layer causes cost increase and also causes an increase in the thickness of the display panel.
Disclosure of Invention
The invention provides a display panel, a driving method thereof and a display device, wherein grid signal lines are multiplexed into heating lines, so that the display panel can normally work in a low-temperature environment, and the problems of cost increase and thickness increase of the display panel can be avoided.
In a first aspect, an embodiment of the present invention provides a display panel, including: at least two driver circuits comprising a plurality of cascaded shift registers, the at least two driver circuits comprising a first driver circuit and a second driver circuit;
the first shift register of the first driving circuit is used for outputting a first gate driving signal, and the first gate driving signal comprises a first high-level signal VGH1 and a first low-level signal VGL1;
the second shift register of the second driving circuit is used for outputting a second gate driving signal, which includes a second high level signal VGH2 and a second low level signal VGL2; wherein Δ V1= VGH1-VGL1, Δ V2= VGH2-VGL2, Δ V1 ≠ Δ V2;
and the first shift register and the second shift register of the same stage are connected to different positions of the same grid signal line.
In a second aspect, an embodiment of the present invention further provides a driving method of a display panel, for driving the display panel of the first aspect, where the driving method includes:
when the current temperature is lower than the temperature threshold, in an Nth frame, controlling the first shift register to output the first gate driving signal, and controlling the second shift register to output the second gate driving signal; wherein N is a positive integer greater than or equal to 1.
In a third aspect, an embodiment of the present invention further provides a display device, where the display device includes the display panel described in the first aspect.
According to the display panel provided by the embodiment of the invention, different voltages are provided for different positions of the same grid signal line through the first shift register and the second shift register of the same stage, so that current exists on the grid signal line due to voltage difference, and the current can generate heat after flowing through the resistor on the grid signal line to heat the display panel, so that the display panel can normally work at low temperature. The heating wire solves the problems of cost increase and thickness increase caused by adding a heating wire metal layer in the prior art, realizes normal work at low temperature, and avoids the effects of cost increase and thickness increase.
Drawings
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a driving circuit according to an embodiment of the present invention;
FIG. 3 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
FIG. 4 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
FIG. 5 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
FIG. 7 is a timing diagram of gate driving signals output from the first shift register and the second shift register according to an embodiment of the present invention;
FIG. 8 is a timing diagram of gate driving signals output by the first shift register and the second shift register according to another embodiment of the present invention;
FIG. 9 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
FIG. 10 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 11 is a schematic structural diagram of a gating unit according to an embodiment of the present invention;
FIG. 12 is a circuit component diagram of a gating circuit provided by an embodiment of the present invention;
FIG. 13 is a circuit component diagram of another gating circuit provided by an embodiment of the present invention;
FIG. 14 is a circuit element diagram of yet another gating circuit provided by an embodiment of the present invention;
FIG. 15 is a circuit component diagram of yet another gating circuit provided by an embodiment of the present invention;
fig. 16 is a flowchart of a driving method of a display panel according to an embodiment of the present invention;
FIG. 17 is a timing diagram of gate driving signals output from the first shift register and the second shift register according to another embodiment of the present invention;
fig. 18 is a flowchart of another driving method of a display panel according to an embodiment of the present invention;
fig. 19 is a schematic structural diagram of a display device according to an embodiment of the disclosure;
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
In view of the problems mentioned in the background, an embodiment of the present invention provides a display panel including: the driving circuit comprises a plurality of cascaded shift registers, and comprises a first driving circuit and a second driving circuit; the first shift register of the first driving circuit is used for outputting a first gate driving signal, and the first gate driving signal comprises a first high-level signal VGH1 and a first low-level signal VGL1; the second shift register of the second driving circuit is used for outputting a second gate driving signal, and the second gate driving signal comprises a second high-level signal VGH2 and a second low-level signal VGL2; wherein Δ V1= VGH1-VGL1, Δ V2= VGH2-VGL2, Δ V1 ≠ Δ V2; and the first shift register and the second shift register of the same stage are connected to different positions of the same grid signal line. By adopting the technical scheme, the normal work of the display panel in a low-temperature environment can be ensured, and the problems of cost increase and thickness increase of the display panel can be avoided.
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art based on the embodiments of the present invention without any creative work, belong to the protection scope of the present invention.
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention. Fig. 2 is a schematic structural diagram of a driving circuit according to an embodiment of the present invention. Referring to fig. 1 and 2, the display panel includes: the driving circuit 10 comprises a plurality of cascaded shift registers, and the at least two driving circuits 10 comprise a first driving circuit 101 and a second driving circuit 102; the first shift register of the first driving circuit 101 is configured to output a first gate driving signal, where the first gate driving signal includes a first high-level signal VGH1 and a first low-level signal VGL1; the second shift register of the second driving circuit 102 is configured to output a second gate driving signal, where the second gate driving signal includes a second high-level signal VGH2 and a second low-level signal VGL2; wherein Δ V1= VGH1-VGL1, Δ V2= VGH2-VGL2, Δ V1 ≠ Δ V2; and the first shift register and the second shift register of the same stage are connected to different positions of the same grid signal line SCAN.
Specifically, the display panel may include a display area AA and a non-display area NA. The display area AA includes a plurality of pixels 20, the non-display area NA includes a driving circuit 10 and a driving chip 30, the driving circuit 10 is electrically connected to the pixels 20 through gate signal lines SCAN to provide gate driving signals to the pixels 20, and the driving circuit 30 is electrically connected to the pixels 20 through DATA signal lines DATA to provide DATA signals to the pixels 20, so that the pixels 20 emit light to achieve the effect of displaying images. The driving chip 30 is further electrically connected to the driving circuit 10 through a signal line, and provides signals required for normal operation of the driving circuit 10, such as the start signal STV, the clock signal CK, the first high-level signal VGH1, the second high-level signal VGH2, the first low-level signal VGL1, and the second low-level signal VGL2, etc., which will be described later with reference to a typical example, and will not be described herein again.
Specifically, the driving circuit 10 includes multiple cascaded shift registers, and the number of the shift registers can be set by a person skilled in the art according to practical situations, which is not limited herein. The cascade connection here means that a signal of a certain node of the shift register of the present stage is used as an input signal of the shift register of the next stage, and for the shift register of the first stage, the input signal can be provided by the driving chip 30. It should be noted that the specific structure of the shift register can be set by a person skilled in the art according to practical situations, and is not limited herein.
Specifically, the specific voltage values of the first high-level signal VGH1 and the second high-level signal VGH2 can be set by those skilled in the art according to practical situations, and are not limited herein. The gate signal line is usually electrically connected to a gate of the transistor, and if the turn-on signal of the transistor is a high level signal, the voltage values of the first high level signal VGH1 and the second high level signal VGH2 may both turn on the transistor, and if the turn-on signal of the transistor is a low level signal, the voltage values of the first high level signal VGH1 and the second high level signal VGH2 may both turn off the transistor.
Specifically, the specific voltage values of the first low-level signal VGL1 and the second low-level signal VGL2 may be set by those skilled in the art according to actual conditions, and are not limited herein, and if the turn-on signal of the transistor is a high-level signal, the voltage values of the first low-level signal VGL1 and the second low-level signal VGL2 may both enable the transistor to be turned off, and if the turn-on signal of the transistor is a low-level signal, the voltage values of the first low-level signal VGL1 and the second low-level signal VGL2 may both enable the transistor to be turned on.
Specifically, the first shift register and the second shift register of the same stage provide the gate driving signal to the same gate signal line SCAN, and are connected to different positions of the same gate signal line SCAN, for example, a connection point of the first shift register and the gate signal line SCAN is a first connection point, and a connection point of the second shift register and the gate signal line SCAN is a second connection point. Since Δ V1 ≠ Δ V2, there must be a time period during which the voltage value of the first gate driving signal received at the first connection point is different from the voltage value of the second gate driving signal received at the second connection point during the process of simultaneously driving the same gate signal line SCAN by the first shift register and the second shift register, and thus there is a current between the first connection point and the second connection point, and heat is generated when the current flows through the signal line between the first connection point and the second connection point, thereby heating the display panel. It can be understood that the multiplexing of the gate signal lines SCAN as the heater lines can avoid adding heater lines on the film where the gate signal lines SCAN are located, so that the aperture ratio of the pixels 20 is not reduced while the display panel is heated.
It should be noted that the specific positions of the first connection point and the second connection point on the gate signal line SCAN may be set by those skilled in the art according to practical situations, and are not limited herein. The lengths of the first connection point and the second connection point on the different gate signal lines SCAN may be the same (as shown in fig. 1) or different, and are not limited herein.
It should be noted that fig. 1 only shows the display panel including two driving circuits 10, and the two driving circuits 10 are respectively located at two opposite sides of the display area AA, but the present invention is not limited thereto, and a person skilled in the art may set the number of driving circuits 10 and the specific arrangement position of each driving circuit 10 in the non-display area NA according to practical situations. For example, fig. 3 is a schematic structural diagram of another display panel provided in an embodiment of the present invention. Referring to fig. 3, the display panel may further include two driving circuits 10, the two driving circuits 10 are respectively located at the right side and the upper side (opposite side to the driving chip 30) of the display area AA, and the driving circuit 10 located at the upper side of the display area AA is connected to the gate signal line SCAN through a winding at the left side of the display area AA.
It should be noted that the gate signal lines SCAN described herein are specifically signal lines for providing gate driving signals to any circuit, and those skilled in the art can set the signal lines according to practical situations, and the signal lines are not limited herein. Optionally, the display panel includes a display area AA and a non-display area NA; the gate signal lines SCAN include first gate signal lines SCAN, and the display area AA includes pixel circuits arranged in a matrix, the pixel circuits being electrically connected to the first gate signal lines SCAN (as shown in fig. 1); and/or; the gate signal lines SCAN include second gate signal lines SCAN, and the display area AA includes fingerprint identification circuits arranged in a matrix, and the fingerprint identification circuits are electrically connected to the second gate signal lines SCAN.
According to the display panel provided by the embodiment of the invention, different voltages are provided for different positions of the same gate signal line SCAN through the first shift register and the second shift register of the same stage, so that current exists on the gate signal line SCAN due to voltage difference, and the current can generate heat through the resistor on the gate signal line SCAN to heat the display panel, so that the display panel can normally work at a low temperature. The heating wire solves the problems of cost increase and thickness increase caused by adding the heating wire metal layer in the prior art, can normally work at low temperature, and avoids the effects of cost increase and thickness increase.
Fig. 4 is a schematic structural diagram of another display panel according to an embodiment of the present invention, and referring to fig. 1, fig. 3 and fig. 4, optionally, the first shift register and the second shift register of the same stage are respectively connected to two end points of the gate signal line SCAN.
It can be understood that the gate signal lines SCAN generally traverse the entire display area AA, and the plurality of gate signal lines SCAN are generally uniformly distributed in the entire display area AA, and the first shift register and the second shift register of the same stage are respectively connected to two end points of the gate signal lines SCAN, so that the entire gate signal lines SCAN can be reused as the heating lines, which is beneficial to uniformly heating each area of the display area AA, and further improving the display effect.
Referring to fig. 1, 3 and 4, the display panel may alternatively include a display area AA and a non-display area NA, and the first driving circuit 101 and the second driving circuit 102 are respectively located at two opposite sides of the display area AA.
Specifically, the first driving circuit 101 and the second driving circuit 102 are respectively located at opposite sides of the display area AA along the extending direction of the gate signal lines SCAN.
Optionally, the first shift register is connected to one end of the gate signal line SCAN, which is close to the first shift register, and the second shift register is connected to one end of the gate signal line SCAN, which is close to the second shift register. Thus, the driving circuit 10 can be connected to the gate signal lines SCAN without winding in the non-display region, which is advantageous for realizing a narrow frame while heating the display panel.
Optionally, VGH1 ≠ VGH2, and/or VGL1 ≠ VGL2.
Specifically, if VGH1 ≠ VGH2 and VGL1= VGL2, when both the first shift register and the second shift register output high-level signals, at least part of the gate signal lines SCAN are multiplexed as heating lines to heat the display panel; if VGH1= VGH2, VGL1 ≠ VGL2, when both the first shift register and the second shift register output low level signals, at least part of the gate signal lines SCAN are multiplexed as heating lines to heat the display panel; if VGH1 is not equal to VGH2, VGL1 is not equal to VGL2, then first shift register and second shift register as long as output gate drive signal, at least some grid signal lines SCAN can multiplex for the heater wire, for display panel heating, be favorable to realizing the rapid heating display panel.
Fig. 5 is a schematic structural diagram of another display panel according to an embodiment of the present invention. Referring to fig. 1 and 5, optionally, the display panel further includes a plurality of first transistors T1, and gates of the first transistors T1 are electrically connected to the gate signal lines SCAN; the first transistor T1 is a P-type transistor, VGL1= VGL2, and VGH1 ≠ VGH2; or; the first transistor T1 is an N-type transistor, VGH1= VGH2, and VGL1 ≠ VGL2.
Specifically, the first transistor T1 is a transistor in a circuit that can be configured by a person skilled in the art according to practical situations, and is not limited herein. Illustratively, the first transistor T1 may be a transistor in a pixel circuit (as shown in fig. 1, 3-5), and the first transistor T1 may also be a transistor in a fingerprint identification circuit. For convenience of explanation, the first transistor T1 is hereinafter described as an example of a transistor in the pixel circuit.
It can be understood that if the first transistor T1 is a P-type transistor (as shown in fig. 1), the first transistor T1 is turned on when the gate driving signal received by the gate of the first transistor T1 is at a low level, and the first transistor T1 is turned off when the gate driving signal received by the gate of the first transistor T1 is at a high level. The first low level signal VGL1 of the first gate driving signal is equal to the second low level signal VGL2 of the second gate driving signal, so that when the first transistor T1 is controlled to be turned on by the first low level signal VGL1 and the second low level signal VGL2, the voltages of the gates of the first transistors T1 in the same row are the same or similar, and thus, the turn-on degrees of the first transistors T1 in the same row are the same or similar, which is beneficial to realizing the display uniformity. The first high level signal VGH1 of the first gate driving signal is not equal to the second high level signal VGH2 of the second gate driving signal, so that when the first gate driving signal and the second gate driving signal are low level signals, the gate signal line SCAN is multiplexed as a heating line to heat the display panel, and in one frame display, the duration of the low level signal of the gate driving signal is usually less than the duration of the high level signal of the gate driving signal, therefore, making VGH1 ≠ VGH2 can ensure that the duration of the multiplexing of the gate signal line SCAN as the heating line is longer, which is beneficial to rapidly heating the display panel. The first transistor T1 is an N-type transistor, and VGH1= VGH2, and VGL1 ≠ VGL2, which is not described herein again.
Fig. 6 is a schematic structural diagram of a display panel according to an embodiment of the present invention. Referring to fig. 6, optionally, the at least two driving circuits 10 further include a third driving circuit 103 and a fourth driving circuit 104; the third shift register of the third driving circuit 103 is configured to output a second gate driving signal; the fourth shift register of the fourth driving circuit 104 is used for outputting the first gate driving signal; the third shift register and the fourth shift register are connected to different positions of the same grid signal line SCAN.
Specifically, the third driving circuit 103 includes a plurality of cascaded third shift registers, and the fourth driving circuit 104 includes a plurality of cascaded fourth shift registers. The pixels 20 in the same row are correspondingly connected with two gate signal lines SCAN, the first shift register and the second shift register in the same stage are connected with different positions of one of the gate signal lines SCAN, and the third shift register and the fourth shift register in the same stage are connected with different positions of the other gate signal line SCAN. The pixel 20 includes two first transistors T1 connected in series, a first transistor T1A and a first transistor T1B. The gates of the first transistor T1A and the first transistor T1B are electrically connected to two gate signal lines SCAN, respectively. Therefore, the number of the gate signal lines SCAN can be increased, the number of the heating lines can be increased, and the display panel can be heated quickly.
With reference to fig. 6, optionally, along the extending direction of the gate signal lines SCAN, the third driving circuit 103, the first driving circuit 101, the display area AA, the second driving circuit 102, and the fourth driving circuit 104 are sequentially arranged, and the first shift register, the second shift register, the third shift register, and the fourth shift register are all connected to one end of the gate signal lines SCAN, which is close to the first shift register, connected to the first shift register, the second shift register, the third shift register, and the fourth shift register. Illustratively, as shown in fig. 6, the first shift register located at the left side of the display area AA is connected to the left end of the gate signal line SCAN correspondingly connected thereto, the third shift register located at the left side of the display area AA is connected to the left end of the gate signal line SCAN correspondingly connected thereto, the second shift register located at the right side of the display area AA is connected to the right end of the gate signal line SCAN correspondingly connected thereto, and the fourth shift register located at the right side of the display area AA is connected to the right end of the gate signal line SCAN correspondingly connected thereto.
It can be understood that, on the two gate signal lines SCAN correspondingly connected to the pixels 20 in the same row, the first gate driving signal is input to the left end of one of the gate signal lines SCAN, the second gate driving signal is input to the right end of the other of the gate signal lines SCAN, the first gate driving signal and the second gate driving signal can be input to both the left end and the right end of the pixel row, and the gate driving signals input to both ends of the pixel row have symmetry, which is beneficial to realizing the same or similar opening degree of the first transistors T1 in the pixels in the same row, and further improving the display uniformity. In addition, the driving circuit 10 can be connected to the gate signal lines SCAN without winding in the non-display area NA, which is advantageous for heating the display panel and realizing a narrow frame.
Optionally, the first shift register is further configured to output a second gate driving signal, and/or the second shift register is further configured to output a first gate driving signal.
For example, fig. 7 is a timing diagram of gate driving signals output by the first shift register and the second shift register according to an embodiment of the present invention. Fig. 8 is a timing diagram of gate driving signals output from the first shift register and the second shift register according to another embodiment of the present invention. Referring to fig. 7 and 8, when the temperature of the external environment is low and the display panel is in the heating stage, the first shift register may output a first gate driving signal, and the second shift register outputs a second gate driving signal; when the temperature of the external environment is high and the display panel is in a non-heating stage, the first shift register and the second shift register both output the first gate driving signal (as shown in fig. 7) or the second gate driving signal (as shown in fig. 8).
It can be understood that, when the external environment temperature is low, the display panel needs to be heated, and at this time, the first shift register and the second shift register may output the first gate driving signal and the second gate driving signal, respectively, so that the gate signal lines SCAN may be multiplexed as the heating lines to heat the display panel. When the external environment temperature is high, the display panel does not need to be heated, at the moment, the first shift register and the second shift register can both output a first grid driving signal or a second grid driving signal, so that the same grid driving signal is input at the connecting positions of the first shift register and the second shift register and the grid signal line SCAN, the opening degree of the first transistors T1 in the pixels 20 in the same row is equal or similar, and the display uniformity is improved.
Fig. 9 is a schematic structural diagram of another display panel according to an embodiment of the present invention. Fig. 10 is a schematic structural diagram of another display panel according to an embodiment of the present invention. Fig. 11 is a schematic structural diagram of a gating unit according to an embodiment of the present invention. Referring to fig. 9 to 11, optionally, the display panel further includes at least one gate circuit 40, and one gate circuit 40 is electrically connected to at least one driving circuit 10; the gating circuit 40 includes at least one gating unit 41, and the gating unit 41 includes a first input terminal IN1, a second input terminal IN2, a first control terminal SW1, a second control terminal SW2, and an output terminal OUT; the first control end SW1 is used for receiving a first control signal, and the second control end SW2 is used for receiving a second control signal; the gating unit 41 is configured to output a signal of the first input terminal IN1 or a signal of the second input terminal IN2 under the control of the first control signal and the second control signal; the first input end IN1 is used for receiving a first high-level signal VGH1, the second input end IN2 is used for receiving a second high-level signal VGH2, and the output end OUT is electrically connected with a first reference input end of the shift register; or, the first input terminal IN1 is configured to receive the first low level signal VGL1, the second input terminal IN2 is configured to receive the second low level signal VGL2, and the output terminal OUT is electrically connected to the second reference input terminal of the shift register.
Specifically, if one driving circuit 10 is to output both the first gate driving signal and the second gate driving signal, the driving chip 30 may provide the first high level signal VGH1 and the first low level signal VGL1 to the driving circuit 10 when the driving circuit 10 needs to output the first gate driving signal, and the driving chip 30 may provide the second high level signal VGH2 and the second low level signal VGL2 to the driving circuit 10 when the driving circuit 10 needs to output the second gate driving signal, as shown in fig. 1 and 3-6. The driving chip 30 may be further configured to provide the driving circuit 10 with a first high level signal VGH1, a first low level signal VGL1, a second high level signal VGH2, and a second low level signal VGL2, and the gate circuit 40 selects a signal received by the final driving circuit 10, as shown in fig. 9 and 10. Therefore, the driving circuit 10 in the display panel can output the first gate driving signal and the second gate driving signal only by adding the gating circuit 40 without improving the existing display panel structure and the existing driving chip 30 architecture, which is beneficial to shortening the research and development period.
Specifically, for the driving circuit 10 in the display panel, a part of the driving circuit 10 may be configured to output both the first gate driving signal and the second gate driving signal, as shown in fig. 9; each driving circuit 10 may be configured to output both the first gate driving signal and the second gate driving signal, as shown in fig. 10, which is not limited herein. Specifically, when two or more driving circuits 10 exist in the display panel and output the first gate driving signal and the second gate driving signal simultaneously, they may share the same gate circuit 40, so that the number of gate circuits 40 may be reduced, which is beneficial to implementing a narrow bezel.
Specifically, one gate circuit 40 may include one gate unit 41 for gating the first and second high level signals VGH1 and VGH2, or for gating the first and second low level signals VGL1 and VGL2. One gate circuit 40 may further include two gate units 41, wherein one gate unit 41 is used to gate the first and second high level signals VGH1 and VGH2, and the other gate unit 41 is used to gate the first and second first level signals VGL1 and VGL2. The number of the gating cells 41 in each gating circuit 40 may be the same or different, and is not limited herein.
Specifically, there are various specific embodiments of the gating unit 41, which can be set by those skilled in the art according to practical situations, and the present invention is not limited thereto. Fig. 12 is a circuit element diagram of a gating circuit according to an embodiment of the present invention. Fig. 13 is a circuit element diagram of another gating circuit according to an embodiment of the present invention. FIG. 14 is a circuit diagram of another gating circuit according to an embodiment of the present invention. Referring to fig. 12 to 14, the gating unit 41 may alternatively include a second transistor T2 and a third transistor T3; the first end of the second transistor T2 is a first input end IN1, and the control end of the second transistor T2 is a first control end SW1; the first end of the third transistor T3 is a second input terminal IN2, and the control terminal of the third transistor T3 is a second control terminal SW2; the second terminal of the second transistor T2 is an output and is electrically connected to the second terminal of the third transistor T3.
Illustratively, as shown IN fig. 12, the gate circuit 40 includes a gate unit 41, and a first input terminal IN1 and a second input terminal IN2 of the gate unit 41 input the first high level signal VGH1 and the second high level signal VGH2, respectively, for gating the first high level signal VGH1 and the second high level signal VGH2. As shown IN fig. 13, the gate circuit 40 includes a gate unit 41, and a first input terminal IN1 and a second input terminal IN2 of the gate unit 41 input the first low level signal VGL1 and the second low level signal VGL2, respectively, for gating the first low level signal VGL1 and the second low level signal VGL2. As shown IN fig. 14, the gate circuit 40 includes two gate units 41, wherein a first input terminal IN1A and a second input terminal IN2A of one gate unit 41 input a first high level signal VGH1 and a second high level signal VGH2, respectively, for gating the first low level signal VGL1 and the second low level signal VGL2, and a first input terminal IN1B and a second input terminal IN2B of the other gate unit 41 input a first low level signal VGL1 and a second low level signal VGL2, respectively, for gating the first low level signal VGL1 and the second low level signal VGL2.
It is understood that by providing the gating unit 41 including the second transistor T2 and the third transistor T3, the structure of the gating unit 41 can be simplified, which is advantageous for achieving miniaturization of the gating circuit 40.
Fig. 15 is a circuit element diagram of a further gate circuit according to an embodiment of the present invention. Referring to fig. 15, optionally, the second transistor T2 and the third transistor T3 are an N-type transistor and a P-type transistor, respectively, and the first control terminal SW1 and the second control terminal SW2 are the same terminal. Thus, the first control terminal SW1 and the second control terminal SW2 can be connected to the same pin on the driver chip 30, which is beneficial to reducing the occupation of the pin resource of the driver chip 30.
Optionally, the display panel includes a substrate and a pixel circuit layer on the substrate; the second transistor T2 and the third transistor T3 are located in the pixel circuit layer.
Optionally, the pixel circuit layer includes at least one of the first transistor T1, the second transistor T2, and the third transistor T3, which is formed through the same fabrication process as the first transistor T1, so that the fabrication process of the display panel can be simplified, which is beneficial to reducing the cost and improving the fabrication efficiency.
Based on the above inventive concept, the embodiment of the present invention further provides a driving method of a display panel, for driving any of the above display panels. Fig. 16 is a flowchart of a driving method of a display panel according to an embodiment of the present invention, and referring to fig. 16, the driving method specifically includes the following steps:
and S110, when the current temperature is smaller than the temperature threshold, in the Nth frame, controlling the first shift register to output a first gate driving signal, and controlling the second shift register to output a second gate driving signal.
Wherein N is a positive integer greater than or equal to 1.
Specifically, the specific value of the temperature threshold may be set by one skilled in the art according to practical situations, and is not limited herein.
Specifically, if the current temperature is lower than the temperature threshold, it indicates that the current ambient temperature is low, and the display panel needs to be heated. At this time, in the process that the first shift register outputs a first gate driving signal, the second shift register outputs a second gate driving signal, and the first gate driving signal and the second gate driving signal simultaneously drive the same gate signal line, a time period inevitably exists, and in the time period, the voltage value of the first gate driving signal is different from that of the second gate driving signal, so that the gate signal line has current, and the current generates heat when flowing through the gate signal line, thereby heating the display panel.
According to the driving method of the display panel provided by the embodiment of the invention, different voltages are provided for different positions of the same grid signal line through the first shift register and the second shift register of the same stage, so that current exists on the grid signal line due to voltage difference, and the current can generate heat after flowing through the resistor on the grid signal line to heat the display panel, so that the display panel can normally work at low temperature.
Optionally, the first shift register is further configured to output a second gate driving signal, and the second shift register is further configured to output a first gate driving signal; the driving method further includes: when the current temperature is lower than the temperature threshold, in an N +1 th frame, controlling the first shift register to output a second gate driving signal, and controlling the first shift register to output a first gate driving signal; n is a positive integer greater than or equal to 1.
For example, fig. 17 is a timing diagram of gate driving signals output by the first shift register and the second shift register according to another embodiment of the present invention. Referring to fig. 17, the first shift register and the second shift register alternately output the first gate driving signal and the second gate driving signal, and the first shift register and the second shift register output different gate driving signals at the same time, so as to multiplex the gate signal lines into the heating lines to heat the display panel.
It is to be understood that, in a current frame, the first shift register outputs the first gate driving signal and the second shift register outputs the second gate driving signal, and in a next frame, the first shift register outputs the second gate driving signal and the second shift register outputs the first gate driving signal. Therefore, in a long period of time (more than two frames), the first gate driving signal and the second gate driving signal are input to the left end and the right end of the pixels in the same row, and the total duration of the first gate driving signal (the second gate driving signal) input to the two ends of one pixel row is similar, so that the display uniformity of the pixels in the same row is favorably realized.
Fig. 18 is a flowchart of another driving method of a display panel according to an embodiment of the present invention. Referring to fig. 18, the driving method specifically includes the steps of:
and S210, when the current temperature is smaller than the temperature threshold value, in the Nth frame, controlling the first shift register to output a first gate driving signal, and controlling the second shift register to output a second gate driving signal.
And S220, when the current temperature is greater than or equal to the temperature threshold value, controlling the first shift register and the second shift register to output the same gate driving signal.
Specifically, the first shift register is further configured to output a second gate driving signal, and/or the second shift register is further configured to output a first gate driving signal. When the current temperature is greater than or equal to the temperature threshold, the first shift register and the second shift register may be controlled to output the first gate driving signal (as shown in fig. 7) or the second gate driving signal (as shown in fig. 8).
It can be understood that, when the external environment temperature is low, the display panel needs to be heated, and at this time, the first shift register and the second shift register may output the first gate driving signal and the second gate driving signal, respectively, so that the gate signal line may be multiplexed as a heating line to heat the display panel. When the external environment temperature is high, the display panel does not need to be heated, at the moment, the first shift register and the second shift register can both output a first grid driving signal or a second grid driving signal, so that the same grid driving signal is input at the connecting positions of the first shift register and the second shift register and the grid signal line, the opening degree of the first transistors in the pixels in the same row is same or similar, and the display uniformity is improved.
Based on the above inventive concept, embodiments of the present invention further provide a display device, which includes any one of the display panels described above, and thus the display device has corresponding functions and advantages.
For example, fig. 19 is a schematic structural diagram of a display device according to an embodiment of the present invention. Referring to fig. 19, the display device includes the display panel P provided in the above embodiment. The display device provided in the embodiment of the present invention includes the display panel P in the foregoing embodiment, and for example, the display device may include a display device such as a mobile phone, a computer, an intelligent wearable device, and a vehicle-mounted display screen, which is not limited in the embodiment of the present invention.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious modifications, rearrangements, combinations and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (14)
1. A display panel, comprising: at least two driving circuits including a plurality of cascaded shift registers, the at least two driving circuits including a first driving circuit and a second driving circuit;
the first shift register of the first driving circuit is used for outputting a first gate driving signal, and the first gate driving signal comprises a first high-level signal VGH1 and a first low-level signal VGL1;
the second shift register of the second driving circuit is used for outputting a second gate driving signal, which includes a second high level signal VGH2 and a second low level signal VGL2; wherein Δ V1= VGH1-VGL1, Δ V2= VGH2-VGL2, Δ V1 ≠ Δ V2;
the first shift register and the second shift register of the same stage are connected to different positions of the same grid signal line;
the display panel also comprises at least one gating circuit, and one gating circuit is correspondingly and electrically connected with at least one driving circuit;
the gating circuit comprises at least one gating unit, wherein the gating unit comprises a first input end, a second input end, a first control end, a second control end and an output end;
the first control end is used for receiving a first control signal, and the second control end is used for receiving a second control signal; the gating unit is used for outputting the signal of the first input end or outputting the signal of the second input end under the control of the first control signal and the second control signal;
the first input end is used for receiving the first high-level signal VGH1, the second input end is used for receiving the second high-level signal VGH2, and the output end is electrically connected with the first reference input end of the shift register; or, the first input terminal is configured to receive the first low level signal VGL1, the second input terminal is configured to receive the second low level signal VGL2, and the output terminal is electrically connected to a second reference input terminal of the shift register;
the gating unit includes a second transistor and a third transistor;
a first end of the second transistor is the first input end, and a control end of the second transistor is the first control end; a first end of the third transistor is the second input end, and a control end of the third transistor is the second control end; the second terminal of the second transistor is the output terminal and is electrically connected to the second terminal of the third transistor.
2. The display panel according to claim 1, wherein the first shift register and the second shift register of the same stage are connected to both ends of the gate signal line, respectively.
3. The display panel according to claim 1, wherein the display panel comprises a display region and a non-display region, and the first driving circuit and the second driving circuit are respectively located on opposite sides of the display region.
4. The display panel according to claim 1,
VGH1 ≠ VGH2, and/or VGL1 ≠ VGL2.
5. The display panel according to claim 1,
the display panel further comprises a plurality of first transistors, and the grid electrodes of the first transistors are electrically connected with the grid signal lines;
the first transistor is a P-type transistor, VGL1= VGL2, and VGH1 ≠ VGH2; or;
the first transistor is an N-type transistor, VGH1= VGH2, and VGL1 ≠ VGL2.
6. The display panel according to claim 1,
the at least two driving circuits further comprise a third driving circuit and a fourth driving circuit;
the third shift register of the third driving circuit is used for outputting the second gate driving signal;
the fourth shift register of the fourth driving circuit is used for outputting the first gate driving signal;
the third shift register and the fourth shift register are connected to different positions of the same grid signal line.
7. The display panel according to claim 1, wherein the first shift register is further configured to output the second gate driving signal, and/or wherein the second shift register is further configured to output the first gate driving signal.
8. The display panel according to claim 1,
the second transistor and the third transistor are respectively an N-type transistor and a P-type transistor, and the first control end and the second control end are the same end.
9. The display panel according to claim 1,
the display panel comprises a substrate and a pixel circuit layer positioned on the substrate;
the second transistor and the third transistor are located in the pixel circuit layer.
10. The display panel according to claim 1,
the display panel comprises a display area and a non-display area;
the grid signal lines comprise first grid signal lines, the display area comprises pixel circuits arranged in a matrix manner, and the pixel circuits are electrically connected with the first grid signal lines; and/or; the grid signal line comprises a second grid signal line, the display area comprises fingerprint identification circuits arranged in a matrix mode, and the fingerprint identification circuits are electrically connected with the second grid signal line.
11. A driving method of a display panel for driving the display panel according to any one of claims 1 to 10; the driving method includes:
when the current temperature is lower than the temperature threshold, in an Nth frame, controlling the first shift register to output the first gate driving signal, and controlling the second shift register to output the second gate driving signal; wherein N is a positive integer greater than or equal to 1.
12. The driving method according to claim 11, wherein the first shift register is further configured to output the second gate driving signal, and the second shift register is further configured to output the first gate driving signal;
the driving method further includes: when the current temperature is lower than the temperature threshold, in an N +1 th frame, controlling the first shift register to output the second gate driving signal, and controlling the first shift register to output the first gate driving signal; n is a positive integer greater than or equal to 1.
13. The driving method according to claim 11,
the first shift register is further configured to output the second gate driving signal, and/or the second shift register is further configured to output the first gate driving signal;
the driving method further includes: and when the current temperature is greater than or equal to the temperature threshold value, controlling the first shift register and the second shift register to output the same gate drive signal.
14. A display device characterized by comprising the display panel according to any one of claims 1 to 10.
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Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA2228041A1 (en) * | 1995-07-31 | 1997-02-13 | Litton Systems (Canada) Limited | Heater system for a flat panel such as a liquid crystal display |
| JP2002358051A (en) * | 2001-05-31 | 2002-12-13 | Matsushita Electric Ind Co Ltd | Driving method for liquid crystal display device and liquid crystal display device |
| CN102608817A (en) * | 2012-03-26 | 2012-07-25 | 深圳市华星光电技术有限公司 | Liquid crystal display (LCD) device and drive method thereof |
| CN103680377A (en) * | 2012-09-18 | 2014-03-26 | 乐金显示有限公司 | Gate shift register and flat panel display using the same |
| CN105161046A (en) * | 2015-10-23 | 2015-12-16 | 重庆京东方光电科技有限公司 | Display panel, driving method therefor and display apparatus |
| CN109459901A (en) * | 2018-12-25 | 2019-03-12 | 武汉天马微电子有限公司 | Display panel and display device |
| CN111028811A (en) * | 2019-12-25 | 2020-04-17 | 厦门天马微电子有限公司 | Display panel and display device |
| CN111999925A (en) * | 2020-08-28 | 2020-11-27 | 上海天马微电子有限公司 | Display panel, driving method thereof and display device |
| CN112346269A (en) * | 2020-11-10 | 2021-02-09 | 厦门天马微电子有限公司 | Display panel, heating driving method thereof and display device |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1502330A (en) * | 1975-12-10 | 1978-03-01 | Marconi Co Ltd | Display arrangements |
| US20060187175A1 (en) * | 2005-02-23 | 2006-08-24 | Wintek Corporation | Method of arranging embedded gate driver circuit for display panel |
| JP2009103780A (en) * | 2007-10-22 | 2009-05-14 | Seiko Epson Corp | Electro-optical device |
| KR101423235B1 (en) * | 2008-01-04 | 2014-07-25 | 삼성디스플레이 주식회사 | Pixel driving circuit and display apparatus having the same |
| KR102008687B1 (en) * | 2012-08-22 | 2019-08-09 | 삼성디스플레이 주식회사 | Curved liquid crystal display panel and curved display device having the same |
| TWI517135B (en) * | 2014-05-08 | 2016-01-11 | 友達光電股份有限公司 | Active device array substrate and repairing method thereof |
| KR102185119B1 (en) * | 2014-07-31 | 2020-12-02 | 엘지디스플레이 주식회사 | Display Device |
| CN105609077B (en) * | 2016-01-28 | 2018-03-30 | 深圳市华星光电技术有限公司 | Pixel-driving circuit |
| CN106896598A (en) * | 2017-02-27 | 2017-06-27 | 武汉华星光电技术有限公司 | A kind of GOA driving panels |
| KR20210062773A (en) * | 2019-11-21 | 2021-06-01 | 삼성디스플레이 주식회사 | Scan driver and display device including the same |
-
2021
- 2021-06-28 CN CN202110720106.9A patent/CN113380211B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA2228041A1 (en) * | 1995-07-31 | 1997-02-13 | Litton Systems (Canada) Limited | Heater system for a flat panel such as a liquid crystal display |
| JP2002358051A (en) * | 2001-05-31 | 2002-12-13 | Matsushita Electric Ind Co Ltd | Driving method for liquid crystal display device and liquid crystal display device |
| CN102608817A (en) * | 2012-03-26 | 2012-07-25 | 深圳市华星光电技术有限公司 | Liquid crystal display (LCD) device and drive method thereof |
| CN103680377A (en) * | 2012-09-18 | 2014-03-26 | 乐金显示有限公司 | Gate shift register and flat panel display using the same |
| CN105161046A (en) * | 2015-10-23 | 2015-12-16 | 重庆京东方光电科技有限公司 | Display panel, driving method therefor and display apparatus |
| CN109459901A (en) * | 2018-12-25 | 2019-03-12 | 武汉天马微电子有限公司 | Display panel and display device |
| CN111028811A (en) * | 2019-12-25 | 2020-04-17 | 厦门天马微电子有限公司 | Display panel and display device |
| CN111999925A (en) * | 2020-08-28 | 2020-11-27 | 上海天马微电子有限公司 | Display panel, driving method thereof and display device |
| CN112346269A (en) * | 2020-11-10 | 2021-02-09 | 厦门天马微电子有限公司 | Display panel, heating driving method thereof and display device |
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| Publication number | Publication date |
|---|---|
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