CN113380201B

CN113380201B - Electronic paper display screen, display control method thereof and electronic paper display device

Info

Publication number: CN113380201B
Application number: CN202110690546.4A
Authority: CN
Inventors: 王哲; 华刚; 邓立广; 李硕; 孙辉; 齐梓希; 王敏; 李少波; 王冬; 胡锦堂; 樊鹏凯; 苏少凯; 刘景昊; 潘靓靓
Original assignee: BOE Technology Group Co Ltd; Beijing BOE Optoelectronics Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Beijing BOE Optoelectronics Technology Co Ltd
Priority date: 2021-06-22
Filing date: 2021-06-22
Publication date: 2023-06-30
Anticipated expiration: 2041-06-22
Also published as: CN113380201A

Abstract

An electronic paper display screen, a display control method thereof and an electronic paper display device, wherein the display control method comprises the following steps: in the case that the microstructure shows black, applying a first pulse signal to the first electrode; the first pulse signal includes a first write signal applied to the first electrode in a write phase; applying a second pulse signal to the first electrode in the case that the microstructure displays white; the second pulse signal includes a second write signal applied to the first electrode in the write phase; the first write signal includes a first write voltage and a first zero voltage alternately arranged, and the second write signal includes a second write voltage and a second zero voltage alternately arranged, the first write voltage and the second write voltage overlapping in time, the first zero voltage and the second zero voltage overlapping in time. The display method and the display device avoid unnecessary zero crossing waiting time among the sub-pixels displaying different colors, shorten total driving time, reduce power consumption and improve display effect.

Description

Electronic paper display screen, display control method thereof and electronic paper display device

Technical Field

The embodiment of the disclosure relates to the technical field of display, in particular to an electronic paper display screen, a display control method thereof and an electronic paper display device.

Background

The electronic paper display device, which is generally called electronic paper for short, is also called digital paper, and is a product of combining the characteristics of common paper display information with the characteristics of a computer display screen. The existing printed products are mainly realized by paper, and the environment is greatly destroyed along with the rapid increase of the consumption of the paper. In this case, the electronic paper display device has been developed, and the thickness of the electronic paper display device can be equivalent to that of plain paper, can reproduce the display characteristics of paper and can be reused, and the electronic paper display device can display a dynamic picture, so that the electronic paper display device is considered to be expected to replace the existing paper document display means in the near future.

At present, many electronic paper display devices based on electrophoresis technology are studied. Electrophoresis refers to the movement of charged particles in an applied electric field. The electrophoretic display belongs to a bistable display, and particles in the electrophoretic liquid have two stable states, and if no external force acts, the stable states are unchanged, so that the display pattern can be kept for a long time, and the electrophoretic display has extremely low power consumption level.

Disclosure of Invention

The embodiment of the disclosure provides an electronic paper display screen, a display control method thereof and an electronic paper display device, which can improve the display effect of the electronic paper display screen.

The embodiment of the disclosure provides a display control method of an electronic paper display screen, wherein the electronic paper display screen comprises a plurality of microstructures, and a first electrode and a second electrode which are arranged on two opposite sides of the microstructures; the microstructure comprises black particles and white particles, wherein the charges of the black particles and the white particles are opposite in electrical property; the display control method includes:

applying a first pulse signal to the first electrode in a case where the microstructure shows black; the first pulse signal includes a first write signal applied to the first electrode in a write phase; the first write signal is used for enabling the black particles to be close to the display side so that the microstructure displays black;

applying a second pulse signal to the first electrode in the case where the microstructure exhibits white color; the second pulse signal includes a second write signal applied to the first electrode in the write phase; the second write signal is used for enabling the white particles to be close to the display side so that the microstructure displays white;

The first write signal includes a first write voltage and a first zero voltage alternately arranged, the second write signal includes a second write voltage and a second zero voltage alternately arranged, the first write voltage and the second write voltage overlap in time, and the first zero voltage and the second zero voltage overlap in time.

In an exemplary embodiment, the first write voltage is applied for a longer period of time than the second write voltage, the first zero voltage is applied for a longer period of time than the second zero voltage, and the total applied period of time of the first write voltage and the first zero voltage is equal to the total applied period of time of the second write voltage and the second zero voltage.

In an exemplary embodiment, the start time of the first write voltage is the same as the start time of the second write voltage, or the end time of the first write voltage is the same as the end time of the second write voltage.

In an exemplary embodiment, the first write signal further includes a third zero voltage, the second write signal further includes a fourth zero voltage, and the third zero voltage and the fourth zero voltage have the same duration and are both applied at the beginning of the write phase.

In an exemplary embodiment, the first pulse signal further includes: in a reverse phase, a first pre-processing signal is applied to the first electrode, the first pre-processing signal including a first reverse voltage and a fifth zero voltage alternately arranged; the second pulse signal includes a second pre-processing signal applied to the first electrode in a reverse phase, the second pre-processing signal including a second reverse voltage and a sixth zero voltage alternately arranged;

the first reverse voltage and the second reverse voltage overlap in time, and the fifth zero voltage and the sixth zero voltage overlap in time.

In an exemplary embodiment, the first reverse voltage is applied for a longer period than the second reverse voltage, the fifth zero voltage is applied for a shorter period than the sixth zero voltage, and a total applied period of the first reverse voltage and the fifth zero voltage is equal to a total applied period of the second reverse voltage and the sixth zero voltage.

In an exemplary embodiment, the start time of the first reverse voltage is the same as the start time of the second reverse voltage, or the end time of the first reverse voltage is the same as the end time of the second reverse voltage.

In an exemplary embodiment, the first pre-processed signal further comprises a seventh zero voltage, the second pre-processed signal further comprises an eighth zero voltage, the seventh zero voltage and the eighth zero voltage have the same duration and are both applied at the beginning of the reverse phase.

In an exemplary embodiment, the first reverse voltage has the same voltage value, opposite polarity, and the same duration as the first write voltage, and the second reverse voltage has the same voltage value, opposite polarity, and the same duration as the second write voltage.

In an exemplary embodiment, the microstructure further comprises colored particles, the black particles being electrically the same as the electrical charge of the colored particles; the ratio of the charged amount of the black particles to the mass is greater than the ratio of the charged amount of the color particles to the mass;

applying a third pulse signal to the first electrode in the case where the microstructure displays color; the third pulse signal includes a third write signal applied to the first electrode in the write phase; the third write signal is used for enabling the color particles to be close to the display side so that the microstructure displays color;

The third write signal includes an inverted write voltage and a third write voltage that are alternately arranged, and a ninth zero voltage that is arranged after the inverted write voltage and the third write voltage, the third write voltage and the first write voltage being non-overlapping in time, the third write voltage and the second write voltage being non-overlapping in time, the ninth zero voltage and the first write voltage being overlapping in time, and the ninth zero voltage and the second write voltage being overlapping in time.

In an exemplary embodiment, the third pulse signal further includes: in a reverse phase, a third pre-processing signal is applied to the first electrode, wherein the third pre-processing signal comprises a tenth zero voltage and a third reverse voltage which are sequentially arranged;

the tenth zero voltage and the first reverse voltage overlap in time, the tenth zero voltage and the second reverse voltage overlap in time, the third reverse voltage does not overlap in time with the first reverse voltage, and the third reverse voltage does not overlap in time with the second reverse voltage.

The embodiment of the disclosure also provides a display control device, which comprises:

A source driver;

at least one processor configured to control the source driver to apply a first pulse signal to a first electrode of an electronic paper display screen in a case where a microstructure of the electronic paper display screen displays black; the first pulse signal includes a first write signal applied to the first electrode in a write phase; controlling the source driver to apply a second pulse signal to a first electrode of the electronic paper display screen under the condition that the microstructure of the electronic paper display screen displays white; the second pulse signal includes a second write signal applied to the first electrode in the write phase;

The embodiment of the disclosure also provides an electronic paper display device, which comprises: an electronic paper display screen; and a display control apparatus as described above.

Embodiments of the present disclosure also provide a computer-readable storage medium storing computer program instructions that, when run on an electronic paper display device, cause the electronic paper display device to perform a method of controlling an electronic paper display screen as set forth in any one of the preceding claims.

According to the electronic paper display screen, the display control method thereof and the electronic paper display device, the first writing voltage and the second writing voltage are overlapped in time, and the first zero voltage and the second zero voltage are overlapped in time, so that the driving voltages of the sub-pixels displaying different colors are simultaneously applied and synchronously started, unnecessary zero crossing waiting time among the sub-pixels displaying different colors is avoided, the total driving time is shortened, the power consumption is reduced, and the display effect is improved.

Additional features and advantages of the disclosure will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the disclosure. Other advantages of the present disclosure may be realized and attained by the structure particularly pointed out in the written description and drawings.

Drawings

The accompanying drawings are included to provide an understanding of the technical aspects of the present disclosure, and are incorporated in and constitute a part of this specification, illustrate the technical aspects of the present disclosure and together with the embodiments of the disclosure, not to limit the technical aspects of the present disclosure.

FIG. 1 is a schematic diagram of a display control method of an electronic paper display screen;

fig. 2 is a schematic structural diagram of an electronic paper display screen according to an exemplary embodiment of the present disclosure;

Fig. 3 is a schematic diagram of a pixel driving circuit and pixel electrode connection according to an exemplary embodiment of the present disclosure;

fig. 4a is a schematic diagram of a display control method of an electronic paper display screen according to an exemplary embodiment of the disclosure;

FIG. 4b is a schematic diagram of another display control method of an electronic paper display screen according to an exemplary embodiment of the disclosure;

FIG. 5 is a schematic diagram of another electronic paper display screen according to an exemplary embodiment of the present disclosure;

FIG. 6 is a schematic diagram of a display control method of a display screen of an electronic paper according to another exemplary embodiment of the disclosure;

FIG. 7 is a schematic diagram of another display control method of an electronic paper display screen;

fig. 8 is a schematic structural view of a display control apparatus according to an exemplary embodiment of the present disclosure;

fig. 9 is a schematic structural diagram of an electronic paper display device according to an exemplary embodiment of the present disclosure.

Detailed Description

The following description of the embodiments of the present disclosure will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present disclosure. All other embodiments obtained by one of ordinary skill in the art based on the embodiments provided by the present disclosure are within the scope of the present disclosure.

Throughout the specification and claims, unless the context requires otherwise, the word "comprise" and its other forms such as the third person referring to the singular form "comprise" and the present word "comprising" are to be construed as open, inclusive meaning, i.e. as "comprising, but not limited to. In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiment", "example", "specific example", "some examples", "and the like are intended to indicate that a particular feature, structure, material, or characteristic associated with the embodiment or example is included in at least one embodiment or example of the present disclosure. The schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments or examples.

The terms "first" and "second" are used below for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the embodiments of the present disclosure, unless otherwise indicated, the meaning of "a plurality" is two or more.

The use of "adapted" or "configured to" herein is meant to be an open and inclusive language that does not exclude devices adapted or configured to perform additional tasks or steps.

In addition, the use of "based on" is intended to be open and inclusive in that a process, step, calculation, or other action "based on" one or more of the stated conditions or values may be based on additional conditions or beyond the stated values in practice.

Exemplary embodiments are described herein with reference to cross-sectional and/or plan views as idealized exemplary figures. In the drawings, the thickness of layers and regions are exaggerated for clarity. Thus, variations from the shape of the drawings due to, for example, manufacturing techniques and/or tolerances, are to be expected. Thus, the exemplary embodiments should not be construed as limited to the shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of example embodiments.

Electrophoretic display (electrophoretic displays, EPD) is a novel display technology that uses the principle of electrophoresis to move a charged substance sandwiched between electrodes under the action of an electric field, and alternately displays two or more different colors by the movement of the charged substance. The two-dimensional matrix arrangement of the electrophoresis units is carried out by taking one electrophoresis unit as one pixel to form a display plane, and the pixels can display different colors according to the requirement, so that the plane image can be obtained by combining the pixels. The electrophoretic display technology combines the advantages of plain paper and electronic displays, and is thus the most likely technology to realize the industrialization of "electronic paper". The electrophoresis type electronic paper has the following advantages: firstly, the energy consumption is low, because the density of the electrophoresis dyed particles is equivalent to the density of the electrophoresis liquid, after the driving is finished, the electrophoresis particles on the display side can stay on the display side, so that the display characteristic can be kept, the electronic paper product has the display bistable state, and after the power supply is turned off, the image can be kept on the display for days or months; secondly, the display belongs to reflective display, has good sunlight readability, and is more in line with the reading habit of people; thirdly, the preparation cost of the microparticles is low, and the manufacturing process of the electronic paper is simple, so the microparticle has the potential of low production cost; fourthly, the electrophoretic display is characterized by flexible shape and can be made on the surface of plastic, metal or glass, so that the electrophoretic display is the best choice of flexible display technology; fifthly, the environment-friendly electronic book has the characteristic of environmental protection, can be manufactured into electronic books, electronic newspapers, electronic journals and the like in the future, and can save a large amount of wood. For the above reasons, electronic paper based on electrophoresis technology is a mainstream of electronic paper, and is one of the most developed flat panel display technologies.

Common electronic paper includes black/white/red three-color electronic paper, black/white/yellow three-color electronic paper and the like besides black/white two-color electronic paper. For a black/white double-color electronic paper, the writing voltage corresponding to black particles is generally +15v, and the writing voltage corresponding to white particles is-15V (or the writing voltage corresponding to black particles is-15V, and the writing voltage corresponding to white particles is +15v). The three-color electronic paper generally prepares the electrophoretic mobility of the color particles different from that of the other color particles with the same electrical property through the matching of different charge-mass ratios, and writes the colors through voltages with different amplitude values.

As shown in fig. 1, in an electronic paper driving waveform (where the abscissa is time/frame number and the ordinate is driving voltage), one refresh period includes three phases of inversion, jitter, and writing. Wherein, the reverse phase is a preprocessing phase for balancing the charge of the subsequent writing phase and giving a reverse driving voltage so as to keep conservation of the charge; the shaking stage comprises a plurality of positive and negative pressure alternating periods so as to fully mix charged particles and uniformly disperse electrophoretic particles in the microstructure; and a writing stage for applying a driving voltage for a certain time (frame number) to complete the display of the electrophoretic particles.

Taking a black-and-white two-color electronic paper driving waveform as an example, since black-and-white particles are positively and negatively charged respectively (taking a positive driving voltage for driving black particles and a negative driving voltage for driving white particles as an example in the embodiment of the present disclosure, in other embodiments, there are cases where a negative driving voltage for driving black particles and a positive driving voltage for driving white particles are also present), when black-and-white colors are simultaneously present in a screen to be refreshed, both the reverse phase and the writing phase have a "zero-crossing waiting" process.

As shown in fig. 1, when the driving sub-pixel displays black, the reverse phase 8 frame crosses zero, the 10 frame is reversed (reversed white is opposite to written black), and the process is repeated 2 times for 36 frames; the drive sub-pixel displays white with the reverse phase 8 frames turned black (turned black opposite written white), 10 frames zero crossing, repeating 2 times, also 36 frames. It can be seen that the total duration of the inversion phase is the same when the subpixels display black and white, and that there is a "staggered wait" feature. That is, when the subpixel displaying black is reversed, the subpixel displaying white is zero-crossing; when the subpixel displaying white is anti-black, the subpixel displaying black is zero crossing. The writing phase is similar, when the black sub-pixel is written into black, the white sub-pixel is zero crossing; when the subpixel displaying white is written white, the subpixel displaying black may cross zero, and "wait for zero crossing" may occur. The voltage dislocation is mainly caused by the following two reasons: 1) The instantaneous power consumption is reduced: due to the "zero crossing wait", there is only one non-zero voltage at a time during the reverse phase and the write phase; 2) The method is convenient for setting: the offset time of the reverse phase and the writing phase uses a zero crossing complementary waveform, mainly because zero voltage does not additionally drive waiting particles, does not cause overdriving influence on the special reverse or subsequent writing of the previous particles, and keeps the particles stable. In general, the optimal number of reverse or write frames required for black and white particles is different, and the optimal number of drive frames required for electrophoretic particles at different temperatures may be different due to the paper film properties and temperature dependence. Because of the zero-crossing waiting, in the reverse phase and the writing phase, the sub-pixel displaying black and the sub-pixel displaying white can be respectively and independently set for a time frame number to match the optimal driving frame number at different temperatures. After waiting by zero-crossing waveform 'dislocation', keeping the total time length of each sub-pixel displaying black and sub-pixel displaying white in the reverse phase and the writing phase respectively the same, so that the black-and-white picture of the full screen can be synchronized in time in the reverse phase, the dithering phase and the writing phase, and the uniformity of the full screen particles and the picture is ensured.

In summary, in some electronic paper display control methods, the black-and-white voltage "zero-crossing wait" exists in the reverse phase and the writing phase, which is not beneficial to shortening the refresh time, and increases some power consumption additionally.

The present disclosure provides a display control method of an electronic Paper display screen, as shown in fig. 2, in some embodiments, the electronic Paper display screen 1 includes a substrate 11, an electronic ink Film (EPL) 12 disposed on the substrate 11, a first electrode Layer 13 and a second electrode Layer 14. Wherein, along the thickness direction of the substrate 11, the first electrode layer 13 and the second electrode layer 14 are arranged at both sides of the electronic ink film, and the first electrode layer 13 is closer to the substrate 11 than the second electrode layer 14. In general, the second electrode layer 14 is closer to the display surface of the electronic paper display screen 1 than the first electrode layer 13. The electronic ink film 12 includes a plurality of microstructures 121, which may be, for example, microcups or microcapsules, etc. Each microstructure 121 includes therein a transparent liquid and a plurality of charged particles, for example, including charged white particles WG and charged black particles BG, wherein the white particles WG may be negatively charged, the black particles BG may be positively charged, or alternatively, the black particles BG may be negatively charged, and the white particles WG may be positively charged. By supplying power to the first electrode layer 13 and the second electrode layer 14, the electric field formed between the first electrode layer 13 and the second electrode layer 14 can push the charged particles in each microstructure 121 to move so as to control the types of the charged particles suspended in the position (the top of the microstructure 121 in fig. 2) near the display surface in each microstructure 121, thereby controlling the color presented by each microstructure 121 and further enabling the electronic paper display screen 1 to display pictures.

Referring to fig. 2, the electronic ink film 12, the first electrode layer 13 and the second electrode layer 14 in the electronic paper display screen 1 may form a plurality of pixels P, and as an example, the plurality of pixels P may be distributed in an array, that is, the electronic paper display screen includes S rows, x and Q columns of pixels P, S is greater than or equal to 2, and Q is greater than or equal to 2. Correspondingly, the first electrode layer 13 may include a plurality of first electrodes (may also be referred to as pixel electrodes) 131 spaced apart from each other; the second electrode layer 14 may include a plurality of second electrodes (may also be referred to as common electrodes) 141 located opposite to the plurality of first electrodes 131, and the plurality of second electrodes 141 may be electrically connected to each other, for example, the second electrode layer 14 may be a planar electrode layer including only a closed contour line. As an example, one pixel P may include one first electrode 131 and one or more microstructures 121 (for example, one microstructure 121 may be included), or as shown in fig. 2, one microstructure 121 may be distributed in 2 adjacent pixels P.

In this way, the display control device may apply a voltage signal (may be referred to as a COM voltage) to the second electrode layer 14, and may apply a corresponding data driving signal to the first electrode 131 included in each pixel P according to the pixel data thereof in the process of refreshing the picture displayed on the electronic paper display screen 1. For example, if the pixel data of a pixel P is white pixel data, a white driving signal is applied to the first electrode 131 of the pixel P, so that after the screen refresh is completed, the white particles WG in the pixel P are suspended at a position close to the display surface, and the pixel P displays white; if the pixel data of a pixel P is black pixel data, a black driving signal is applied to the first electrode 131 of the pixel P, so that the black particles BG in the pixel P are suspended at a position close to the display surface after the screen refresh is completed, and the pixel P displays black.

In some embodiments, referring to fig. 2, the electronic paper display screen 1 may further include a pixel driving circuit 15 disposed on the substrate 11 to apply data driving signals to the respective first electrodes 131 in the first electrode layer 13, respectively. Referring to fig. 3, the pixel driving circuit 15 may include a plurality of gate lines 151 and a plurality of data lines 152, which are disposed to cross each other, for example, to be perpendicular to each other; the pixel driving circuit 15 may further include a switching device 153 connected to the crossing gate line GL and data line DL, and may be, for example, a thin film transistor (Thin Field Transistor, TFT). The display control device is connected to the plurality of gate lines 151 to input a scan signal to the plurality of gate lines 151 to control the gate of each row of pixels P connected to the plurality of gate lines 151. For example, the display control apparatus may scan the plurality of rows of pixels P row by row, that is, input scan signals to the plurality of gate lines 151 row by row in order from the first row gate line to the last row gate line, so that the respective switching devices 153 connected to the scanned gate lines 151 are in a conductive state. The display control device is connected to the plurality of data lines 152 to input a data driving signal to the first electrode 131 in each row of pixels P that are strobed (scanned), so that each pixel P exhibits a corresponding color under the action of an electric field. For example, the second electrode layer may supply a 0V signal, and a data driving signal in the range of-15V to 15V is input to the first electrode 131 to control the magnitude of the electric field where the pixel P is located.

The electronic paper display screen 1 has bistable characteristics, and even if the electric field is removed, the electronic paper display screen 1 can stay on the last refreshed picture, so that the electronic paper display screen 1 does not need to continuously supply power to maintain the picture, and the electronic paper display device can realize low power consumption.

The embodiment of the disclosure provides a display control method of an electronic paper display screen, which is used for driving the electronic paper display screen to display. As shown in fig. 4a or 4b, the display control method includes:

in the case where the microstructure 121 displays black, a first pulse signal is applied to the first electrode 131; the first pulse signal includes a first write signal applied to the first electrode 131 in the write phase; the first write signal is for bringing the black particles BG close to the display side to cause the microstructure 121 to display black;

in the case where the microstructure 121 displays white, a second pulse signal is applied to the first electrode 131; the second pulse signal includes a second write signal applied to the first electrode 131 in the write phase; the second write signal is for bringing the white particles WG close to the display side to cause the microstructure 121 to display white;

the first write signal includes a first write voltage U11 and a first zero voltage U01 alternately arranged, the second write signal includes a second write voltage U12 and a second zero voltage U02 alternately arranged, the first write voltage U11 and the second write voltage U12 overlap in time, and the first zero voltage U01 and the second zero voltage U02 overlap in time.

According to the display control method of the electronic paper display screen, the first write-in voltage U11 and the second write-in voltage U12 are overlapped in time, and the first zero voltage U01 and the second zero voltage U02 are overlapped in time, so that driving voltages of sub-pixels displaying different colors are simultaneously applied and synchronously started, unnecessary zero crossing waiting time among the sub-pixels displaying different colors is avoided, total driving time is shortened, power consumption is reduced, and display effect is improved.

In the embodiment of the disclosure, the ith writing voltage or the ith reverse voltage refers to the output voltage of the driving chip, and is irrelevant to the scan refresh rate, wherein i is a natural number between 1 and 3. The scan refresh rate is only the frequency of the gate voltage scan, the number of voltage frames in the embodiments of the present disclosure is usually a continuous multi-frame write voltage or a reverse voltage, in fact, each frame is scanned by a scan line only for a small period of time, the driving transistor is turned on to charge, at this time, the charging voltage is the output voltage of the driving chip, and the other periods of time are all the driving voltages or the reverse voltages maintained by discharging the storage capacitor. However, the scan refresh rate does not affect the temporal continuity of the continuous multi-frame output voltage of the driving chip, so the scan line driving waveform is not particularly given. Generally, electronic paper uses a 50HZ (or 100 HZ) refresh rate.

In addition, the display control method of the embodiment of the disclosure retains the zero voltage, because if the zero voltage is deleted, the total duration of the first write signal and the second write signal in the write phase will not be the same, and the total duration of the first reverse signal and the second reverse signal in the reverse phase will also be the same, so that the black and white color position in the screen will be misplaced in the driving process (reverse phase→dithering phase→writing phase), for example, the sub-pixel displaying white color will not misplace the sub-pixel waiting for displaying black color, the sub-pixel displaying white color will first enter the dithering phase, and thus misplacement dithering will cause uneven mixing of the whole paper film particles. In addition, the subsequent writing phase will not start at the same time, which has obvious afterimage problems. The display control method of the embodiment of the present disclosure maintains zero voltage of at least 1 to 3 frames, so that the total duration of each of the reverse/write phases of black and white color is the same, and thus the three phases can be kept synchronous.

In some exemplary embodiments, as shown in fig. 4a and 4b, the first zero voltage U01 is applied for a period of time between 1 frame and 8 frames; the second zero voltage U02 is applied for a period of time between 3 and 10 frames.

The zero voltage in the embodiments of the present disclosure is not particularly limited in the application period, and is at least 1 frame, and at most, the number of frames that the other color gives voltage at this stage.

In some exemplary embodiments, as shown in fig. 4a and 4b, the application time period of the first write voltage U11 is longer than the application time period of the second write voltage U12, the application time period of the first zero voltage U01 is shorter than the application time period of the second zero voltage U02, and the total application time period of the first write voltage U11 and the first zero voltage U01 is equal to the total application time period of the second write voltage U12 and the second zero voltage U02.

As illustrated in fig. 4a and 4b, the first write voltage U11 has an application period of 10 frames, the second write voltage U12 has an application period of 8 frames, the first zero voltage U01 has an application period of 1 frame, and the second zero voltage U02 has an application period of 3 frames (in fig. 4b, the first two frames of the second zero voltage U02 are applied before the second write voltage U12, and the next frame of the second zero voltage U02 is applied after the second write voltage U12). The total applied duration of the first write voltage U11 and the first zero voltage U01 is 11 frames, and the total applied duration of the second write voltage U12 and the second zero voltage U02 is 11 frames.

Although the number of frames required by the first write voltage U11 and the second write voltage U12 are different, two frames remain after the second write voltage U12 with a shorter required time completes writing, and the two frames are set to zero crossing in the embodiment of the disclosure, which does not violate charge conservation and does not affect the writing effect.

In some exemplary embodiments, as shown in fig. 4a, the start time of the first write voltage U11 is the same as the start time of the second write voltage U12.

In other exemplary embodiments, as shown in fig. 4b, the end time of the first write voltage U11 is the same as the end time of the second write voltage U12.

In some exemplary embodiments, as shown in fig. 4a and 4b, the first write signal further includes a third zero voltage U03, the second write signal further includes a fourth zero voltage U04, and the third zero voltage U03 and the fourth zero voltage U04 have the same duration and are both applied at the beginning of the write phase.

In some exemplary embodiments, the third and fourth zero voltages U03 and U04 are applied for a period of time between 1 frame and 3 frames. As shown in fig. 4a and 4b, the third zero voltage U03 and the fourth zero voltage U04 are applied for 1 frame.

In some exemplary embodiments, as shown in fig. 4a and 4b, the first pulse signal further includes: in the reverse phase, a first pre-processing signal is applied to the first electrode 131, the first pre-processing signal including a first reverse voltage U21 and a fifth zero voltage U05 alternately arranged; the second pulse signal includes a second pre-processing signal applied to the first electrode 131 in a reverse phase, the second pre-processing signal including a second reverse voltage U22 and a sixth zero voltage U06 alternately arranged;

The first reverse voltage U21 and the second reverse voltage U22 overlap in time, and the fifth zero voltage U05 and the sixth zero voltage U06 overlap in time.

In some exemplary embodiments, as shown in fig. 4a and 4b, the fifth zero voltage U05 is applied for a period of time between 1 frame and 8 frames; the application duration of the sixth zero voltage U06 is between 3 and 10 frames.

In some exemplary embodiments, as shown in fig. 4a and 4b, the application time period of the first reverse voltage U21 is longer than the application time period of the second reverse voltage U22, the application time period of the fifth zero voltage U05 is smaller than the application time period of the sixth zero voltage U06, and the total application time period of the first reverse voltage U21 and the fifth zero voltage U05 is equal to the total application time period of the second reverse voltage U22 and the sixth zero voltage U06.

As illustrated in fig. 4a and 4b, the first reverse voltage U21 has an application period of 10 frames, the second reverse voltage U22 has an application period of 8 frames, the fifth zero voltage U05 has an application period of 1 frame, and the sixth zero voltage U06 has an application period of 3 frames (in fig. 4b, the first two frames of the sixth zero voltage U06 are applied before the second reverse voltage U22, and the subsequent frame of the sixth zero voltage U06 is applied after the second reverse voltage U22). The total applied duration of the first reverse voltage U21 and the fifth zero voltage U05 is 11 frames, and the total applied duration of the second reverse voltage U22 and the sixth zero voltage U06 is 11 frames.

Although the number of frames required by the first reverse voltage U21 and the second reverse voltage U22 are different, two frames remain after the second reverse voltage U22 with a shorter required time completes writing, and the embodiments of the present disclosure set the two frames to zero crossing, which does not violate charge conservation and does not affect the writing effect.

In the embodiment of the disclosure, as shown in fig. 4a or 4b, after the sub-pixels displaying black and white synchronously complete inversion in the inversion phase, a common zero voltage (at least one frame of zero crossing phase) is set, so that the inversion to the dithering process can be buffered more stably, the particles can keep inertia on one hand, and the inversion effect can be consolidated stably by using the time of one frame; on the other hand, the driving abnormality caused by the fact that the fast high-low voltage abrupt change jitter stage is immediately entered is avoided.

In some exemplary embodiments, as shown in fig. 4a, the start time of the first reverse voltage U21 is the same as the start time of the second reverse voltage U22.

In other exemplary embodiments, as shown in fig. 4b, the end time of the first reverse voltage U21 is the same as the end time of the second reverse voltage U22.

In some exemplary embodiments, the first pre-processed signal further comprises a seventh zero voltage U07 and the second pre-processed signal further comprises an eighth zero voltage U08, the duration of the seventh zero voltage U07 and the eighth zero voltage U08 being the same and both being applied at the beginning of the reverse phase.

In some exemplary embodiments, the duration of application of the seventh zero voltage U07 is between 1 frame and 3 frames; the eighth zero voltage U08 is applied for a period of time between 1 frame and 3 frames.

As shown in fig. 4a or 4b, the application duration of the seventh zero voltage U07 and the eighth zero voltage U08 are each 1 frame. For a refresh, the first frame is not practical. However, some electronic paper products may design a "cyclic refresh" mode, that is, the waveform of the reverse phase-jitter phase-writing phase is set to be refreshed repeatedly and repeatedly by using the code, if the code is set to default that there is no time waiting between two consecutive refreshes, the last writing end is directly changed into the next reverse start, and the charge transition is unstable. Based on this, the display control method of the embodiment of the present disclosure increases the 1-frame zero-crossing waiting period (i.e., the seventh zero voltage U07 and the eighth zero voltage U08) for starting black-and-white synchronization.

According to the display control method, in the same driving process, the reverse phase is not directly continuous to the shaking phase, the shaking phase is not directly continuous to the writing phase, a frame of zero-crossing waiting phase is set to be in smooth transition when the reverse phase is continuous to the shaking phase, a frame of zero-crossing waiting phase is set to be in smooth transition when the shaking phase is continuous to the writing phase, and the electrophoresis particles can be enabled to be in smooth transition from one phase to the next phase by inertia when the electrophoresis particles are in a frame of time. In addition, a zero-crossing waiting phase of at least one frame is also arranged between different periods in the reversing phase and the writing phase, and the driving abnormality caused by voltage abrupt change can be avoided although the number of frames is small.

In some exemplary embodiments, the first reverse voltage U21 is the same as the first write voltage U11 in voltage magnitude, opposite in polarity, and the same in duration, and the second reverse voltage U22 is the same as the second write voltage U12 in voltage magnitude, opposite in polarity, and the same in duration.

As shown in fig. 4a or 4b, the polarity of the first reverse voltage U21 is negative, the voltage value is 15V, and the duration is 10 frames; the polarity of the first write voltage U11 is positive, the voltage value is 15V, and the duration is 10 frames. The polarity of the second reverse voltage U22 is positive, the voltage value is 15V, and the duration is 8 frames; the polarity of the second write voltage U12 is negative, the voltage value is 15V, and the duration is 8 frames.

As shown in fig. 4a or fig. 4b, in the inversion phase, the sub-pixel displaying black and the sub-pixel displaying white are first subjected to zero crossing for 1 frame, and then the inversion is performed, that is, the sub-pixel displaying black is inverted to white, and the sub-pixel displaying white is inverted to black at the same time. Since the time frames of the reverse voltages of the subpixel displaying black and the subpixel displaying white in the reverse phase are different, the time frames of the driving voltages of the subpixel displaying black and the subpixel displaying white in the writing phase are also different, and as shown in fig. 4a, the synchronization design may be synchronous on, but not synchronous off, with a shorter zero crossing, aligned frame number, which is later ended, or as shown in fig. 4b, the synchronization design may be synchronous off, but not synchronous on, with a shorter zero crossing, aligned frame number, which is earlier started.

In an exemplary embodiment, as shown in fig. 4a, the sub-pixel displaying black and the sub-pixel displaying white start to be inverted at the same time, the sub-pixel displaying black is inverted by 10 frames, and the sub-pixel displaying white is inverted by 8 frames. After the black 8 frame of the white display sub-pixel is finished, the black display sub-pixel is still within the 2 frame time of the white display sub-pixel, and at the moment, the white display sub-pixel is also set to be zero crossing, so that the phenomenon that the charge is not conserved with the subsequent writing due to the fact that the reverse voltage is given more is avoided. After the sub-pixel with black display and the sub-pixel with white display are turned back and turned back for 1 time, 1 frame zero crossing is carried out, the synchronous reverse process is repeated once again, and 1 frame zero crossing is supplemented after the completion. In this way, the reverse phase is compressed from the original "off-set" 36 frame time to a time of only 23 frames.

Similarly, the write phase may also be designed to "synchronize" the first 1 frame of common zero crossings, then start writing black to the subpixel displaying black and writing white to the subpixel displaying white simultaneously. The sub-pixel displaying white writes 8 frames of white 1 time and completes 2 frames, and the sub-pixel displaying black sequentially writes black. Within this 2 frame time, a white subpixel is displayed to zero. After the first write waveform is completed, the first write waveform is crossed with zero for 1 frame, then the second write waveform is started, and finally the first write waveform is crossed with zero for 1 frame. In this way, the write phase is shortened from an original "misplaced" 36 frame time to a "synchronized" 23 frame time.

In the above manner, without considering further optimization of the dithering phase (for example, 80 frames in fig. 1), the refresh process of 152 frames for a pure black and white paper film can be shortened to only 126 frames by optimizing the display control method according to the embodiment of the present disclosure only with respect to the reverse phase and the writing phase. According to the conventional refresh frequency calculation of 50HZ, the refresh time is shortened from 3.04 seconds to only 2.52 seconds, the refresh time is shortened by 0.52s (0.26 s each in the reverse phase and the writing phase), the optimal duty ratio reaches 17.1%, and the reverse and writing driving processes are completed in the original time of one reverse phase or writing phase.

Through actual measurement, the optical effect of the display control method of the electronic paper display screen in the embodiment of the disclosure is basically not different from that of the display control method of fig. 1, and the optical test standard of the electronic paper module is met. This means that zero crossing phases, in which black and white "shift" from each other in the original drive waveform, are not necessary. Therefore, the display control method of the embodiment of the disclosure realizes electronic paper driving, reduces refreshing time and reduces power consumption.

In some exemplary embodiments, as shown in fig. 5, each microstructure 121 further includes color particles CG, wherein the color particles CG may be particles of any color other than black and white, for example, may be red particles RG.

In some exemplary embodiments, the color particles CG may be electrically the same as the charge of the black particles BG; the ratio of the charged amount to the mass of the black particles BG is larger than the ratio of the charged amount to the mass of the color particles CG.

If the pixel data of a pixel P is color pixel data (e.g., red pixel data), a color driving signal (e.g., red driving signal) is applied to the first electrode 131 of the pixel P, so that after the screen refresh is completed, the color particles CG (e.g., red particles RG) in the pixel P are suspended near the display surface, and the pixel P displays color (e.g., red).

In some exemplary embodiments, as shown in fig. 6, the display control method may include:

The first write signal includes a first write voltage U11 and a first zero voltage U01 alternately arranged, the second write signal includes a second write voltage U12 and a second zero voltage U02 alternately arranged, the first write voltage U11 and the second write voltage U12 overlap in time, and the first zero voltage U01 and the second zero voltage U02 overlap in time;

in the case where the microstructure 121 displays color, a third pulse signal is applied to the first electrode 131; the third pulse signal includes a third write signal applied to the first electrode 131 in the write phase; the third write signal is used to bring the color particles CG close to the display side to cause the microstructures 121 to display color;

the third write signal includes an inverted write voltage U131 and a third write voltage U13 that are alternately arranged, and a ninth zero voltage U09 that is arranged after the inverted write voltage U131 and the third write voltage U13, the third write voltage U13 and the first write voltage U11 do not overlap in time, the third write voltage U13 and the second write voltage U12 do not overlap in time, the ninth zero voltage U09 and the first write voltage U11 overlap in time, and the ninth zero voltage U09 and the second write voltage U12 overlap in time.

In some exemplary embodiments, as shown in fig. 6, the first zero voltage U01 is applied for a period of time between 1 frame and 10 frames; the second zero voltage U02 is applied for a period of time between 7 and 16 frames.

In some exemplary embodiments, as shown in fig. 6, the application time period of the first write voltage U11 is longer than the application time period of the second write voltage U12, the application time period of the first zero voltage U01 is shorter than the application time period of the second zero voltage U02, and the total application time period of the first write voltage U11 and the first zero voltage U01 is equal to the total application time period of the second write voltage U12 and the second zero voltage U02.

Illustratively, as shown in fig. 6, the duration of application of the first write voltage U11 is 16 frames, the duration of application of the second write voltage U12 is 10 frames, the duration of application of the first zero voltage U01 is 1 frame, and the duration of application of the second zero voltage U02 is 7 frames (in fig. 6, the first write voltage U11 and the second write voltage U12 start at the same time, do not end at the same time, and in other exemplary embodiments, the first write voltage U11 and the second write voltage U12 may not start at the same time, and end at the same time). The total applied duration of the first write voltage U11 and the first zero voltage U01 is 17 frames, and the total applied duration of the second write voltage U12 and the second zero voltage U02 is 17 frames.

Although the number of frames required by the first write voltage U11 and the second write voltage U12 are different, six frames remain after the second write voltage U12 with a shorter required time completes writing, and the embodiments of the present disclosure set these six frames to zero crossing, and do not violate charge conservation, and do not affect the writing effect.

In some exemplary embodiments, as shown in fig. 6, the first write signal further includes a third zero voltage U03, the second write signal further includes a fourth zero voltage U04, and the duration of the third zero voltage U03 and the fourth zero voltage U04 are the same and are both applied at the beginning of the write phase.

In some exemplary embodiments, the third zero voltage U03 and the fourth zero voltage U04 may be applied for a period of time between 199 frames and 202 frames.

For example, the third zero voltage U03 and the fourth zero voltage U04 may be applied for 199 frames. In this embodiment, since the sub-pixel displaying red needs 33 frames/period×6period=198 frames and one frame before entering the black writing or white writing stage is added, and thus, the application duration of the third zero voltage U03 and the fourth zero voltage U04 is 199 frames.

In some exemplary embodiments, as shown in fig. 6, the first pulse signal further includes: in the reverse phase, a first pre-processing signal is applied to the first electrode 131, the first pre-processing signal including a first reverse voltage U21 and a fifth zero voltage U05 alternately arranged; the second pulse signal includes a second pre-processing signal applied to the first electrode 131 in a reverse phase, the second pre-processing signal including a second reverse voltage U22 and a sixth zero voltage U06 alternately arranged;

In some exemplary embodiments, as shown in fig. 6, the fifth zero voltage U05 is applied for a period of time between 1 frame and 10 frames; the application duration of the sixth zero voltage U06 is between 7 and 16 frames.

In some exemplary embodiments, as shown in fig. 6, the application time period of the first reverse voltage U21 is longer than the application time period of the second reverse voltage U22, the application time period of the fifth zero voltage U05 is shorter than the application time period of the sixth zero voltage U06, and the total application time period of the first reverse voltage U21 and the fifth zero voltage U05 is equal to the total application time period of the second reverse voltage U22 and the sixth zero voltage U06.

As illustrated in fig. 6, the first reverse voltage U21 is applied for 16 frames, the second reverse voltage U22 is applied for 10 frames, the fifth zero voltage U05 is applied for 1 frame, and the sixth zero voltage U06 is applied for 7 frames. The total applied duration of the first reverse voltage U21 and the fifth zero voltage U05 is 17 frames, and the total applied duration of the second reverse voltage U22 and the sixth zero voltage U06 is 17 frames.

Although the number of frames required by the first reverse voltage U21 and the second reverse voltage U22 are different, six frames remain after the second reverse voltage U22 with a shorter required time completes writing, and the embodiments of the present disclosure set these six frames to zero crossing, and do not violate charge conservation, and do not affect the writing effect.

In the embodiment of the disclosure, as shown in fig. 6, after the sub-pixels displaying black and white synchronously complete inversion in the inversion stage, a common zero voltage (at least one frame of zero crossing stage) is set, so that the inversion to the dithering process can be buffered more stably, the particles can keep inertia on one hand, and the inversion effect can be consolidated stably by using the time of one frame; on the other hand, the driving abnormality caused by the fact that the fast high-low voltage abrupt change jitter stage is immediately entered is avoided.

In some exemplary embodiments, as shown in fig. 6, the start time of the first reverse voltage U21 is the same as the start time of the second reverse voltage U22.

In other exemplary embodiments, the end time of the first reverse voltage U21 is the same as the end time of the second reverse voltage U22.

In some exemplary embodiments, as shown in fig. 6, the first pre-processed signal further includes a seventh zero voltage U07, the second pre-processed signal further includes an eighth zero voltage U08, the duration of the seventh zero voltage U07 and the eighth zero voltage U08 are the same, and both are applied at the beginning of the reverse phase.

Illustratively, as shown in fig. 6, the application durations of the seventh zero voltage U07 and the eighth zero voltage U08 are each 1 frame. For a refresh, the first frame is not practical. However, some electronic paper products may design a "cyclic refresh" mode, that is, the waveform of the reverse phase-jitter phase-writing phase is set to be refreshed repeatedly and repeatedly by using the code, if the code is set to default that there is no time waiting between two consecutive refreshes, the last writing end is directly changed into the next reverse start, and the charge transition is unstable. Based on this, the display control method of the embodiment of the present disclosure increases the 1-frame zero-crossing waiting period (i.e., the seventh zero voltage U07 and the eighth zero voltage U08) for starting black-and-white synchronization.

In some exemplary embodiments, as shown in fig. 6, the first reverse voltage U21 has the same voltage value, opposite polarity, and the same duration as the first write voltage U11, and the second reverse voltage U22 has the same voltage value, opposite polarity, and the same duration as the second write voltage U12.

As shown in fig. 6, the polarity of the first reverse voltage U21 is negative, the voltage value is 15V, and the duration is 16 frames; the polarity of the first write voltage U11 is positive, the voltage value is 15V, and the duration is 16 frames. The polarity of the second reverse voltage U22 is positive, the voltage value is 15V, and the duration is 10 frames; the polarity of the second write voltage U12 is negative, the voltage value is 15V, and the duration is 10 frames.

In some exemplary embodiments, as shown in fig. 6, the third pulse signal further includes: in the reverse phase, a third pre-processing signal is applied to the first electrode 131, the third pre-processing signal including a tenth zero voltage U010 and a third reverse voltage U23, which are sequentially set;

the tenth zero voltage U010 and the first reverse voltage U21 overlap in time, the tenth zero voltage U010 and the second reverse voltage U22 overlap in time, the third reverse voltage U23 does not overlap in time with the first reverse voltage U21, and the third reverse voltage U23 does not overlap in time with the second reverse voltage U22.

As shown in fig. 6, the polarity of the reverse write voltage U131 is negative, the voltage value is 15V, the duration is 3 frames, the polarity of the third write voltage U13 is positive, the voltage value is 6V, the duration is 30 frames, the reverse write voltage U131 and the third write voltage U13 are cycled 6 times, the duration of the ninth zero voltage U09 is 35 frames, and thus, the writing phase duration is 33×6+35=233 frames; the polarity of the third reverse voltage U23 is negative, the voltage value is 15V, the duration is 18×4=72 frames, and the duration of the tenth zero voltage U010 is 35 frames, so the reverse phase duration is 72+35=107 frames.

As shown in fig. 6 and 7, the total driving time can be shortened from 12.44s to 11.6s. Note that since the inversion and writing phases of the colored paper film are different from those of the pure black and white paper film, the display control method of the embodiment of the present disclosure does not turn on the inversion/writing of all the subpixels displaying black, white, and color at the same time. For driving of black and white trichromatic paper films, the color particles are generally matched with a positive pressure with lower amplitude. In the three-color electronic paper driving, after the display control method of the embodiment of the disclosure is used for the reverse and writing phases corresponding to black and white colors, the refreshing time of the whole phase is reduced, and the power consumption is reduced.

Some embodiments of the present disclosure also provide a display control apparatus, as shown in fig. 8, the display control apparatus 2 includes at least one processor 21, at least one memory 22, a gate driver 23 (optional), and a source driver 24.

The gate driver 23, which may also be referred to as a gate driving circuit, is configured to output a scan signal to the electronic paper display 1 under the control of the at least one processor 21 to control the gating of the pixels of each row. It may be provided in the display control apparatus 2 or in the electronic paper display screen 1, which is not limited in this embodiment, and the gate driver 23 is provided in the display control apparatus 2 as an example.

The source driver 24, which may also be referred to as a source driving circuit, is configured to output a data driving signal to the electronic paper display 1 under the control of the at least one processor 21 to control the color displayed by each pixel.

For example, the gate driver 23 and/or the source driver 24 may send a BUSY signal (BUSY status signal) to the processor 21 to inform the processor 21 of its own (gate driver 23 and/or source driver 24) status. The processor 21 may determine whether to send a command or data to the gate driver 23 and/or the source driver 24 according to the BUSY signal. The processor 21 sends CLK (clock) signals to the gate driver 23 and the source driver 24, and provides clocks required for the operation of the gate driver 23 and the source driver 24. In addition, the processor 21 may also send Direct Current (DC) signals to the gate driver 23 and the source driver 24 to inform the gate driver 23 and/or the source driver 24 whether commands or data are to be sent next. The source driver 24 may include a plurality of source driving sub-circuits, and the processor 21 may transmit a Chip Select (CS) signal to one of the plurality of source driving sub-circuits to Select the one source driving sub-circuit for signal transmission. For example: the processor 21 may send a start scan command to the gate driver 23 to start scanning the first row of gate lines of the electronic paper display; a data driving signal (i.e., data) may also be sent to the source driver 24.

The memory 22 may store computer programs and data, which may include high-speed random access memory, but may also include non-volatile memory, such as magnetic disk storage devices, flash memory devices, etc., but may be read-only memory (ROM) or other types of static storage devices that can store static information and instructions, random access memory (random access memory, RAM) or other types of dynamic storage devices that can store information and instructions, and may also be, but is not limited to, one-time programmable memory (One Time Programable, OTP), electrically erasable programmable read-only memory (electrically erasable programmable read-only memory, EEPROM), magnetic disk storage media or other magnetic storage devices, or any other medium that can be used to carry or store program code in the form of instructions or data structures and that can be accessed by a computer. The memory 22 may be a stand alone memory connected to the processor 21 by a communication line. The memory may also be integrated with the processor 21.

The at least one processor 21 is connected to the gate driver 23, the source driver 24 and the at least one memory 22, and by running or executing a computer program stored in the memory 22, invokes data in the memory 22 to control the gate driver 23 and the source driver 24 to output corresponding signals. At least one processor 21 may be one or more general-purpose central processing units (central processing unit, CPU), microprocessor (Microcontroller Unit, MCU), logic device (Logic), application-specific integrated circuit (ASIC), or integrated circuit for controlling program execution of some embodiments of the present disclosure; the CPU may be a single-core processor (single-CPU) or a multi-core processor (multi-CPU). A processor 21 herein may refer to one or more devices, circuits, or processing cores for processing data (e.g., computer program instructions, etc.).

In some example embodiments, the processor 21 is configured to: in the case where the microstructure displays black, the source driver 24 is controlled to apply a first pulse signal to the first electrode; the first pulse signal includes a first write signal applied to the first electrode in a write phase; the first write signal is used for enabling the black particles to be close to the display side so that the microstructure displays black;

in the case where the microstructure displays white, controlling the source driver 24 to apply a second pulse signal to the first electrode; the second pulse signal includes a second write signal applied to the first electrode in the write phase; the second write signal is used for enabling the white particles to be close to the display side so that the microstructure displays white;

All relevant contents of each step related to the above method embodiment may be cited to the functional description of the above functional module, and are not repeated herein.

In some exemplary embodiments, as shown in fig. 8, the display control apparatus 2 may further include a temperature sensor 25 connected to the at least one processor 21. The temperature sensor 25 is configured to measure an ambient temperature and transmit the ambient temperature to the at least one processor 21, so that the at least one processor 21 controls the source driver 24 to output a data driving signal corresponding to the ambient temperature according to the ambient temperature.

As shown in fig. 9, some embodiments of the present disclosure provide an electronic paper display device 100, and the electronic paper display device 100 may include: an electronic paper display screen 1 and a display control device 2. Wherein, electronic paper display screen 1 is connected with display control device 2.

Some embodiments of the present disclosure provide a computer readable storage medium (e.g., a non-transitory computer readable storage medium) storing computer program instructions that, when run on an electronic paper display device, cause the electronic paper display device to perform the display control method of the electronic paper display screen in any of the above embodiments. Some embodiments of the present disclosure provide a computer readable storage medium (e.g., a non-transitory computer readable storage medium) having stored therein computer program instructions that, when executed on a processor, cause the processor to perform one or more steps in a display control method of an electronic paper display screen as described in any of the above embodiments.

By way of example, the computer-readable storage media described above can include, but are not limited to: magnetic storage devices (e.g., hard Disk, floppy Disk or magnetic strips, etc.), optical disks (e.g., CD (Compact Disk), DVD (Digital Versatile Disk ), etc.), smart cards, and flash Memory devices (e.g., EPROM (Erasable Programmable Read-Only Memory), card, stick, key drive, etc.). Various computer-readable storage media described in this disclosure may represent one or more devices and/or other machine-readable storage media for storing information. The term "machine-readable storage medium" can include, without being limited to, wireless channels and various other media capable of storing, containing, and/or carrying instruction(s) and/or data.

Some embodiments of the present disclosure also provide a computer program product. The computer program product comprises computer program instructions which, when executed on a computer, cause the computer to perform one or more steps of a display control method for an electronic paper display screen as described in the above embodiments.

Some embodiments of the present disclosure also provide a computer program. The computer program, when executed on a computer, causes the computer to perform one or more steps in the display control method of an electronic paper display screen as described in the above embodiments.

The beneficial effects of the computer readable storage medium, the computer program product and the computer program are the same as those of the display control method of the electronic paper display screen described in some embodiments, and are not described herein.

The foregoing is merely a specific embodiment of the disclosure, but the protection scope of the disclosure is not limited thereto, and any person skilled in the art who is skilled in the art will recognize that changes or substitutions are within the technical scope of the disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims

1. The display control method of the electronic paper display screen is characterized in that the electronic paper display screen comprises a plurality of microstructures, and a first electrode and a second electrode which are arranged on two opposite sides of the microstructures; the microstructure comprises black particles and white particles, wherein the charges of the black particles and the white particles are opposite in electrical property; the display control method includes:

2. The display control method according to claim 1, wherein an application time period of the first writing voltage is longer than an application time period of the second writing voltage, an application time period of the first zero voltage is shorter than an application time period of the second zero voltage, and a total application time period of the first writing voltage and the first zero voltage is equal to a total application time period of the second writing voltage and the second zero voltage.

3. The display control method according to claim 2, wherein a start timing of the first writing voltage is the same as a start timing of the second writing voltage, or an end timing of the first writing voltage is the same as an end timing of the second writing voltage.

4. The display control method according to claim 1, wherein the first write signal further includes a third zero voltage, the second write signal further includes a fourth zero voltage, and the third zero voltage and the fourth zero voltage have the same duration and are both applied at the beginning of the write phase.

5. The display control method according to claim 1, wherein the first pulse signal further includes: in a reverse phase, a first pre-processing signal is applied to the first electrode, the first pre-processing signal including a first reverse voltage and a fifth zero voltage alternately arranged; the second pulse signal includes a second pre-processing signal applied to the first electrode in a reverse phase, the second pre-processing signal including a second reverse voltage and a sixth zero voltage alternately arranged;

6. The display control method according to claim 5, wherein an application time period of the first reverse voltage is longer than an application time period of the second reverse voltage, an application time period of the fifth zero voltage is shorter than an application time period of the sixth zero voltage, and a total application time period of the first reverse voltage and the fifth zero voltage is equal to a total application time period of the second reverse voltage and the sixth zero voltage.

7. The display control method according to claim 6, wherein a start timing of the first reverse voltage is the same as a start timing of the second reverse voltage, or an end timing of the first reverse voltage is the same as an end timing of the second reverse voltage.

8. The display control method according to claim 5, wherein the first pre-processing signal further includes a seventh zero voltage, the second pre-processing signal further includes an eighth zero voltage, and the seventh zero voltage and the eighth zero voltage have the same duration and are both applied at the beginning of the inversion phase.

9. The display control method according to claim 5, wherein the first reverse voltage has the same voltage value, opposite polarity, and the same duration as the first write voltage, and the second reverse voltage has the same voltage value, opposite polarity, and the same duration as the second write voltage.

10. The display control method according to claim 5, wherein the microstructure further comprises color particles, and the black particles have the same electrical charge as the color particles; the ratio of the charged amount of the black particles to the mass is greater than the ratio of the charged amount of the color particles to the mass;

11. The display control method according to claim 10, wherein the third pulse signal further includes: in a reverse phase, a third pre-processing signal is applied to the first electrode, wherein the third pre-processing signal comprises a tenth zero voltage and a third reverse voltage which are sequentially arranged;

12. A computer-readable storage medium storing computer program instructions that, when run on an electronic paper display device, cause the electronic paper display device to perform the control method of the electronic paper display screen of any one of claims 1 to 11.

13. A display control apparatus comprising:

a source driver;

14. An electronic paper display device, comprising: an electronic paper display screen; and a display control apparatus according to claim 13.