CN113380201A

CN113380201A - Electronic paper display screen, display control method thereof and electronic paper display device

Info

Publication number: CN113380201A
Application number: CN202110690546.4A
Authority: CN
Inventors: 王哲; 华刚; 邓立广; 李硕; 孙辉; 齐梓希; 王敏; 李少波; 王冬; 胡锦堂; 樊鹏凯; 苏少凯; 刘景昊; 潘靓靓
Original assignee: BOE Technology Group Co Ltd; Beijing BOE Optoelectronics Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Beijing BOE Optoelectronics Technology Co Ltd
Priority date: 2021-06-22
Filing date: 2021-06-22
Publication date: 2021-09-10
Anticipated expiration: 2041-06-22
Also published as: CN113380201B

Abstract

An electronic paper display screen, a display control method thereof and an electronic paper display device are provided, wherein the display control method comprises the following steps: applying a first pulse signal to the first electrode in a case where the microstructure displays black; the first pulse signal includes a first write signal applied to the first electrode in a write phase; applying a second pulse signal to the first electrode in a case where the microstructure displays white; the second pulse signal includes a second write signal applied to the first electrode in the write phase; the first write signal comprises a first write voltage and a first zero voltage which are alternately arranged, the second write signal comprises a second write voltage and a second zero voltage which are alternately arranged, the first write voltage and the second write voltage are overlapped in time, and the first zero voltage and the second zero voltage are overlapped in time. The display device and the display method avoid unnecessary zero-crossing waiting time among sub-pixels displaying different colors, shorten total driving time, reduce power consumption and improve display effect.

Description

Electronic paper display screen, display control method thereof and electronic paper display device

Technical Field

The embodiment of the disclosure relates to but is not limited to the technical field of display, and in particular relates to an electronic paper display screen, a display control method thereof and an electronic paper display device.

Background

Electronic paper display devices, generally referred to as electronic paper for short, also called digital paper, are products combining the characteristics of displaying information of ordinary paper with the characteristics of computer display screens. The existing printed products are mainly realized by paper, and along with the rapid increase of the consumption of the paper, the environment is greatly damaged. Under such circumstances, the electronic paper display device has come up, the thickness of the electronic paper display device can be equivalent to that of ordinary paper, the display characteristics of the paper can be duplicated and the electronic paper display device can be reused, and the electronic paper display device can display dynamic pictures, so that the electronic paper display device is considered to be expected to replace the existing paper document display means in the near future.

Currently, electronic paper display devices based on electrophoretic technology are being researched more. Electrophoresis refers to the movement of charged particles in an applied electric field. Electrophoretic display belongs to a bistable display, and particles in an electrophoretic liquid have two stable states, and if no external force acts on the particles, the stable states are not changed, so that a display pattern can be kept for a long time, and the electrophoretic display has an extremely low power consumption level.

Disclosure of Invention

The embodiment of the disclosure provides an electronic paper display screen, a display control method thereof and an electronic paper display device, which can improve the display effect of the electronic paper display screen.

The embodiment of the disclosure provides a display control method of an electronic paper display screen, wherein the electronic paper display screen comprises a plurality of microstructures, and a first electrode and a second electrode which are arranged on two opposite sides of the plurality of microstructures; the microstructures comprise black particles and white particles, and the black particles and the white particles are opposite in electric charge; the display control method comprises the following steps:

applying a first pulse signal to the first electrode in a case where the microstructure displays black; the first pulse signal comprises a first writing signal applied to the first electrode in a writing phase; the first writing signal is used for enabling the black particles to be close to the display side so that the microstructure displays black;

applying a second pulse signal to the first electrode in a case where the microstructure displays white; the second pulse signal includes a second write signal applied to the first electrode in the write phase; the second writing signal is used for enabling the white particles to be close to the display side so that the microstructure displays white;

the first write signal comprises a first write voltage and a first zero voltage which are alternately arranged, the second write signal comprises a second write voltage and a second zero voltage which are alternately arranged, the first write voltage and the second write voltage are overlapped in time, and the first zero voltage and the second zero voltage are overlapped in time.

In an exemplary embodiment, the duration of application of the first write voltage is longer than the duration of application of the second write voltage, the duration of application of the first zero voltage is shorter than the duration of application of the second zero voltage, and the total duration of application of the first write voltage and the first zero voltage is equal to the total duration of application of the second write voltage and the second zero voltage.

In an exemplary embodiment, a start timing of the first write voltage is the same as a start timing of the second write voltage, or an end timing of the first write voltage is the same as an end timing of the second write voltage.

In an exemplary embodiment, the first write signal further includes a third zero voltage, the second write signal further includes a fourth zero voltage, and the third zero voltage and the fourth zero voltage have the same duration and are both applied at the beginning of the write phase.

In an exemplary embodiment, the first pulse signal further includes: a first pre-processing signal applied to the first electrode in a reverse phase, the first pre-processing signal comprising a first reverse voltage and a fifth zero voltage which are alternately arranged; the second pulse signal comprises a second preprocessing signal applied to the first electrode in an inversion stage, and the second preprocessing signal comprises a second inversion voltage and a sixth zero voltage which are alternately arranged;

the first and second reverse voltages overlap in time, and the fifth and sixth zero voltages overlap in time.

In an exemplary embodiment, the first reverse voltage is applied for a longer period of time than the second reverse voltage, the fifth zero voltage is applied for a shorter period of time than the sixth zero voltage, and the total period of time for which the first reverse voltage and the fifth zero voltage are applied is equal to the total period of time for which the second reverse voltage and the sixth zero voltage are applied.

In an exemplary embodiment, a start timing of the first reverse voltage is the same as a start timing of the second reverse voltage, or an end timing of the first reverse voltage is the same as an end timing of the second reverse voltage.

In an exemplary embodiment, the first pre-processed signal further includes a seventh zero voltage, the second pre-processed signal further includes an eighth zero voltage, and the seventh zero voltage and the eighth zero voltage have the same duration and are both applied at the beginning of the inversion phase.

In an exemplary embodiment, the first inversion voltage and the first writing voltage have the same voltage value, opposite polarity and the same duration, and the second inversion voltage and the second writing voltage have the same voltage value, opposite polarity and the same duration.

In an exemplary embodiment, the microstructure further comprises color particles, and the black particles and the color particles have the same charge; the ratio of the charge quantity to the mass of the black particles is larger than that of the color particles;

applying a third pulse signal to the first electrode in a case where the microstructure displays a color; the third pulse signal includes a third write signal applied to the first electrode in the write phase; the third writing signal is used for enabling the color particles to be close to the display side so that the microstructure displays colors;

the third write signal includes an inverted write voltage and a third write voltage that are alternately arranged and a ninth zero voltage that is arranged after the inverted write voltage and the third write voltage, the third write voltage does not temporally overlap with the first write voltage, the third write voltage does not temporally overlap with the second write voltage, the ninth zero voltage temporally overlaps with the first write voltage, and the ninth zero voltage temporally overlaps with the second write voltage.

In an exemplary embodiment, the third pulse signal further includes: in a reverse phase, applying a third pre-processing signal to the first electrode, wherein the third pre-processing signal comprises a tenth zero voltage and a third reverse voltage which are sequentially arranged;

the tenth zero voltage and the first reverse voltage overlap in time, the tenth zero voltage and the second reverse voltage overlap in time, the third reverse voltage does not overlap in time with the first reverse voltage, and the third reverse voltage does not overlap in time with the second reverse voltage.

The embodiment of the present disclosure also provides a display control apparatus, including:

a source driver;

at least one processor configured to control the source driver to apply a first pulse signal to a first electrode of an electronic paper display screen in a case where a microstructure of the electronic paper display screen displays black; the first pulse signal comprises a first writing signal applied to the first electrode in a writing phase; under the condition that the microstructure of the electronic paper display screen displays white, controlling the source driver to apply a second pulse signal to a first electrode of the electronic paper display screen; the second pulse signal includes a second write signal applied to the first electrode in the write phase;

The embodiment of the present disclosure also provides an electronic paper display device, including: an electronic paper display screen; and a display control apparatus as described above.

The embodiment of the disclosure also provides a computer readable storage medium, which stores computer program instructions, and when the computer program instructions are run on an electronic paper display device, the electronic paper display device executes the control method of the electronic paper display screen.

According to the electronic paper display screen, the display control method of the electronic paper display screen and the electronic paper display device, the first writing voltage and the second writing voltage are overlapped in time, and the first zero voltage and the second zero voltage are overlapped in time, so that the driving voltages of the sub-pixels displaying different colors are applied and synchronously started at the same time, unnecessary zero-crossing waiting time of the sub-pixels displaying different colors is avoided, the total driving time is shortened, the power consumption is reduced, and the display effect is improved.

Additional features and advantages of the disclosure will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the disclosure. Other advantages of the disclosure may be realized and attained by the instrumentalities and combinations particularly pointed out in the specification and the drawings.

Drawings

The accompanying drawings are included to provide an understanding of the disclosed embodiments and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the examples serve to explain the principles of the disclosure and not to limit the disclosure.

FIG. 1 is a schematic diagram of a display control method of an electronic paper display screen;

fig. 2 is a schematic structural diagram of an electronic paper display screen according to an exemplary embodiment of the present disclosure;

fig. 3 is a schematic structural diagram of a pixel driving circuit and a pixel electrode connection according to an exemplary embodiment of the disclosure;

fig. 4a is a schematic view illustrating a display control method of an electronic paper display screen according to an exemplary embodiment of the present disclosure;

fig. 4b is a schematic view illustrating another display control method of an electronic paper display screen according to an exemplary embodiment of the present disclosure;

fig. 5 is a schematic structural diagram of another electronic paper display screen according to an exemplary embodiment of the present disclosure;

fig. 6 is a schematic view illustrating a display control method of an electronic paper display screen according to another exemplary embodiment of the present disclosure;

FIG. 7 is a schematic diagram of another display control method of an electronic paper display screen;

fig. 8 is a schematic structural diagram of a display control apparatus according to an exemplary embodiment of the present disclosure;

fig. 9 is a schematic structural diagram of an electronic paper display device according to an exemplary embodiment of the present disclosure.

Detailed Description

Technical solutions in some embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings, and it is obvious that the described embodiments are only a part of the embodiments of the present disclosure, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments provided by the present disclosure belong to the protection scope of the present disclosure.

Unless the context requires otherwise, throughout the description and the claims, the term "comprise" and its other forms, such as the third person's singular form "comprising" and the present participle form "comprising" are to be interpreted in an open, inclusive sense, i.e. as "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "example", "specific example" or "some examples" and the like are intended to indicate that a particular feature, structure, material, or characteristic associated with the embodiment or example is included in at least one embodiment or example of the present disclosure. The schematic representations of the above terms are not necessarily referring to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be included in any suitable manner in any one or more embodiments or examples.

In the following, the terms "first", "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the embodiments of the present disclosure, "a plurality" means two or more unless otherwise specified.

The use of "adapted to" or "configured to" herein is meant to be an open and inclusive language that does not exclude devices adapted to or configured to perform additional tasks or steps.

Additionally, the use of "based on" means open and inclusive, as a process, step, calculation, or other action that is "based on" one or more stated conditions or values may in practice be based on additional conditions or values beyond those stated.

Example embodiments are described herein with reference to cross-sectional and/or plan views as idealized example figures. In the drawings, the thickness of layers and regions are exaggerated for clarity. Variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, the exemplary embodiments should not be construed as limited to the shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the exemplary embodiments.

Electrophoretic display (EPD) is a new display technology that uses the principle of electrophoresis to make charged substances sandwiched between electrodes move under the action of an electric field and alternately display two or more different colors by the movement of the charged substances. The electrophoresis unit is used as a pixel, the electrophoresis unit is arranged in a two-dimensional matrix form to form a display plane, the pixels can display different colors according to requirements, and plane images can be obtained by combining the pixels. The electrophoretic display technology combines the advantages of the common paper and the electronic display, and is the technology most likely to realize the industrialization of the electronic paper. The electrophoresis type electronic paper has the following advantages: firstly, the energy consumption is low, because the density of the electrophoretic dyeing particles is equivalent to the density of the electrophoretic liquid, after the driving is finished, the electrophoretic particles on the display side can stay on the display side, so that the display characteristic can be maintained, the electronic paper product has display 'bistable state', and after the power supply is turned off, the image can still be kept on the display for days or months; secondly, the reflective display is adopted, and the sunlight readability is good, so that the reading habit of people is better met; thirdly, the preparation cost of the micro-particles is low, and the manufacturing process of the electronic paper is simple, so that the electronic paper has the potential of low production cost; the electrophoretic display is characterized by flexible shape and can be made on the surface of plastic, metal or glass, so the electrophoretic display is the best choice of flexible display technology; fifthly, the environment-friendly electronic book has the characteristic of environmental protection, can be made into electronic books, electronic newspapers, electronic periodicals and the like in the future, and can save a large amount of wood. For the above reasons, electronic paper based on electrophoresis technology is certainly becoming the mainstream of electronic paper, and is one of the most promising flat panel display technologies.

Common electronic paper includes black/white/red electronic paper, black/white/yellow electronic paper, and the like in addition to the black/white dual-color electronic paper. For a black/white two-color electronic paper, the writing voltage corresponding to black particles is generally +15V, and the writing voltage corresponding to white particles is-15V (or the writing voltage corresponding to black particles is-15V, and the writing voltage corresponding to white particles is + 15V). The three-color electronic paper generally uses the color particles with different charge-to-mass ratios to produce different electrophoretic mobilities from other color particles with the same electric property, and writes colors by using voltages with different amplitudes.

As shown in fig. 1, in an electronic paper drive waveform (where the abscissa is time/frame number and the ordinate is drive voltage), one refresh cycle includes three stages of inversion, dithering, and writing. Wherein the reverse phase is a pre-processing phase for balancing the charge of the subsequent writing phase and providing a reverse driving voltage to keep the charge conservation; the shaking stage comprises a plurality of positive and negative pressure alternating periods to fully mix the charged particles so as to uniformly disperse the electrophoretic particles in the microstructure; and a writing stage, wherein a certain time (frame number) of driving voltage is given to complete the display of the electrophoretic particles.

Taking a black-and-white electronic paper driving waveform as an example, since black-and-white particles are respectively charged to positive and negative electricity (in the embodiment of the present disclosure, a positive driving voltage for driving black particles and a negative driving voltage for driving white particles are taken as an example, and in other embodiments, there are cases where a negative driving voltage for driving black particles and a positive driving voltage for driving white particles are used), when there is a black-and-white color in a picture to be refreshed at the same time, there is a "zero-crossing waiting" process in both the inversion stage and the writing stage.

As shown in fig. 1, when the sub-pixels are driven to display black, the inversion phase is 8 frames of zero crossing, 10 frames of white inversion (white inversion is opposite to black writing), and 2 times of repetition are carried out for 36 frames; the inversion phase when driving the sub-pixels to display white is 8 frames of black inversion (black inversion is opposite to white writing), 10 frames of zero crossing, repeated 2 times, and 36 frames. It can be seen that the total duration of the inversion phase is the same when the sub-pixels display black and white, and there is a "staggered waiting" feature. That is, when a subpixel displaying black is reversed white, the subpixel displaying white is at zero crossing; when a subpixel displaying white is darkened, a subpixel displaying black is at a zero crossing. The writing phases are similar, and when the sub-pixel displaying black writes black, the sub-pixel displaying white is in zero crossing; when a subpixel displaying white is written white, the subpixel displaying black crosses zero, and there is a case where "zero crossing waits". Such a voltage "mis-alignment" arrangement is mainly due to two reasons: 1) reducing the instantaneous power consumption: due to zero-crossing waiting, in the reverse phase and the writing phase, only one non-zero voltage exists at a certain moment; 2) the convenient setting: the time of the dislocation of the reverse phase and the writing phase is a zero-crossing complementary waveform, mainly because the zero voltage can not drive the waiting particles additionally, the influence of over-driving on the exclusive reverse or the subsequent writing of the previous particles can not be caused, and the stability of the particles is kept. In general, the optimal number of inversion or writing frames required for black and white particles is different, and the optimal number of driving frames required for electrophoretic particles at different temperatures may be different due to paper film properties and temperature dependence. Due to zero-cross waiting, in the reverse phase and the writing phase, the sub-pixel for displaying black and the sub-pixel for displaying white can respectively and independently set the time frame number to match the optimal driving frame number at different temperatures. After the zero-crossing waveform is used for 'dislocation' waiting, the total time lengths of the reverse phase and the writing phase of the sub-pixel for displaying black and the sub-pixel for displaying white are respectively kept the same, so that the full-screen black-and-white picture can be synchronized in time in the reverse phase, the shaking phase and the writing phase, and the uniformity of full-screen particles and pictures is ensured.

In summary, in some electronic paper display control methods, the black-and-white voltage "zero-crossing waiting" exists in the reverse phase and the write phase, which is not favorable for shortening the refresh time and additionally increases some power consumption.

The present disclosure provides a display control method of an electronic Paper display, as shown in fig. 2, in some embodiments, an electronic Paper display 1 includes a substrate 11, an electronic ink Film (EPL) 12 disposed on the substrate 11, a first electrode Layer 13, and a second electrode Layer 14. Wherein, along the thickness direction of the substrate 11, the first electrode layer 13 and the second electrode layer 14 are disposed on both sides of the electronic ink film, and the first electrode layer 13 is closer to the substrate 11 than the second electrode layer 14. Generally, the second electrode layer 14 is closer to the display surface of the electronic paper display screen 1 than the first electrode layer 13. The electronic ink film 12 includes a plurality of microstructures 121, which may be microcups, microcapsules, or the like, for example. Each microstructure 121 includes a transparent liquid and a plurality of charged particles, for example, white charged particles WG and black charged particles BG, wherein the white charged particles WG may be negatively charged and the black charged particles BG may be positively charged, or alternatively, the black charged particles BG may be negatively charged and the white charged particles WG may be positively charged. By supplying power to the first electrode layer 13 and the second electrode layer 14, an electric field formed between the two can push the charged particles in each microstructure 121 to move, so as to control the type of the charged particles suspended at a position close to the display surface (the top of the microstructure 121 in fig. 2) in each microstructure 121, thereby controlling the color presented by each microstructure 121, and further enabling the electronic paper display screen 1 to display a picture.

Referring to fig. 2, the electronic ink film 12, the first electrode layer 13 and the second electrode layer 14 in the electronic paper display screen 1 may form a plurality of pixels P, and illustratively, the plurality of pixels P may be distributed in an array, that is, the electronic paper display screen includes S rows × Q columns of pixels P, where S is greater than or equal to 2, and Q is greater than or equal to 2. Correspondingly, the first electrode layer 13 may include a plurality of first electrodes (also referred to as pixel electrodes) 131 distributed at intervals; the second electrode layer 14 may include a plurality of second electrodes (also referred to as common electrodes) 141 opposite to the plurality of first electrodes 131, and the plurality of second electrodes 141 may be electrically connected to each other, for example, the second electrode layer 14 may be a planar electrode layer including only a closed outline. As an example, one pixel P may include one first electrode 131 and one or more microstructures 121 (for example, one microstructure 121), or as shown in fig. 2, one microstructure 121 is distributed in 2 adjacent pixels P.

In this way, the display control device may apply a voltage signal (may be referred to as a COM voltage) to the second electrode layer 14, and may apply a corresponding data driving signal to the first electrode 131 included in each pixel P according to the pixel data of the pixel P in the process of refreshing the picture displayed by the electronic paper display screen 1. For example, if the pixel data of a pixel P is white pixel data, a white driving signal is applied to the first electrode 131 of the pixel P, so that the white particles WG in the pixel P are floated at a position close to the display surface after the screen refresh is completed, and the pixel P displays white; if the pixel data of a pixel P is black pixel data, a black driving signal is applied to the first electrode 131 of the pixel P, so that after the frame refresh is completed, the black particles BG in the pixel P are suspended at a position close to the display surface, and the pixel P displays black.

In some embodiments, referring to fig. 2, the electronic paper display screen 1 may further include a pixel driving circuit 15 disposed on the substrate 11 to apply data driving signals to the respective first electrodes 131 in the first electrode layer 13, respectively. Referring to fig. 3, the pixel driving circuit 15 may include a plurality of gate lines 151 and a plurality of data lines 152, the plurality of gate lines GL and the plurality of data lines DL being arranged to cross, e.g., to be perpendicular to each other; the pixel driving circuit 15 may further include a switching device 153, such as a Thin Film Transistor (TFT), connected to the crossing gate line GL and data line DL. The display control device is connected to the plurality of gate lines 151 to input a scan signal to the plurality of gate lines 151 to control the gate of each row of pixels P connected to the plurality of gate lines 151. For example, the display control apparatus may scan a plurality of rows of pixels P row by row, that is, input scan signals to the plurality of gate lines 151 row by row in an order from a first row of gate lines to a last row of gate lines, so that the respective switching devices 153 connected to the scanned gate lines 151 are in a turned-on state. The display control means is connected to the plurality of data lines 152 to input a data driving signal to the first electrodes 131 in the pixels P in each row that are gated (scanned), so that each pixel P exhibits a corresponding color under the influence of an electric field. For example, the second electrode layer can provide 0V signal, and the data driving signal in the range of-15V to 15V is input to the first electrode 131 to control the magnitude of the electric field of the pixel P.

The electronic paper display screen 1 has a bistable characteristic, and even if the electric field is cancelled, the electronic paper display screen 1 can stay on a picture refreshed at the last time, so that the electronic paper display screen 1 does not need to be continuously powered to maintain the picture, and thus, the electronic paper display device can realize low power consumption.

The embodiment of the disclosure provides a display control method of an electronic paper display screen, which is used for driving the electronic paper display screen to display. As shown in fig. 4a or 4b, the display control method includes:

in the case where the microstructure 121 displays black, a first pulse signal is applied to the first electrode 131; the first pulse signal includes a first write signal applied to the first electrode 131 in the write phase; the first write signal is used to bring the black particles BG close to the display side to make the microstructure 121 display black;

in the case where the microstructure 121 displays white, a second pulse signal is applied to the first electrode 131; the second pulse signal includes a second write signal applied to the first electrode 131 in the write phase; the second write signal is used to bring the white particles WG close to the display side so that the microstructure 121 displays white;

the first write signal includes a first write voltage U11 and a first zero voltage U01 which are alternately arranged, the second write signal includes a second write voltage U12 and a second zero voltage U02 which are alternately arranged, the first write voltage U11 and the second write voltage U12 overlap in time, and the first zero voltage U01 and the second zero voltage U02 overlap in time.

According to the display control method of the electronic paper display screen, the first writing voltage U11 and the second writing voltage U12 are overlapped in time, and the first zero voltage U01 and the second zero voltage U02 are overlapped in time, so that the driving voltages of the sub-pixels displaying different colors are applied at the same time and are synchronously started, unnecessary zero-crossing waiting time of the sub-pixels displaying different colors is avoided, the total driving time is shortened, the power consumption is reduced, and the display effect is improved.

In the embodiment of the disclosure, the ith writing voltage or the ith reverse voltage refers to the output voltage of the driving chip, and is independent of the scanning refresh rate, wherein i is a natural number between 1 and 3. The scan refresh rate is only the frequency of the gate voltage scan, the voltage frame number in the embodiment of the present disclosure is usually a continuous multi-frame write voltage or a reverse voltage, and in fact, each frame has only a short period of time for the scan line scan, the driving transistor is turned on to charge, the charging voltage is the output voltage of the driving chip, and the other periods of time are all the driving voltage or the reverse voltage maintained by the discharge of the storage capacitor. However, the scanning refresh rate does not affect the continuity of the output voltage of the driving chip in time for a plurality of consecutive frames, so that the scanning line driving waveform is not particularly given. Generally, electronic paper uses a 50HZ (or 100HZ) refresh rate.

In addition, the display control method according to the embodiment of the disclosure retains the zero voltage because if the zero voltage is removed, the total time lengths of the first write signal and the second write signal in the write phase are not consistent, and the total time lengths of the first inversion signal and the second inversion signal in the inversion phase are also not consistent, so that the black and white color position in the screen will be misaligned during the driving process (inversion phase → dithering phase → write phase), for example, the sub-pixel displaying white is not misaligned to wait for the sub-pixel displaying black, and the sub-pixel displaying white will enter the dithering phase first, so that the misalignment and dithering will cause the particles of the whole paper film to be mixed unevenly. In addition, the subsequent writing phase will not start at the same time, which has a significant image sticking problem. The display control method of the embodiment of the present disclosure maintains the zero voltage of at least 1 to 3 frames, that is, the total duration of each of the inversion/writing phases of black and white is the same, so that the three phases can be synchronized.

In some exemplary embodiments, as shown in fig. 4a and 4b, the first zero voltage U01 is applied for a period of time between 1 frame and 8 frames; the second zero voltage U02 is applied for a period of time between 3 frames and 10 frames.

The zero voltage in the embodiment of the present disclosure is not particularly limited in the application time period, and is at least 1 frame and at most the number of frames to which another color is applied in this stage.

In some exemplary embodiments, as shown in fig. 4a and 4b, the first write voltage U11 is applied for a longer period of time than the second write voltage U12, the first zero voltage U01 is applied for a shorter period of time than the second zero voltage U02, and the total period of time during which the first write voltage U11 and the first zero voltage U01 are applied is equal to the total period of time during which the second write voltage U12 and the second zero voltage U02 are applied.

Illustratively, as shown in fig. 4a and 4b, the applying time period of the first write voltage U11 is 10 frames, the applying time period of the second write voltage U12 is 8 frames, the applying time period of the first zero voltage U01 is 1 frame, and the applying time period of the second zero voltage U02 is 3 frames (in fig. 4b, the first two frames of the second zero voltage U02 are applied before the second write voltage U12, and the next frame of the second zero voltage U02 is applied after the second write voltage U12). The total application period of the first write voltage U11 and the first zero voltage U01 is 11 frames, and the total application period of the second write voltage U12 and the second zero voltage U02 is also 11 frames.

Although the number of frames required for each of the first write voltage U11 and the second write voltage U12 is different, two frames remain after the second write voltage U12, which requires a shorter time, completes writing, and the disclosed embodiment sets the two frames to zero crossing without violating the conservation of charge and affecting the writing effect.

In some exemplary embodiments, as shown in fig. 4a, the start time of the first write voltage U11 is the same as the start time of the second write voltage U12.

In other exemplary embodiments, as shown in fig. 4b, the end time of the first write voltage U11 is the same as the end time of the second write voltage U12.

In some exemplary embodiments, as shown in fig. 4a and 4b, the first write signal further includes a third zero voltage U03, the second write signal further includes a fourth zero voltage U04, and the third zero voltage U03 and the fourth zero voltage U04 have the same duration and are both applied at the beginning of the write phase.

In some exemplary embodiments, the third zero voltage U03 and the fourth zero voltage U04 are applied for a period of time between 1 frame and 3 frames. Illustratively, as shown in fig. 4a and 4b, the third zero voltage U03 and the fourth zero voltage U04 are applied for 1 frame.

In some exemplary embodiments, as shown in fig. 4a and 4b, the first pulse signal further includes: a first pre-processed signal applied to the first electrode 131 in an inversion phase, the first pre-processed signal including a first inversion voltage U21 and a fifth zero voltage U05 alternately arranged; the second pulse signal includes a second pre-processed signal applied to the first electrode 131 in the inversion stage, the second pre-processed signal including a second inversion voltage U22 and a sixth zero voltage U06 alternately arranged;

the first reverse voltage U21 and the second reverse voltage U22 overlap in time, and the fifth zero voltage U05 and the sixth zero voltage U06 overlap in time.

In some exemplary embodiments, as shown in fig. 4a and 4b, the fifth zero voltage U05 is applied for a period of time between 1 frame and 8 frames; the sixth zero voltage U06 is applied for a period of time between 3 frames and 10 frames.

In some exemplary embodiments, as shown in fig. 4a and 4b, the first reverse voltage U21 is applied for a longer period of time than the second reverse voltage U22, the fifth zero voltage U05 is applied for a shorter period of time than the sixth zero voltage U06, and the total period of time for which the first reverse voltage U21 and the fifth zero voltage U05 are applied is equal to the total period of time for which the second reverse voltage U22 and the sixth zero voltage U06 are applied.

Illustratively, as shown in fig. 4a and 4b, the application period of the first reverse voltage U21 is 10 frames, the application period of the second reverse voltage U22 is 8 frames, the application period of the fifth zero voltage U05 is 1 frame, and the application period of the sixth zero voltage U06 is 3 frames (in fig. 4b, the first two frames of the sixth zero voltage U06 are applied before the second reverse voltage U22, and the next frame of the sixth zero voltage U06 is applied after the second reverse voltage U22). The total application time period of the first reverse voltage U21 and the fifth zero voltage U05 is 11 frames, and the total application time period of the second reverse voltage U22 and the sixth zero voltage U06 is also 11 frames.

Although the number of frames required for each of the first and second reverse voltages U21 and U22 is different, two frames remain after the second reverse voltage U22, which requires a shorter time, completes writing, and the disclosed embodiment sets these two frames to zero crossing without violating the conservation of charge and affecting the writing effect.

In the embodiment of the present disclosure, as shown in fig. 4a or 4b, after the sub-pixels displaying black and the sub-pixels displaying white are synchronously inverted in the inversion stage, a common zero voltage (at least one frame of zero-crossing stage) is set, so that the process from inversion to jitter can be more stably buffered, on one hand, the particles keep inertia, and the inversion effect is stably consolidated with a frame of time; on the other hand, the driving abnormity caused by the rapid high-low voltage sudden change in the shaking stage is avoided.

In some exemplary embodiments, as shown in fig. 4a, the start time of the first reverse voltage U21 is the same as the start time of the second reverse voltage U22.

In other exemplary embodiments, as shown in fig. 4b, the end time of the first reverse voltage U21 is the same as the end time of the second reverse voltage U22.

In some exemplary embodiments, the first pre-processed signal further includes a seventh zero voltage U07, the second pre-processed signal further includes an eighth zero voltage U08, the seventh zero voltage U07 and the eighth zero voltage U08 are the same duration and are both applied at the beginning of the inversion phase.

In some exemplary embodiments, the seventh zero voltage U07 is applied for a period of time between 1 frame and 3 frames; the eighth zero voltage U08 is applied for a period of time between 1 frame and 3 frames.

Illustratively, as shown in fig. 4a or 4b, the seventh zero voltage U07 and the eighth zero voltage U08 are applied for 1 frame. The first frame is not of practical significance for a refresh. However, some electronic paper products may sometimes be designed with a "cyclic refresh" mode, that is, a waveform of a reverse phase-a jitter phase-a writing phase is set to be a refresh repeated for many times by using a code, and if there is no time waiting between two consecutive refreshes by default in the code setting, the last writing end is directly changed to the next reverse start, and the charge transition may not be smooth. Based on this, the display control method of the embodiment of the present disclosure adds 1-frame zero-crossing waiting periods (i.e., the seventh zero voltage U07 and the eighth zero voltage U08) to start black-and-white synchronization.

In the display control method of the embodiment of the disclosure, in the same driving process, the reverse stage is not directly continuous to the jitter stage, but a frame of zero-crossing waiting stage is set for smooth transition from the reverse stage to the jitter stage, and a frame of zero-crossing waiting stage is set for smooth transition from the jitter stage to the write stage, so that when electrophoretic particles transition from one stage to the next stage, the time of one frame is smoothly transited by inertia. In addition, a zero-crossing waiting stage of at least one frame is also arranged between different periods in the reverse stage and the writing stage, and although the number of frames is small, abnormal driving caused by sudden voltage change can be avoided.

In some exemplary embodiments, the first inversion voltage U21 has the same voltage value, opposite polarity, and the same duration as the first write voltage U11, and the second inversion voltage U22 has the same voltage value, opposite polarity, and the same duration as the second write voltage U12.

Illustratively, as shown in fig. 4a or 4b, the polarity of the first reverse voltage U21 is negative, the voltage value is 15V, and the duration is 10 frames; the polarity of the first write voltage U11 is positive, the voltage value is 15V, and the duration is 10 frames. The polarity of the second reverse voltage U22 is positive, the voltage value is 15V, and the duration is 8 frames; the polarity of the second write voltage U12 is negative, the voltage value is 15V, and the duration is 8 frames.

As shown in fig. 4a or fig. 4b, in the inversion phase, 1 frame of zero crossings is shared by the sub-pixel displaying black and the sub-pixel displaying white, and then the inversion is performed, i.e. the sub-pixel displaying black is turned white and the sub-pixel displaying white is simultaneously turned black. Since the number of time frames of the reverse voltages of the black sub-pixel and the white sub-pixel in the reverse phase is different, and the number of time frames of the driving voltages of the black sub-pixel and the white sub-pixel in the write phase is also different, as shown in fig. 4a, the synchronization design may be that the synchronization is started, but the synchronization is finished, and then the synchronization is finished, and the frame number is aligned by using a shorter zero crossing, or, as shown in fig. 4b, the synchronization design may be that the synchronization is finished, but the synchronization is started, and then the frame number is aligned by using a shorter zero crossing.

In an exemplary embodiment, as shown in fig. 4a, the subpixels that display black and the subpixels that display white start reversing simultaneously, and the subpixels that display black reverse white for 10 frames and the subpixels that display white reverse black for 8 frames. After 8 frames of black inversion of the sub-pixels displaying white color are finished, the sub-pixels displaying black color are still within 2 frames of the white inversion, and at the moment, the sub-pixels displaying white color are also set to be zero-crossing, so that excessive reverse voltage is avoided, and the phenomenon that the subsequent written charges are not conserved is avoided. And after the sub-pixel for displaying black is turned white and the sub-pixel for displaying white is turned black for 1 time, 1 frame of zero crossing is carried out together, then the 'synchronous' reverse process is repeated again, and 1 frame of zero crossing is supplemented after the completion. In this way, the reverse phase is compressed from the original "staggered" type of 36 frame time to a 23 frame time only.

Similarly, the writing phase may also be designed to be "synchronized" in that 1 frame of common zero crossings is preceded, and then the black-displaying sub-pixel writing starts simultaneously with the white-displaying sub-pixel writing. The sub-pixels displaying white are written in 2 frames after 8 frames are completed 1 time, and the sub-pixels displaying black are continuously written in black. During these 2 frame times, the sub-pixel displaying white crosses zero. After the first time of writing waveform is finished, 1 frame of zero crossing is performed together, then the second time of writing waveform is started, and finally 1 frame of common zero crossing voltage is performed. In this way, the write phase is shortened from the original 36 frames of "staggered" time to 23 frames of "synchronous" time.

In the above manner, without considering further optimization of the dithering stage (for example, the dithering stage is 80 frames in fig. 1), the display control method according to the embodiment of the present disclosure is optimized only for the inversion stage and the writing stage, and the refresh process for 152 frames in total for pure black and white paper film can be shortened to only 126 frames. According to the conventional refresh frequency of 50HZ, the refresh time is shortened from 3.04 seconds to only 2.52 seconds, shortened by 0.52 seconds (0.26 seconds for each of the inversion stage and the write stage), the optimal ratio reaches 17.1%, and the two driving processes of inversion and write are completed within the time of one original inversion stage or write stage.

Through actual measurement, the optical effect of the display control method of the electronic paper display screen in the embodiment of the disclosure is basically not different from that of the display control method in fig. 1, and meets the optical test standard of the electronic paper module. This means that the zero-crossing phase, in which black and white are "shifted" from each other waiting in the original drive waveform, is not necessary. Therefore, the display control method of the embodiment of the disclosure realizes electronic paper driving, reduces refreshing time, and reduces power consumption.

In some exemplary embodiments, as shown in fig. 5, each microstructure 121 further includes color particles CG, wherein the color particles CG may be particles of any one color other than black and white, for example, may be red particles RG.

In some exemplary embodiments, the color particles CG may be electrically charged the same as the black particles BG; the ratio of the charge amount to the mass of the black particles BG is larger than the ratio of the charge amount to the mass of the color particles CG.

If the pixel data of a pixel P is color pixel data (e.g. red pixel data), a color driving signal (e.g. red driving signal) is applied to the first electrode 131 of the pixel P, so that after the frame refresh is completed, the color particles CG (e.g. red particles RG) in the pixel P are suspended at a position close to the display surface, and the pixel P displays color (e.g. red).

In some exemplary embodiments, as shown in fig. 6, the display control method may include:

the first write signal comprises a first write voltage U11 and a first zero voltage U01 which are alternately arranged, the second write signal comprises a second write voltage U12 and a second zero voltage U02 which are alternately arranged, the first write voltage U11 and the second write voltage U12 are overlapped in time, and the first zero voltage U01 and the second zero voltage U02 are overlapped in time;

in the case where the microstructures 121 display color, a third pulse signal is applied to the first electrode 131; the third pulse signal includes a third write signal applied to the first electrode 131 in the write phase; the third write signal is used to bring the color particles CG close to the display side so that the microstructure 121 displays color;

the third write signal includes an inverted write voltage U131 and a third write voltage U13 alternately arranged, and a ninth zero voltage U09 arranged after the inverted write voltage U131 and the third write voltage U13, the third write voltage U13 does not temporally overlap with the first write voltage U11, the third write voltage U13 does not temporally overlap with the second write voltage U12, the ninth zero voltage U09 temporally overlaps with the first write voltage U11, and the ninth zero voltage U09 temporally overlaps with the second write voltage U12.

In some exemplary embodiments, as shown in fig. 6, the first zero voltage U01 is applied for a period of time between 1 frame and 10 frames; the second zero voltage U02 is applied for a period of time between 7 frames and 16 frames.

In some exemplary embodiments, as shown in fig. 6, the applying time period of the first write voltage U11 is longer than the applying time period of the second write voltage U12, the applying time period of the first zero voltage U01 is shorter than the applying time period of the second zero voltage U02, and the total applying time period of the first write voltage U11 and the first zero voltage U01 is equal to the total applying time period of the second write voltage U12 and the second zero voltage U02.

Illustratively, as shown in fig. 6, the applying time period of the first write voltage U11 is 16 frames, the applying time period of the second write voltage U12 is 10 frames, the applying time period of the first zero voltage U01 is 1 frame, and the applying time period of the second zero voltage U02 is 7 frames (in fig. 6, the first write voltage U11 and the second write voltage U12 start at the same time and do not end at the same time, in other exemplary embodiments, the first write voltage U11 and the second write voltage U12 may also start at the same time and end at the same time). The total application period of the first write voltage U11 and the first zero voltage U01 was 17 frames, and the total application period of the second write voltage U12 and the second zero voltage U02 was also 17 frames.

Although the number of frames required for each of the first write voltage U11 and the second write voltage U12 is different, six frames remain after the second write voltage U12, which requires a shorter time, completes writing, and the disclosed embodiment sets the six frames to zero crossing without violating the conservation of charge and affecting the writing effect.

In some exemplary embodiments, as shown in fig. 6, the first write signal further includes a third zero voltage U03, the second write signal further includes a fourth zero voltage U04, and the third zero voltage U03 and the fourth zero voltage U04 have the same duration and are both applied at the beginning of the write phase.

In some exemplary embodiments, the third zero voltage U03 and the fourth zero voltage U04 may be applied for a period of time between 199 frames and 202 frames.

For example, the third zero voltage U03 and the fourth zero voltage U04 may be applied for 199 frames. In the present embodiment, since the sub-pixel for displaying red needs 33 frames/cycle × 6 cycle to 198 frames, and a frame before entering the black writing or white writing phase is added, the applying time lengths of the third zero voltage U03 and the fourth zero voltage U04 are both 199 frames.

In some exemplary embodiments, as shown in fig. 6, the first pulse signal further includes: a first pre-processed signal applied to the first electrode 131 in an inversion phase, the first pre-processed signal including a first inversion voltage U21 and a fifth zero voltage U05 alternately arranged; the second pulse signal includes a second pre-processed signal applied to the first electrode 131 in the inversion stage, the second pre-processed signal including a second inversion voltage U22 and a sixth zero voltage U06 alternately arranged;

In some exemplary embodiments, as shown in fig. 6, the fifth zero voltage U05 is applied for a period of time between 1 frame and 10 frames; the sixth zero voltage U06 is applied for a period of time between 7 frames and 16 frames.

In some exemplary embodiments, as shown in fig. 6, the first reverse voltage U21 is applied for a longer period of time than the second reverse voltage U22, the fifth zero voltage U05 is applied for a shorter period of time than the sixth zero voltage U06, and the total of the first reverse voltage U21 and the fifth zero voltage U05 is applied for a period of time equal to the total of the second reverse voltage U22 and the sixth zero voltage U06.

Illustratively, as shown in fig. 6, the application period of the first reverse voltage U21 is 16 frames, the application period of the second reverse voltage U22 is 10 frames, the application period of the fifth zero voltage U05 is 1 frame, and the application period of the sixth zero voltage U06 is 7 frames. The total application time period of the first reverse voltage U21 and the fifth zero voltage U05 is 17 frames, and the total application time period of the second reverse voltage U22 and the sixth zero voltage U06 is also 17 frames.

Although the number of frames required for each of the first and second reverse voltages U21 and U22 is different, six frames are left after the second reverse voltage U22, which requires a shorter time, completes writing, and the disclosed embodiment sets the six frames to zero crossing without violating the conservation of charge and affecting the writing effect.

In the embodiment of the present disclosure, as shown in fig. 6, after the sub-pixels displaying black and the sub-pixels displaying white are synchronously inverted in the inversion stage, a common zero voltage (at least one frame of zero-crossing stage) is set, so that the process from inversion to jitter can be buffered more stably, on one hand, the particles keep inertia, and the inversion effect is consolidated stably with a frame of time; on the other hand, the driving abnormity caused by the rapid high-low voltage sudden change in the shaking stage is avoided.

In some exemplary embodiments, as shown in fig. 6, the start time of the first reverse voltage U21 is the same as the start time of the second reverse voltage U22.

In other exemplary embodiments, the end time of the first reverse voltage U21 is the same as the end time of the second reverse voltage U22.

In some exemplary embodiments, as shown in fig. 6, the first pre-processed signal further includes a seventh zero voltage U07, the second pre-processed signal further includes an eighth zero voltage U08, and the seventh zero voltage U07 and the eighth zero voltage U08 have the same duration and are both applied at the beginning of the inversion phase.

Illustratively, as shown in fig. 6, the seventh zero voltage U07 and the eighth zero voltage U08 are applied for 1 frame. The first frame is not of practical significance for a refresh. However, some electronic paper products may sometimes be designed with a "cyclic refresh" mode, that is, a waveform of a reverse phase-a jitter phase-a writing phase is set to be a refresh repeated for many times by using a code, and if there is no time waiting between two consecutive refreshes by default in the code setting, the last writing end is directly changed to the next reverse start, and the charge transition may not be smooth. Based on this, the display control method of the embodiment of the present disclosure adds 1-frame zero-crossing waiting periods (i.e., the seventh zero voltage U07 and the eighth zero voltage U08) to start black-and-white synchronization.

In some exemplary embodiments, as shown in fig. 6, the first inversion voltage U21 has the same voltage value, opposite polarity, and the same duration as the first write voltage U11, and the second inversion voltage U22 has the same voltage value, opposite polarity, and the same duration as the second write voltage U12.

Illustratively, as shown in fig. 6, the polarity of the first reverse voltage U21 is negative, the voltage value is 15V, and the duration is 16 frames; the polarity of the first write voltage U11 is positive, the voltage value is 15V, and the duration is 16 frames. The polarity of the second reverse voltage U22 is positive, the voltage value is 15V, and the duration time is 10 frames; the polarity of the second write voltage U12 is negative, the voltage value is 15V, and the duration is 10 frames.

In some exemplary embodiments, as shown in fig. 6, the third pulse signal further includes: a third pre-processed signal applied to the first electrode 131 in the reverse phase, the third pre-processed signal including a tenth zero voltage U010 and a third reverse voltage U23 sequentially set;

the tenth zero voltage U010 and the first reverse voltage U21 overlap in time, the tenth zero voltage U010 and the second reverse voltage U22 overlap in time, the third reverse voltage U23 does not overlap in time with the first reverse voltage U21, and the third reverse voltage U23 does not overlap in time with the second reverse voltage U22.

Illustratively, as shown in fig. 6, the polarity of the inverse write voltage U131 is negative, the voltage value is 15V, the duration is 3 frames, the polarity of the third write voltage U13 is positive, the voltage value is 6V, the duration is 30 frames, the inverse write voltage U131 and the third write voltage U13 cycle 6 times, the duration of the ninth zero voltage U09 is 35 frames, and therefore, the duration of the write phase is 33 × 6+35 — 233 frames; the polarity of the third reverse voltage U23 is negative, the voltage value is 15V, the duration is 18 × 4-72 frames, and the duration of the zeroth voltage U010 is 35 frames, so the duration of the reverse phase is 72+ 35-107 frames.

As shown in fig. 6 and 7, the total driving time can be shortened from 12.44s to 11.6 s. Note that, since the inversion and writing stages of the colored paper film are different from those of the pure black-and-white paper film, the display control method according to the embodiment of the disclosure does not turn on the inversion/writing of all the black, white, and color sub-pixels at the same time. For the driving of a black and white three-color paper film, the color particles are generally matched to a positive voltage of lower amplitude. In the three-color electronic paper drive, for the reverse and writing stages corresponding to the black and white colors, the refreshing time of the whole stage is reduced and the power consumption is reduced after the display control method of the embodiment of the disclosure is used.

Some embodiments of the present disclosure also provide a display control apparatus, as shown in fig. 8, the display control apparatus 2 includes at least one processor 21, at least one memory 22, a gate driver 23 (optional), and a source driver 24.

The gate driver 23, which may also be referred to as a gate driving circuit, is configured to output a scan signal to the electronic paper display screen 1 under the control of the at least one processor 21 to control the gating of the pixels of each row. It may be disposed in the display control apparatus 2, or may be disposed in the electronic paper display screen 1, which is not limited in this embodiment, and the gate driver 23 is disposed in the display control apparatus 2 as an example.

The source driver 24, which may also be referred to as a source driving circuit, is configured to output data driving signals to the electronic paper display screen 1 under the control of the at least one processor 21 to control the colors displayed by the respective pixels.

For example, the gate driver 23 and/or the source driver 24 may send a BUSY signal (BUSY status signal) to the processor 21 to inform the processor 21 of the status of itself (the gate driver 23 and/or the source driver 24). The processor 21 may determine whether to transmit a command or data to the gate driver 23 and/or the source driver 24 according to the BUSY signal. The processor 21 sends a CLK (clock) signal to the gate driver 23 and the source driver 24 to supply the gate driver 23 and the source driver 24 with clocks required for their operations. In addition, the processor 21 may also send a Direct Current (DC) signal to the gate driver 23 and the source driver 24 to inform the gate driver 23 and/or the source driver 24 whether a command or data is sent next. The source driver 24 may include a plurality of source driving sub-circuits, and the processor 21 may transmit a Chip Select (CS) signal to one of the plurality of source driving sub-circuits to Select the one source driving sub-circuit for signal transmission. For example: the processor 21 may send a start scan command to the gate driver 23 to start scanning a first row of gate lines of the electronic paper display screen; data driving signals (i.e., data) may also be sent to the source driver 24.

The memory 22 may store computer programs and data, which may include high speed random access memory, and may also include non-volatile memory, such as, but not limited to, a magnetic disk storage device, a flash memory device, etc., a read-only memory (ROM) or other type of static storage device that can store static information and instructions, a Random Access Memory (RAM) or other type of dynamic storage device that can store information and instructions, a One Time Programmable (OTP) memory, an electrically erasable programmable read-only memory (EEPROM), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store program code in the form of instructions or data structures and that can be accessed by a computer. The memory 22 may be separate and connected to the processor 21 via a communication line. The memory may also be integrated with the processor 21.

The at least one processor 21 is connected to the gate driver 23, the source driver 24 and the at least one memory 22, and calls up data in the memory 22 by running or executing a computer program stored in the memory 22 to control the gate driver 23 and the source driver 24 to output corresponding signals. The at least one processor 21 may be one or more general processing units (CPUs), Microprocessors (MCUs), Logic devices (logics), application-specific integrated circuits (ASICs), or integrated circuits for controlling the execution of programs according to some embodiments of the present disclosure; the CPU may be a single-core processor (single-CPU) or a multi-core processor (multi-CPU). A processor 21 herein may refer to one or more devices, circuits, or processing cores for processing data (e.g., computer program instructions, etc.).

In some exemplary embodiments, the processor 21 is configured to: controlling the source driver 24 to apply a first pulse signal to the first electrode in a case where the microstructure displays black; the first pulse signal comprises a first writing signal applied to the first electrode in a writing phase; the first writing signal is used for enabling the black particles to be close to the display side so that the microstructure displays black;

controlling the source driver 24 to apply a second pulse signal to the first electrode in a case where the microstructure displays white; the second pulse signal includes a second write signal applied to the first electrode in the write phase; the second writing signal is used for enabling the white particles to be close to the display side so that the microstructure displays white;

All relevant contents of the steps related to the method embodiment may be referred to the functional description of the functional module, and are not described herein again.

In some exemplary embodiments, as shown in fig. 8, the display control device 2 may further include a temperature sensor 25 connected to the at least one processor 21. The temperature sensor 25 is configured to measure an ambient temperature and transmit the ambient temperature to the at least one processor 21, so that the at least one processor 21 controls the source driver 24 to output a data driving signal corresponding to the ambient temperature according to the ambient temperature.

As shown in fig. 9, some embodiments of the present disclosure provide an electronic paper display device 100, and the electronic paper display device 100 may include: an electronic paper display screen 1 and a display control device 2. Wherein, the electronic paper display screen 1 is connected with the display control device 2.

Some embodiments of the present disclosure provide a computer-readable storage medium (e.g., a non-transitory computer-readable storage medium) storing computer program instructions that, when executed on an electronic paper display apparatus, cause the electronic paper display apparatus to perform the display control method of the electronic paper display screen in any of the above embodiments. Some embodiments of the present disclosure provide a computer-readable storage medium (e.g., a non-transitory computer-readable storage medium) having stored therein computer program instructions, which, when run on a processor, cause the processor to perform one or more steps of a display control method of an electronic paper display screen as described in any of the above embodiments.

By way of example, such computer-readable storage media may include, but are not limited to: magnetic storage devices (e.g., hard Disk, floppy Disk, magnetic tape, etc.), optical disks (e.g., CD (Compact Disk), DVD (Digital Versatile Disk), etc.), smart cards, and flash Memory devices (e.g., EPROM (Erasable Programmable Read-Only Memory), card, stick, key drive, etc.). Various computer-readable storage media described in this disclosure can represent one or more devices and/or other machine-readable storage media for storing information. The term "machine-readable storage medium" can include, without being limited to, wireless channels and various other media capable of storing, containing, and/or carrying instruction(s) and/or data.

Some embodiments of the present disclosure also provide a computer program product. The computer program product comprises computer program instructions which, when executed on a computer, cause the computer to perform one or more steps of the method for controlling the display of an electronic paper display screen as described in the above embodiments.

Some embodiments of the present disclosure also provide a computer program. When the computer program is executed on a computer, the computer program causes the computer to execute one or more steps of the display control method of the electronic paper display screen as described in the above embodiments.

The beneficial effects of the computer-readable storage medium, the computer program product, and the computer program are the same as the beneficial effects of the display control method of the electronic paper display screen according to some embodiments, and are not described herein again.

The above description is only for the specific embodiments of the present disclosure, but the scope of the present disclosure is not limited thereto, and any person skilled in the art will appreciate that changes or substitutions within the technical scope of the present disclosure are included in the scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims

1. The display control method of the electronic paper display screen is characterized in that the electronic paper display screen comprises a plurality of microstructures, and a first electrode and a second electrode which are arranged on two opposite sides of the microstructures; the microstructures comprise black particles and white particles, and the black particles and the white particles are opposite in electric charge; the display control method comprises the following steps:

2. The method according to claim 1, wherein an application period of the first write voltage is longer than an application period of the second write voltage, an application period of the first zero voltage is shorter than an application period of the second zero voltage, and a total application period of the first write voltage and the first zero voltage is equal to a total application period of the second write voltage and the second zero voltage.

3. The display control method according to claim 2, wherein a start timing of the first write voltage is the same as a start timing of the second write voltage, or an end timing of the first write voltage is the same as an end timing of the second write voltage.

4. The method according to claim 1, wherein the first write signal further comprises a third zero voltage, the second write signal further comprises a fourth zero voltage, and the third zero voltage and the fourth zero voltage have the same duration and are both applied at the beginning of the write phase.

5. The display control method according to claim 1, wherein the first pulse signal further comprises: a first pre-processing signal applied to the first electrode in a reverse phase, the first pre-processing signal comprising a first reverse voltage and a fifth zero voltage which are alternately arranged; the second pulse signal comprises a second preprocessing signal applied to the first electrode in an inversion stage, and the second preprocessing signal comprises a second inversion voltage and a sixth zero voltage which are alternately arranged;

6. The display control method according to claim 5, wherein an application period of the first reverse voltage is longer than an application period of the second reverse voltage, an application period of the fifth zero voltage is shorter than an application period of the sixth zero voltage, and a total application period of the first reverse voltage and the fifth zero voltage is equal to a total application period of the second reverse voltage and the sixth zero voltage.

7. The display control method according to claim 6, wherein a start timing of the first reverse voltage is the same as a start timing of the second reverse voltage, or an end timing of the first reverse voltage is the same as an end timing of the second reverse voltage.

8. The method according to claim 5, wherein the first pre-processed signal further comprises a seventh zero voltage, the second pre-processed signal further comprises an eighth zero voltage, and the seventh zero voltage and the eighth zero voltage have the same duration and are both applied at the beginning of the inversion phase.

9. The method according to claim 5, wherein the first inversion voltage and the first writing voltage have the same voltage value, opposite polarity, and the same duration, and the second inversion voltage and the second writing voltage have the same voltage value, opposite polarity, and the same duration.

10. The display control method according to claim 5, wherein the microstructure further comprises color particles, and the black particles and the color particles have the same charge; the ratio of the charge quantity to the mass of the black particles is larger than that of the color particles;

11. The display control method according to claim 10, wherein the third pulse signal further comprises: in a reverse phase, applying a third pre-processing signal to the first electrode, wherein the third pre-processing signal comprises a tenth zero voltage and a third reverse voltage which are sequentially arranged;

12. A computer-readable storage medium storing computer program instructions that, when run on an electronic paper display apparatus, cause the electronic paper display apparatus to execute the control method of an electronic paper display screen according to any one of claims 1 to 11.

13. A display control apparatus comprising:

a source driver;

14. An electronic paper display device, comprising: an electronic paper display screen; and a display control apparatus according to claim 13.