CN113380174B

CN113380174B - Display panel and display device

Info

Publication number: CN113380174B
Application number: CN202110645682.1A
Authority: CN
Inventors: 张蒙蒙
Original assignee: Wuhan Tianma Microelectronics Co Ltd
Current assignee: Wuhan Tianma Microelectronics Co Ltd
Priority date: 2021-06-09
Filing date: 2021-06-09
Publication date: 2023-06-27
Anticipated expiration: 2041-06-09
Also published as: CN113380174A

Abstract

The application discloses a display panel and a display device. The display panel comprises a plurality of first multi-path distribution units, wherein each first multi-path distribution unit comprises a first connecting line and M second connecting lines, each second connecting line is electrically connected with the first connecting line, M is an integer greater than or equal to 2, one second connecting line is a first target connecting line, and the other M-1 second connecting lines are first non-target connecting lines; in the same row period, the first target connecting line and the first connecting line are always in a conducting state, and the M-1 first non-target connecting lines and the first connecting line are sequentially in a conducting state. According to the embodiment of the application, the demultiplexer can be arranged more reasonably.

Description

Display panel and display device

Technical Field

The application relates to the technical field of display, in particular to a display panel and a display device.

Background

In order to reduce the cost, it is desirable to reduce the number of output channels of the data driving circuit. For example, in a display panel, a demultiplexer (Demux) is used, for example, by connecting two data lines to one data signal input terminal, and one data signal input terminal is connected to one output channel of the data driving circuit, so that the output channel of the data driving circuit can be reduced to one half.

However, with the development of display technology, it is desirable to be able to more rationally arrange the demultiplexers to meet different demands.

Disclosure of Invention

The application provides a display panel and a display device, which can make the setting of a demultiplexer more reasonable.

In a first aspect, embodiments of the present application provide a display panel, including: the first multiplexing units comprise a first connecting line and M second connecting lines, each second connecting line is electrically connected with the first connecting line, M is an integer greater than or equal to 2, one second connecting line is a first target connecting line, and the other M-1 second connecting lines are first non-target connecting lines; in the same row period, the first target connecting line and the first connecting line are always in a conducting state, and the M-1 first non-target connecting lines and the first connecting line are sequentially in a conducting state.

In a second aspect, based on the same inventive concept, embodiments of the present application provide a display device including the display panel as in the embodiment of the first aspect.

According to the display panel and the display device provided by the embodiment of the application, since one of the second connecting lines is always in the conducting state with the first connecting line in the same row period, and the other M-1 second connecting lines are sequentially in the conducting state with the first connecting line, different second connecting lines can be selected as the first target connecting lines, the sequence of filling data signals on the data lines can be enabled to be not the same sequence in different row periods or different frame periods, and therefore the electric leakage degree difference caused by different time of filling the data signals on the data lines can be balanced, and the problem of uneven display of the display panel is solved.

Drawings

Other features, objects and advantages of the present application will become more apparent upon reading the following detailed description of non-limiting embodiments, taken in conjunction with the accompanying drawings, in which like or similar reference characters designate the same or similar features, and which are not to scale.

Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure;

fig. 2 is a schematic structural diagram of a display panel according to another embodiment of the present disclosure;

fig. 3 shows a schematic structure of a display panel provided by a comparative example;

FIG. 4 shows a timing diagram of FIG. 3;

FIG. 5 shows a timing diagram of FIG. 1;

FIG. 6 shows another timing diagram of FIG. 1;

FIG. 7 shows a timing diagram of FIG. 2;

fig. 8 to 9 are schematic structural views of a display panel according to further embodiments of the present application;

fig. 10 is a schematic view showing the structure of a display panel provided by another comparative example;

FIG. 11 shows a timing diagram of FIG. 10;

FIG. 12 shows a timing diagram of FIG. 8;

FIG. 13 shows another timing diagram of FIG. 8;

FIG. 14 shows a timing diagram of FIG. 9;

fig. 15 to 16 are schematic structural views of a display panel according to further embodiments of the present application;

Fig. 17 is a schematic structural diagram of a display device according to an embodiment of the present application.

Detailed Description

Features and exemplary embodiments of various aspects of the present application are described in detail below to make the objects, technical solutions and advantages of the present application more apparent, and to further describe the present application in conjunction with the accompanying drawings and the detailed embodiments. It should be understood that the specific embodiments described herein are merely configured to explain the present application and are not configured to limit the present application. It will be apparent to one skilled in the art that the present application may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present application by showing examples of the present application.

It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.

It will be understood that when a layer, an area, or a structure is described as being "on" or "over" another layer, another area, it can be referred to as being directly on the other layer, another area, or another layer or area can be included between the layer and the other layer, another area. And if the component is turned over, that layer, one region, will be "under" or "beneath" the other layer, another region.

Features and exemplary embodiments of various aspects of the present application are described in detail below. Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

The embodiment of the invention provides a display panel and a display device. The display panel and the display device according to the embodiments of the present application are described in detail below with reference to the accompanying drawings.

As shown in fig. 1 or 2, the display panel 100 may include a display area AA and a non-display area NA at least at one side of the display area AA. A plurality of data lines d and a plurality of scan lines S are disposed in the display area AA, the scan lines S extend along the first direction X, and the data lines d extend along the second direction Y.

The display panel 100 further includes a plurality of pixel units PU arranged in an array. For example, each pixel unit PU may include sub-pixels PX of multiple colors, which are illustrated in the drawings herein as sub-pixels PX of three colors. Alternatively, each pixel unit PU may include a first subpixel PX1, a second subpixel PX2, and a third subpixel PX3. The first subpixel PX1 may be a red subpixel, the second subpixel PX2 may be a green subpixel, and the third subpixel PX3 may be a blue subpixel, which is not intended to limit the present application.

The display panel 100 further includes a plurality of first multiplexing units 10, and each of the first multiplexing units 10 may include one first connection line 11 and M second connection lines 12, each of the second connection lines 12 being electrically connected to the first connection line 11, M being an integer greater than or equal to 2. One of the second connecting lines 12 is a first target connecting line, the other M-1 second connecting lines 12 are first non-target connecting lines, and in the same row period, the first target connecting lines and the first connecting lines 11 are always in a conducting state, and the M-1 first non-target connecting lines and the first connecting lines 11 are in a conducting state in sequence. In fig. 1 and 2, m=3 is illustrated, and M may be 2, 6, 12, etc., which is not limited by the embodiment of the present invention. It will be appreciated that in the case of m=3, the first demultiplexing unit 10 may be understood as a 1:3 demux circuit.

The second connection line 12 may be electrically connected to the at least one data line d, for example. For example, the second connection line 12 may be electrically connected to one data line d. It is understood that the sub-pixel PX is electrically connected to the data line d and the scan line S, and the data line d and the scan line S respectively provide the data signal and the scan signal for the sub-pixel PX. In the figures herein, it is exemplarily shown that the first row of pixel units PU corresponds to the scan line S1, the second row of pixel units PU corresponds to the scan line S2, the third row of pixel units PU corresponds to the scan line S3, the fourth row of pixel units PU corresponds to the scan line S4, etc.

For example, the data signals corresponding to the second connection lines 12 themselves may be transmitted to the M second connection lines 12 through the first connection lines 11 in a time-sharing manner. It can be understood that the data signal corresponding to the second connection line 12 is the data signal corresponding to the data line d connected to the second connection line 12, and the data signal corresponding to the data line d is the data signal corresponding to the sub-pixel PX connected to the data line d.

For example, when m=3, the three second connection lines 12 are the second connection line 121, the second connection line 122, and the second connection line 123, respectively, the second connection line 121 is connected to the data line d1, the second connection line 122 is connected to the data line d2, and the second connection line 123 is connected to the data line d 3. The data line d1 is electrically connected to the first subpixel PX1 in the first row of pixel units PU, the data line d2 is electrically connected to the second subpixel PX2 in the first row of pixel units PU, and the data line d3 is electrically connected to the third subpixel PX3 in the first row of pixel units PU. In the process of providing the data signals to the sub-pixels of the first row of pixel units PU through the first demultiplexer 10, the data signals corresponding to the second connection lines 121 are the data signals corresponding to the first sub-pixels PX1, the data signals corresponding to the second connection lines 122 are the data signals corresponding to the second sub-pixels PX2, and the data signals corresponding to the second connection lines 123 are the data signals corresponding to the third sub-pixels PX 3.

For example, in the same row period, the first target connection line and the first connection line 11 are always in a conductive state, and the M-1 first non-target connection lines and the first connection line 11 are sequentially in a conductive state. For example, each of the M second connection lines 12 and the first connection line 11 is connected by one switching element, and one of the switching elements is set as a switching element which is normally open in the same line period. For another example, one of the second connection lines 12 may be directly connected to the first connection line 11, and the other M-1 second connection lines 12 may be connected to the first connection line 11 through a switching element.

For better understanding of the technical effects of the present application, reference is made to fig. 3 and 4, and the points of the similarity between fig. 3 and fig. 1 are not repeated, but the difference is that M first switching elements T1 'in the first multiplexing unit 10' are sequentially turned on in the same row period. Taking m=3, the on level of the first switching element T1' is a low level, for example, in the same row period, the switching control lines CKH1', CKH2', CKH3' sequentially output the low level, the on sequence of the first switching element T1' in the first multiplexing unit 10' is that the first switching element T11' is turned on first, then the first switching element T12' is turned on, and the first switching element T13' is turned on last, then the data signal corresponding to the data line d1 itself is charged on the data line d1, then the data signal corresponding to the data line d2 itself is charged on the data line d2, and finally the data signal corresponding to the data line d3 itself is charged on the data line d 3. The data line d and other structures of the display panel form a parasitic capacitance, the data signal on the data line d is held by the parasitic capacitance, and when the scanning signal on the scan line S is at an effective level, the data signal on the data line d is written into the sub-pixel PX. However, there is a certain leakage of the data line d, because the time for filling the data signals on the data lines d1, d2, d3 is different, the time for waiting for the scanning signal to be at the active level of the data signals on the data lines d1, d2, d3 is different, for example, the time for waiting for the scanning signal to be at the active level of the data line d1 is t1, the time for waiting for the scanning signal to be at the active level of the data signal on the data line d2 is t2, the time for waiting for the scanning signal to be at the active level of the data line d3 is t3, t1 > t2 > t3, resulting in that the leakage degree of the data lines d1, d2, d3 is different, and further, the data signals written into the sub-pixels PX corresponding to the data lines d1, d2, d3 respectively are different, so that the display panel is unevenly displayed.

In the embodiment of the present application, one of the second connection lines 12 is always in a conductive state with the first connection line 11, and the other M-1 second connection lines 12 are sequentially in a conductive state with the first connection line 11.

On the other hand, when each of the second connection lines 12 is electrically connected to the first connection line 11 through one switching element, one of the switching elements may be set as a normally open switching element in the same row period, the switching elements corresponding to the different second connection lines 12 may be set as normally open switching elements in different row periods, or in consecutive at least two row periods, or in different frame periods, or in consecutive at least two frame periods, as shown in fig. 5, the switching elements corresponding to the second connection lines 123 may be set as normally open switching elements in the 1 st row period, and the switching elements corresponding to the

second connection lines

121 and 122 may be set as sequentially open switching elements. That is, in the 1 st row period, the second connection line 123 is the first target connection line, the second connection line 123 and the first connection line 11 are always in the conductive state, the

second connection lines

121 and 122 are the first non-target connection lines, and the

second connection lines

121 and 122 and the first connection line 11 are sequentially in the conductive state. For example, the second connection line 121 and the first connection line 11 are in a conductive state, then the second connection line 122 and the first connection line 11 are in a conductive state, and then the data signal corresponding to the data line d1 is charged to the data line d1, the data signal corresponding to the data line d2 is charged to the data line d2, and finally the data signal corresponding to the data line d3 is charged to the data line d 3. In the 2 nd row period, the second connection line 121 is a first target connection line, the second connection line 121 and the first connection line 11 are always in a conductive state, the

second connection lines

122 and 123 are first non-target connection lines, and the

second connection lines

122 and 123 and the first connection line 11 are sequentially in a conductive state. For example, the second connection line 122 is in a conductive state with the first connection line 11, then the second connection line 123 is in a conductive state with the first connection line 11, and then the data signal corresponding to the data line d2 is charged to the data line d2, then the data signal corresponding to the data line d3 is charged to the data line d3, and finally the data signal corresponding to the data line d1 is charged to the data line d 1. In the 3 rd row period, the second connection line 122 is a first target connection line, and the

second connection lines

121, 123 are first non-target connection lines. For example, the second connection line 123 and the first connection line 11 are in a conductive state, then the second connection line 121 and the first connection line 11 are in a conductive state, and then the data signal corresponding to the data line d3 is charged to the data line d3, then the data signal corresponding to the data line d1 is charged to the data line d1, and finally the data signal corresponding to the data line d2 is charged to the data line d 2. The order of filling the data signals on the data lines d1, d2, d3 in the 4 th row period may be the same as that shown in the 1 st row period.

In addition, the sequence of filling the data signals on the data lines d1, d2, d3 in the 1 st frame period, the 2 nd frame period, the 3 rd frame period, and the 4 th frame period shown in fig. 6 may be the same as the sequence shown in the 1 st row period, the 2 nd row period, the 3 rd row period, and the 4 th row period shown in fig. 5, respectively, and will not be repeated here. Therefore, the sequence of the data signals charged on the data lines d1, d2 and d3 is not the same sequence in different row periods or different frame periods, so that the difference of the electric leakage degree caused by different time of the data signals charged on the data lines d1, d2 and d3 can be balanced, and the problem of uneven display of the display panel is solved.

On the other hand, in the case where one of the second connection lines 12 is directly connected to the first connection line 11 and the other M-1 second connection lines 12 are connected to the first connection line 11 by one switching element, each of the first multiplexing units 10 may be provided with one less switching element, so that the number of switching elements can be reduced, and the number of control lines for controlling the switching elements to be turned on and off can be reduced, the area occupied by the first multiplexing units 10 can be reduced, thereby enabling the non-display area NA to be set narrower and the narrow frame to be more easily realized.

In some alternative embodiments, different second connection lines 12 among the M second connection lines 12 may be selected to be the first target connection line in sequence in at least two adjacent line periods or in at least two adjacent frame periods. For example, the second connection line 123 may be set as the first target connection line in the 1 st row period or in the 1 st frame period; the second connection line 121 may be set as the first target connection line in the 2 nd row period or in the 2 nd frame period; the second connection line 122 may be set as the first target connection line in the 3 rd line period or in the 3 rd frame period; the second connection line 123 may be set to the first target connection line in the 4 th row period or in the 4 th frame period, and so on. The foregoing are merely examples and are not intended to limit the present application.

As described above, by selecting different second connection lines 12 from the M second connection lines 12 to be the first target connection lines in sequence in different line periods or in different frame periods, the order of filling the data signals on the data lines d1, d2, d3 connected to the first multiplexing unit 10 is not the same in different line periods or in different frame periods, so that the difference of leakage degrees due to the difference of time of filling the data signals on the data lines d1, d2, d3 can be balanced, thereby improving the problem of uneven display of the display panel.

In some alternative embodiments, the input time of the data signal corresponding to the first target connection line is after the input time of the data signal corresponding to the first non-target connection line in the same row period.

For example, in the 1 st row period or in the 1 st frame period, the second connection line 123 is set as the first target connection line, the

second connection lines

121, 122 are set as the first non-target connection lines, and the input time of the data signal corresponding to the second connection line 123 itself is after the input time of the data signal corresponding to the

second connection lines

121, 122 itself. Since the first target connection line and the first connection line 11 are always in the on state in the same row period, if the input time of the data signal corresponding to the second connection line 123 is before the input time of the data signal corresponding to the

second connection line

121, 122, the data signal corresponding to the second connection line 123 is replaced by the data signal corresponding to the

second connection line

121, 122.

In some alternative embodiments, as shown in fig. 5, in the same row period, the start time of the scan signal on the scan lines S1, S2, S3, S4, etc. being the active level is after the input time of the data signal corresponding to the second connection line 12 itself. That is, the data signal is charged onto the corresponding second connection line 12, and then the data signal on the second connection line 12 is written into each sub-pixel when the scan signals on the scan lines S1, S2, S3, S4 are at the active level. This manner of charging of the data signal may also be referred to as "line charging". The line charging mode has an advantage in that the charging time of the controlled multi-column sub-pixels connected to the first demultiplexing unit 10 is uniform, thereby further improving display uniformity.

In some alternative embodiments, as shown in fig. 1, the first demultiplexing unit 10 may include M first switching elements T1, and each of the second connection lines 12 is electrically connected to the first connection line 11 through one of the first switching elements T1. One of the first switching elements T1 may be set to be a normally open switching element in the same row period, so that the first target connection line and the first connection line 11 are always in a conductive state in the same row period, and the other M-1 switching elements are sequentially turned on in the same row period, so that the M-1 first non-target connection lines and the first connection line 11 are sequentially in a conductive state in the same row period. It can be understood that the second connection line 12 connected to the normally open first switching element T1 is a first target connection line, and the second connection line 12 connected to the sequentially conductive first switching element T1 is a first non-target connection line. In addition, since each of the second connection lines 12 is connected with the first switching element T1, different first switching elements T1 may be selected as normally-open switching elements in different row periods or in different frame periods.

The first switching element T1 includes T11, T12, and T13, the first switching element T11 is connected to the second connection line 121, the first switching element T12 is connected to the second connection line 122, and the first switching element T13 is connected to the second connection line 123. The display panel 100 may further include first switch control lines CKH1, CKH2, and CKH3, where the first switch control lines CKH1, CKH2, and CKH3 are respectively connected to the control ends of the first switch elements T11, T12, and T13, and signals transmitted by the first switch control lines CKH1, CKH2, and CKH3 are respectively used to control on and off of the first switch elements T11, T12, and T13.

For example, in the same row period, the first switching element T1 electrically connected to the first target connection line is always in a conductive state, and the first switching elements T1 electrically connected to the M-1 first non-target connection lines are sequentially in a conductive state.

For example, the first switching elements T11, T12, T13 may be turned on at a low level and turned off at a high level. Referring to fig. 1, 5 and 6 in combination, in the 1 st row period or in the 1 st frame period, the second connection line 123 is a first target connection line, the second connection lines 121 and 122 are first non-target connection lines, so that the first switching element T13 can be controlled to be always kept in a conductive state, and the first switching elements T11 and T12 are controlled to be sequentially in a conductive state; in the 2 nd row period or the 2 nd frame period, the second connecting line 121 is a first target connecting line, the second connecting lines 122 and 123 are first non-target connecting lines, so that the first switching element T11 can be controlled to be always kept in a conducting state, and the first switching elements T12 and T13 are controlled to be in a conducting state in sequence; in the 3 rd row period or the 3 rd frame period, the second connection line 122 is a first target connection line, the second connection lines 123 and 121 are first non-target connection lines, so that the first switching element T12 can be controlled to be always kept in a conducting state, and the first switching elements T13 and T11 are controlled to be in a conducting state in sequence; the second connection line 123 is a first target connection line, the second connection lines 121, 122 are first non-target connection lines, and the state of the first switching element in the 4 th row period or the 4 th frame period may be the same as the state of the first switching element shown in the 1 st row period or the 1 st frame period in the 4 th row period or the 4 th frame period.

In yet other alternative embodiments, as shown in fig. 2, the first target connection line may be directly connected to the first connection line 11, so that the first target connection line and the first connection line 11 are always in a conductive state during the same row period. The first demultiplexing unit 10 may include M-1 first switching elements T1, M-1 second connection lines 12 each electrically connected to the first connection lines 11 through one first switching element T1, and another second connection line 12 directly connected to the first connection lines 11, for example. It can be understood that the M-1 second connection line 12 to which the first switching element T1 is connected is a first non-target connection line, and the other second connection line 12 to which the first switching element T1 is not connected is a first target connection line.

Illustratively, M-1 first switching elements T1 are sequentially in an on state during the same row period.

For example, the second connection line 123 is a first target connection line, the

second connection lines

121 and 122 are first non-target connection lines, the

second connection lines

121 and 122 are electrically connected to the first connection line 11 through the first switching elements T11 and T12, respectively, and the second connection line 123 is directly connected to the first connection line 11. As shown in fig. 7, in the same row period, the first switching elements T11 and T12 are controlled to be in the on state sequentially by the first switching control lines CKH1 and CKH 2. For example, the first switching element T11 is controlled to be in the on state, and then the first switching element T12 is controlled to be in the on state.

In some alternative embodiments, as shown in fig. 1, the display panel 100 may further include a driving chip IC, and the first connection line 11 may be directly bonded to the driving chip IC. The first connection line 11 may also be referred to herein as a fanout line or fanout line.

For example, a plurality of binding terminals may be disposed at the non-display area NA of the display panel 100, the plurality of binding terminals being connected to the plurality of first connection lines 11 in one-to-one correspondence, and further, the driving chip IC may be bound to the display panel through the binding terminals.

In some alternative embodiments, as shown in fig. 8 or fig. 9, the display panel 100 further includes a plurality of second multiplexing units 20, where the second multiplexing units 20 include a third connection line 23 and N fourth connection lines 24, each fourth connection line 24 is electrically connected to the third connection line 23, and the fourth connection lines 24 are connected to the first connection lines 11 in a one-to-one correspondence manner, where N is an integer greater than or equal to 2, one fourth connection line 24 is a second target connection line, the other N-1 fourth connection lines 24 are second non-target connection lines, and in the same row period, the second target connection lines and the third connection lines 23 are always in a conductive state, and N-1 second non-target connection lines and the third connection lines 23 are sequentially in a conductive state. Fig. 8 and 9 are schematic diagrams of m=3 and n=2, and M and N may be other values, for example, m=4 and n=3, which are not limited in this application. It will be appreciated that in the case where m=3 and n=2, one second demultiplexing unit 20 and two first demultiplexing units form a 1:6 demux circuit.

For example, the data signals corresponding to the fourth connection lines 24 themselves may be transmitted to the N fourth connection lines 24 through the third connection line 23 in a time sharing manner. It can be understood that the data signal corresponding to the fourth connection line 24 is the data signal corresponding to the data line d connected to the fourth connection line 24.

For example, the two fourth connection lines 24 are a fourth connection line 241 and a fourth connection line 242, respectively. The fourth connection line 241 is electrically connected to the second connection line 121, the second connection line 122, and the second connection line 123, and the fourth connection line 241 is electrically connected to the second connection line 124, the second connection line 125, and the second connection line 126, and the second connection line 121, the second connection line 122, the second connection line 123, the second connection line 124, the second connection line 125, and the second connection line 126 are respectively connected to the data line d1, the data line d2, the data line d3, the data line d4, the data line d5, and the data line d 6. The data signals corresponding to the fourth connection line 241 include data signals corresponding to the data lines d1, d2 and d3, and the data signals corresponding to the fourth connection line 242 include data signals corresponding to the data lines d4, d5 and d 6.

For example, the second target connection line and the third connection line 23 are always in a conductive state, and the N-1 second non-target connection lines and the third connection line 23 are sequentially in a conductive state in the same row period by different setting manners. For example, each of the N fourth connection lines 24 and the third connection line 23 is connected by one switching element, and one of the switching elements is set as a switching element which is normally open in the same row period. For another example, one of the fourth connection lines 24 may be directly connected to the third connection line 23, and the other M-1 fourth connection lines 24 may be connected to the third connection line 23 through a switching element.

For better understanding of the technical effects of the present application, reference is made to fig. 10 and 11, and the points of the similarity between fig. 10 and 8 are not repeated, but the difference is that N second switching elements T2 'in the second multiplexing unit 20' are sequentially turned on in the same row period. Taking n=2, the on level of the second switching element T2' is a low level, for example, in the same row period, the second switching control lines CKH4', CKH5' sequentially output the low level, and the on sequence of the second switching element T2' in the second multiplexing unit 20' is that the second switching element T21' is turned on first, then the second switching element T22' is turned on, the data signal corresponding to the fourth connection line 241 is transmitted to the fourth connection line 241 first, and then the data signal corresponding to the fourth connection line 242 is transmitted to the fourth connection line 242.

Taking the turn-on sequence of the first switching element T1 'in the first multiplexing unit 10' as the first switching elements T111 'and T114' are turned on first, then the first switching elements T112 'and T115' are turned on, and the first switching elements T113 'and T116' are turned on last, for example, firstly the data signal corresponding to the data line d1 is charged on the data line d1, then the data signal corresponding to the data line d2 is charged on the data line d2, then the data signal corresponding to the data line d3 is charged on the data line d3, then the data signal corresponding to the data line d4 is charged on the data line d4, then the data signal corresponding to the data line d5 is charged on the data line d5, and finally the data signal corresponding to the data line d6 is charged on the data line d 6.

As described above, the data signal on the data line d is held by the parasitic capacitance, and when the scanning signal on the scan line S is at an active level, the data signal on the data line d is written into the sub-pixel PX. For example, the duration of the data signal waiting scan signal on the data line d1 being at the active level is t1, the duration of the data signal waiting scan signal on the data line d2 being at the active level is t2, the duration of the data signal waiting scan signal on the data line d3 being at the active level is t3, the duration of the data signal waiting scan signal on the data line d4 being at the active level is t4, the duration of the data signal waiting scan signal on the data line d5 being at the active level is t5, the duration of the data signal waiting scan signal on the data line d6 being at the active level is t6, t1 > t2 > t3 > t4 > t5 > t6, the leakage degree of the data lines d1, d2, d3, d4, d5, d6 is different, the data signals written to the sub-pixels PX corresponding to the data lines d1, d2, d3, d4, d5, d6, respectively, is different, and the display panel is uneven.

In the embodiment of the present application, one of the fourth connection lines 24 and the third connection line 23 are always in a conductive state in the same row period, and the other N-1 fourth connection lines 24 and the third connection line 23 are sequentially in a conductive state.

On the other hand, when each of the fourth connection lines 24 is electrically connected to the third connection line 23 through one switching element, one of the switching elements may be set to be a normally open switching element, and the switching elements corresponding to the different fourth connection lines 24 may be set to be normally open switching elements in different row periods or different frame periods, as shown in fig. 12, for example, when the switching elements corresponding to the

second connection lines

123 and 126 are set to be normally open switching elements, the

second connection lines

123 and 126 are first target connection lines, the

second connection lines

121, 122, 124 and 125 are first non-target connection lines, the

second connection lines

121 and 122 are sequentially in a conductive state with the first connection line 11, and the

second connection lines

124 and 125 are also sequentially in a conductive state with the first connection line 11. For example, the

second connection lines

121 and 124 are in a conductive state with the first connection line 11, and then the

second connection lines

122 and 125 are in a conductive state with the first connection line 11. In the 1 st row period, the switching element corresponding to the fourth connection line 242 may be set as a normally open switching element, that is, in the 1 st row period, the fourth connection line 242 is the second target connection line, the fourth connection line 242 and the third connection line 23 are always in a conducting state, and the fourth connection line 241 is the second non-target connection line, then the data signal corresponding to the data line d1 itself is charged onto the data line d1, then the data signal corresponding to the data line d2 itself is charged onto the data line d2, then the data signal corresponding to the data line d3 itself is charged onto the data line d3, then the data signal corresponding to the data line d4 itself is charged onto the data line d4, then the data signal corresponding to the data line d5 itself is charged onto the data line d5, and finally the data signal corresponding to the data line d6 itself is charged onto the data line d 6. In the 2 nd row period, the fourth connection line 241 is the second target connection line, the fourth connection line 241 and the third connection line 23 are always in the on state, and the fourth connection line 242 is the second non-target connection line, then the data signal corresponding to the data line d4 is first charged to the data line d4, then the data signal corresponding to the data line d5 is charged to the data line d5, then the data signal corresponding to the data line d6 is charged to the data line d6, then the data signal corresponding to the data line d1 is charged to the data line d1, then the data signal corresponding to the data line d2 is charged to the data line d2, and finally the data signal corresponding to the data line d3 is charged to the data line d 3. The order of filling the data signals on the data lines d1, d2, d3, d4, d5, d6 in the 3 rd line period may be the same as the order shown in the 1 st line period, and the order of filling the data signals on the data lines d1, d2, d3, d4, d5, d6 in the 4 th line period may be the same as the order shown in the 2 nd line period.

In addition, the sequence of filling the data lines d1, d2, d3, d4, d5, d6 in the 1 st, 2 nd, 3 rd, and 4 th frame periods shown in fig. 13 may be the same as the sequence shown in the 1 st, 2 nd, 3 rd, and 4 th line periods shown in fig. 12, respectively, and will not be repeated here. Therefore, the embodiment of the application can make the sequence of filling the data signals on the data lines d1, d2, d3, d4, d5 and d6 not be the same sequence in different row periods or different frame periods, so that the leakage degree difference caused by different time of filling the data signals on the data lines d1, d2, d3, d4, d5 and d6 can be balanced, and the problem of uneven display of the display panel is solved.

On the other hand, in the case where one of the fourth connection lines 24 is directly connected to the third connection line 23 and the other N-1 fourth connection lines 24 are connected to the third connection line 23 by one switching element, each of the second multiplexing units 20 may be provided with one less switching element, so that the number of switching elements can be reduced, and the number of control lines for controlling the switching elements to be turned on and off can be reduced, and the area occupied by the second multiplexing units 20 can be reduced, so that the non-display area NA can be further set narrower, and a narrow frame can be more easily realized.

In some alternative embodiments, different fourth connection lines 24 of the N fourth connection lines 24 are in turn second target connection lines during at least two adjacent line periods or during at least two adjacent frame periods.

For example, the fourth connection line 242 may be set as the second target connection line in the 1 st row period or in the 1 st frame period; the fourth connection line 241 may be set to the second target connection line in the 2 nd row period or in the 2 nd frame period, and so on. The foregoing are merely examples and are not intended to limit the present application.

As described above, by selecting different fourth connection lines 24 from the N fourth connection lines 24 to be the second target connection lines in sequence in different row periods or in different frame periods, the order of filling the data signals on the data lines d1, d2, d3, d4, d5, d6 connected to the second demultiplexer 20 is not the same in different row periods or in different frame periods, so that the difference of the leakage degree due to the difference of the time of filling the data signals on the data lines d1, d2, d3, d4, d5, d6 can be balanced, thereby improving the problem of uneven display of the display panel.

In some alternative embodiments, the input time of the data signal corresponding to the second target connection line is after the input time of the data signal corresponding to the second non-target connection line in the same row period.

For example, in the 1 st row period or in the 1 st frame period, the fourth link line 242 is set as the second target link line, the fourth link line 242 is set as the second non-target link line, and the input time of the data signal corresponding to the fourth link line 242 itself is after the input time of the data signal corresponding to the fourth link line 241 itself. Since the second target connection line and the third connection line 23 are always in the on state in the same row period, if the input time of the data signal corresponding to the fourth connection line 242 is before the input time of the data signal corresponding to the fourth connection line 241, the data signal corresponding to the fourth connection line 242 is replaced by the data signal corresponding to the fourth connection line 241.

In some alternative embodiments, as shown in fig. 8, each of the second multiplexing units 20 may include N second switching elements T2, and each of the fourth data lines 24 is electrically connected to the third connection line 23 through one second switching element T2.

One of the second switching elements T2 may be set to be a normally open switching element in the same row period, so that the second target connection line and the third connection line 23 are always in a conductive state in the same row period, and the other N-1 second switching elements are sequentially turned on in the same row period, so that the N-1 second non-target connection lines and the third connection line 23 are sequentially in a conductive state in the same row period. It can be understood that the fourth connection line 24 connected to the normally open second switching element T2 is a second target connection line, and the fourth connection line 24 connected to the sequentially turned-on second switching element T2 is a second non-target connection line. In addition, since the second switching elements T2 are connected to each of the fourth connection lines 24, different second switching elements T2 may be selected as normally-open switching elements in different row periods or in different frame periods.

The second switching element T2 includes T21, T22, the second switching element T21 is connected to the fourth connection line 241, and the second switching element T22 is connected to the fourth connection line 242. The display panel 100 may further include second switch control lines CKH4 and CKH5, where the second switch control lines CKH4 and CKH5 are respectively connected to the control ends of the second switch elements T21 and T22, and signals transmitted by the second switch control lines CKH4 and CKH5 are respectively used for controlling the on and off of the second switch elements T21 and T22.

The fourth connection line 241 and the second connection line 121 are electrically connected to each other by the first switching element T111, the fourth connection line 241 and the second connection line 122 are electrically connected to each other by the first switching element T112, the fourth connection line 241 and the second connection line 123 are electrically connected to each other by the first switching element T113, the fourth connection line 242 and the second connection line 124 are electrically connected to each other by the first switching element T114, the fourth connection line 242 and the second connection line 125 are electrically connected to each other by the first switching element T115, and the fourth connection line 242 and the second connection line 126 are electrically connected to each other by the first switching element T116.

Illustratively, in the same row period, the second switching element T2 electrically connected to the second target connection line is always in a conductive state, and the second switching elements T2 electrically connected to the N-1 second non-target connection lines are sequentially in a conductive state.

For example, the second switching elements T21, T22 may be turned on at a low level and turned off at a high level. Referring to fig. 8, 12 and 13 in combination, in the 1 st row period or in the 1 st frame period, the fourth connection line 242 is a second target connection line, and the fourth connection line 241 is a second non-target connection line, so that the second switching element T22 can be controlled to be always kept in a conductive state, and the second switching element T21 is controlled to be in a conductive state in a short time; in the 2 nd row period or the 2 nd frame period, the fourth connection line 241 is a second target connection line, and the fourth connection line 242 is a second non-target connection line, so that the second switching element T21 can be controlled to be always kept in a conductive state, and the second switching element T22 can be controlled to be in a conductive state in a short time.

In still other alternative embodiments, as shown in fig. 9, each second multiplexing unit 20 may include N-1 second switching elements T2, and the other N-1 fourth connection lines 24 are electrically connected to the third connection line 23 through one second switching element T2, and the other fourth connection line 24 is directly connected to the third connection line 23. It can be understood that the N-1 fourth connection line 24 to which the second switching element T2 is connected is a second non-target connection line, and the other fourth connection line 24 to which the second switching element T2 is not connected is a second target connection line.

Illustratively, N-1 second switching elements T2 are sequentially in an on state during the same row period.

For example, the fourth connection line 242 is a second target connection line, the fourth connection line 241 is a second non-target connection line, the fourth connection line 241 is electrically connected to the third connection line 23 through the second switching element T21, the fourth connection line 242 is directly connected to the third connection line 23, and the second switching element T21 is controlled to be on in a short time by the second switching control line CKH1 in the same row period as shown in fig. 14.

In some alternative embodiments, as shown in fig. 15 or 16, m=4, n=3. It will be appreciated that in the case of m=4 and n=3, one second demultiplexing unit 20 and three first demultiplexing units form a 1:12 demux circuit.

As shown in fig. 15, the three fourth connection lines 24 may be electrically connected to the third connection line 23 through one second switching element T2 each; alternatively, as shown in fig. 16, two fourth connection lines 24 of the three fourth connection lines 24 may be electrically connected to the third connection line 23 through one second switching element T2 each, and the other fourth connection line 24 may be directly connected to the third connection line 23. In the case where m=4 and n=3, the display panel may be driven according to the driving procedure described in the above embodiment, and detailed description thereof is omitted.

In some alternative embodiments, as shown in fig. 8 or 9, the display panel 100 may further include a driving chip IC, and the third connection line 23 may be directly bonded to the driving chip IC. The third connection line 23 may also be referred to herein as a fanout line or fanout line.

For example, a plurality of binding terminals may be disposed at the non-display area NA of the display panel 100, the plurality of binding terminals being connected to the plurality of third connection lines 23 in one-to-one correspondence, and further, the driving chip IC may be bound to the display panel through the binding terminals.

The display panel 100 of the embodiment of the present application may be a liquid crystal display panel or an organic light emitting diode display panel.

It should be noted that, in the case of no contradiction, the embodiments of the present application may be combined with each other.

The application also provides a display device comprising the display panel. Referring to fig. 17, fig. 17 is a schematic structural diagram of a display device according to an embodiment of the present disclosure. Fig. 17 provides a display device 1000 including a display panel 100 provided in any of the above embodiments of the present application. The embodiment of fig. 17 is only an example of a mobile phone, and the display device 1000 is described, and it is to be understood that the display device provided in the embodiment of the present application may be a wearable product, a computer, a television, a vehicle-mounted display device, or other display devices with display functions, which is not particularly limited in this application. The display device provided in the embodiment of the present application has the beneficial effects of the display panel provided in the embodiment of the present application, and specific descriptions of the display panel in the above embodiments may be referred to specifically, and the embodiments are not repeated here.

These embodiments are not all details described in detail in accordance with the embodiments described hereinabove, nor are they intended to limit the application to the specific embodiments described. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention and various modifications as are suited to the particular use contemplated. This application is to be limited only by the claims and the full scope and equivalents thereof.

Claims

1. A display panel, comprising:

the first multiplexing units comprise a first connecting line and M second connecting lines, each second connecting line is electrically connected with the first connecting line, M is an integer greater than or equal to 2, one second connecting line is a first target connecting line, and the other M-1 second connecting lines are first non-target connecting lines;

in the same row period, the first target connecting line and the first connecting line are always in a conducting state, and M-1 first non-target connecting lines and the first connecting line are sequentially in a conducting state;

in the same row period, the input time of the data signal corresponding to the first target connecting line is after the input time of the data signal corresponding to the first non-target connecting line.

2. The display panel of claim 1, wherein different ones of the M second connection lines are the first target connection lines in turn in at least two adjacent line periods.

3. The display panel of claim 1, wherein different ones of the M second connection lines are the first target connection lines in turn during at least two adjacent frame periods.

4. A display panel according to any one of claims 1 to 3, wherein the first multiplexing unit further comprises M first switching elements, and each of the second connection lines is electrically connected to the first connection line through one of the first switching elements.

5. The display panel according to claim 4, wherein the first switching elements electrically connected to the first target connection lines are always in a conductive state and the first switching elements electrically connected to M-1 first non-target connection lines are sequentially in a conductive state in the same row period.

6. The display panel according to claim 1, wherein each of the first multiplexing units further includes M-1 first switching elements, and M-1 second connection lines are electrically connected to the first connection lines through one of the first switching elements, respectively.

7. The display panel according to claim 6, wherein M-1 of the first switching elements are sequentially in an on state in the same row period.

8. The display panel according to claim 1, further comprising a plurality of second multi-path distribution units, wherein each second multi-path distribution unit comprises a third connection line and N fourth connection lines, each fourth connection line is electrically connected to the third connection line, and the fourth connection lines are connected to the first connection lines in a one-to-one correspondence manner, wherein N is an integer greater than or equal to 2, one of the fourth connection lines is a second target connection line, the other N-1 fourth connection lines are second non-target connection lines, the second target connection lines and the third connection lines are always in a conductive state, and the N-1 second non-target connection lines and the third connection lines are sequentially in a conductive state within a same row period.

9. The display panel of claim 8, wherein different ones of the N fourth connection lines are the second target connection lines in turn during at least two adjacent line periods.

10. The display panel of claim 8, wherein different ones of the N fourth connection lines are the second target connection lines in turn during at least two adjacent frame periods.

11. The display panel according to claim 8, wherein the input time of the data signal corresponding to the second target link line itself is after the input time of the data signal corresponding to the second non-target link line itself in the same line period.

12. The display panel according to any one of claims 8 to 11, wherein each of the second multiplexing units further includes N second switching elements, and each of the fourth connection lines is electrically connected to the third connection line through one of the second switching elements.

13. The display panel according to claim 12, wherein the second switching elements electrically connected to the second target connection lines are always in an on state and the second switching elements electrically connected to N-1 second non-target connection lines are sequentially in an on state in the same row period.

14. The display panel according to claim 8 or 11, wherein each of the second multiplexing units further comprises N-1 second switching elements, and the other N-1 fourth connection lines are electrically connected to the third connection lines through one of the second switching elements, respectively.

15. The display panel according to claim 14, wherein N-1 of the second switching elements are sequentially in an on state in the same row period.

16. The display panel according to claim 1, wherein the display panel comprises a display area, a plurality of data lines are disposed in the display area, and the second connection lines are electrically connected to at least one of the data lines.

17. The display panel of claim 1, further comprising a driver chip, wherein the first connection line is directly bonded to the driver chip.

18. The display panel according to claim 1, further comprising a plurality of scan lines, wherein a start time of a scan signal on the scan lines being an active level is after an input time of a data signal corresponding to the second connection line itself in the same line period.

19. A display device comprising the display panel according to any one of claims 1 to 18.