CN113380174A

CN113380174A - Display panel and display device

Info

Publication number: CN113380174A
Application number: CN202110645682.1A
Authority: CN
Inventors: 张蒙蒙
Original assignee: Shanghai Tianma AM OLED Co Ltd
Current assignee: Wuhan Tianma Microelectronics Co Ltd
Priority date: 2021-06-09
Filing date: 2021-06-09
Publication date: 2021-09-10
Anticipated expiration: 2041-06-09
Also published as: CN113380174B

Abstract

The application discloses a display panel and a display device. The display panel comprises a plurality of first multi-path distribution units, each first multi-path distribution unit comprises a first connecting line and M second connecting lines, each second connecting line is electrically connected with the first connecting line, M is an integer larger than or equal to 2, one second connecting line is a first target connecting line, and the other M-1 second connecting lines are first non-target connecting lines; in the same line period, the first target connecting line and the first connecting line are always in a conducting state, and the M-1 first non-target connecting lines and the first connecting line are sequentially in a conducting state. According to the embodiment of the application, the setting of the multi-way distributor can be more reasonable.

Description

Display panel and display device

Technical Field

The application relates to the technical field of display, in particular to a display panel and a display device.

Background

In order to reduce the cost, it is desirable to reduce the number of output channels of the data driving circuit. For example, a demultiplexer (Demux) is used in a display panel, for example, to connect two data lines to one data signal input terminal and one data signal input terminal to one output channel of a data driving circuit through the demultiplexer, so that the output channel of the data driving circuit can be reduced to one half.

However, as display technology has developed, it is desirable to be able to more rationally arrange the demultiplexer to meet different requirements.

Disclosure of Invention

The application provides a display panel and a display device, which can enable a multi-channel distributor to be arranged more reasonably.

In a first aspect, an embodiment of the present application provides a display panel, which includes: the first multi-path distribution units comprise a first connecting line and M second connecting lines, and each second connecting line is electrically connected with the first connecting line, wherein M is an integer greater than or equal to 2, one second connecting line is a first target connecting line, and the other M-1 second connecting lines are first non-target connecting lines; in the same line period, the first target connecting line and the first connecting line are always in a conducting state, and the M-1 first non-target connecting lines and the first connecting line are sequentially in a conducting state.

In a second aspect, based on the same inventive concept, embodiments of the present application provide a display device, which includes the display panel as in the first aspect.

According to the display panel and the display device provided by the embodiment of the application, one of the second connecting lines and the first connecting line are always in a conducting state in the same row period, and the other M-1 second connecting lines and the first connecting line are sequentially in a conducting state, so that different second connecting lines can be selected as first target connecting lines, the sequence of the data signals charged into the data lines is not the same in different row periods or different frame periods, the difference of electric leakage degrees caused by different time of charging the data signals into the data lines can be balanced, and the problem of uneven display of the display panel is solved.

Drawings

Other features, objects, and advantages of the present application will become apparent from the following detailed description of non-limiting embodiments thereof, when read in conjunction with the accompanying drawings, in which like reference characters designate the same or similar parts throughout the figures thereof, and which are not to scale.

Fig. 1 illustrates a schematic structural diagram of a display panel according to an embodiment of the present application;

fig. 2 is a schematic structural diagram of a display panel according to another embodiment of the present application;

fig. 3 is a schematic view showing a structure of a display panel provided by a comparative example;

FIG. 4 shows a timing diagram of FIG. 3;

FIG. 5 shows a timing diagram of FIG. 1;

FIG. 6 shows another timing diagram of FIG. 1;

FIG. 7 shows a timing diagram of FIG. 2;

fig. 8 to 9 are schematic structural diagrams of display panels according to still other embodiments of the present disclosure;

fig. 10 is a schematic view showing a structure of a display panel provided by another comparative example;

FIG. 11 shows a timing diagram of FIG. 10;

FIG. 12 shows a timing diagram of FIG. 8;

FIG. 13 shows another timing diagram of FIG. 8;

FIG. 14 shows a timing diagram of FIG. 9;

fig. 15 to 16 are schematic structural diagrams of display panels provided in further embodiments of the present application;

fig. 17 is a schematic structural diagram of a display device according to an embodiment of the present application.

Detailed Description

Features and exemplary embodiments of various aspects of the present application will be described in detail below, and in order to make objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application. It will be apparent to one skilled in the art that the present application may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present application by illustrating examples thereof.

It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.

It will be understood that when a layer, region or layer is referred to as being "on" or "over" another layer, region or layer in describing the structure of the component, it can be directly on the other layer, region or layer or intervening layers or regions may also be present. Also, if the component is turned over, one layer or region may be "under" or "beneath" another layer or region.

Features and exemplary embodiments of various aspects of the present application will be described in detail below. Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

The embodiment of the invention provides a display panel and a display device. The display panel and the display device according to the embodiments of the present application are described in detail below with reference to the accompanying drawings.

As shown in fig. 1 or 2, the display panel 100 may include a display area AA and a non-display area NA at least at one side of the display area AA. The display area AA is provided with a plurality of data lines d and a plurality of scan lines S, the scan lines S extend along a first direction X, and the data lines d extend along a second direction Y.

The display panel 100 further includes a plurality of pixel units PU arranged in an array. For example, each pixel unit PU may include sub-pixels PX of multiple colors, which is illustrated in the drawings of the present application as each pixel unit PU includes sub-pixels PX of three colors. Alternatively, each pixel unit PU may include a first sub-pixel PX1, a second sub-pixel PX2, and a third sub-pixel PX 3. For example, the first sub-pixel PX1 may be a red sub-pixel, the second sub-pixel PX2 may be a green sub-pixel, and the third sub-pixel PX3 may be a blue sub-pixel, which is not limited to the present application.

The display panel 100 further includes a plurality of first multiplexing units 10, each of the first multiplexing units 10 may include a first connection line 11 and M second connection lines 12, each of the second connection lines 12 is electrically connected to the first connection line 11, and M is an integer greater than or equal to 2. One of the second connection lines 12 is a first target connection line, and the other M-1 second connection lines 12 are first non-target connection lines, and in the same line period, the first target connection line and the first connection line 11 are always in a conducting state, and the M-1 first non-target connection lines and the first connection line 11 are sequentially in a conducting state. In fig. 1 and 2, M is illustrated as 3, M may also be 2, 6, 12, and the like, and embodiments of the present invention do not limit the specific numerical values. It is understood that in the case of M ═ 3, the first demultiplexing unit 10 can be understood as a 1:3 demux circuit.

For example, the second connection line 12 may be electrically connected to at least one data line d. For example, the second connection line 12 may be electrically connected to one data line d correspondingly. It is understood that the sub-pixels PX are electrically connected to the data lines d and the scan lines S, which respectively provide the data signals and the scan signals to the sub-pixels PX. The drawings herein show exemplary first row of pixel units PU corresponding to scan line S1, second row of pixel units PU corresponding to scan line S2, third row of pixel units PU corresponding to scan line S3, fourth row of pixel units PU corresponding to scan line S4, and so on.

For example, the data signals corresponding to the second connection lines 12 themselves may be time-shared and transmitted to the M second connection lines 12 through the first connection lines 11. It can be understood that the data signal corresponding to the second connection line 12 is the data signal corresponding to the data line d connected to the second connection line 12, and the data signal corresponding to the data line d is the data signal corresponding to the sub-pixel PX connected to the data line d.

For example, when M is 3, the three second connection lines 12 are respectively the second connection line 121, the second connection line 122 and the second connection line 123, the second connection line 121 is connected to the data line d1, the second connection line 122 is connected to the data line d2, and the second connection line 123 is connected to the data line d 3. The data line d1 is electrically connected to the first sub-pixel PX1 in the first row of pixel units PU, the data line d2 is electrically connected to the second sub-pixel PX2 in the first row of pixel units PU, and the data line d3 is electrically connected to the third sub-pixel PX3 in the first row of pixel units PU. In the process of providing the data signals to the sub-pixels of the first row of pixel units PU through the first multiplexing unit 10, the data signal corresponding to the second connection line 121 is the data signal corresponding to the first sub-pixel PX1, the data signal corresponding to the second connection line 122 is the data signal corresponding to the second sub-pixel PX2, and the data signal corresponding to the second connection line 123 is the data signal corresponding to the third sub-pixel PX 3.

For example, in the same line period, the first target connection line and the first connection line 11 may be in a conducting state all the time, and the M-1 first non-target connection lines and the first connection line 11 may be in a conducting state sequentially. For example, the M second connection lines 12 and the first connection line 11 are each connected by one switching element, and one of the switching elements is set as a switching element that is normally open in the same row period. For another example, one of the second connection lines 12 may be directly connected to the first connection line 11, and the other M-1 second connection lines 12 may be connected to the first connection line 11 through a switching element.

For better understanding of the technical effects of the present application, referring to fig. 3 and fig. 4, the same points in fig. 3 as fig. 1 are not repeated, except that M first switching elements T1 'in the first demultiplexing unit 10' are sequentially turned on in the same row period. Taking M as 3, the on level of the first switch element T1 ' is low, for example, in the same row period, the switch control lines CKH1 ', CKH2 ', CKH3 ' sequentially output low levels, and the first switch element T1 ' in the first multiplexing unit 10 ' is turned on in the order that the first switch element T11 ' is turned on first, then the first switch element T12 ' is turned on, and the first switch element T13 ' is turned on last, so that the data signal corresponding to the data line d1 itself is charged to the data line d1 first, then the data signal corresponding to the data line d2 itself is charged to the data line d2, and finally the data signal corresponding to the data line d3 itself is charged to the data line d 3. The data line d and other structures of the display panel form a parasitic capacitor, the data signal on the data line d is held by the parasitic capacitor, and when the scanning signal on the line S to be scanned is at an active level, the data signal on the data line d is written into the subpixel PX. However, the data line d has a certain leakage, and the data lines d1, d2, and d3 have different charging times of the data signals, and the data signal waiting time periods on the data lines d1, d2, and d3 are different, for example, the data signal waiting time period on the data line d1 is t1, the data signal waiting time period on the data line d2 is t2, the data signal waiting time period on the data line d3 is t3, and t1 > t2 > t3, so that the leakage degrees of the data lines d1, d2, and d3 are different, and further the data signals written into the sub-pixels PX corresponding to the data lines d1, d2, and d3 are different, thereby causing display unevenness of the display panel.

According to the embodiment of the present application, one of the second connection lines 12 and the first connection line 11 are always in a conducting state, and the other M-1 second connection lines 12 and the first connection line 11 are sequentially in a conducting state in the same line period.

On one hand, in the case that each of the second connection lines 12 is electrically connected to the first connection line 11 through one switch element, one of the switch elements may be set as a normally open switch element in the same row period, and the switch elements corresponding to different second connection lines 12 may be set as normally open switch elements in different row periods, or at least two consecutive row periods, or in different frame periods, or at least two consecutive frame periods, as shown in fig. 5, in the row 1 period, the switch element corresponding to the second connection line 123 may be set as a normally open switch element, and the switch elements corresponding to the

second connection lines

121 and 122 may be set to be sequentially opened. That is, in the row 1 period, the second connection line 123 is a first target connection line, the second connection line 123 and the first connection line 11 are always in a conducting state, the

second connection lines

121 and 122 are first non-target connection lines, and the

second connection lines

121 and 122 and the first connection line 11 are sequentially in a conducting state. For example, when the second connection line 121 and the first connection line 11 are first in a conducting state, and then the second connection line 122 and the first connection line 11 are in a conducting state, the data signal corresponding to the data line d1 is firstly charged to the data line d1, then the data signal corresponding to the data line d2 is secondly charged to the data line d2, and finally the data signal corresponding to the data line d3 is thirdly charged to the data line d 3. In the row 2 period, the second connection line 121 is a first target connection line, the second connection line 121 and the first connection line 11 are always in a conducting state, the

second connection lines

122 and 123 are first non-target connection lines, and the

second connection lines

122 and 123 and the first connection line 11 are sequentially in a conducting state. For example, when the second connection line 122 is first in a conducting state with the first connection line 11, and then the second connection line 123 is in a conducting state with the first connection line 11, the data signal corresponding to the data line d2 is firstly charged to the data line d2, then the data signal corresponding to the data line d3 is charged to the data line d3, and finally the data signal corresponding to the data line d1 is charged to the data line d 1. In the row 3 period, the second connection line 122 is a first target connection line, and the

second connection lines

121 and 123 are first non-target connection lines. For example, when the second connection line 123 is first in a conducting state with the first connection line 11, and then the second connection line 121 is in a conducting state with the first connection line 11, the data signal corresponding to the data line d3 is firstly charged to the data line d3, then the data signal corresponding to the data line d1 is charged to the data line d1, and finally the data signal corresponding to the data line d2 is charged to the data line d 2. The order of charging the data signals on the data lines d1, d2, d3 in the 4 th row period may be the same as the order shown in the 1 st row period.

In addition, the sequence of charging the data signals into the data lines d1, d2, and d3 in the 1 st frame period, the 2 nd frame period, the 3 rd frame period, and the 4 th frame period shown in fig. 6 may be the same as the sequence of charging the data signals into the data lines d1, d2, and d3 in the 1 st frame period, the 2 nd frame period, the 3 rd frame period, and the 4 th frame period shown in fig. 5, and will not be described again. Therefore, the sequence of charging the data signals into the data lines d1, d2 and d3 is no longer the same in different row periods or different frame periods, so that the difference of the leakage degrees caused by the different charging times of the data signals into the data lines d1, d2 and d3 can be balanced, and the problem of display unevenness of the display panel is solved.

On the other hand, in the case where one of the second connection lines 12 is directly connected to the first connection line 11, and the other M-1 second connection lines 12 are connected to the first connection line 11 through one switching element, each of the first demultiplexing units 10 may have one less switching element, so that the number of switching elements may be reduced, the number of control lines for controlling the switching elements to be turned on and off may be reduced, and the area occupied by the first demultiplexing unit 10 may be reduced, so that the non-display area NA may be set narrower, and a narrow bezel may be more easily implemented.

In some optional embodiments, different second connection lines 12 may be selected to be the first target connection line in sequence among the M second connection lines 12 in at least two adjacent row periods or in at least two adjacent frame periods. For example, in the 1 st row period or in the 1 st frame period, the second connection line 123 may be set as a first target connection line; in the 2 nd row period or in the 2 nd frame period, the second connection line 121 may be set as a first target connection line; in the 3 rd row period or in the 3 rd frame period, the second connection line 122 may be set as the first target connection line; in the 4 th row period or in the 4 th frame period, the second connection line 123 may be set as the first target connection line, and so on. The foregoing are merely some examples and are not intended to limit the present disclosure.

As described above, different second connection lines 12 can be selected from the M second connection lines 12 to be the first target connection line in sequence in different row periods or different frame periods, so that the sequence of charging the data signals into the data lines d1, d2, and d3 connected to the first demultiplexing unit 10 is no longer the same in different row periods or different frame periods, and thus the difference in the leakage degree caused by the different charging times of the data signals into the data lines d1, d2, and d3 can be balanced, thereby improving the problem of display unevenness of the display panel.

In some optional embodiments, the input time of the data signal corresponding to the first target connection line is later than the input time of the data signal corresponding to the first non-target connection line in the same line period.

For example, in the 1 st line period or in the 1 st frame period, the second connection line 123 is set as a first target connection line, the

second connection lines

121 and 122 are set as first non-target connection lines, and the input time of the data signal corresponding to the second connection line 123 itself is later than the input time of the data signal corresponding to the

second connection lines

121 and 122 itself. Since the first target connection line and the first connection line 11 are always in a conducting state in the same line period, if the input time of the data signal corresponding to the second connection line 123 is before the input time of the data signal corresponding to the

second connection line

121, 122, the data signal corresponding to the second connection line 123 is replaced by the data signal corresponding to the

second connection line

121, 122, which is input later.

In some alternative embodiments, as shown in fig. 5, the start time of the active level of the scan signal on the scan lines S1, S2, S3, S4, etc. is after the input time of the data signal corresponding to the second connection line 12 itself in the same line period. That is, the data signals are first charged onto the corresponding second connection lines 12, and then the data signals on the second connection lines 12 are written into the sub-pixels when the scan signals on the scan lines S1, S2, S3, and S4 are active. This manner of charging the data signal may also be referred to as "line charging". The line charging method has an advantage in that the charging time of the controlled columns of sub-pixels connected by the first multiplexing unit 10 is uniform, thereby further improving the display uniformity.

In some alternative embodiments, as shown in fig. 1, the first demultiplexing unit 10 may include M first switching elements T1, and each of the second connection lines 12 is electrically connected to the first connection line 11 through one first switching element T1. One of the first switch elements T1 may be set as a normally open switch element in the same row period, so that the first target connection line and the first connection line 11 are always in a conducting state in the same row period, and the other M-1 switch elements are sequentially conducted in the same row period, so that the M-1 first non-target connection lines and the first connection line 11 are sequentially in a conducting state in the same row period. It is understood that the second connection line 12 connected to the normally-open first switching element T1 is a first target connection line, and the second connection line 12 connected to the sequentially-turned-on first switching element T1 is a first non-target connection line. In addition, since the first switching element T1 is connected to each second connection line 12, a different first switching element T1 may be selected as a normally-open switching element in a different row period or in a different frame period.

Illustratively, the first switching element T1 includes T11, T12 and T13, the first switching element T11 is connected to the second connection line 121, the first switching element T12 is connected to the second connection line 122, and the first switching element T13 is connected to the second connection line 123. The display panel 100 may further include first switch control lines CKH1, CKH2, CKH3, the first switch control lines CKH1, CKH2, CKH3 are respectively connected to control terminals of the first switch elements T11, T12, T13, and signals transmitted by the first switch control lines CKH1, CKH2, CKH3 are respectively used to control on and off of the first switch elements T11, T12, T13.

For example, in the same row period, the first switching element T1 electrically connected to the first target connection line is always in a conductive state, and the first switching elements T1 electrically connected to the M-1 first non-target connection lines are sequentially in a conductive state.

For example, the first switching elements T11, T12, T13 may be turned on at a low level and turned off at a high level. Referring to fig. 1, 5 and 6 in combination, in the 1 st line period or in the 1 st frame period, the second connection line 123 is a first target connection line, the second connection lines 121 and 122 are first non-target connection lines, and the first switching element T13 can be controlled to be always kept in a conducting state, and the first switching elements T11 and T12 are controlled to be in a conducting state in sequence; in the row 2 period or in the frame 2 period, the second connection line 121 is the first target connection line, the second connection lines 122 and 123 are the first non-target connection lines, and the first switching element T11 can be controlled to be always kept in a conducting state, and the first switching elements T12 and T13 are controlled to be in a conducting state in sequence; in the row 3 period or in the 3 rd frame period, the second connection line 122 is the first target connection line, the second connection lines 123 and 121 are the first non-target connection lines, and the first switching element T12 can be controlled to be always kept in a conducting state, and the first switching elements T13 and T11 are controlled to be in a conducting state in sequence; in the 4 th row period or in the 4 th frame period, the second connection line 123 is the first target connection line, the second connection lines 121 and 122 are the first non-target connection lines, and the state of the first switching element in the 4 th row period or the 4 th frame period may be the same as the state of the first switching element shown in the 1 st row period or the 1 st frame period.

In still other alternative embodiments, as shown in fig. 2, the first target connection line and the first connection line 11 may be directly connected, so that the first target connection line and the first connection line 11 are always in a conducting state in the same row period. Illustratively, the first demultiplexing unit 10 may include M-1 first switching elements T1, and M-1 second connection lines 12 are electrically connected to the first connection line 11 through one first switching element T1, respectively, and the other second connection line 12 is directly connected to the first connection line 11. It is understood that the M-1 second connection line 12 to which the first switching element T1 is connected is a first non-target connection line, and the other second connection line 12 to which the first switching element T1 is not connected is a first target connection line.

Illustratively, M-1 first switching elements T1 are sequentially turned on in the same row period.

For example, the second connection line 123 is a first target connection line, the

second connection lines

121 and 122 are first non-target connection lines, the

second connection lines

121 and 122 are electrically connected to the first connection line 11 through the first switching elements T11 and T12, respectively, and the second connection line 123 is directly connected to the first connection line 11. As shown in fig. 7, the first switch elements T11 and T12 may be controlled to be in a turn-on state by the first switch control lines CKH1 and CKH2 in the same row period. For example, the first switching element T11 is controlled to be in a conductive state first, and then the first switching element T12 is controlled to be in a conductive state.

In some alternative embodiments, as shown in fig. 1, the display panel 100 may further include a driving chip IC, and the first connection line 11 may be directly bonded to the driving chip IC. The first connection line 11 may also be referred to herein as a fanout line or fanout line.

For example, a plurality of binding terminals may be disposed in the non-display area NA of the display panel 100, and the plurality of binding terminals are connected to the plurality of first connection lines 11 in a one-to-one correspondence, and further, the driving chip IC may be bound to the display panel through the binding terminals.

In some optional embodiments, as shown in fig. 8 or 9, the display panel 100 further includes a plurality of second multiplexing units 20, each of the second multiplexing units 20 includes a third connection line 23 and N fourth connection lines 24, each of the fourth connection lines 24 is electrically connected to the third connection line 23, and the fourth connection lines 24 are connected to the first connection lines 11 in a one-to-one correspondence manner, where N is an integer greater than or equal to 2, one of the fourth connection lines 24 is a second target connection line, and the other N-1 fourth connection lines 24 are second non-target connection lines, and in the same row period, the second target connection line and the third connection line 23 are always in a conducting state, and the N-1 second non-target connection lines and the third connection lines 23 are sequentially in a conducting state. In fig. 8 and 9, M is 3, N is 2, M and N may be other values, for example, M is 4, N is 3, and the like, which is not limited in the present application. It is understood that in the case of M-3 and N-2, one second demultiplexing unit 20 and two first demultiplexing units form a 1:6 demux circuit.

For example, the data signals corresponding to the fourth connection lines 24 themselves may be time-shared and transmitted to the N fourth connection lines 24 through the third connection lines 23. It can be understood that the data signal corresponding to the fourth connection line 24 is the data signal corresponding to the data line d connected to the fourth connection line 24.

For example, the two fourth connection lines 24 are the fourth connection line 241 and the fourth connection line 242, respectively. The fourth connection line 241 is electrically connected to the second connection line 121, the second connection line 122, and the second connection line 123, the fourth connection line 241 is electrically connected to the second connection line 124, the second connection line 125, and the second connection line 126, and the second connection line 121, the second connection line 122, the second connection line 123, the second connection line 124, the second connection line 125, and the second connection line 126 are respectively connected to the data line d1, the data line d2, the data line d3, the data line d4, the data line d5, and the data line d 6. The data signals corresponding to the fourth connection line 241 include data signals corresponding to the data line d1, the data line d2 and the data line d3, and the data signals corresponding to the fourth connection line 242 include data signals corresponding to the data line d4, the data line d5 and the data line d 6.

For example, in the same line period, the second target connection line and the third connection line 23 may be always in a conducting state, and the N-1 second non-target connection lines and the third connection line 23 are sequentially in a conducting state. For example, the N fourth connection lines 24 and the third connection line 23 are each connected by one switching element, and one of the switching elements is set as a switching element that is normally open in the same row period. For another example, one of the fourth connection lines 24 and the third connection line 23 may be directly connected, and the other M-1 fourth connection lines 24 and the third connection line 23 may be connected by one switching element.

For better understanding of the technical effects of the present application, referring to fig. 10 and fig. 11, the same points of fig. 10 and fig. 8 are not repeated, except that the N second switching elements T2 'in the second demultiplexing unit 20' are sequentially turned on in the same row period. Taking N as 2, the conduction level of the second switch element T2 ' is low, for example, in the same row period, the second switch control lines CKH4 ' and CKH5 ' sequentially output low levels, the conduction order of the second switch element T2 ' in the second multiplexing unit 20 ' is that the second switch element T21 ' is turned on first, then the second switch element T22 ' is turned on, the data signal corresponding to the fourth connection line 241 itself is transmitted to the fourth connection line 241, and then the data signal corresponding to the fourth connection line 242 itself is transmitted to the fourth connection line 242.

Taking the turn-on sequence of the first switch element T1 'in the first multiplexing unit 10' as the first switch elements T111 'and T114' are turned on first, then the first switch elements T112 'and T115' are turned on, and the first switch elements T113 'and T116' are turned on last, first, the data signal corresponding to the data line d1 itself is charged to the data line d1, then the data signal corresponding to the data line d2 itself is charged to the data line d2, then the data signal corresponding to the data line d3 itself is charged to the data line d3, then the data signal corresponding to the data line d4 itself is charged to the data line d4, then the data signal corresponding to the data line d5 itself is charged to the data line d5, and finally the data signal corresponding to the data line d6 itself is charged to the data line d 6.

As described above, the data signal on the data line d is held by the parasitic capacitance, and when the scan signal on the line S to be scanned is at the active level, the data signal on the data line d is written into the sub-pixel PX. For example, the duration of waiting for the scan signal to be active on the data line d1 is t1, the duration of waiting for the scan signal to be active on the data line d2 is t2, the duration of waiting for the scan signal to be active on the data line d3 is t3, the duration of waiting for the scan signal to be active on the data line d4 is t4, the duration of waiting for the scan signal to be active on the data line d5 is t5, the duration of waiting for the scan signal to be active on the data line d6 is t6, t1 > t2 > t3 > t4 > t5 > t6, resulting in differences in leakage levels of the data lines d1, d2, d3, d4, d5, d6, further, the data signals written to the sub-pixels PX corresponding to the data lines d1, d2, d3, d4, d5, and d6 are different, and display unevenness occurs in the display panel.

According to the embodiment of the present application, one of the fourth connection lines 24 and the third connection line 23 are always in a conducting state, and the other N-1 fourth connection lines 24 and the third connection line 23 are sequentially in a conducting state in the same row period.

On the other hand, in the case that each of the fourth connection lines 24 is electrically connected to the third connection line 23 through one switch element, one of the switch elements may be set as a normally open switch element in the same row period, and the switch elements corresponding to different fourth connection lines 24 may be set as normally open switch elements in different row periods or different frame periods, as shown in fig. 12, for example, if the switch elements corresponding to the

second connection lines

123 and 126 are set as normally open switch elements, the

second connection lines

123 and 126 are first target connection lines, the

second connection lines

121, 122, 124, and 125 are first non-target connection lines, the

second connection lines

121 and 122 are in a conducting state with the first connection line 11 in sequence, and the

second connection lines

124 and 125 are also in a conducting state with the first connection line 11 in sequence. For example, the

second connection lines

121 and 124 are first in a conductive state with the first connection line 11, and then the

second connection lines

122 and 125 are in a conductive state with the first connection line 11. In the row 1 period, the switch element corresponding to the fourth connection line 242 may be set as a normally open switch element, that is, in the row 1 period, the fourth connection line 242 is a second target connection line, the fourth connection line 242 and the third connection line 23 are always in a conductive state, the fourth connection line 241 is a second non-target connection line, first, the data signal corresponding to the data line d1 itself is charged onto the data line d1, then, the data signal corresponding to the data line d2 itself is charged onto the data line d2, then, the data signal corresponding to the data line d3 itself is charged onto the data line d3, then, the data signal corresponding to the data line d4 itself is charged onto the data line d4, then, the data signal corresponding to the data line d5 itself is charged onto the data line d5, and finally, the data signal corresponding to the data line d6 itself is charged onto the data line d 6. In the row 2 period, the fourth connection line 241 is the second target connection line, the fourth connection line 241 and the third connection line 23 are always in a conducting state, and the fourth connection line 242 is the second non-target connection line, then the data signal corresponding to the data line d4 itself is charged onto the data line d4, the data signal corresponding to the data line d5 itself is charged onto the data line d5, the data signal corresponding to the data line d6 itself is charged onto the data line d6, the data signal corresponding to the data line d1 itself is charged onto the data line d1, the data signal corresponding to the data line d2 itself is charged onto the data line d2, and the data signal corresponding to the data line d3 itself is charged onto the data line d 3. The data lines d1, d2, d3, d4, d5 and d6 in the row 3 period may be charged with data signals in the same order as those in the row 1 period, and the data lines d1, d2, d3, d4, d5 and d6 in the row 4 period may be charged with data signals in the same order as those in the row 2 period.

In addition, the sequence of charging the data signals into the data lines d1, d2, d3, d4, d5 and d6 in the 1 st frame period, the 2 nd frame period, the 3 rd frame period and the 4 th frame period shown in fig. 13 may be the same as the sequence of charging the data signals into the data lines d1, d2, d3, d4, d5 and d6 in the 1 st row period, the 2 nd row period, the 3 rd row period and the 4 th row period shown in fig. 12, and will not be described herein again. It can be seen that the sequence of charging the data signals on the data lines d1, d2, d3, d4, d5 and d6 is no longer the same in different row periods or different frame periods, so that the difference in the leakage degree caused by the different charging times of the data signals on the data lines d1, d2, d3, d4, d5 and d6 can be balanced, and the problem of display unevenness of the display panel can be improved.

On the other hand, in the case where one of the fourth connection lines 24 is directly connected to the third connection line 23, and the other N-1 fourth connection lines 24 are connected to the third connection line 23 through one switching element, each of the second demultiplexing units 20 may have one less switching element, so that the number of switching elements can be reduced, the number of control lines for controlling the on and off of the switching elements can be reduced, and the area occupied by the second demultiplexing unit 20 can be reduced, thereby further setting the non-display area NA narrower, and facilitating the implementation of a narrow frame.

In some optional embodiments, different ones 24 of the N fourth connection lines 24 are sequentially the second target connection line in at least two adjacent row periods or in at least two adjacent frame periods.

For example, in the 1 st row period or in the 1 st frame period, the fourth connection line 242 may be set as the second target connection line; in the 2 nd row period or in the 2 nd frame period, the fourth connecting line 241 may be set as the second target connecting line, and so on. The foregoing are merely some examples and are not intended to limit the present disclosure.

As described above, by selecting different ones of the N fourth connection lines 24 as the second target connection lines in sequence in different row periods or in different frame periods, the sequence of charging the data signals into the data lines d1, d2, d3, d4, d5, and d6 connected to the second multiplexing unit 20 can no longer be the same sequence in different row periods or in different frame periods, so that the difference of the leakage levels caused by the different charging times of the data signals into the data lines d1, d2, d3, d4, d5, and d6 can be balanced, thereby improving the problem of display unevenness of the display panel.

In some optional embodiments, the input time of the data signal corresponding to the second target connection line is later than the input time of the data signal corresponding to the second non-target connection line in the same line period.

For example, in the 1 st row period or in the 1 st frame period, the fourth connection line 242 is set as a second target connection line, the fourth connection line 242 is set as a second non-target connection line, and the input time of the data signal corresponding to the fourth connection line 242 itself is after the input time of the data signal corresponding to the fourth connection line 241 itself. Since the second target connection line and the third connection line 23 are always in a conducting state in the same line period, if the input time of the data signal corresponding to the fourth connection line 242 itself is before the input time of the data signal corresponding to the fourth connection line 241 itself, the data signal corresponding to the fourth connection line 242 itself will be replaced by the data signal corresponding to the fourth connection line 241 itself which is input later.

In some alternative embodiments, as shown in fig. 8, each of the second demultiplexing units 20 may include N second switching elements T2, and each of the fourth data lines 24 is electrically connected to the third connection line 23 through one second switching element T2.

One of the second switch elements T2 may be set as a normally open switch element in the same row period, so that the second target connection line and the third connection line 23 are always in a conducting state in the same row period, and the other N-1 second switch elements are sequentially conducted in the same row period, so that the N-1 second non-target connection lines and the third connection line 23 are sequentially in a conducting state in the same row period. It is understood that the fourth connection line 24 connected to the normally-open second switching element T2 is a second target connection line, and the fourth connection line 24 connected to the sequentially-turned-on second switching element T2 is a second non-target connection line. In addition, since the second switching element T2 is connected to each fourth connection line 24, a different second switching element T2 may be selected as a normally-open switching element in a different row period or in a different frame period.

Illustratively, the second switching element T2 includes T21 and T22, the second switching element T21 is connected to the fourth connection line 241, and the second switching element T22 is connected to the fourth connection line 242. The display panel 100 may further include second switch control lines CKH4 and CKH5, the second switch control lines CKH4 and CKH5 are respectively connected to the control terminals of the second switch elements T21 and T22, and the signals transmitted by the second switch control lines CKH4 and CKH5 are respectively used for controlling the on and off of the second switch elements T21 and T22.

The fourth connection line 241 is electrically connected to the second connection line 121 through the first switch element T111, the fourth connection line 241 is electrically connected to the second connection line 122 through the first switch element T112, the fourth connection line 241 is electrically connected to the second connection line 123 through the first switch element T113, the fourth connection line 242 is electrically connected to the second connection line 124 through the first switch element T114, the fourth connection line 242 is electrically connected to the second connection line 125 through the first switch element T115, and the fourth connection line 242 is electrically connected to the second connection line 126 through the first switch element T116.

For example, in the same line period, the second switching element T2 electrically connected to the second target connection line is always in a conductive state, and the second switching elements T2 electrically connected to N-1 second non-target connection lines are sequentially in a conductive state.

For example, the second switching elements T21, T22 may be turned on at a low level and turned off at a high level. Referring to fig. 8, 12 and 13 in combination, in the 1 st row period or in the 1 st frame period, the fourth connection line 242 is a second target connection line, the fourth connection line 241 is a second non-target connection line, and the second switching element T22 can be controlled to be always kept in a conducting state, and the second switching element T21 is controlled to be in a conducting state for a short time; in the row 2 period or in the frame 2 period, the fourth connection line 241 is the second target connection line, the fourth connection line 242 is the second non-target connection line, and the second switching element T21 can be controlled to be always in the conducting state, and the second switching element T22 can be controlled to be in the conducting state for a short time.

In still other alternative embodiments, as shown in FIG. 9, each of the second demultiplexing units 20 may include N-1 second switching elements T2, and the other N-1 fourth connection lines 24 are electrically connected to the third connection line 23 through one second switching element T2, respectively, and the other fourth connection line 24 is directly connected to the third connection line 23. It is understood that the N-1 fourth connection line 24 to which the second switching element T2 is connected is the second non-target connection line, and the other fourth connection line 24 to which the second switching element T2 is not connected is the second target connection line.

Illustratively, the N-1 second switching elements T2 are sequentially turned on during the same row period.

For example, the fourth connection line 242 is a second target connection line, the fourth connection line 241 is a second non-target connection line, the fourth connection line 241 is electrically connected to the third connection line 23 through the second switch element T21, and the fourth connection line 242 is directly connected to the third connection line 23, as shown in fig. 14, the second switch element T21 can be controlled to be in a conducting state for a short time through the second switch control line CKH1 in the same row period.

In some alternative embodiments, as shown in fig. 15 or fig. 16, M is 4 and N is 3. It is understood that in the case of M-4 and N-3, one second demultiplexing unit 20 and three first demultiplexing units form a 1:12 demux circuit.

As shown in fig. 15, the three fourth connection lines 24 may be electrically connected to the third connection line 23 through one second switching element T2 each; alternatively, as shown in fig. 16, two fourth connection lines 24 of the three fourth connection lines 24 may be electrically connected to the third connection line 23 through one second switching element T2, respectively, and the other fourth connection line 24 may be directly connected to the third connection line 23. In the case where M is 4 and N is 3, the display panel may also be driven according to the driving procedure described in the above embodiments, and details thereof are not repeated herein.

In some alternative embodiments, as shown in fig. 8 or 9, the display panel 100 may further include a driver chip IC, and the third connection line 23 may be directly bonded to the driver chip IC. The third connection line 23 may also be referred to herein as a fanout line or fanout line.

For example, a plurality of binding terminals may be disposed in the non-display area NA of the display panel 100, and the plurality of binding terminals are connected to the plurality of third connecting lines 23 in a one-to-one correspondence, and further, the driver chip IC may be bound to the display panel through the binding terminals.

The display panel 100 of the embodiment of the present application may be a liquid crystal display panel or an organic light emitting diode display panel.

It should be noted that, in no case of contradiction, the embodiments of the present application may be combined with each other.

The application also provides a display device which comprises the display panel provided by the application. Referring to fig. 17, fig. 17 is a schematic structural diagram of a display device according to an embodiment of the present application. Fig. 17 provides a display device 1000 including the display panel 100 according to any of the above embodiments of the present application. The display device 1000 is described in the embodiment of fig. 17 by taking a mobile phone as an example, but it should be understood that the display device provided in the embodiment of the present application may be other display devices having a display function, such as a wearable product, a computer, a television, and a vehicle-mounted display device, and the present application is not limited thereto. The display device provided in the embodiment of the present application has the beneficial effects of the display panel provided in the embodiment of the present application, and specific reference may be specifically made to the specific description of the display panel in each of the above embodiments, which is not repeated herein.

In accordance with the embodiments of the present application as described above, these embodiments are not exhaustive and do not limit the application to the specific embodiments described. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the application and its practical application, to thereby enable others skilled in the art to best utilize the application and its various modifications as are suited to the particular use contemplated. The application is limited only by the claims and their full scope and equivalents.

Claims

1. A display panel, comprising:

a plurality of first multi-path distribution units, each of which includes a first connection line and M second connection lines, each of the second connection lines being electrically connected to the first connection line, where M is an integer greater than or equal to 2, one of the second connection lines being a first target connection line, and the other M-1 second connection lines being first non-target connection lines;

in the same line period, the first target connecting line and the first connecting line are always in a conducting state, and M-1 first non-target connecting lines and the first connecting line are sequentially in a conducting state.

2. The display panel according to claim 1, wherein different ones of the M second connection lines are the first target connection line in sequence in at least two adjacent line periods.

3. The display panel according to claim 1, wherein different ones of the M second connection lines are the first target connection line in sequence during at least two adjacent frame periods.

4. The display panel of claim 1, wherein the input time of the data signal corresponding to the first target connection line is after the input time of the data signal corresponding to the first non-target connection line in the same line period.

5. The display panel according to any one of claims 1 to 4, wherein the first multiplexing unit further includes M first switching elements, and each of the second connection lines is electrically connected to the first connection line through one of the first switching elements.

6. The display panel according to claim 5, wherein the first switching elements electrically connected to the first target connection line are always in a conducting state, and the first switching elements electrically connected to the M-1 first non-target connection lines are sequentially in a conducting state in the same row period.

7. The display panel according to claim 1 or 4, wherein each of the first multiplexing units further includes M-1 first switching elements, and M-1 of the second connection lines are electrically connected to the first connection lines through one of the first switching elements, respectively.

8. The display panel according to claim 7, wherein M-1 of the first switching elements are sequentially turned on in the same row period.

9. The display panel according to claim 1, wherein the display panel further comprises a plurality of second multiplexing units, each of the second multiplexing units comprises a third connection line and N fourth connection lines, each of the fourth connection lines is electrically connected to the third connection line, and the fourth connection lines are connected to the first connection lines in a one-to-one correspondence, where N is an integer greater than or equal to 2, one of the fourth connection lines is a second target connection line, and N-1 other fourth connection lines are second non-target connection lines, and in a same line period, the second target connection line and the third connection line are always in a conducting state, and the N-1 second non-target connection lines and the third connection line are sequentially in a conducting state.

10. The display panel according to claim 9, wherein different ones of the N fourth connecting lines are the second target connecting line in sequence in at least two adjacent line periods.

11. The display panel according to claim 9, wherein different ones of the N fourth connecting lines are the second target connecting line in sequence in at least two adjacent frame periods.

12. The display panel of claim 9, wherein the input time of the data signal corresponding to the second target connection line is after the input time of the data signal corresponding to the second non-target connection line in the same line period.

13. The display panel according to any one of claims 9 to 12, wherein each of the second demultiplexing units further includes N second switching elements, and each of the fourth data lines is electrically connected to the third connection line through one of the second switching elements.

14. The display panel according to claim 13, wherein the second switching elements electrically connected to the second target connection line are always in a conducting state, and the second switching elements electrically connected to N-1 of the second non-target connection lines are sequentially in a conducting state in a same row period.

15. The display panel according to claim 9 or 12, wherein each of the second demultiplexing units further comprises N-1 second switching elements, and the other N-1 fourth connection lines are electrically connected to the third connection line through one of the second switching elements.

16. The display panel according to claim 15, wherein N-1 of the second switching elements are sequentially turned on in the same row period.

17. The display panel according to claim 1, wherein the display panel comprises a display area, a plurality of data lines are disposed in the display area, and the second connection line is electrically connected to at least one of the data lines.

18. The display panel according to claim 1, wherein the display panel further comprises a driving chip, and the first connecting line is directly bonded to the driving chip.

19. The display panel of claim 1, further comprising a plurality of scan lines, wherein a start time of the scan signal on the scan line being at an active level is after an input time of the data signal corresponding to the second connection line itself in a same line period.

20. A display device characterized by comprising the display panel according to any one of claims 1 to 19.