CN113364320A - Boost multi-level inverter circuit and control method thereof - Google Patents

Boost multi-level inverter circuit and control method thereof Download PDF

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Publication number
CN113364320A
CN113364320A CN202110675141.3A CN202110675141A CN113364320A CN 113364320 A CN113364320 A CN 113364320A CN 202110675141 A CN202110675141 A CN 202110675141A CN 113364320 A CN113364320 A CN 113364320A
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bridge arm
circuit
sub
submodule
output
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CN113364320B (en
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邓焰
邓兆哲
何湘宁
刘星亮
邱祁
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Zhejiang University ZJU
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Zhejiang University ZJU
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration

Abstract

The invention discloses a boost multi-level inverter circuit and a control method thereof, and the boost multi-level inverter circuit comprises a first sub-module circuit connected with a direct-current power supply, a plurality of second sub-module circuits sequentially connected with the first sub-module circuit, and a third sub-module circuit connected with a second sub-module circuit at the tail end; the work of the circuit comprises positive half-cycle sine wave output, negative half-cycle sine wave output and a charging mode, under the actual working state, the circuit is switched to the output mode when pulse is required to be output, the circuit is switched to the charging mode when pulse is not required to be output, the capacitor voltage automatically keeps dynamic balance through continuous switching of the output mode and the charging mode, alternating current output which is multiple of direct current power supply voltage can be realized without a step-up transformer, the step-up transformation ratio is determined by the number of sub-modules and the duty ratio, and the withstand voltage of a bridge arm in the sub-modules is equal to the direct current power supply voltage.

Description

Boost multi-level inverter circuit and control method thereof
Technical Field
The invention relates to the technical field of inverters, in particular to a boost multi-level inverter circuit and a control method thereof.
Background
The multilevel cascade inverter is widely used for generating medium-high voltage alternating current, reduces the voltage and current stress of a single power device through the series-parallel connection of a plurality of modules, and realizes the output of high electric energy quality through multilevel modulation. Because the premise of the operation of the multilevel circuit is to ensure the stable and even distribution of energy among the cells, the primary problem to be solved by the multilevel cascade inverter is the energy balance modulation strategy among the modules.
The traditional diode clamping type multi-level inverter cannot realize voltage balance of more than three levels through control, and an H-bridge cascade type and a modular multi-level cascade type (MMC) both need a complex capacitance-voltage balance strategy and a large number of sensors. In addition, the voltage regulation range of the converter is limited in the process of converting current, and the voltage boosting is basically completed by an alternating-current side transformer.
Disclosure of Invention
The invention aims to provide a boost multi-level inverter circuit and a control method thereof. The invention can realize the conversion of electric energy from direct current to alternating current without an additional voltage or energy balancing scheme; in addition, the invention can realize AC output which is twice as much as DC power supply voltage without a step-up transformer.
In order to solve the technical problems, the technical scheme provided by the invention is as follows: a boost multi-level inverter circuit comprises a first sub-module circuit M connected with a direct current power supply1First submodule circuit M1A plurality of second sub-module circuits M are connected in sequencen(N2, 3.., N-1), the second submodule circuit at the end is connected with a third submodule circuit MN；
The first sub-module circuit M1Comprises a first capacitor C connected with a DC power supply1First capacitor C1A first a bridge arm and a first b bridge arm are connected in parallel; the upper part of the first a bridge armThe bridge arm is provided with a switch tube S1_1The lower bridge arm is provided with a switch tube S1_3And a switching tube S1_5And a switching tube S1_3And a switching tube S1_5Is connected in series in the reverse direction; the upper bridge arm of the first b bridge arm is a diode D1_1And a switching tube S1_2Series, diode D1_1An anode and a first capacitor C1Connected, diode D1_1Cathode and switching tube S1_2The lower bridge arm of the first b bridge arm is provided with a switching tube S1_4；
The second sub-module circuit MnComprising a second capacitance Cn(N-2, 3.., N-1), a second capacitor CnA second a bridge arm and a second b bridge arm are connected in parallel; the upper bridge arm of the second a bridge arm is provided with a switch tube Sn_1The lower bridge arm is a diode Dn_2And a switching tube Sn_3Series, diode Dn_2Anode and switch tube Sn_3Connected, diode Dn_2Cathode and second capacitor CnConnecting; the upper bridge arm of the second b bridge arm is a diode Dn_1And a switching tube Sn_2Series, diode Dn_1Anode and second capacitor CnConnected, diode Dn_1Cathode and switching tube Sn_2The lower bridge arm of the second b bridge arm is provided with a switching tube Sn_4；
The third sub-module circuit MNComprising a third capacitor CNThird capacitor CNA third a bridge arm and a third b bridge arm are connected in parallel; the upper bridge arm of the third a bridge arm is provided with a switch tube SN_1The lower bridge arm is a diode DN_2And a switching tube SN_3Series, diode DN_2Anode and switch tube SN_3Connected, diode DN_2Cathode and third capacitor CNConnecting; the upper bridge arm of the third b bridge arm is a diode DN_1And a switching tube SN_2Series, diode DN_1Anode and third capacitor CNConnected, diode DN_1Cathode and switching tube SN_2The lower bridge arm of the third b bridge arm is provided with a switching tube SN_4(ii) a A capacitor C is connected in parallel with the middle points of the third a bridge arm and the third b bridge armN+1；
The first sub-module circuit M1The middle point of the first a bridge arm and the middle point of the first b bridge arm are respectively connected with the first second sub-module circuit M2Second capacitor C2First and second submodule circuits M2The middle point of the second a bridge arm and the middle point of the second b bridge arm are respectively connected with the next second sub-module circuit M3Second capacitor C3And so on until the last second submodule circuit MN-1The middle point of the second a bridge arm and the middle point of the second b bridge arm are respectively connected with a third sub-module circuit MNThird capacitor CNAt both ends of the same.
In the boost multi-level inverter circuit, the capacitor CN+1A switch tube S is arranged between the middle point of the third a bridge armcut(ii) a The third sub-module circuit MNA follow current circuit is also arranged between the DC power supply and the DC power supply; a diode D is arranged in the follow current circuitonAnd a switching tube Son(ii) a The diode DonAnode and switch tube SonConnected, diode DonNegative pole third submodule circuit MNCapacitor C ofN+1Are connected.
The control method of the boost multi-level inverter circuit comprises the following steps:
when a sine wave positive half cycle voltage is output, the number of levels increases from the third sub-module circuit MNTo the first sub-module circuit M1Sequentially adding the output and the capacitance from the third capacitance CNStarting until the first capacitor C1Performing series discharge, wherein the number of output levels is determined by the number of series capacitors; a second submodule M participating in the output when the output a (a) is at 1,2N-a+1To the third submodule circuit MNSwitch tube Sn_1Conducting; from the second submodule circuit MN-aAt the beginning, the second submodule not participating in the output is switched on and off according to the switching tube S of the previous second submodulen_1Conducting the switch tube S of the second sub-module circuitn_4Is connected in parallel with twoThe pole tubes are conducted and sequentially circulated until the second submodule circuit M2；
When a sine wave negative half cycle voltage is output, as the number of levels increases, the slave second sub-module circuit M2To the third submodule circuit MNSequentially adding the output and the capacitance from the second capacitance C2Starting until the capacitor CN+1Performing series discharge, wherein the number of output levels is determined by the number of series capacitors; a first submodule M participating in the output when the output-a (a 1, 2.., N-1) level is high1To the second submodule circuit MaSwitch tube Sn_4Conducting; from the second submodule circuit M a+1, the second submodule not involved in the output is switched on and off according to the switching tube S of the previous second submodulen_4Conducting the switch tube S of the second sub-module circuitn_1The parallel diodes are conducted and sequentially circulate until the second submodule circuit MN-1。
In the control method of the boost multi-level inverter circuit, when the positive half-cycle voltage of the sine wave is output, the first sub-module circuit M1The working mode of the cascade module is divided into an odd mode and an even mode according to the number of the cascade modules;
when the number of the cascade modules is odd and the output is lower than the even-order positive level of the N order, the second sub-module circuit M2With the first sub-module circuit M1Is connected with the first a bridge arm to control the first submodule circuit M1Switch tube S1_5Conducting while switching the transistor S1_3The parallel diode is conducted; when the odd-order positive voltage lower than the N-order is output, the second sub-module circuit M2With the first sub-module circuit M1Is connected with the first b bridge arm, and a first sub-module circuit M1Switch tube S1_4The parallel diode is conducted;
when the number of the cascade modules is even and the output is lower than the odd-order positive level of the N order, the second sub-module circuit M2With the first sub-module circuit M1Is connected with the first a bridge arm, and a first submodule circuit M1Switch tube S1_5Conducting while switching the transistor S1_3The parallel diode is conducted; outputting an even-order positive lower than N-orderLevel, second submodule circuit M2With the first sub-module circuit M1Is connected with the first b bridge arm, and a first sub-module circuit M1Switch tube S1_4The parallel diode is conducted;
when outputting the positive level of N order, the first sub-module circuit M1Switch tube S1_1On, all the second sub-module circuits MnSwitch tube Sn_1Conducting, third sub-module circuit MNSwitch tube SN_1And conducting.
In the control method of the boost multi-level inverter circuit, when a sine wave negative half-cycle voltage is output, the third sub-module circuit MNThe working mode of the cascade module is divided into an odd mode and an even mode according to the number of the cascade modules;
when the number of the cascade modules is odd, the even-order negative level higher than-N order is output, and the second sub-module circuit MN-1Through a third submodule circuit MNThe lower bridge arm of the third a bridge arm is connected with a load to control a third submodule circuit MNSwitch tube SN_3Conducting; when the odd-order negative voltage higher than-N order is output, the second sub-module circuit MN-1The third submodule circuit M is connected with a load through an upper bridge arm of a third a bridge armNSwitch tube SN_1The parallel diode is conducted;
when the number of the cascade modules is even and the negative level of the odd order higher than-N order is output, the second sub-module circuit MN-1The lower bridge arm of the third a bridge arm is connected with a load to control a third submodule circuit MNSwitch tube SN_3Conducting; when outputting even-order negative voltage higher than-N order, the second sub-module circuit MN-1The lower bridge arm of the third a bridge arm is connected with a load, and a third submodule circuit MNSwitch tube SN_1The parallel diode is conducted;
when outputting the N-order negative level, the first sub-module circuit M1Switch tube S1_4On, all the second sub-module circuits MnSwitch tube Sn_4Conducting, third sub-module circuit MNSwitch tube SN_4Conducting, switching tube ScutThe parallel diode is turned on.
The control method of the boost multi-level inverter circuit further includes a charging mode for supplying power to the resistive-inductive load;
when the circuit works in sine wave positive half cycle modulation output, the first sub-module circuit M1The lower bridge arm of the first a bridge arm and the upper bridge arm of the first b bridge arm are conducted, and all the second sub-module circuits M are connectednThe lower bridge arm of the second a bridge arm is conducted with the upper bridge arm of the second b bridge arm; first submodule circuit M1First capacitor C1All second submodule circuits MnSecond capacitor CnThird submodule circuit MNThird capacitor CNCharging the capacitor in parallel with the DC power supply until the voltage of the capacitor is equal to the voltage of the DC power supply; simultaneous control of switching tube S in follow current circuitonIs conducted with a diode DonA current path is formed together, so that the inductor can normally follow current in the charging stage;
when the circuit is in a charging mode of outputting sine wave negative half cycle, the first sub-module circuit M1The lower bridge arm of the first a bridge arm and the upper bridge arm of the first b bridge arm are conducted, and all the second sub-module circuits M are connectednThe lower bridge arm of the second a bridge arm and the upper bridge arm of the second b bridge arm are conducted, and the first sub-module circuit M1First capacitor C1And all second submodule circuits MnSecond capacitor CnCharging the batteries in parallel with a direct current power supply respectively; third submodule circuit MNThe lower bridge arm of the third a bridge arm and the upper bridge arm of the third b bridge arm are conducted, and the switching tube ScutOn, the capacitance CN+1And is charged in parallel with the direct current power supply.
Compared with the prior art, the boost multi-level inverter circuit comprises a first sub-module circuit connected with a direct-current power supply, a plurality of second sub-module circuits sequentially connected with the first sub-module circuit, and a third sub-module circuit connected with the second sub-module circuit at the tail end; the follow current circuit is arranged between the third submodule circuit and the direct-current power supply, the work of the circuit comprises positive half cycle sine wave output, negative half cycle sine wave output and a charging mode, under the actual working state, the output mode is switched when pulse is required to be output, the charging mode is switched when the pulse is not required to be output, all submodule capacitors in the charging mode are connected with the direct-current power supply in parallel, the capacitor voltage automatically keeps dynamic balance through the continuous switching of the output mode and the charging mode, the alternating-current output which is multiple of the direct-current power supply voltage can be realized without a boosting transformer, the boosting transformation ratio is determined by the number of submodules and the duty ratio, the bridge arm withstand voltage in each submodule is equal to the direct-current power supply voltage, and the circuit has the advantage of being simpler in structure.
Drawings
FIG. 1 is a schematic diagram of an inverter circuit topology according to the present invention;
FIG. 2 is a circuit diagram of a first sub-module;
FIG. 3 is a circuit diagram of a second submodule;
FIG. 4 is a circuit diagram of a third submodule;
FIG. 5 is a free-wheeling circuit diagram;
FIG. 6 is a schematic diagram of a circuit operating mode for outputting a positive half cycle sine wave;
FIG. 7 is a schematic diagram of a working mode of the circuit outputting a negative half cycle sine wave;
FIG. 8 is a schematic diagram of a multi-level SPWM modulation strategy;
fig. 9 is a schematic diagram of a simulation waveform.
Detailed Description
The present invention will be further described with reference to the following examples and drawings, but the present invention is not limited thereto.
Example (b): a boost multi-level inverter circuit, as shown in FIG. 1, includes a first sub-module circuit M connected to a DC power supply1First submodule circuit M1A plurality of second sub-module circuits M are connected in sequencen(N2, 3.., N-1), the second submodule circuit at the end is connected with a third submodule circuit MN(ii) a In this embodiment, the third sub-module circuit MNA resistor R and an inductor L which are connected in series are arranged between the direct current power supply and the direct current power supply, and the resistor R and the inductor L are used as loads; the capacitor CN+1A switch tube S is arranged between the middle point of the third a bridge armcut(ii) a The third sub-module circuit MNWith a DC power supplyA follow current circuit is also arranged between the two parts; as shown in FIG. 5, a diode D is provided in the freewheel circuitonAnd a switching tube Son(ii) a The diode DonAnode and switch tube SonConnected, diode DonNegative pole third submodule circuit MNCapacitor C ofN+1Are connected.
As shown in fig. 2, the first sub-module circuit M1Comprises a first capacitor C connected with a DC power supply1First capacitor C1A first a bridge arm and a first b bridge arm are connected in parallel; the upper bridge arm of the first a bridge arm is provided with a switch tube S1_1The lower bridge arm is provided with a switch tube S1_3And a switching tube S1_5And a switching tube S1_3And a switching tube S1_5Is connected in series in the reverse direction; the upper bridge arm of the first b bridge arm is a diode D1_1And a switching tube S1_2Series, diode D1_1An anode and a first capacitor C1Connected, diode D1_1Cathode and switching tube S1_2The lower bridge arm of the first b bridge arm is provided with a switching tube S1_4；
As shown in fig. 3, the second sub-module circuit MnComprising a second capacitance Cn(N-2, 3.., N-1), a second capacitor CnA second a bridge arm and a second b bridge arm are connected in parallel; the upper bridge arm of the second a bridge arm is provided with a switch tube Sn_1The lower bridge arm is a diode Dn_2And a switching tube Sn_3Series, diode Dn_2Anode and switch tube Sn_3Connected, diode Dn_2Cathode and second capacitor CnConnecting; the upper bridge arm of the second b bridge arm is a diode Dn_1And a switching tube Sn_2Series, diode Dn_1Anode and second capacitor CnConnected, diode Dn_1Cathode and switching tube Sn_2The lower bridge arm of the second b bridge arm is provided with a switching tube Sn_4；
As shown in fig. 4, the third sub-module circuit MNComprising a third capacitor CNThird capacitor CNA third a bridge arm and a third b bridge arm are connected in parallel; the upper bridge arm of the third a bridge arm is provided with a switch tube SN_1The lower bridge arm is dipolarPipe DN_2And a switching tube SN_3Series, diode DN_2Anode and switch tube SN_3Connected, diode DN_2Cathode and third capacitor CNConnecting; the upper bridge arm of the third b bridge arm is a diode DN_1And a switching tube SN_2Series, diode DN_1Anode and third capacitor CNConnected, diode DN_1Cathode and switching tube SN_2The lower bridge arm of the third b bridge arm is provided with a switching tube SN_4(ii) a A capacitor C is connected in parallel with the middle points of the third a bridge arm and the third b bridge armN+1(ii) a The capacitor CN+1A switch tube S is arranged between the middle point of the third a bridge armcut；
The first sub-module circuit M1The middle point of the first a bridge arm and the middle point of the first b bridge arm are respectively connected with the first second sub-module circuit M2Second capacitor C2First and second submodule circuits M2The middle point of the second a bridge arm and the middle point of the second b bridge arm are respectively connected with the next second sub-module circuit M3Second capacitor C3And so on until the last second submodule circuit MN-1The middle point of the second a bridge arm and the middle point of the second b bridge arm are respectively connected with a third sub-module circuit MNThird capacitor CNAt both ends of the same.
The work of the circuit comprises positive half cycle sine wave output, negative half cycle sine wave output and a charging mode, and the specific control method comprises the following steps:
when a sine wave positive half cycle voltage is output, the number of levels increases from the third sub-module circuit MNTo the first sub-module circuit M1Sequentially adding the output and the capacitance from the third capacitance CNStarting until the first capacitor C1Performing series discharge, wherein the number of output levels is determined by the number of series capacitors; a second submodule M participating in the output when the output a (a) is at 1,2N-a+1To the third submodule circuit MNSwitch tube Sn_1Conducting; from the second submodule circuit MN-aAt the beginning, the second submodule not participating in the output is switched on and off according to the previous second submoduleSn_1Conducting the switch tube S of the second sub-module circuitn_4The parallel diodes are conducted and sequentially circulate until the second submodule circuit M2；
The first sub-module circuit M1The working mode is different from other sub-modules, and the first sub-module circuit M1The working mode of the cascade module is divided into an odd mode and an even mode according to the number of the cascade modules;
when the number of the cascade modules is odd and the output is lower than the even-order positive level of the N order, the second sub-module circuit M2With the first sub-module circuit M1Is connected with the first a bridge arm to control the first submodule circuit M1Switch tube S1_5Conducting while switching the transistor S1_3The parallel diode of (a) is turned on as shown in fig. 6 (c); when the odd-order positive voltage lower than the N-order is output, the second sub-module circuit M2With the first sub-module circuit M1Is connected with the first b bridge arm, and a first sub-module circuit M1Switch tube S1_4The parallel diode of (a) is turned on as shown in fig. 6 (b). When the number of the cascade modules is even and the output is lower than the odd-order positive level of the N order, the second sub-module circuit M2With the first sub-module circuit M1Is connected with the first a bridge arm, and a first submodule circuit M1Switch tube S1_5Conducting while switching the transistor S1_3The parallel diode is conducted; as shown in fig. 6 (c); when the even-order positive voltage lower than the N-order is output, the second sub-module circuit M2With the first sub-module circuit M1Is connected with the first b bridge arm, and a first sub-module circuit M1Switch tube S1_4The parallel diode of (a) is turned on as shown in fig. 6 (b).
When outputting the positive level of N order, the first sub-module circuit M1Switch tube S1_1On, all the second sub-module circuits MnSwitch tube Sn_1Conducting, third sub-module circuit MNSwitch tube SN_1Conduction is performed as shown in fig. 6 (d).
When a sine wave negative half cycle voltage is output, as the number of levels increases, the slave second sub-module circuit M2To the third submodule circuit MNSequentially adding into the pipelineOut of the second capacitor C2Starting until the capacitor CN+1Performing series discharge, wherein the number of output levels is determined by the number of series capacitors; a first submodule M participating in the output when the output-a (a 1, 2.., N-1) level is high1To the second submodule circuit MaSwitch tube Sn_4Conducting; from the second submodule circuit Ma+1At the beginning, the second submodule not participating in the output is switched on and off according to the switching tube S of the previous second submodulen_4Conducting the switch tube S of the second sub-module circuitn_1The parallel diodes are conducted and sequentially circulate until the second submodule circuit MN-1。
The third sub-module circuit MNThe working mode of the cascade module is divided into an odd mode and an even mode according to the number of the cascade modules;
when the number of the cascade modules is odd, the even-order negative level higher than-N order is output, and the second sub-module circuit MN-1Through a third submodule circuit MNThe lower bridge arm of the third a bridge arm is connected with a load to control a third submodule circuit MNSwitch tube SN_3Conduction, as shown in fig. 7 (c); when the odd-order negative voltage higher than-N order is output, the second sub-module circuit MN-1The third submodule circuit M is controlled through the connection of the upper bridge arm of the third a bridge arm and a loadNSwitch tube SN_1The parallel diode of (a) is turned on as shown in fig. 7 (b).
When the number of the cascade modules is even and the negative level of the odd order higher than-N order is output, the second sub-module circuit MN-1The lower bridge arm of the third a bridge arm is connected with a load to control a third submodule circuit MNSwitch tube SN_3Conduction, as shown in fig. 7 (c); when outputting even-order negative voltage higher than-N order, the second sub-module circuit MN-1The lower bridge arm of the third a bridge arm is connected with a load to control a third submodule circuit MNSwitch tube SN_1The parallel diode of (a) is turned on as shown in fig. 7 (b);
when outputting the N-order negative level, the first sub-module circuit M1Switch tube S1_4On, all the second sub-module circuits MnSwitch tube ofSn_4Conducting, third sub-module circuit MNSwitch tube SN_4Conducting, switching tube ScutThe parallel diode is turned on as shown in fig. 7 (d).
The circuit also comprises a charging mode for supplying power to the resistance-inductance load, and when the circuit works at the sine wave positive half cycle modulation output, the first sub-module circuit M1The lower bridge arm of the first a bridge arm and the upper bridge arm of the first b bridge arm are conducted, and all the second sub-module circuits M are connectednThe lower bridge arm of the second a bridge arm is conducted with the upper bridge arm of the second b bridge arm; first submodule circuit M1First capacitor C1All second submodule circuits MnSecond capacitor CnThird submodule circuit MNThird capacitor CNAnd the capacitors are respectively charged in parallel with the direct current power supply until the voltage of the capacitors is equal to the voltage of the direct current power supply. The follow current of the inductor makes the capacitor CN+1The voltage of the capacitor is continuously increased, so that the voltage of each capacitor is unbalanced and cannot be modulated normally; thus in the capacitor CN+1A switch tube S is connected with the load in series at one endcutBlocking capacitor C during positive half-cycle chargingN+1A path between the inductor and the inductor controls a switch tube S in the follow current circuitonIs conducted with a diode DonTogether, a current path is formed to ensure that the inductor normally freewheels in the charging phase, as shown in fig. 6 (a). At this time, the capacitance CN+1Cannot be charged, so that the third submodule M is in the charging modeNAnd is not conductive.
When the circuit works in sine wave negative half cycle modulation output, a load directly forms a follow current path with a power supply, so that the problem of influence of inductance follow current on capacitor voltage balance is solved, and the first sub-module circuit M1The lower bridge arm of the first a bridge arm and the upper bridge arm of the first b bridge arm are conducted, and all the second sub-module circuits M are connectednThe lower bridge arm of the second a bridge arm and the upper bridge arm of the second b bridge arm are conducted, and the first sub-module circuit M1First capacitor C1And all second submodule circuits MnSecond capacitor CnCharging the batteries in parallel with a direct current power supply respectively; the third submodule circuit M in this caseNThe lower bridge arm of the third a bridge arm and the upper bridge arm of the third b bridge arm are conducted,switch tube ScutOn, the capacitance CN+1And charged in parallel with the dc power supply as shown in fig. 7 (a).
Under the actual working state, the output mode is switched when the electric energy is required to be output, the charging mode is switched when the electric energy is not required to be output, and the capacitor voltage automatically keeps dynamic balance through the continuous switching of the output mode and the charging mode.
In this embodiment, the method for generating the sine wave adopts a multi-level SPWM modulation strategy. The difference from the general SPWM modulation is that the amplitude of the triangular carrier is determined by the output level voltage. As shown in FIG. 8, the carrier amplitude corresponding to the maximum level output voltage is taken as the reference voltage VcarryAnd the amplitude of the carrier wave corresponding to other levels is the ratio of the output voltage to the maximum voltage multiplied by the reference voltage. The specific calculation formula is as follows:
Figure BDA0003120680240000131
in the formula: vcarry-nCorresponding carrier voltage for setting output level number; n is the set output level number; vcarryCorresponding to the carrier voltage for the maximum output level number; n is the maximum output level series;
wherein, the continuous action time of each level is integral multiple of the switching period, and the action time of the level in the modulation period is averagely distributed to reduce the switching loss as much as possible.
The applicant performed a simulation experiment on the present example, and the result is shown in fig. 9. As can be seen from fig. 9, the present invention can realize the conversion of the electric energy from the direct current to the alternating current, and the capacitors of the sub-modules automatically realize the balance by switching the output mode and the charging mode without an additional voltage balance scheme. The inverter can realize alternating current output which is multiple of direct current power supply voltage without a step-up transformer, the step-up transformation ratio is determined by the number of the sub-modules and the duty ratio, and the withstand voltage of a bridge arm in each sub-module is equal to the direct current power supply voltage.

Claims (6)

1. A boost multi-level inverter circuit, characterized by: comprises and is connected withFirst submodule circuit M connected with flow power supply1First submodule circuit M1A plurality of second sub-module circuits M are connected in sequencen(N2, 3.., N-1), the second submodule circuit at the end is connected with a third submodule circuit MN；
The first sub-module circuit M1Comprises a first capacitor C connected with a DC power supply1First capacitor C1A first a bridge arm and a first b bridge arm are connected in parallel; the upper bridge arm of the first a bridge arm is provided with a switch tube S1_1The lower bridge arm is provided with a switch tube S1_3And a switching tube S1_5And a switching tube S1_3And a switching tube S1_5Is connected in series in the reverse direction; the upper bridge arm of the first b bridge arm is a diode D1_1And a switching tube S1_2Series, diode D1_1An anode and a first capacitor C1Connected, diode D1_1Cathode and switching tube S1_2The lower bridge arm of the first b bridge arm is provided with a switching tube S1_4；
The second sub-module circuit MnComprising a second capacitance Cn(N-2, 3.., N-1), a second capacitor CnA second a bridge arm and a second b bridge arm are connected in parallel; the upper bridge arm of the second a bridge arm is provided with a switch tube Sn_1The lower bridge arm is a diode Dn_2And a switching tube Sn_3Series, diode Dn_2Anode and switch tube Sn_3Connected, diode Dn_2Cathode and second capacitor CnConnecting; the upper bridge arm of the second b bridge arm is a diode Dn_1And a switching tube Sn_2Series, diode Dn_1Anode and second capacitor CnConnected, diode Dn_1Cathode and switching tube Sn_2The lower bridge arm of the second b bridge arm is provided with a switching tube Sn_4；
The third sub-module circuit MNComprising a third capacitor CNThird capacitor CNA third a bridge arm and a third b bridge arm are connected in parallel; the upper bridge arm of the third a bridge arm is provided with a switch tube SN_1The lower bridge arm is a diode DN_2And a switching tube SN_3Series, diode DN_2Anode and switch tube SN_3Connected, diode DN_2Cathode and third capacitor CNConnecting; the upper bridge arm of the third b bridge arm is a diode DN_1And a switching tube SN_2Series, diode DN_1Anode and third capacitor CNConnected, diode DN_1Cathode and switching tube SN_2The lower bridge arm of the third b bridge arm is provided with a switching tube SN_4(ii) a A capacitor C is connected in parallel with the middle points of the third a bridge arm and the third b bridge armN+1；
The first sub-module circuit M1The middle point of the first a bridge arm and the middle point of the first b bridge arm are respectively connected with the first second sub-module circuit M2Second capacitor C2First and second submodule circuits M2The middle point of the second a bridge arm and the middle point of the second b bridge arm are respectively connected with the next second sub-module circuit M3Second capacitor C3And so on until the last second submodule circuit MN-1The middle point of the second a bridge arm and the middle point of the second b bridge arm are respectively connected with a third sub-module circuit MNThird capacitor CNAt both ends of the same.
2. A boost multi-level inverter circuit according to claim 1, wherein: the capacitor CN+1A switch tube S is arranged between the middle point of the third a bridge armcut(ii) a The third sub-module circuit MNA follow current circuit is also arranged between the DC power supply and the DC power supply; a diode D is arranged in the follow current circuitonAnd a switching tube Son(ii) a The diode DonAnode and switch tube SonConnected, diode DonNegative pole third submodule circuit MNCapacitor C ofN+1Are connected.
3. The method of claim 2, wherein: the work of the circuit comprises positive half cycle sine wave output and negative half cycle sine wave output, and the specific control method comprises the following steps:
when a sine wave positive half cycle voltage is output, the number of levels increasesThird submodule circuit MNTo the first sub-module circuit M1Sequentially adding the output and the capacitance from the third capacitance CNStarting until the first capacitor C1Performing series discharge, wherein the number of output levels is determined by the number of series capacitors; a second submodule M participating in the output when the output a (a) is at 1,2N-a+1To the third submodule circuit MNSwitch tube Sn_1Conducting; from the second submodule circuit MN-aAt the beginning, the second submodule not participating in the output is switched on and off according to the switching tube S of the previous second submodulen_1Conducting the switch tube S of the second sub-module circuitn_4The parallel diodes are conducted and sequentially circulate until the second submodule circuit M2；
When a sine wave negative half cycle voltage is output, as the number of levels increases, the slave second sub-module circuit M2To the third submodule circuit MNSequentially adding the output and the capacitance from the second capacitance C2Starting until the capacitor CN+1Performing series discharge, wherein the number of output levels is determined by the number of series capacitors; a first submodule M participating in the output when the output-a (a 1, 2.., N-1) level is high1To the second submodule circuit MaSwitch tube Sn_4Conducting; from the second submodule circuit Ma+1, the second submodule not involved in the output is switched on and off according to the switching tube S of the previous second submodulen_4Conducting the switch tube S of the second sub-module circuitn_1The parallel diodes are conducted and sequentially circulate until the second submodule circuit MN-1。
4. The method of claim 3, wherein: when the sine wave positive half cycle voltage is output, the first sub-module circuit M1The working mode of the cascade module is divided into an odd mode and an even mode according to the number of the cascade modules;
when the number of the cascade modules is odd and the output is lower than the even-order positive level of the N order, the second sub-module circuit M2With the first sub-module circuit M1Is connected with the first a bridge arm to control the secondA submodule circuit M1Switch tube S1_5Conducting while switching the transistor S1_3The parallel diode is conducted; when the odd-order positive voltage lower than the N-order is output, the second sub-module circuit M2With the first sub-module circuit M1Is connected with the first b bridge arm, and a first sub-module circuit M1Switch tube S1_4The parallel diode is conducted;
when the number of the cascade modules is even and the output is lower than the odd-order positive level of the N order, the second sub-module circuit M2With the first sub-module circuit M1Is connected with the first a bridge arm, and a first submodule circuit M1Switch tube S1_5Conducting while switching the transistor S1_3The parallel diode is conducted; when the even-order positive voltage lower than the N-order is output, the second sub-module circuit M2With the first sub-module circuit M1Is connected with the first b bridge arm, and a first sub-module circuit M1Switch tube S1_4The parallel diode is conducted;
when outputting the positive level of N order, the first sub-module circuit M1Switch tube S1_1On, all the second sub-module circuits MnSwitch tube Sn_1Conducting, third sub-module circuit MNSwitch tube SN_1And conducting.
5. The method of claim 3, wherein: when the sine wave negative half-cycle voltage is output, the third sub-module circuit MNThe working mode of the cascade module is divided into an odd mode and an even mode according to the number of the cascade modules;
when the number of the cascade modules is odd, the even-order negative level higher than-N order is output, and the second sub-module circuit MN-1Through a third submodule circuit MNThe lower bridge arm of the third a bridge arm is connected with a load to control a third submodule circuit MNSwitch tube SN_3Conducting; when the odd-order negative voltage higher than-N order is output, the second sub-module circuit MN-1The third submodule circuit M is connected with a load through an upper bridge arm of a third a bridge armNSwitch tube SN_1Parallel diode ofConducting;
when the number of the cascade modules is even and the negative level of the odd order higher than-N order is output, the second sub-module circuit MN-1The lower bridge arm of the third a bridge arm is connected with a load to control a third submodule circuit MNSwitch tube SN_3Conducting; when outputting even-order negative voltage higher than-N order, the second sub-module circuit MN-1The lower bridge arm of the third a bridge arm is connected with a load, and a third submodule circuit MNSwitch tube SN_1The parallel diode is conducted;
when outputting the N-order negative level, the first sub-module circuit M1Switch tube S1_4On, all the second sub-module circuits MnSwitch tube Sn_4Conducting, third sub-module circuit MNSwitch tube SN_4Conducting, switching tube ScutThe parallel diode is turned on.
6. The method of claim 3, wherein: the method also comprises a charging mode for supplying power to the inductance resistance load;
when the circuit works in sine wave positive half cycle modulation output, the first sub-module circuit M1The lower bridge arm of the first a bridge arm and the upper bridge arm of the first b bridge arm are conducted, and all the second sub-module circuits M are connectednThe lower bridge arm of the second a bridge arm is conducted with the upper bridge arm of the second b bridge arm; first submodule circuit M1First capacitor C1All second submodule circuits MnSecond capacitor CnThird submodule circuit MNThird capacitor CNCharging the capacitor in parallel with the DC power supply until the voltage of the capacitor is equal to the voltage of the DC power supply; simultaneous control of switching tube S in follow current circuitonIs conducted with a diode DonA current path is formed together, so that the inductor can normally follow current in the charging stage;
when the circuit is in a charging mode of outputting sine wave negative half cycle, the first sub-module circuit M1The lower bridge arm of the first a bridge arm and the upper bridge arm of the first b bridge arm are conducted, and all the second sub-module circuits M are connectednOf the second a leg ofThe lower bridge arm is conducted with the upper bridge arm of the second b bridge arm, and a first sub-module circuit M1First capacitor C1And all second submodule circuits MnSecond capacitor CnCharging the batteries in parallel with a direct current power supply respectively; third submodule circuit MNThe lower bridge arm of the third a bridge arm and the upper bridge arm of the third b bridge arm are conducted, and the switching tube ScutOn, the capacitance CN+1And is charged in parallel with the direct current power supply.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102013691A (en) * 2010-07-22 2011-04-13 荣信电力电子股份有限公司 Battery energy storage topology structure without transformer based on MMC modularized multi-level inverter
US20160268915A1 (en) * 2014-05-29 2016-09-15 Huazhong University Of Science And Technology Submodule for modular multi-level converter and application thereof
CN110149065A (en) * 2019-05-13 2019-08-20 郑州大学 A kind of buck switching capacity multi-electrical level inverter and its modulator approach
CN112290817A (en) * 2020-10-16 2021-01-29 郑州大学 Expanded T-shaped multi-level current transformation topology and modulation method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102013691A (en) * 2010-07-22 2011-04-13 荣信电力电子股份有限公司 Battery energy storage topology structure without transformer based on MMC modularized multi-level inverter
US20160268915A1 (en) * 2014-05-29 2016-09-15 Huazhong University Of Science And Technology Submodule for modular multi-level converter and application thereof
CN110149065A (en) * 2019-05-13 2019-08-20 郑州大学 A kind of buck switching capacity multi-electrical level inverter and its modulator approach
CN112290817A (en) * 2020-10-16 2021-01-29 郑州大学 Expanded T-shaped multi-level current transformation topology and modulation method

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