CN113363350A - IBC solar cell diffusion and cleaning method - Google Patents

IBC solar cell diffusion and cleaning method Download PDF

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Publication number
CN113363350A
CN113363350A CN202110579706.8A CN202110579706A CN113363350A CN 113363350 A CN113363350 A CN 113363350A CN 202110579706 A CN202110579706 A CN 202110579706A CN 113363350 A CN113363350 A CN 113363350A
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silicon wafer
mask layer
cleaning
diffusion
psg
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CN113363350B (en
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李懋鸿
陈刚
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Zhejiang Aiko Solar Energy Technology Co Ltd
Guangdong Aiko Technology Co Ltd
Tianjin Aiko Solar Energy Technology Co Ltd
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Zhejiang Aiko Solar Energy Technology Co Ltd
Guangdong Aiko Technology Co Ltd
Tianjin Aiko Solar Energy Technology Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H01L31/0682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells back-junction, i.e. rearside emitter, solar cells, e.g. interdigitated base-emitter regions back-junction cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention discloses a diffusion and cleaning method of an IBC solar cell, which comprises the following steps: s1, placing the textured silicon wafer into diffusion equipment, and forming an n + diffusion layer and a PSG mask layer on the back surface of the silicon wafer; s2, carrying out laser ablation on the back surface of the silicon wafer; s3, cleaning the silicon wafer subjected to laser ablation by adopting alkaline cleaning liquid to form a p area recessed along the back surface of the silicon wafer; and S4, cleaning the silicon wafer by adopting an acid cleaning solution, and removing the PSG mask layer. The n + diffusion layer and the PSG mask layer are formed by the same equipment, so that the equipment cost is effectively reduced, the production time for replacing the equipment is reduced, and the production efficiency is improved while the production cost is reduced.

Description

IBC solar cell diffusion and cleaning method
Technical Field
The invention relates to the technical field of solar cells, in particular to an IBC solar cell diffusion and cleaning method.
Background
The current PERC battery efficiency improvement is gradually reaching the bottleneck period, and the demand of client-side assembly manufacturers for efficient batteries is continuously strong. An Interdigital Back Contact (IBC) solar cell in the high-efficiency cell structure has the advantages of high conversion efficiency, no shielding on the front surface, attractive appearance and simple and diversified component packaging.
The existing IBC process needs to realize different doping locally through multiple masks, needs to increase multiple devices and prolong the production period, and the bad proportion can also rise when each step of working procedure is added. The existing IBC method has the disadvantages of complex process, long production period, high spare power input cost and difficult realization of mass production.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a diffusion and cleaning method for an IBC solar cell, which is low in cost and high in efficiency.
In order to solve the technical problem, the invention provides a method for diffusing and cleaning an IBC solar cell, which comprises the following steps:
s1, placing the textured silicon wafer into diffusion equipment, and forming an n + diffusion layer and a PSG mask layer on the back surface of the silicon wafer, wherein the thickness of the PSG mask layer is 50-150 nm;
s2, carrying out laser ablation on the back surface of the silicon wafer, and removing the PSG mask layer and the n + diffusion layer in the preset area;
s3, cleaning the silicon wafer subjected to laser ablation by adopting alkaline cleaning solution, removing the residual n + diffusion layer and laser damage, and forming a p region recessed along the back surface of the silicon wafer;
and S4, cleaning the silicon wafer by adopting an acid cleaning solution, and removing the PSG mask layer.
As a modification of the above, in step S1, the method for forming the n + diffusion layer and the PSG mask layer on the front surface of the silicon wafer includes:
s11, placing the textured silicon wafer into diffusion equipment, and introducing nitrogen, phosphorus oxychloride gas and oxygen at a first temperature and a first pressure to form an n + diffusion layer on the front surface of the silicon wafer;
and S12, stopping introducing nitrogen and phosphorus oxychloride gas at the second temperature and the second pressure, and introducing oxygen to form a PSG mask layer with the thickness of 50-150 nm on the n + diffusion layer.
As a modification of the above, the second temperature is lower than the first temperature; the oxygen flow rate in step S11 is smaller than the oxygen flow rate in step S12.
As an improvement of the above scheme, in step S11, the first temperature is 750-1050 ℃, and the formation time of the n + diffusion layer is 30-60 min.
As an improvement of the above scheme, in step S12, the second temperature is 650-800 ℃, and the PSG mask layer formation time is 30-180 min.
As an improvement of the above scheme, in step S12, the flow rate of oxygen is 500-1000 sccm.
As an improvement of the above scheme, in step S12, the flow rate of oxygen is 600 to 900sccm, and the forming time of the PSG mask layer is 40 to 120 min.
In an improvement of the above, in step S1, the PSG mask layer has a thickness of 60 to 120 nm.
In step S3, the alkaline cleaning solution contains 1-10% KOH and 0.1-2% mask protection additive, the cleaning time is 2-20 min, and the temperature of the alkaline cleaning solution is 20-90 ℃.
The implementation of the invention has the following beneficial effects:
the n + diffusion layer and the PSG mask layer are formed by the same equipment, so that the equipment cost is effectively reduced, the production time for replacing the equipment is reduced, and the production efficiency is improved while the production cost is reduced.
The PSG mask layer material is made of phosphorosilicate glass, and compared with the existing mask, the PSG mask layer material has the characteristics of alkali resistance and acid resistance.
According to the invention, a PSG mask layer with the thickness of 50-150 nm is formed by adopting diffusion equipment through a specific process (the second temperature is lower than the first temperature, and the oxygen flow in the step S11 is lower than the oxygen flow in the step S12) under the condition of not influencing the doping effect of the n + diffusion layer.
Because the PSG mask layer is formed in the diffusion equipment, and the thickness of the PSG mask layer is thinner than that of the mask layer formed by PVCAD equipment, a small amount of mask protection additive is added into the alkaline cleaning solution, so that the PSG mask layer can be effectively protected, and the alkaline cleaning effect is ensured.
Drawings
FIG. 1 is a flow chart of the P-type IBC solar cell diffusion and cleaning method of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to the accompanying drawings. It is only noted that the invention is intended to be limited to the specific forms set forth herein, including any reference to the drawings, as well as any other specific forms of embodiments of the invention.
Referring to fig. 1, the invention provides a P-type IBC solar cell diffusion and cleaning method, including the following steps:
s1, placing the textured silicon wafer into diffusion equipment, and forming an n + diffusion layer and a PSG mask layer on the back surface of the silicon wafer, wherein the thickness of the PSG mask layer is 50-150 nm;
the material of the existing mask layer is alkali-resistant but acid-resistant, and is generally SiO2So that it can play a role of protecting the n + diffusion layer in the subsequent process.
In the prior art, the n + diffusion layer is formed in the diffusion equipment, and the mask layer is formed in the PECVD equipment, so that in the prior art, the diffusion process (n + diffusion layer) and the mask process (mask layer) are separately formed and need two different equipments, which increases the equipment cost and increases the production time.
The n + diffusion layer and the PSG mask layer are formed by the same equipment, so that the equipment cost is effectively reduced, the production time for replacing the equipment is reduced, and the production efficiency is improved while the production cost is reduced.
The PSG mask layer material is made of phosphorosilicate glass, and has the characteristics of alkali resistance and acid resistance. In the conventional diffusion process, when an n + diffusion layer is formed, a thin layer of phosphosilicate glass is formed on the surface of the n + diffusion layer, but the thickness is only about 20nm, so that the phosphosilicate glass formed by the conventional diffusion process cannot be used as a mask layer. Since 20nm thick phosphosilicate glass is easily corroded by alkali, the n + diffusion layer cannot be protected. The thickness of the phosphorosilicate glass can be more than 50nm, and the phosphorosilicate glass can be used as a mask layer to protect the n + diffusion layer only if the phosphorosilicate glass can resist the corrosion of alkali liquor.
In the existing diffusion process, the forming time can only be prolonged when the phosphorosilicate glass with the thickness of more than 50nm is formed. If the diffusion process time is simply continued, the doping effect of the n + diffusion layer is formed, and the stress between the silicon wafer and the n + diffusion layer is also affected. Therefore, in order to form a high-quality n + diffusion layer and phosphorosilicate glass with a thickness of 50nm or more in the diffusion device, the formation processes of the n + diffusion layer and the phosphorosilicate glass need to be separated.
Specifically, in step S1, the method for forming the n + diffusion layer and the PSG mask layer on the front surface of the silicon wafer includes:
s11, placing the textured silicon wafer into diffusion equipment, and introducing nitrogen, phosphorus oxychloride gas and oxygen at a first temperature and a first pressure to form an n + diffusion layer on the front surface of the silicon wafer;
and S12, stopping introducing nitrogen and phosphorus oxychloride gas at the second temperature and the second pressure, and introducing oxygen to form a PSG mask layer with the thickness of 50-150 nm on the n + diffusion layer.
Specifically, in step S11, the first temperature is 750-1050 ℃, the first pressure is 40-400 mTor, and the forming time is 30-60 min.
The first temperature, the first pressure and the forming time play an important role in the doping effect and the layer thickness of the n + diffusion layer, and if the first temperature is lower than 750 ℃, the doping effect of the n + diffusion layer is not uniform; if the first temperature is higher than 1050 ℃, the stress between the silicon wafer and the n + diffusion layer is too large, and the effect of the n + diffusion layer is influenced.
Preferably, the first temperature is 750-850 ℃, the first pressure is 50-200 mTor, and the forming time is 20-40 min.
It should be noted that the second temperature is lower than the first temperature, and since the PSG mask layer is formed for a longer time in step S12, if the second temperature is higher than or equal to the first temperature, the doping effect of the n + diffusion layer formed first will be affected. Therefore, when the silicon wafer and the n + diffusion layer are kept at a high temperature for a long time, the stress between the silicon wafer and the n + diffusion layer and the structure of the n + diffusion layer are affected.
Preferably, the second temperature is 650-800 ℃. More preferably, the second temperature is 650-750 ℃.
In step S12, the PSG mask layer is formed for at least 30-180 min if the thickness of the PSG mask layer is 50-150 nm. In addition, the thickness of the PSG mask layer is 50-150 nm, and the flow rate of oxygen is 500-1000 sccm in step S12. If the forming time of the PSG mask layer is less than 30min and the oxygen flow is less than 500sccm in step S12, the thickness of the PSG mask layer cannot reach more than 50 nm. In addition, if the oxygen flow is less than 500sccm, the compactness of the PSG mask layer is also affected.
Preferably, the thickness of the PSG mask layer is 60-120 nm. Preferably, the thickness of the PSG mask layer is 80-100 nm.
Preferably, in step S12, the PSG mask layer is formed for 40 to 120min at an oxygen flow rate of 600 to 900 sccm. Preferably, in step S12, the PSG mask layer is formed for 40-80 min at an oxygen flow rate of 700-800 sccm.
The flow rate of oxygen in step S12 is greater than the flow rate of oxygen in step S11. In step S11, the flow rate of the three gases is required to meet the preset value and the preset proportional relationship to form a high-quality n + diffusion layer, so in step S11, the flow rate of the oxygen is relatively fixed and cannot be changed at will. In step S12, the two other gases are stopped to flow, so that the flow of oxygen is not affected by the other gases, and the thickness of the PSG mask layer can be increased by increasing the flow of oxygen.
Specifically, the silicon wafer is a P-type silicon wafer, the thickness of the silicon wafer is 50-200 mu m, the resistivity of the silicon wafer is 0.3-10 omega-cm, the minority carrier lifetime of the silicon wafer is 0.2-2 ms, and a pyramid light trapping structure is formed on the surface of the silicon wafer after texturing.
S2, carrying out laser ablation on the back surface of the silicon wafer, and removing the PSG mask layer and the n + diffusion layer in the preset area;
s3, cleaning the silicon wafer subjected to laser ablation by adopting alkaline cleaning solution, removing the residual n + diffusion layer and laser damage, and forming a p region recessed along the back surface of the silicon wafer;
it should be noted that laser ablation is limited by the technology, and the depth of the ablation region formed by laser ablation is only about 1 μm, so that an n + diffusion layer is easily left and a certain amount of laser damage is generated, so that it is necessary to clean the silicon wafer after laser ablation with an alkaline cleaning solution, remove the remaining n + diffusion layer and laser damage, and form a p region.
In step S3, the PSG mask layer formed as described above can protect the n + diffusion layer of the n region.
Here, the n-region and the p-region are opposite concepts, the n-region is a region where an n-type structure is formed, the p-region is a region where a p-type structure is formed, and the n-region and the p-region are alternately arranged. The n + diffusion layer is one of n-type structures.
It should be noted that, in the cleaning process of step S3, the silicon wafer may be continuously etched to form a p region recessed by 2-7 μm along the back surface of the silicon wafer.
Specifically, in step S3, the alkaline cleaning solution contains 1% to 10% of KOH and 0.1% to 2% of a mask protection additive, the cleaning time is 2 to 20min, and the temperature of the alkaline cleaning solution is 20 to 90 ℃.
The mask layer formed by the existing PECVD equipment has larger thickness, so that a PECVD mask protective additive does not need to be added. Because the PSG mask layer is formed in the diffusion equipment, and the thickness of the PSG mask layer is thinner than that of the mask layer formed by PECVD equipment, a small amount of mask protection additive is added into the alkaline cleaning solution, so that the PSG mask layer can be effectively protected, and the alkaline cleaning effect is ensured.
The content of the mask protection additive has an important influence on the alkaline cleaning effect, and if the content of the mask protection additive is less than 0.1%, the PSG mask layer cannot be protected; if the content of the protective additive is more than 2%, the influence on KOH corrosion of the silicon wafer is influenced, and a p region with a preset depth cannot be formed.
Preferably, in step S3, the alkaline cleaning solution contains 1% to 5% of KOH and 0.1% to 0.5% of a mask protection additive, the cleaning time is 2 to 8min, and the temperature of the alkaline cleaning solution is 40 to 70 ℃.
Preferably, the mask protection additive is BP51 alkali polishing additive from topont corporation.
S4, cleaning the silicon wafer by adopting an acid cleaning solution, and removing the PSG mask layer;
specifically, in step S4, the PSG mask layer on the n + diffusion layer is removed by the acidic cleaning solution, leaving only the n + diffusion layer. Wherein the acidic solution contains hydrofluoric acid.
In the existing cleaning process, the phosphorosilicate glass on the n + diffusion layer is removed while the mask layer is removed. Because the PSG mask layer is made of phosphorosilicate glass, the cleaning method is simpler than the existing cleaning method and has shorter cleaning time.
While the invention has been described in connection with what is presently considered to be the most practical and preferred embodiment, it is to be understood that the invention is not to be limited to the disclosed embodiment, but on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

Claims (9)

1. A diffusion and cleaning method for an IBC solar cell is characterized by comprising the following steps:
s1, placing the textured silicon wafer into diffusion equipment, and forming an n + diffusion layer and a PSG mask layer on the back surface of the silicon wafer, wherein the thickness of the PSG mask layer is 50-150 nm;
s2, carrying out laser ablation on the back surface of the silicon wafer, and removing the PSG mask layer and the n + diffusion layer in the preset area;
s3, cleaning the silicon wafer subjected to laser ablation by adopting alkaline cleaning solution, removing the residual n + diffusion layer and laser damage, and forming a p region recessed along the back surface of the silicon wafer;
and S4, cleaning the silicon wafer by adopting an acid cleaning solution, and removing the PSG mask layer.
2. The method for diffusing and cleaning the IBC solar cell of claim 1, wherein the step S1, the method for forming the n + diffusion layer and the PSG mask layer on the front surface of the silicon wafer comprises:
s11, placing the textured silicon wafer into diffusion equipment, and introducing nitrogen, phosphorus oxychloride gas and oxygen at a first temperature and a first pressure to form an n + diffusion layer on the front surface of the silicon wafer;
and S12, stopping introducing nitrogen and phosphorus oxychloride gas at the second temperature and the second pressure, and introducing oxygen to form a PSG mask layer with the thickness of 50-150 nm on the n + diffusion layer.
3. The method for diffusing and cleaning an IBC solar cell of claim 2, wherein the second temperature is less than the first temperature; the oxygen flow rate in step S11 is smaller than the oxygen flow rate in step S12.
4. The method for diffusing and cleaning the IBC solar cell according to claim 2, wherein the first temperature is 750 to 1050 ℃ and the time for forming the n + diffusion layer is 30 to 60min in step S11.
5. The method for diffusing and cleaning the IBC solar cell according to claim 2, wherein the second temperature is 650 to 800 ℃ and the PSG mask layer is formed for 30 to 180min in step S12.
6. The method according to claim 3, wherein the flow rate of the oxygen gas in step S12 is 500-1000 sccm.
7. The method as claimed in claim 6, wherein in step S12, the flow rate of oxygen is 600-900 sccm, and the PSG mask layer is formed for 40-120 min.
8. The method for diffusing and cleaning the IBC solar cell of claim 1, wherein in step S1, the PSG mask layer has a thickness of 60-120 nm.
9. The method for diffusing and cleaning the IBC solar cell as claimed in claim 1, wherein the alkaline cleaning solution comprises 1-10% KOH and 0.1-2% mask protection additives, the cleaning time is 2-20 min, and the temperature of the alkaline cleaning solution is 20-90 ℃ in step S3.
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CN103022265A (en) * 2013-01-10 2013-04-03 英利集团有限公司 Solar cells and diffusion method thereof
CN106057921A (en) * 2016-07-20 2016-10-26 苏州阿特斯阳光电力科技有限公司 Micro-nano textured solar cell emitter, solar cell provided with same, and manufacturing method thereof
CN109686660A (en) * 2018-12-26 2019-04-26 浙江晶科能源有限公司 A kind of preparation method of solar battery
CN109888062A (en) * 2019-03-29 2019-06-14 江苏日托光伏科技股份有限公司 A kind of MWT solar battery laser SE+ alkali polishing diffusion technique
CN110518088A (en) * 2019-07-18 2019-11-29 天津爱旭太阳能科技有限公司 A kind of preparation method of SE solar battery

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102969403A (en) * 2012-12-12 2013-03-13 泰州德通电气有限公司 Diffusion technology for preparing Se battery by using etching process
CN103022265A (en) * 2013-01-10 2013-04-03 英利集团有限公司 Solar cells and diffusion method thereof
CN106057921A (en) * 2016-07-20 2016-10-26 苏州阿特斯阳光电力科技有限公司 Micro-nano textured solar cell emitter, solar cell provided with same, and manufacturing method thereof
CN109686660A (en) * 2018-12-26 2019-04-26 浙江晶科能源有限公司 A kind of preparation method of solar battery
CN109888062A (en) * 2019-03-29 2019-06-14 江苏日托光伏科技股份有限公司 A kind of MWT solar battery laser SE+ alkali polishing diffusion technique
CN110518088A (en) * 2019-07-18 2019-11-29 天津爱旭太阳能科技有限公司 A kind of preparation method of SE solar battery

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