CN113363137A - Monitoring method for SiGe structure carrier concentration - Google Patents
Monitoring method for SiGe structure carrier concentration Download PDFInfo
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- 229910000577 Silicon-germanium Inorganic materials 0.000 title claims abstract description 139
- 238000000034 method Methods 0.000 title claims abstract description 68
- 238000012544 monitoring process Methods 0.000 title claims abstract description 66
- 230000004888 barrier function Effects 0.000 claims abstract description 39
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- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 10
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- 239000002019 doping agent Substances 0.000 claims description 3
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- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
Abstract
The invention provides a monitoring method of SiGe structure carrier concentration, which comprises the following steps: obtaining correlation data between the hole carrier concentration of the SiGe structure and the resistivity of the SiGe structure; providing a monitoring wafer, and forming a SiGe structure with P-type doped ions on the surface of the monitoring wafer by a SiGe process corresponding to a product wafer; forming a barrier layer on the surface of the monitoring wafer, wherein the barrier layer covers the SiGe structure; and obtaining the resistivity of the monitoring wafer, and combining the correlation data to obtain the hole carrier concentration of the product wafer. The barrier layer is formed on the surface of the SiGe structure, so that the change of the resistivity of the SiGe structure is slowed down, and the accurate, economic and efficient monitoring of the carrier concentration of the SiGe structure of a product wafer is realized; and combining the obtained correlation data, the specific hole carrier concentration can be obtained; due to the simplicity and the feasibility of the monitoring method, the monitoring frequency can be improved to realize the stability monitoring of the production line with high frequency.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a method for monitoring the carrier concentration of a SiGe structure.
Background
With the rapid development of semiconductor technology, the size of MOSFET devices is continuously decreasing, and usually includes the reduction of the channel length of MOSFET devices, the reduction of the thickness of gate oxide layers, and the like, to obtain faster device speed. However, as the vlsi technology is developed to ultra-deep submicron, especially at the technology node of 28nm and below, reducing the channel length brings a series of problems, such as the reduction of carrier mobility and the reduction of device performance, and the simple size reduction of the device is difficult to satisfy the development of the lsi technology. Therefore, the SiGe process is selected during epitaxial growth, and the formed SiGe structure is utilized to meet the electrical requirement of PMOS with the hole carrier mobility being below 28nm, so that the SiGe structure is widely applied.
However, in the growing process of the SiGe structure, especially in the growing process of the large-scale production and manufacture of the SiGe structure, how to accurately, economically and efficiently monitor the carrier concentration of the SiGe structure has been a difficult problem. For example, SIMS (secondary ion spectroscopy), which is commonly used in the industry, can characterize the hole carrier concentration by the boron ion concentration of the SiGe structure, and the test result is relatively accurate, but the high equipment cost, the high operation requirement and the slow test speed are difficult to meet the requirement of mass production and manufacturing, especially as a daily monitoring method. Meanwhile, 4PP (Four point probe) is adopted in the industry to directly monitor the carrier concentration of the SiGe structure by testing the resistivity, the testing process is simple and easy to implement, but the testing result is often inaccurate and unstable, and the direct application effect is not ideal.
Therefore, a better method for monitoring the carrier concentration of the SiGe structure is needed.
Disclosure of Invention
The invention aims to provide a method for monitoring the carrier concentration of a SiGe structure, which aims to solve the problem of accurately, economically and efficiently monitoring the carrier concentration of the SiGe structure.
In order to solve the above technical problem, the present invention provides a method for monitoring a carrier concentration of a SiGe structure, including: obtaining correlation data between the hole carrier concentration of the SiGe structure and the resistivity of the SiGe structure; providing a monitoring wafer, and forming a SiGe structure with P-type doped ions on the surface of the monitoring wafer by a SiGe process corresponding to a product wafer; forming a barrier layer on the surface of the monitoring wafer, wherein the barrier layer covers the SiGe structure; and obtaining the resistivity of the monitoring wafer, and combining the correlation data to obtain the hole carrier concentration of the product wafer.
Optionally, the step of obtaining correlation data between the hole carrier concentration of the SiGe structure and the resistivity of the SiGe structure includes: providing a plurality of test wafers, and respectively forming SiGe structures with different P-type doped ion concentrations on the surfaces of the test wafers; forming the barrier layer on the surface of the test wafer, wherein the barrier layer covers the SiGe structure; carrying out hole carrier concentration test and resistivity test on the test wafer; correlation data between hole carrier concentration and corresponding resistivity of the SiGe structure is obtained.
Optionally, the method for testing the hole carrier concentration is SIMS.
Optionally, the barrier layer is a single crystal silicon layer.
Optionally, the thickness of the barrier layer is 40 to 500 angstroms.
Optionally, the SiGe structure and the barrier layer are formed sequentially in the same CVD apparatus.
Optionally, the correlation between the hole carrier concentration of the SiGe structure and the resistivity of the SiGe structure is represented as: y-0.76 x-0.013 (R)20.9981), where y represents the rate of change of resistivity, x represents the rate of change of P-type dopant ions, and R is the correlation coefficient.
Optionally, the P-type doped ions are boron ions.
Optionally, the boron ion concentration is used to represent the hole carrier concentration.
Optionally, the resistivity testing method is a four-probe resistivity testing method.
In summary, the monitoring method for the carrier concentration of the SiGe structure provided by the present invention has the following beneficial effects:
1) the barrier layer is formed on the surface of the SiGe structure, so that the change of the resistivity of the SiGe structure is slowed down, the resistivity of the monitoring wafer is utilized, and the accurate, economic and efficient monitoring of the carrier concentration of the SiGe structure of the product wafer is realized;
2) in normal mass production, equipment and processes are rarely changed, and the change of the hole carrier concentration of a product wafer can be obtained by monitoring the resistivity change of the wafer in combination with the obtained correlation data between the hole carrier concentration of the SiGe structure and the resistivity of the SiGe structure;
2) due to the fact that the monitoring method is simple and easy to implement, the monitoring frequency of the carrier concentration of the SiGe structure can be improved, and high-frequency production line stability monitoring is achieved.
Drawings
It will be appreciated by those skilled in the art that the drawings are provided for a better understanding of the invention and do not constitute any limitation to the scope of the invention. Wherein:
FIG. 1 is a schematic diagram of a four probe test of a prior art SiGe structure;
FIG. 2 is a graph of resistance versus Q-time for a prior art resistor;
FIG. 3 is a schematic diagram of a four-probe test of a SiGe structure provided by an embodiment of the present application;
FIG. 4 is a diagram illustrating the relationship between the resistance and Q-time provided by an embodiment of the present application;
FIG. 5 is a schematic diagram showing the relationship between the resistivity change rate and the carrier concentration change rate provided by the embodiment of the present application;
fig. 6 is a flowchart of a monitoring method for a carrier concentration of a SiGe structure provided by the present application.
In fig. 1:
a 10' -SiGe structure; 101' -hole carriers;
20' -a native oxide layer; 201' -dangling bond charge;
30' -four-probe tester;
in fig. 2:
a 10-SiGe structure; 101-hole carriers;
20-a natural oxide layer; 201-dangling bond charge;
30-four probe tester;
40-dielectric layer.
Detailed Description
Fig. 1 is a schematic diagram of a four probe test of a prior art SiGe structure. As shown in fig. 1, when the resistivity of the SiGe structure 10 'is tested by using the four-probe tester 30', the test result is unstable and there is a trend of gradually increasing as the Q-time (waiting time) is extended. The inventor researches and discovers that the unstable test result is caused by the fact that silicon atoms exposed on the surface of the wafer are gradually and naturally oxidized after being contacted with air after the wafer is monitored and removed from a growth machine. Specifically, the hole carriers 101 'on the surface of the SiGe structure 10' are recombined with the dangling bond charges 201 'in the native oxide layer 20' formed on the surface thereof to form trapped charges, which results in a high resistivity and a low conductivity.
Meanwhile, as can be seen from the research data (as shown in fig. 2) of the inventor, the natural oxidation has a very serious negative effect on the resistance test of the SiGe structure 10 ', the resistivity of the SiGe structure 10' increases almost linearly and sharply in the initial stage of moving out of the machine and contacting with air, and becomes higher as the diffusion oxidation gradually slows down and becomes higher as a function of ln as a whole.
Based on the above research, embodiments of the present invention provide a method for monitoring a carrier concentration of a SiGe structure, which is implemented by forming a barrier layer on a surface of the SiGe structure of a monitored wafer on the basis of obtaining correlation data between the carrier concentration of the SiGe structure and a resistivity of the SiGe structure, then performing a resistivity test, and monitoring the carrier concentration of the SiGe structure according to a resistivity test result and the obtained correlation data. The monitoring method is not only accurate, but also economical and efficient.
To further clarify the objects, advantages and features of the present invention, a more particular description of the invention will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings. It is to be noted that the drawings are in greatly simplified form and are not to scale, but are merely intended to facilitate and clarify the explanation of the embodiments of the present invention. Further, the structures illustrated in the drawings are often part of actual structures. In particular, the drawings may have different emphasis points and may sometimes be scaled differently.
As used in this application, the singular forms "a", "an" and "the" include plural referents, the term "or" is generally employed in a sense including "and/or," the terms "a" and "an" are generally employed in a sense including "at least one," the terms "at least two" are generally employed in a sense including "two or more," and the terms "first", "second" and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicit to the number of technical features indicated. Thus, features defined as "first," "second," and "third" may explicitly or implicitly include one or at least two of the features unless the content clearly dictates otherwise.
Fig. 6 is a flowchart of a monitoring method for a carrier concentration of a SiGe structure provided by the present application. As shown in fig. 6, the present embodiment provides a method for monitoring a carrier concentration of a SiGe structure, which includes the following steps:
s01: obtaining correlation data between the hole carrier 101 concentration of the SiGe structure 10 and the resistivity of the SiGe structure;
s02: providing a monitoring wafer, and forming a SiGe structure 10 with P-type doped ions on the surface of the monitoring wafer by a SiGe process corresponding to a product wafer;
s03: forming a barrier layer 40 on the surface of the monitoring wafer, wherein the barrier layer 40 covers the SiGe structure 10;
s04: and obtaining the resistivity of the monitoring wafer, and combining the correlation data to obtain the hole carrier concentration of the product wafer.
In this embodiment, the specific process of step S01 includes: providing a plurality of test wafers, respectively forming SiGe structures 10 with different P-type doped ion concentrations on the surfaces of the test wafers, forming a barrier layer 40 on the surface of each test wafer, covering the SiGe structures 10 with the barrier layer 40, and then carrying out hole carrier concentration test and resistivity test on the test wafers; correlation data between the hole carrier concentration and the corresponding resistivity of the SiGe structure 10 is obtained.
Where the P-type dopant ions may be boron ions, the hole carrier 101 in the SiGe structure 10 may be realized by doping boron ions in a SiGe process, and those skilled in the art will understand that, within a certain range, the hole carrier concentration of the SiGe structure 10 is expressed by the boron ion concentration.
Thus, SiGe structures 10 of different boron ion concentrations can be formed in several ways to represent SiGe structures 10 having concentrations corresponding to different hole carriers 101.
In particular implementations, the test wafer may be a blank wafer (blank wafer) for economic and efficiency reasons. The different boron ion concentrations may be equally spaced, and in a preferred embodiment, the different boron ion concentrations are centered around the center of the boron ion concentration of the SiGe process, and cover all possible boron ion concentration ranges involved in the SiGe process, such as 9.4ppma to 10.6 ppma.
It is worth mentioning that in general the process parameters can be expressed as the process set center plus a range (e.g. boron concentration of 1000 ± 60ppma), whereby the representation of the different boron concentrations can be expressed in a more optimal way: the boron ion concentration center value of the SiGe process is set as a reference value, the boron ion concentration center value is respectively distributed at equal percentage intervals from the upper center and the lower center by taking the reference value as the center, and the boron ion concentration center value at least comprises the maximum allowable range of the process. For example, the boron concentration is represented by-6% (corresponding to 940ppma), -3% (corresponding to 970ppma), 0 (corresponding to 1000ppma), 3% (corresponding to 1030ppma), and 6% (corresponding to 1060 ppma).
It will be appreciated that the wafer monitor wafer is oxygen-insulated from the formation of the SiGe structure 10 to the formation of the barrier layer 40 to prevent the SiGe structure 10 from being spontaneously oxidized. Preferably, the SiGe structure 10 and the barrier layer 40 are formed sequentially in the same equipment, which is highly efficient and prevents the SiGe structure 10 from being oxidized naturally after the wafer monitor wafer is removed from the machine.
As an example, the SiGe structure 10 may be formed by CVD, and the process gas introduced into the CVD tool may include monosilane, germane and diborane, for example. After the SiGe structure 10 is formed on the surface of the test wafer, the process may be adjusted directly in the CVD tool to form the barrier layer 40.
Preferably, the barrier layer 40 is a single crystal silicon layer that can be formed using monosilane in the process gas to overlie the surface of the SiGe structure to a thickness of less than 500 angstroms. It will be understood that the thickness of the single crystal silicon layer as the barrier layer 40 may not be too thick, otherwise the resistance of the single crystal silicon layer in parallel with the SiGe structure becomes small, resulting in a small resistivity test result. In practice, a monocrystalline silicon layer with an excessively thin thickness is not easy to be formed uniformly, and the blocking effect is difficult to be ensured, so that the thickness of the blocking layer 40 may be between 40 angstroms and 500 angstroms.
In practice, to ensure stability of the multiple monitoring measurements, the barrier layer 40, i.e., the single crystal silicon layer, may be formed to the same thickness.
Fig. 3 is a schematic diagram of a four-probe test of a SiGe structure provided by an embodiment of the present application. Resistivity tests were performed on several of the test wafers described above, as shown in fig. 3. The resistivity test may be performed by using a four-probe tester 30, which is a multi-purpose integrated measuring device using a four-probe measuring principle, designed according to the national standard of the physical test method for single crystal silicon and with reference to the american standard a.s.t.m., and is a dedicated instrument for testing the resistivity and sheet resistance (sheet resistance) of semiconductor materials. In practice, the sheet resistance of the semiconductor material is directly measured by the four-probe tester 30, and then the thickness of the semiconductor material is combined, so that the corresponding resistivity can be obtained through conversion. The four-probe tester 30 is simple and easy to operate, cheap in equipment and high in testing speed.
The relationship between the resistance and the Q-time of the resulting SiGe structure 10 with the barrier layer 40 formed thereon is shown in fig. 4. Since the barrier layer 40 is formed on the test wafer, it not only prevents the natural oxidation of the SiGe structure, but also ensures the accuracy of the resistivity test with the appropriate thickness control.
Meanwhile, SIMS (secondary ion spectroscopy) can also be used to achieve accurate measurement of the boron ion concentration in the SiGe structure 10. SIMS is a very sensitive instrument for the precise analysis of surface components, and is the leading edge of surface analysis technology. The method is characterized in that a sample surface is bombarded by a high-energy primary ion beam, so that molecules on the sample surface absorb energy and sputter from the surface to generate secondary particles, and the secondary ions are collected and analyzed by a mass analyzer, so that a map about the sample surface information can be obtained. The boron ion concentration of the several test wafers described above, i.e., the concentration of hole carriers 101 corresponding to the SiGe structure 10, can be determined by SIMS.
In specific implementation, based on the obtained multiple one-to-one corresponding hole carrier 101 concentration test results and resistivity test results, correlation data between carrier concentration and resistivity can be directly established. It should be understood that the resulting correlation data between carrier concentration and resistivity may vary from process to process in forming the SiGe structure 10, and that changing the process requires re-establishing the correlation data between carrier concentration and resistivity. This makes it possible to achieve a conversion between the resistivity and the hole carrier concentration.
It should be noted that, for convenience of subsequent analysis and monitoring of the fluctuation of the process, the data of the correlation between the hole carrier concentration (boron ion concentration) and the resistivity may be converted into the correlation between the carrier concentration change rate and the resistivity change rate, where the carrier concentration change rate takes the carrier concentration center value of the SiGe process as the change rate of the reference value, and the resistivity change rate takes the resistivity center value of the SiGe process as the change rate of the reference value. The thus established dependency data will be more intuitive.
For example, the obtained correlation data are as follows:
| boron-6% group | Boron-3% group | Reference group | Boron + 3% of the group | Boron + 6% group | |
| Boron concentration-rate of change | -6 | -3 | 0 | 3 | 6 |
| Resistor (ohm) | 840.2 | 822.3 | 802.2 | 780.9 | 765 |
| Rate of change in resistance (%) | 4.7 | 2.5 | 0 | -2.7 | -4.6 |
| Resistivity (ohm, cm) | 0.00330 | 0.00323 | 0.00315 | 0.00307 | 0.00301 |
| Rate of change of resistivity (%) | 4.5 | 2.4 | 0 | -2.6 | -4.5 |
Fig. 5 is a schematic diagram of a relationship between a resistivity change rate and a carrier concentration change rate provided in an embodiment of the present application. As shown in fig. 5, the correlation data can be expressed as a linear regression equation:
y＝-0.76x-0.013(R2＝0.9981)，
where y represents the rate of change of resistivity in%, x represents the rate of change of hole carriers in%, and R is the correlation coefficient. Of course, it is also possible to directly establish the correlation data of the hole carrier concentration and the resistivity without making the above change.
Next, step S02 is executed. In this embodiment, the SiGe structure 10 having P-type doped ions is formed on the surface of the monitor wafer by a process corresponding to the product wafer, so as to achieve the purpose of monitoring the hole carriers of the product wafer (pattern wafer) by using the monitor wafer. It will be appreciated by those skilled in the art that, since the monitor wafer is a blank wafer (dummy wafer) as opposed to a product wafer (pattern wafer), the SiGe forming process differs for effective monitoring, and the specific differences vary from device to device and process to process.
Next, step S03 is executed. In this embodiment, a barrier layer 40 is formed on the surface of the monitor wafer, and the barrier layer 40 covers the SiGe structure 10. Preferably, barrier layer 40 is a single crystal silicon layer, and the process and steps for forming barrier layer 40 are the same as those for forming barrier layer 40 in the correlation data obtained in step S01 described above.
It should be noted that in step S03, the barrier layer is formed only on the surface of the monitor wafer to facilitate the test after the monitor wafer is removed from the growth apparatus, and the process steps of the production wafer are consistent with the conventional process steps and are not to form the barrier layer 40.
Next, step S04 is executed. In this embodiment, the resistivity of the monitored wafer is obtained, and the hole carrier concentration of the product wafer is obtained by combining the correlation data.
Since the SiGe structure 10 of the monitor wafer is covered with the barrier layer 40, i.e. the single crystal silicon layer, it not only greatly delays the natural oxidation of the SiGe structure during the test process, but also ensures the accuracy of the resistivity test under the condition that the thickness of the SiGe structure is controlled to be proper. Preferably, the resistivity is measured using a four-probe tester 30, which is simple, easy, and fast, and can be averaged over multiple measurements of different regions to improve the accuracy of the resistivity measurement.
Since conductivity reflects the conductivity of a material, for P-type semiconductors, conductivity can be expressed approximately as σ ═ qp μpWhere q is the charge carrier, p is the hole concentration, and μ p is the hole mobility. The conductivity and the resistivity are reciprocal to each other, and it can be seen from the above formula that the hole carrier concentration and the conductivity of the semiconductor have a strong approximately linear correlation. Therefore, the resistivity of the product wafer can be monitored by obtaining the resistivity of the monitor wafer, so that the qualitative monitoring of the hole flow concentration of the SiGe structure 10 of the product wafer is realized.
Further, in combination with the correlation data between the hole carrier concentration of the SiGe structure and the resistivity of the SiGe structure obtained in step S01, the hole carrier concentration of the SiGe structure 10 of the product wafer can also be quantitatively monitored.
As a non-limiting example, a linear regression equation to obtain correlation data: y-0.76 x-0.013 (R)20.9981), y represents the rate of change in resistivity, and x represents the rate of change in hole carrier concentration (rate of change in boron concentration). If the measured and converted resistivity change rate y is 2.4%, and y is 2.4%, the correlation is substituted with y, so that the hole carrier change rate x is-4.9%, and x is-4.9% indicating that the boron ion concentration of the wafer monitor wafer SiGe structure 10 is reduced by 4.9% from the boron ion concentration center value of the SiGe process, that is, the hole carrier concentration is reduced by 4.9%.
In concrete implementation, if the correlation data between the hole carrier concentration of the SiGe structure and the resistivity of the SiGe structure is obtained in step S01, the same SiGe process is used for wafers of the same type, and when the carrier concentration of the SiGe structure formed by the SiGe process is monitored, only steps S02 to S04 may be performed. Therefore, the monitoring frequency can be further improved on the basis of the conventional monitoring frequency, so that the stability monitoring of the production line with high frequency is realized.
In summary, the monitoring method for the carrier concentration of the SiGe structure provided by the present invention has the following beneficial effects:
1) the barrier layer is formed on the surface of the SiGe structure, so that the change of the resistivity of the SiGe structure is slowed down, the resistivity of the monitoring wafer is utilized, and the accurate, economic and efficient monitoring of the carrier concentration of the SiGe structure of the product wafer is realized;
2) in normal mass production, equipment and processes are rarely changed, and the change of the hole carrier concentration of a product wafer can be obtained by monitoring the resistivity change of the wafer in combination with the obtained correlation data between the hole carrier concentration of the SiGe structure and the resistivity of the SiGe structure;
3) due to the fact that the monitoring method is simple and easy to implement, the monitoring frequency of the carrier concentration of the SiGe structure can be improved, and high-frequency production line stability monitoring is achieved.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.
Claims (10)
1. A method for monitoring the carrier concentration of a SiGe structure is characterized by comprising the following steps:
obtaining correlation data between the hole carrier concentration of the SiGe structure and the resistivity of the SiGe structure;
providing a monitoring wafer, and forming a SiGe structure with P-type doped ions on the surface of the monitoring wafer by a SiGe process corresponding to a product wafer;
forming a barrier layer on the surface of the monitoring wafer, wherein the barrier layer covers the SiGe structure;
and obtaining the resistivity of the monitoring wafer, and combining the correlation data to obtain the hole carrier concentration of the product wafer.
2. The method of claim 1, wherein the step of obtaining correlation data between the hole carrier concentration of the SiGe structure and the resistivity of the SiGe structure comprises:
providing a plurality of test wafers, and respectively forming SiGe structures with different P-type doped ion concentrations on the surfaces of the test wafers;
forming the barrier layer on the surface of the test wafer, wherein the barrier layer covers the SiGe structure;
carrying out hole carrier concentration test and resistivity test on the test wafer;
correlation data between hole carrier concentration and corresponding resistivity of the SiGe structure is obtained.
3. The method for monitoring the carrier concentration of the SiGe structure of claim 2, wherein the hole carrier concentration test method is SIMS.
4. The method for monitoring hole carrier concentration of SiGe structure according to any one of claims 1 to 3, wherein the blocking layer is a single crystal silicon layer.
5. The method for monitoring the carrier concentration of the SiGe structure according to claim 4, wherein the thickness of the barrier layer is 40-500 angstroms.
6. The method for monitoring the carrier concentration of the SiGe structure as claimed in any one of claims 1 to 3, wherein the SiGe structure is formed and the barrier layer is formed sequentially in the same CVD apparatus.
7. The method for monitoring the carrier concentration of the SiGe structure according to claim 1, wherein the correlation between the hole carrier concentration of the SiGe structure and the resistivity of the SiGe structure is represented as:
y＝-0.76x-0.013(R2＝0.9981)，
wherein y represents the resistivity change rate, x represents the P-type doped ion change rate, and R is a correlation coefficient.
8. The method for monitoring the carrier concentration of the SiGe structure according to any one of claims 1 to 3, wherein the P-type dopant ions are boron ions.
9. The method for monitoring the carrier concentration of the SiGe structure of claim 8, wherein the boron ion concentration is used to represent the hole carrier concentration.
10. The method for monitoring the carrier concentration of the SiGe structure according to any one of claims 1 to 3, wherein the resistivity test method is a four-probe resistivity test method.
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