CN113346753B - Light and no-load control method and circuit of clamp asymmetric half-bridge flyback converter - Google Patents

Light and no-load control method and circuit of clamp asymmetric half-bridge flyback converter Download PDF

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CN113346753B
CN113346753B CN202110482368.6A CN202110482368A CN113346753B CN 113346753 B CN113346753 B CN 113346753B CN 202110482368 A CN202110482368 A CN 202110482368A CN 113346753 B CN113346753 B CN 113346753B
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load
flyback converter
module
switching tube
asymmetric half
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CN113346753A (en
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江波
赵强
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Mornsun Guangzhou Science and Technology Ltd
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Mornsun Guangzhou Science and Technology Ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/14—Arrangements for reducing ripples from dc input or output
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
    • H02M3/33523—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with galvanic isolation between input and output of both the power stage and the feedback loop
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention discloses a control method and a circuit of an asymmetric half-bridge flyback converter, which comprises a current detection module CS, a peak current sampling moment capture module TS, a sample hold module SS, a load calculation module LC, an output voltage isolation sampling module FB and a PWM generation and mode switching module which are electrically connected with a main circuit of the asymmetric half-bridge flyback converter. The load value of the current converter is calculated through the load calculation module, and the PWM generation and mode switching module is switched into a forced Skip mode, so that low light no-load loss is realized. The entering and exiting forced skip cycle mode can be only related to the load, can eliminate the influence of input voltage, clamping depth, system parameters and the like, and has the advantages of high consistency and strong applicability. The linear relation between the number of the reduced driving pulses and the load value detected by the primary side load can realize the advantages of low output ripple and fast dynamic response.

Description

Light and no-load control method and circuit of clamp asymmetric half-bridge flyback converter
Technical Field
The invention relates to a light and no-load control strategy of a switching converter, in particular to a light and no-load control circuit and a light and no-load control method of a clamp asymmetric half-bridge flyback converter.
Background
The asymmetric half-bridge flyback converter has the characteristic of soft switching due to the topology, and becomes a research hotspot of the high-efficiency application occasions of the existing switching power supply. When the main switch of the asymmetric half-bridge flyback converter is fully loaded and heavier, zero-voltage switching is just realized, the power level parameter design of the asymmetric half-bridge flyback converter is considered to be better, the asymmetric half-bridge flyback converter generally has higher conversion efficiency when being fully loaded and heavier, but the negative peak value of the exciting inductive current is increased along with the reduction of the load, exceeds the requirement of the main switch of the converter for realizing zero-voltage switching, generates ineffective loss, reduces the efficiency, and ensures that the converter has low light load efficiency and larger no-load power consumption.
In order to solve the problems of low light load efficiency and large no-load power consumption of an asymmetric half-bridge converter, the application number is 201911352361.1, and a Chinese patent named as a switching power supply device provides a clamp asymmetric half-bridge flyback converter, wherein a unidirectional clamp module (composed of a switch tube S3 and a diode D3) connected with a primary side of a transformer in parallel is added, a Mode switching curve shown in fig. 2 is adopted, and a controller controls the converter to work in an asymmetric half-bridge flyback Mode (AHBF Mode) or a clamp asymmetric half-bridge flyback Mode (CAHBF Mode) according to different load currents, so that the optimal heavy load or full-load efficiency can be ensured, the effective control on the negative peak value of exciting inductance current can be realized in light load, the light load efficiency of the converter is greatly improved, the no-load loss is reduced, and the system efficiency of the converter is better in the full load range.
However, the existing clamped asymmetric half-bridge flyback converter has the gain variation trend of reducing the frequency gain reduction due to the existence of the unidirectional clamping module, so that the reduction of light no-load loss (reduction of switching loss) can be realized by reducing the frequency. However, the clamping depth of the clamping module can affect the excitation current peak value IPk after final closed loop, and in the peak current control mode, the excitation current peak value IPk and the feedback voltage signal FB value of the feedback receiving end of the optical coupler have a linear relation, and the feedback voltage signal FB has uncertainty because the design of system parameters is related to users. Meanwhile, when the input voltages are different, the required clamping depths are different in order to ensure high efficiency, which means that the values of the feedback voltage signal FB are different when the input voltages are different. Due to the two factors, the feedback voltage signal FB cannot be synchronously detected to realize simple closed-loop control of the Burst mode (Burst mode) or the skip mode (skip mode), because the load states of high-voltage and low-voltage entering the Burst mode or the skip mode are different, even the Burst mode or the skip mode cannot be entered at low voltage, the setting of the threshold value is difficult to determine, and a universal controller is difficult to design to meet the normal application of power systems with different parameters.
A prototype is built by adopting the system parameters shown in the table 1, and the actually measured clamping negative current value required by the main switching tube S1 for realizing ZVS is shown in the table below.
TABLE 1
Input voltage range 85VAC-264VAC (bus voltage range is about 120VDC-370 VDC)
Output specification Vo＝12V、Io＝5A、Po＝60W
Switching frequency range 30 kHz-300 kHz (full load 300 kHz)
As shown in fig. 3, the data of the relationship between the feedback voltage signal FB and the input voltage and the output load tested by the 60W prototype is shown, the relationship between the feedback voltage signal FB and the input voltage is very large, and the clamping depth also affects the value of the feedback voltage signal FB. Therefore, the consistency and the strong applicability cannot be provided only by using the feedback voltage signal FB as the basis for the determination of entering the light no-load control mode.
According to the above description, for the clamped asymmetric half-bridge flyback converter, a common burst mode or skip cycle mode similar to that of a common asymmetric half-bridge flyback converter during light no-load operation cannot be adopted. A new light no-load control strategy which does not depend on the detection of the feedback voltage signal FB and eliminates the influence of nonlinear factors such as input voltage, clamping depth, switching frequency and the like is required to be found to realize the low light no-load power consumption of the clamp asymmetric half-bridge flyback converter.
Disclosure of Invention
In view of this, the invention provides a control method and a circuit for an asymmetric half-bridge flyback converter during light and no-load operation, which can realize low light and no-load power consumption of a clamped asymmetric half-bridge flyback converter, have the characteristics of independence on input voltage and clamping depth, good consistency and strong applicability, and simultaneously have the advantages of small light and no-load output ripple and fast dynamic response during large dynamic switching.
The conception of the invention is as follows: the load detection of the secondary side of the asymmetric half-bridge flyback converter is realized on the primary side, after the load detection is carried out on the primary side, the condition of switching into a forced skip cycle mode is judged according to the detected load value, if the condition is met, the forced skip cycle mode is entered, and therefore the mode switching is realized without depending on a feedback voltage signal FB (the influences of input voltage, clamping depth and the like are eliminated); after entering a forced skip cycle mode, the number of driving pulses is forcibly reduced according to the load setting, so that the stability of the output voltage is realized, and meanwhile, the stability of the output voltage is further realized by controlling the pulse width of a main switching tube in a closed loop mode during the working period.
Compared with the traditional skip cycle mode, the forced skip cycle mode has the characteristics that: the feedback voltage signal FB continues to stabilize the voltage, the number of the skip cycles is determined by combining the current load condition according to a set sequence through the PWM generation and mode switching module, and the reduced number of the driving pulses and the load value detected by the primary side load are in a linear relation, so that the problem of consistency of different input voltages entering light load can be solved, and meanwhile, the small light no-load loss can be guaranteed. The forced skip cycle also has a relatively stable waveform, and the ripple is relatively small. Gain is stabilized by controlling the reduction number of the driving pulse and the double action of the closed loop, the stability of output is maintained, and smaller output voltage ripples are ensured.
In order to solve the technical problem, the invention provides a light no-load control method of a clamp asymmetric half-bridge flyback converter, wherein the clamp asymmetric half-bridge flyback converter is used for converting an input voltage into an output voltage to be provided for a load, the clamp asymmetric half-bridge flyback converter comprises a main switch tube, an auxiliary switch tube, a transformer and a one-way clamp network used for controlling exciting inductance current, and the control method comprises the following steps:
detecting a load value of a clamp asymmetric half-bridge flyback converter;
judging whether the load value meets the condition of switching in a forced skip cycle mode or not according to the detected load value, if so, switching in the forced skip cycle mode, calculating the number of driving pulses needing to be reduced according to the current load value, and correspondingly outputting a skip cycle control signal;
and controlling the number of working cycles and the number of forbidden working cycles of the main switching tube, the auxiliary switching tube and the clamping switching tubes of the unidirectional clamping network according to the skip cycle control signal, and simultaneously carrying out closed-loop control on the main switching tube in the working cycles so as to realize the stability of the output voltage.
In one embodiment, the load value is linearly related to the reduced number of driving pulses, the more the reduced number of driving pulses when the load value is reduced.
In one embodiment, the closed-loop control of the main switching tube comprises:
the pulse width of a driving pulse transmitted to a main switching tube is controlled by collecting a feedback signal of the output voltage of the clamping asymmetric half-bridge flyback converter, so that the output voltage is controlled.
In one embodiment, the detecting the load value of the clamped asymmetric half-bridge flyback converter specifically includes the following steps:
detecting the value of an excitation inductance current during the conduction period of a main switching tube of the clamp asymmetric half-bridge flyback converter;
capturing the moment when the negative peak value and the positive peak value of the exciting inductance current are generated;
extracting a negative peak value and a positive peak value of the exciting inductance current according to the moment when the negative peak value and the positive peak value of the exciting inductance current are generated;
and calculating to obtain a load value according to the negative peak value and the positive peak value of the exciting inductance current and the conduction time of the main switching tube and the auxiliary switching tube or the duty ratio of the main switching tube and the auxiliary switching tube.
In one embodiment, when switching into the forced skip cycle mode, the switching-on edge of the main switch tube is synchronous with the rising edge of the oscillator clock signal in the PWM generation and mode switching module, and the switching-off edge of the main switch is determined by the peak closed loop of the exciting inductance current; the auxiliary switching tube is conducted for a period of time after the main switching tube is turned off and a dead time; the clamping switch tube is conducted for a period of time in a dead zone after the main switch tube is turned off, and the clamping switch tube and the auxiliary switch tube are simultaneously conducted for a period of time and then turned off for a period of time after the auxiliary switch tube is turned off, wherein the clamping switch tube and the main switch tube are conducted in a non-complementary mode.
The invention also provides a control circuit of the clamp asymmetric half-bridge flyback converter, which comprises the following components:
the current detection module is connected with a main circuit of the clamp asymmetric half-bridge flyback converter and used for detecting excitation inductance current during the conduction period of a main switching tube of the asymmetric half-bridge flyback converter;
the peak value generation moment capture module is used for capturing the negative peak value generation moment of the exciting inductance current and outputting a negative peak value trigger signal, and is used for capturing the positive peak value generation moment of the exciting inductance current and outputting a positive peak value trigger signal;
the sampling and holding module is used for sampling the exciting inductance current and extracting a negative peak value and a positive peak value of the exciting inductance current according to the exciting inductance current, the negative peak value trigger signal and the positive peak value trigger signal;
the load calculation module is used for calculating a load value according to a negative peak value and a positive peak value of the exciting inductance current and the conduction time of the main switching tube and the auxiliary switching tube or the duty ratio of the main switching tube and the auxiliary switching tube, and calculating and reducing the number of driving pulses and correspondingly outputting a skip cycle control signal according to the current load value after the forced skip cycle mode is switched in;
the output voltage isolation sampling module is used for collecting a feedback signal of the output voltage of the clamp asymmetric half-bridge flyback converter and inputting the feedback signal to the PWM generation and mode switching module;
and the PWM generation and mode switching module is used for judging whether the condition of switching in the forced skip cycle mode is met or not according to the load value, if so, switching in the forced skip cycle mode, and controlling the number of working cycles and the number of forbidden working cycles of the main switching tube, the auxiliary switching tube and the clamping switching tubes of the unidirectional clamping network according to skip cycle control signals, and meanwhile, in the working cycles, the PWM generation and mode switching module is used for controlling the main switching tube according to feedback signals, so that the output voltage of the clamping asymmetric half-bridge flyback converter is kept stable.
In one embodiment, the PWM generation and mode switching module performs closed-loop control on the main switching tube according to the feedback signal specifically includes: and the PWM generation and mode switching module controls the pulse width of the driving pulse transmitted to the main switching tube according to the feedback signal so as to control the output voltage.
The main circuit of the clamping asymmetric half-bridge flyback converter comprises a main switching tube, an auxiliary switching tube, a transformer and a unidirectional clamping network for controlling exciting inductance current, wherein the unidirectional clamping network is provided with a clamping switching tube, and a current detection module adopts one of the following connection modes:
(1) The positive electrode of the current detection module is connected with the source electrode of the auxiliary switching tube, the source electrode of the clamping switching tube and the synonym end of the primary winding of the transformer; the negative electrode of the current detection module is connected with the ground and the negative input end of the clamp asymmetric half-bridge flyback converter; the output end of the current detection module is connected with the input end of the sampling and holding module;
(2) The positive electrode of the current detection module is connected with the positive input end of the clamp asymmetric half-bridge flyback converter; the negative electrode of the current detection module is connected with the drain electrode of the main switching tube; the output end of the current detection module is connected with the input end of the sampling and holding module;
(3) The positive electrode of the current detection module is connected with the source electrode of the clamping switch tube and the synonym end of the primary winding of the transformer; the negative electrode of the current detection module is connected with the source electrode of the auxiliary switching tube and the input end of the clamping asymmetric half-bridge flyback converter; the output end of the current detection module is connected with the input end of the sampling and holding module.
The invention further provides a light no-load control method of the clamp asymmetric half-bridge flyback converter, the clamp asymmetric half-bridge flyback converter is used for converting an input voltage into an output voltage to be supplied to a load, the clamp asymmetric half-bridge flyback converter comprises a main switch tube, an auxiliary switch tube, a transformer and a one-way clamp network used for controlling exciting inductance current, and the control method comprises the following steps:
when the load is light load or no load, controlling the clamp asymmetric half-bridge flyback converter to switch into a forced skip cycle mode, calculating the number of driving pulses to be reduced according to the load value of the current load, and correspondingly outputting a skip cycle control signal;
and controlling the working period number and the forbidden working period number of the main switching tube, the auxiliary switching tube and the clamping switching tube of the unidirectional clamping network according to the skip period control signal, thereby realizing the stability of the output voltage.
Interpretation of terms:
clamped asymmetric half-bridge flyback mode: in a switching cycle period, a main switching tube, an auxiliary switching tube and a clamping switching tube are switched on or off alternately, and specifically, each cycle period comprises five stages: an excitation stage, an auxiliary switch zero voltage switching-on stage, a demagnetization stage, a current clamping stage and a main switch zero voltage switching-on stage; in the excitation stage and the auxiliary switch zero voltage switching-on stage, the clamping switch tube is switched off; in the demagnetization stage, the auxiliary switch tube is switched on, the clamping switch tube can be switched on or off, and no current flows through the clamping switch tube; at the end of the period, the exciting inductance current reaches a set value, the auxiliary switch tube is turned off, the clamping switch tube is in a conducting state, and the clamping current flows through the clamping switch tube; in the current clamping stage, a clamping switch tube is switched on, the clamping current flows through the clamping switch tube, the clamping switch keeps the clamping current basically unchanged, and the clamping switch tube is switched off at the end of the stage; at the stage of zero voltage switching-on of the main switch, the clamping switch tube is turned off, the clamping current is released, the voltage of the main switch tube is reduced to zero or close to zero, and at the moment, the main switch tube is controlled to be switched on, so that zero voltage switching-on of the main switch tube is realized, and the CAHBF Mode is abbreviated as CAHBF Mode.
A cycle skipping mode: and when the output voltage of the error amplifier fed back by the closed loop (the voltage cannot change widely along with the change of the input voltage) is lower than a set threshold value, skipping the current driving pulse until the output voltage of the error amplifier fed back by the closed loop is higher than the set threshold value, and normally sending out the driving pulse.
Forced skip cycle mode: when the load is light, the number of driving pulses transmitted to the main switching tube S1, the auxiliary switching tube S2 and the clamping switching tube S3 is linearly reduced along with the linear reduction of the load, so that the number of working cycles is reduced, and meanwhile, in the working cycle, the main switching tube is controlled by a feedback loop.
The specific implementation mode is as follows: the controller outputs an enabling signal according to the current load condition, and when the enabling signal is in a high level, the main switch tube S1, the auxiliary switch tube S2 and the clamping switch tube S3 work; when the enable signal is at a low level, the driving pulses of the main switch tube S1, the auxiliary switch tube S2 and the clamping switch tube S3 are forbidden, and the main switch tube S1, the auxiliary switch tube S2 and the clamping switch tube S3 do not work. At this time, the secondary side output side maintains the output voltage by the output filter capacitor.
Primary side load detection: because the primary side excitation inductance current of the clamping asymmetric half-bridge flyback converter and the output load have the equivalent relation as follows:
Figure BDA0003049754180000061
in the formula, io is a converter load, I1 is a positive peak value of an exciting inductive current, I2 is a negative peak value of an exciting inductive current, D1 is a duty ratio of a main switch tube S1, D2 is a duty ratio of an auxiliary switch tube S2, and an original-secondary turn ratio N of a transformer.
Therefore, the load current information can be detected and output on the primary side through a certain circuit, and the circuit module is a primary side load detection module. By detecting the primary side exciting inductance current ILm, the duty ratio D1 of the main switching tube S1 and the duty ratio D2 of the auxiliary switching tube S2, and knowing the system turn ratio N, the detection of the output load current information can be realized, that is, the detection of the secondary side load current information, that is, the primary side load detection, is realized by sampling on the primary side.
The working principle of the invention is analyzed by combining with specific embodiments, which are not described herein, and the beneficial effects of the invention are as follows:
1. the judgment condition for entering the forced skip cycle mode is derived from an output signal of the primary side load detection circuit, and the current load of the converter can be directly detected, so that the same load of the converter can be ensured when the converter enters the forced skip cycle mode under different input voltages, high consistency is achieved, the system design can be simplified, a control circuit is simple, and the rationality of hysteresis setting needs not to be considered when hysteresis control is realized like the traditional skip cycle mode.
2. Compared with the traditional jump cycle mode, the forced jump cycle mode can linearly change along with the load condition, linearly reduce the number of driving pulses (namely reduce the number of working cycles in unit time), and simultaneously carry out closed-loop control by sampling the secondary side output voltage during wave generation, thereby realizing the stability of the output voltage and realizing smaller light no-load ripple waves.
3. Compared with other resonant topologies, the low-frequency switch can be used, the switching loss is low, the conduction time of the auxiliary switch tube and the clamping switch tube is short, the resonant current and the driving loss can be reduced, and therefore the small light no-load loss is realized.
4. The invention is a light no-load control method suitable for clamping asymmetric half-bridge flyback converters, eliminates the influence of nonlinear factors such as input voltage, clamping depth and the like, has wide applicability, can be suitable for different systems by the same strategy, does not need to design corresponding controllers and compensation strategies for different systems, simplifies the design of the controllers and reduces the cost.
5. The forced skip cycle mode stabilizes the output voltage by fixing the switching frequency within the burst time to a super-audible frequency (e.g., 25 Khz), and by stabilizing the output voltage by a linear wave loss that varies linearly with the load, the burst interval is 500 to 1000hz, thereby preventing the converter from noise problems audible to the human ear.
6. The forced skip cycle mode stabilizes the output voltage through frequency conversion control under closed loop and load detection and the control of skip cycle number, and can rapidly enter a normal non-wave-dropping state from a wave-dropping state of the forced skip cycle mode and rapidly increase the switching frequency when the load is switched dynamically, for example, from a light no-load state to a full-load state, thereby increasing the response speed.
Drawings
Fig. 1 is a circuit block diagram of an asymmetric half-bridge flyback converter and a controller in the prior art;
fig. 2 is a schematic diagram of a prior art asymmetric half-bridge flyback converter and controller mode switching;
fig. 3 is a relation diagram of feedback voltage FB, input voltage and output load actually measured by a clamping asymmetric half-bridge flyback converter in the prior art;
fig. 4 is a block diagram of a control circuit of the clamped asymmetric half-bridge flyback converter of the present invention;
fig. 5 is a typical waveform diagram and a working process of entering and exiting a forced skip cycle mode of the clamped asymmetric half-bridge flyback converter adopting a light no-load forced skip cycle mode control scheme;
fig. 6 is a waveform diagram of an exemplary clamped asymmetric half-bridge flyback converter with a light no-load forced skip cycle mode control scheme according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
DETAILED DESCRIPTION OF EMBODIMENT (S) OF INVENTION
As shown in fig. 4, a clamp asymmetric half-bridge flyback converter (hereinafter, simply referred to as a converter) includes a main circuit and a control circuit.
The main circuit comprises an input capacitor Cin, a main switch tube S1, an auxiliary switch tube S2, a resonant capacitor Cr, a one-way clamping network (consisting of a clamping switch tube S3 and a diode D3), a transformer, a rectifier switch D and an output filter capacitor Co.
The control circuit comprises a current detection module CS, a peak current generation time capture module TS, a sample hold module SS, a load calculation module LC, a PWM generation and mode switching module and an output voltage isolation sampling module which are electrically connected with the main circuit.
The positive electrode of the current detection module CS is connected with the source electrode of the auxiliary switch tube S2 of the main circuit, the source electrode of the clamping switch tube S3 and the different name end of the primary winding LP of the transformer; the negative electrode of the current detection module CS is connected with the ground and the negative input end-Vin; the output terminal Iout of the current detection module CS is connected to the input terminal Iin of the sample-and-hold module SS. The current detection module CS is used for detecting the exciting inductance current of the transformer during the conduction period of the main switching tube S1.
In other embodiments, the current detection module CS may also adopt the following two connection modes in the converter:
(1) The positive electrode of the current detection module CS is connected with the input end + Vin; the negative electrode of the current detection module CS is connected with the drain electrode of the main switching tube S1; the output terminal Iout of the current detection module CS is connected to the input terminal Iin of the sample-and-hold module SS.
(2) The positive electrode of the current detection module CS is connected with the source electrode of the clamping tube S3 and the synonym end of the primary winding of the transformer; the negative electrode of the current detection module CS is connected with the source electrode of the auxiliary switch tube S2 and the input end-Vin; the output terminal Iout of the current detection module CS is connected to the input terminal Iin of the sample-and-hold module SS.
An input end V1 of the peak current generation time capturing module TS is connected with an output end Vgs1 of the PWM generation and mode switching module; the GND terminal of the peak current generation timing capture block TS is connected to ground. The peak current generation time capturing module TS is used for capturing the time of the generation of the negative peak value and the positive peak value of the exciting inductance current and passes through the output end T N Outputting corresponding negative peak value trigger signal and passing through output terminal T P Outputting corresponding positive peak value trigger signals, and sending the negative peak value trigger signals and the positive peak value trigger signals to a sampling and holding module SS for extracting positive peak values and negative peak values from exciting inductive current; meanwhile, the peak current generation time capturing module TS also collects an input voltage signal and transmits the input voltage signal to the PWM generation and mode switching module to be used as one of criteria for mode switching.
The method for generating the positive peak trigger signal by the peak current generation time capture module TS may be implemented in different manners, including but not limited to the following two manners:
(1) Generating a positive peak trigger signal of the exciting inductive current by judging the moment when the drain-source voltage of a main switching tube S1 rises to a certain voltage value from zero;
(2) And generating a positive peak trigger signal of the exciting inductive current by judging the falling edge moment of the grid driving pulse signal of the main switching tube S1.
The input end Iin of the sampling and holding module SS is connected with the output end Iout of the current detection module CS, the input end T-and the input end T + of the sampling and holding module SS and the output end T of the peak current generation time capturing module TS N And an output terminal T P And (4) connecting. Sample-and-hold module SS forSampling the exciting inductance current during the conduction period of the main switching tube S1, and extracting the positive peak value and the negative peak value of the exciting inductance current according to the moment generated by the negative peak value and the positive peak value of the exciting inductance current, specifically: when the positive peak value trigger signal is at high level, the sampling and holding module SS tracks the exciting inductance current, when the positive peak value trigger signal is at low level, the sampling and holding module SS holds and outputs the exciting inductance current corresponding to the falling edge moment of the positive peak value trigger signal, and the exciting inductance current is output by an output end I + Output, this time port I + The output signal is the positive peak value of the exciting inductor current.
Similarly, when the negative peak trigger signal is at a high level, the sample-and-hold module SS tracks the input terminal I in real time in The input exciting inductance current; when the negative peak value trigger signal is at low level, the sampling and holding module SS stores the input end I of the low level generation time in The input exciting inductance current is output by an output end I-, and at the moment, an output signal of the output end I-is the negative peak value of the exciting inductance current.
Input terminal I of load calculation module LC P And an input terminal I + connected with the output terminal I + of the sample-and-hold module SS and the input terminal I of the load calculation module LC N And the output end LO1 of the load calculation module LC is electrically connected with the input end LO2 of the PWM generation and mode switching module, and the output end Skip _ Num1 of the load calculation module LC is electrically connected with the input end Skip _ Num2 of the PWM generation and mode switching module. And the load calculation module LC is used for calculating the current load value of the converter according to the positive peak value and the negative peak value of the exciting inductance current, the duty ratio D1 of the main switching tube S1, the duty ratio D2 of the auxiliary switch S2 and the turn ratio N of the original side and the auxiliary side, calculating the number of driving pulses to be reduced according to the current load value after the forced skip cycle mode is switched in, and correspondingly outputting a skip cycle control signal.
In this embodiment, the load value is a load current value, I o The positive peak value I1 and the negative peak value I2 of the exciting inductance current, the duty ratio D1 of the main switching tube S1, the duty ratio D2 of the auxiliary switching tube S2 and the primary-secondary turn ratio N of the transformer satisfy the following relational expression:
Figure BDA0003049754180000091
if the PWM is in the forced period skipping mode, the load calculation module LC calculates the number of the driving pulses to be reduced according to the calculated load value and correspondingly outputs a period skipping control signal, and the information of the number of the driving pulses to be reduced is transmitted to the PWM generation and mode switching module through the output period skipping control signal. The load calculation module LC may also be implemented in different ways, including but not limited to the following:
for the converter adopting peak current control, the positive peak value of the exciting inductive current is not sampled and kept, and the feedback signal output by the output voltage isolation sampling module is used as a signal corresponding to the positive peak value of the exciting inductive current.
The input end FB of the PWM generating and mode switching module is connected with a feedback signal of the output voltage isolation sampling module, the output ends Vgs1, vgs2 and Vgs3 of the PWM generating and mode switching module are used for outputting driving pulses to control the main switching tube, the auxiliary switching tube and the clamping switching tube to be switched on or switched off, and meanwhile, the output end Vgs1 is also connected with the input end V1 of the peak current generation time capturing module TS. The PWM generation and mode switching module mainly comprises three parts, namely, an output voltage isolation sampling module is used for carrying out closed-loop voltage stabilization control on output voltage; secondly, mode judgment and switching are carried out according to the current load value of the converter obtained by the load calculation module LC; and thirdly, controlling the working period number and the working forbidden period number of the main switch tube S1, the auxiliary switch tube S2 and the unidirectional clamping network switch tube S3 when the forced skip period mode is switched in according to skip period number information (namely, the number of driving pulses is reduced) calculated by the load calculation module LC.
The input end FB of the PWM generation and mode switching module is used for receiving a feedback signal output by the output voltage isolation sampling module so as to control the output voltage to be stable; the input end LO2 is used for receiving a load value signal reflecting the load value of the converter and is used as a load basis for mode switching; the input end Skip _ Num2 is used for receiving a Skip cycle control signal output by the load calculation module LC to control the number of working cycles of the main switch tube S1, the auxiliary switch tube S2 and the unidirectional clamp network switch tube S3 and the number of cycles of prohibiting working in a forced Skip cycle mode.
The output voltage isolation sampling module is used for isolating and sampling the secondary output voltage and the load condition and generating a feedback signal according to the secondary output voltage and the load condition so as to realize the closed-loop feedback of the converter.
The working principle of the invention is as follows: the load value of the current converter is calculated through the load calculation module LC, when the PWM generation and mode switching module receives the load value of the current converter and switches into the forced skip cycle mode, the load calculation module LC simultaneously calculates the number of driving pulses needing to be reduced under the current load value and correspondingly outputs skip cycle control signals for controlling the number of working cycles and the number of cycles for inhibiting the working of the main switch tube S1, the auxiliary switch tube S2 and the unidirectional clamping network switch tube S3, and the PWM generation and mode switching module controls the number of the driving pulses output by the output ends Vgs1, vgs2 and Vgs3 according to the skip cycle control signals, specifically, when the linearity of the load value is reduced, the number of the driving pulses output by the output ends Vgs1, vgs2 and Vgs3 is also linearly reduced.
The working principle of each module in the embodiment of the present invention is further described with reference to fig. 5 and fig. 6, where Vgs1 represents a driving pulse output by Vgs1 at the output end; vgs2 represents the drive pulse output by the output terminal Vgs 2; vgs3 represents the drive pulse output from the output terminal Vgs 3.
As shown IN fig. 5, the current load value of the converter is obtained through the current detection module CS, the peak current generation time capture module TS, the sample-and-hold module SS, and the load calculation module LC, and when the load value is smaller than the threshold Skip _ IN, the PWM generation and mode switching module determines that the load of the converter is light enough, and switches into the forced Skip cycle mode to reduce light no-load loss. In order to avoid the generation of audio noise when the converter is in operation, the switching frequency of the operation before entering the forced skip cycle mode is usually set to be more than 20Khz, and the switching frequency can be set to be 22Khz to 25Khz. After the forced skip cycle mode is switched in, the load calculation module LC calculates the number of the required skip cycles in real time according to the load value calculated in real time and correspondingly outputs skip cycle control signals to the PWM generation and mode switching module, and the PWM generation and mode switching module controls enabling or disabling of driving signals transmitted to the main switch tube S1, the auxiliary switch tube S2 and the clamping switch tube S3 according to the skip cycle control signals. When the detected load value is larger than the threshold value Skip _ OUT, the number of driving pulses to be reduced is zero when the forced Skip cycle mode is switched OUT, wherein the threshold value Skip _ OUT is larger than the threshold value Skip _ IN. Therefore, through the above description, the forced skip cycle Mode can be regarded as a Mode unified with the clamp asymmetric half-bridge flyback Mode (CAHBF _ Mode), that is, the forced skip cycle Mode is an operation Mode of the CAHBF Mode when the number of required skip cycles is zero (i.e., the reduced number of driving pulses is zero). Therefore, when the load suddenly changes from light no load to heavy load, the switching-out forced skip cycle mode is only controlled to reduce the number of driving pulses to zero, and has no mode switching process in strict sense, so that a good dynamic response speed can be obtained.
The working process and control logic of each module after the forced skip cycle mode is switched in are further described below with reference to fig. 6. When the switching frequency is 25Khz before the switching-IN forced Skip cycle mode is operated IN the forced Skip cycle mode, for example, 1ms (1 Khz) is taken as a cycle IN the forced Skip cycle mode, the number of working cycles (i.e., the number of linear Skip cycles) is linearly reduced from Skip _ IN to no-load 0A according to the load condition until 1 working cycle remains among the switching tube S1, the auxiliary switching tube S2 and the clamp switching tube S3.
In an allowable working period, the opening edge of the main switch tube S1 is synchronous with the rising edge of a clock signal of an oscillator in the PWM generation and mode switching module, and the closing edge of the main switch S1 is determined by a peak closed loop of exciting inductive current (the turning edge of a peak current loop comparator is synchronous with the closing edge of the S1); the auxiliary switching tube S2 is conducted for a period of time (for example, 1 us) after the main switching tube S1 is turned off and a dead time; the clamping switch tube S3 is conducted for a period of time (for example, 10 us) in a dead zone after the main switch tube S1 is turned off, and after the clamping switch tube S3 and the auxiliary switch tube S2 are simultaneously conducted for a period of time, the clamping switch tube S3 is turned off for a period of time after the auxiliary switch tube S2 is turned off. In the forbidden work period, the three switching tubes S1, S2 and S3 stop generating waves in the forbidden work period, and the output voltage is maintained by the output filter capacitor.
It should be noted that the wave frequency, the number of skip cycles (i.e. the number of driving pulses to be reduced), the wave pause, etc. shown in fig. 5 and fig. 6 may be other setting values, and may be set appropriately according to the specific system, but the concept of forced skip cycle mode is not changed, which is a light no-load control method and circuit suitable for clamping the asymmetric half-bridge flyback converter.
Through the above analysis, it can be known that the clamp asymmetric half-bridge flyback converter adopting the embodiment of the present invention can obtain the current load value of the converter through the primary load detection, determine whether to enter the forced skip cycle mode according to the load value, and when the forced skip cycle mode is switched in, implement the output voltage stabilization by means of forcibly reducing the number of the driving pulses, the sum of the number of the working cycles and the number of the skip cycles (i.e. the number of the prohibited working cycles) is equal to a fixed value (as shown in fig. 6, when the interval is 1ms, the switching frequency is 25Khz when the forced skip cycle mode is switched out, the added number is 25), the number of the working cycles and the obtained load value are in a linear relationship, the smaller the load value is, the smaller the number of the working cycles is, the more the number of the driving pulses is reduced, thereby implementing that the switched-in skip cycle mode is independent of the input voltage, the system parameters and the clamp depth, and having the beneficial effects of good consistency, simple implementation, small output ripple, small no-load loss, smooth mode switching, and improvement of the dynamic performance of the converter.
A sample model of a 200W asymmetric half-bridge flyback converter using the forced skip cycle mode control method and circuit of the present invention was designed and manufactured according to the input and output specifications listed in table 2.
TABLE 2
Figure BDA0003049754180000111
And table 3 shows the no-load loss measured in the no-load state under the forced skip cycle mode of the 200W asymmetric half-bridge flyback converter prototype according to the system parameters provided in table 2. Under the condition of no-load loss of different input voltages, the no-load loss of the scheme is less than 0.75W, and the practical application requirement is met. The method is suitable for controlling the light and no load of the clamp asymmetric half-bridge flyback converter, and has practical significance.
TABLE 3
Input voltage/VAC Actual measurement of no-load power consumption/W
90 0.42
115 0.50
180 0.50
230 0.55
264 0.62
It should be noted that the current detection circuit and the mode switching method of the asymmetric half-bridge flyback converter according to the embodiments of the present invention still fall within the scope of protection of the present invention by changing the resonant cavity position of the asymmetric half-bridge flyback converter, the connection manner of the unidirectional clamping network and the transformer, the position of the current detection module, the implementation method of the peak current generation time capture module and the load calculation module, and the wave frequency and the ways of reducing the number of driving pulses and the wave generation intermittence in the forced skip cycle mode.
The above are only preferred embodiments of the present invention, it should be noted that the above preferred embodiments should not be regarded as limitations of the present invention, and it will be apparent to those skilled in the art that several modifications and adaptations can be made without departing from the spirit and scope of the present invention, and these modifications and adaptations should also be regarded as the scope of the present invention, and no detailed description is given herein by way of example, and the scope of the present invention should be determined by the scope defined in the claims.

Claims (10)

1. A light no-load control method of a clamp asymmetric half-bridge flyback converter is disclosed, the clamp asymmetric half-bridge flyback converter is used for converting an input voltage into an output voltage to be provided for a load, the clamp asymmetric half-bridge flyback converter comprises a main switch tube, an auxiliary switch tube, a transformer and a one-way clamp network used for controlling exciting inductive current, and the control method is characterized by comprising the following steps:
detecting a load value of the load of the clamped asymmetric half-bridge flyback converter;
judging whether the load value meets the condition of switching in a forced skip cycle mode or not according to the detected load value, if so, switching in the forced skip cycle mode, calculating the number of driving pulses needing to be reduced according to the current load value, and correspondingly outputting a skip cycle control signal;
and controlling the working period number and the forbidden working period number of the main switching tube, the auxiliary switching tube and the clamping switching tube of the unidirectional clamping network according to the skip period control signal, and simultaneously carrying out closed-loop control on the main switching tube in the working period so as to realize the stability of output voltage.
2. The method for controlling the light no-load of the clamped asymmetric half-bridge flyback converter according to claim 1, wherein: the load value is linearly related to the reduction number of the driving pulses, and the reduction number of the driving pulses is more when the load value is reduced.
3. The method for controlling the light no-load of the clamped asymmetric half-bridge flyback converter according to claim 1, wherein the closed-loop controlling the main switching tube comprises:
and controlling the pulse width of the driving pulse transmitted to the main switching tube by acquiring a feedback signal of the output voltage of the clamped asymmetric half-bridge flyback converter so as to control the output voltage.
4. The method for controlling light no-load of the clamped asymmetric half-bridge flyback converter according to claim 1, wherein detecting the load value of the clamped asymmetric half-bridge flyback converter specifically comprises the following steps:
detecting the exciting inductance current value of the clamping asymmetric half-bridge flyback converter during the conduction period of the main switching tube;
capturing the time when the negative peak value and the positive peak value of the exciting inductance current are generated;
extracting a negative peak value and a positive peak value of the exciting inductance current according to the moment when the negative peak value and the positive peak value of the exciting inductance current are generated;
and calculating according to the negative peak value and the positive peak value of the exciting inductance current, the conduction time of the main switching tube and the auxiliary switching tube or the duty ratio of the main switching tube and the auxiliary switching tube to obtain the load value.
5. The method for controlling the light no-load of the clamped asymmetric half-bridge flyback converter as claimed in claim 1, wherein: when the forced skip cycle mode is switched in, the switching-on edge of the main switch tube is synchronous with the rising edge of a clock signal of an oscillator in the PWM generation and mode switching module, and the switching-off edge of the main switch is determined by a peak closed loop of exciting inductive current; the auxiliary switching tube is conducted for a period of time after the main switching tube is turned off and a dead time; the clamping switch tube is conducted for a period of time in a dead zone after the main switch tube is turned off, and the clamping switch tube is turned off for a period of time after the clamping switch tube and the auxiliary switch tube are simultaneously turned on for a period of time and then turned off for a period of time after the auxiliary switch tube is turned off, wherein the clamping switch tube and the main switch tube are conducted in a non-complementary sampling mode.
6. A control circuit for clamping an asymmetric half-bridge flyback converter, comprising:
the current detection module is connected with a main circuit of the clamped asymmetric half-bridge flyback converter and is used for detecting excitation inductance current during the conduction period of a main switching tube of the asymmetric half-bridge flyback converter;
the peak value generation time capturing module is used for capturing the negative peak value generation time of the excitation inductive current and outputting a negative peak value trigger signal, and is used for capturing the positive peak value generation time of the excitation inductive current and outputting a positive peak value trigger signal;
the sampling and holding module is used for sampling the excitation inductive current and extracting a negative peak value and a positive peak value of the excitation inductive current according to the excitation inductive current, the negative peak value trigger signal and the positive peak value trigger signal;
the load calculation module is used for calculating a load value according to a negative peak value and a positive peak value of the exciting inductance current and the conduction time of the main switching tube and the auxiliary switching tube or the duty ratio of the main switching tube and the auxiliary switching tube, and is used for calculating and reducing the number of driving pulses according to the current load value after a forced skip cycle mode is switched in and correspondingly outputting a skip cycle control signal;
the output voltage isolation sampling module is used for collecting a feedback signal of the output voltage of the clamp asymmetric half-bridge flyback converter and inputting the feedback signal to the PWM generation and mode switching module;
and the PWM generation and mode switching module is used for judging whether the condition of switching into the forced skip cycle mode is met or not according to the load value, if so, switching into the forced skip cycle mode, and controlling the working cycle number and the forbidden working cycle number of the main switching tube, the auxiliary switching tube and a clamping switching tube of the unidirectional clamping network according to the skip cycle control signal, and meanwhile, in the working cycle, the PWM generation and mode switching module is used for controlling the main switching tube according to the feedback signal so as to keep the output voltage of the clamping asymmetric half-bridge flyback converter stable.
7. The control circuit of the clamped asymmetric half-bridge flyback converter of claim 6, wherein the PWM generation and mode switching module performs closed-loop control on the main switching tube according to the feedback signal, specifically: and the PWM generation and mode switching module controls the pulse width of the driving pulse transmitted to the main switching tube according to the feedback signal so as to control the output voltage.
8. The control circuit of claim 6, wherein a main circuit comprises the main switch tube, the auxiliary switch tube, a transformer and a unidirectional clamping network for controlling the exciting inductor current, wherein the unidirectional clamping network has a clamping switch tube, and the current detection module adopts one of the following connection modes:
(1) The positive electrode of the current detection module is connected with the source electrode of the auxiliary switching tube, the source electrode of the clamping switching tube and the synonym end of the primary winding of the transformer; the negative electrode of the current detection module is connected with the ground and the negative input end of the clamp asymmetric half-bridge flyback converter; the output end of the current detection module is connected with the input end of the sampling and holding module;
(2) The positive electrode of the current detection module is connected with the positive input end of the clamp asymmetric half-bridge flyback converter; the negative electrode of the current detection module is connected with the drain electrode of the main switching tube; the output end of the current detection module is connected with the input end of the sampling and holding module;
(3) The positive electrode of the current detection module is connected with the source electrode of the clamping switch tube and the synonym end of the primary winding of the transformer; the negative electrode of the current detection module is connected with the source electrode of the auxiliary switching tube and the input end of the clamping asymmetric half-bridge flyback converter; and the output end of the current detection module is connected with the input end of the sampling and holding module.
9. A light no-load control method of a clamp asymmetric half-bridge flyback converter is disclosed, the clamp asymmetric half-bridge flyback converter is used for converting an input voltage into an output voltage to be provided for a load, the clamp asymmetric half-bridge flyback converter comprises a main switch tube, an auxiliary switch tube, a transformer and a unidirectional clamp network used for controlling exciting inductive current, and the control method is characterized by comprising the following steps:
when the load is light load or no load, controlling the clamp asymmetric half-bridge flyback converter to switch into a forced skip cycle mode, calculating the number of driving pulses needing to be reduced according to the current load value of the load, and correspondingly outputting a skip cycle control signal;
and controlling the working period number and the forbidden working period number of the main switching tube, the auxiliary switching tube and the clamping switching tubes of the unidirectional clamping network according to the skip period control signal, thereby realizing the stability of the output voltage.
10. The method of claim 9, wherein the load value is linear with a reduced number of the driving pulses, the reduced number of the driving pulses being greater when the load value is reduced.
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