CN113315486B - High-impedance band suppression low-pass filter for 5G communication - Google Patents

High-impedance band suppression low-pass filter for 5G communication Download PDF

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CN113315486B
CN113315486B CN202110532891.5A CN202110532891A CN113315486B CN 113315486 B CN113315486 B CN 113315486B CN 202110532891 A CN202110532891 A CN 202110532891A CN 113315486 B CN113315486 B CN 113315486B
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metal
layer
pass filter
substrate layer
low
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CN113315486A (en
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袁野
张国珠
张巧杏
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Wuxi Haobang High Tech Co ltd
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    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
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Abstract

The invention discloses a high-impedance band suppression low-pass filter for 5G communication, which comprises: the medium substrate layer comprises a gallium arsenide substrate layer and a SiNx substrate layer which are arranged from bottom to top, wherein the gallium arsenide substrate layer is a substrate; a metal conductor layer including a metal ground layer provided on a lower surface of the gallium arsenide substrate layer; and the filter structure layer is used for realizing a filter function. The invention uses the photoresist as the material for finally forming the passivation layer, thus reducing the cost and improving the yield; when the metal conductor layer is manufactured, the electron beam evaporation technology is adopted, the problems caused by electroplating can be well solved, the in-band difference loss is small, three transmission zero points are arranged outside a band, and high-frequency suppression is good.

Description

High-impedance band suppression low-pass filter for 5G communication
Technical Field
The invention relates to the technical field of 5G communication, in particular to a high-impedance band suppression low-pass filter for 5G communication.
Background
An IPD (Integrated Passive Device) process refers to a process of forming a series of multi-layer structures of metal, dielectric, via, etc. on a substrate by using a plurality of microelectronic processes such as photolithography, development, sputtering, lift-off, metal evaporation, etching, etc. to form different basic Passive elements such as capacitors, spiral inductors, resistors, etc. The formed Integrated Passive Device (IPD) has the characteristics of smaller chip area, lower cost and power consumption and better compatibility with an active device.
The passive filter, also called as LC filter, is a filter circuit designed by the combination of inductor, capacitor and resistor, and can filter out one or more harmonics. The commonly used passive filter structure is to connect an inductor and a capacitor in series to realize the low-impedance bypass of the main subharmonics (3, 5 and 7 times). Meanwhile, the passive filter is used as an important passive device in a microwave system, is widely applied to the front end of a radio frequency circuit, and can effectively filter a frequency point of a specific frequency in a power line or frequencies except the frequency point to obtain a power signal of the specific frequency or eliminate the power signal of the specific frequency. The main technical indexes include center frequency, cut-off frequency, bandwidth, insertion loss and return loss, and each index greatly influences the overall index of the microwave system.
As system integration and other devices are increasingly miniaturized in the development of wireless communication systems, it is necessary to improve the performance of the directional filter and further reduce the physical size of the device.
In addition, the active element in the wireless communication element is continuously reduced in cost and is in a trend of further miniaturization due to the development of semiconductor technology and packaging technology. One chip solution is also a hot spot of research in the past in wireless communication systems through miniaturization technology and other active elements.
Suitable device packaging can ensure high reliability and long-term stability, even in harsh environments. Chip-on-board (COB) connection of rf devices to PCB boards is an alternative to conventional integrated circuit packaging processes. Such a connection may simplify the design and manufacturing process and improve the radio frequency performance of short interconnect paths without the need for conventional device packaging. The use of lead points near the ground plane also reduces radiation losses and improves reliability.
With the advancement of technology, high-speed communication 5G network technology becomes the leading part of the mobile communication market. Wireless communication systems require high speed and high performance to handle large capacity data communications. Therefore, a low-pass filter suitable for this frequency band, which is compact and has low loss characteristics, is particularly required. How to provide a low-pass filter which is small in size, high in integration level and applicable to 5G wave band becomes a problem which needs to be solved in the inherent technical development.
Disclosure of Invention
An object of the present invention is to overcome the disadvantages in the prior art, and to provide a high-band rejection low-pass filter for 5G communication, including:
the medium substrate layer comprises a gallium arsenide substrate layer and a SiNx substrate layer which are arranged from bottom to top, wherein the gallium arsenide substrate layer is a substrate;
a metal conductor layer including a metal ground layer provided on a lower surface of the gallium arsenide substrate layer;
the filter structure layer is used for realizing a filter function, comprises a filter structure layer and a filter structure layer, is etched on the gallium arsenide substrate layer through photoetching, metal deposition, dry etching and high-temperature oxidation, is respectively positioned on the upper surface and the lower surface of the SiNx substrate layer, and is electrically connected with the metal ground layer through a ground through hole of the gallium arsenide substrate layer;
and the passivation layer is used for covering the filter structure layer.
The filter structure layer comprises an LC low-pass filter and a grounding capacitor;
the LC low-pass filter comprises a first pair of LC parallel resonance units and a second pair of LC parallel resonance units;
the input ends of the first pair of LC parallel resonance units are electrically connected with the input end of the LC low-pass filter; the output end of the first pair of LC parallel resonance units is electrically connected with the input end of the second pair of LC parallel resonance units, and the output end of the second pair of LC parallel resonance units is electrically connected with the electrical output end of the LC low-pass filter;
one end of the grounding capacitor is electrically connected between the output end of the first pair of LC parallel resonance units and the input end of the second pair of LC parallel resonance units, and the other end of the grounding capacitor is electrically connected with the metal ground layer through the grounding through hole of the gallium arsenide substrate layer.
The first pair of LC parallel resonance units includes:
an inductance L1;
a capacitor C1 connected in parallel with the inductor L1;
the second pair of LC parallel resonance units comprising:
an inductance L2;
a capacitor C2 connected in parallel with the inductor L2;
the grounding capacitor comprises: a capacitance C3;
the inductor L1 and the inductor L2 adopt plane spiral inductors, and the overlapped part of the plane spiral inductors adopts an air bridge structure;
the capacitor C1, the capacitor C2 and the capacitor C3 are parallel plate capacitors, and the SiNx substrate layer is located between the parallel plate capacitors and used for improving the capacitance.
The inductors L1 and L2 are metal winding coils in octagonal spiral structures, and the inductors L1 and L2 adopt 3 turns of metal winding coils.
The preparation and packaging process of the high-impedance band-rejection low-pass filter for 5G communication comprises the following steps:
s1: modeling the circuit of the low-pass filter inIn the circuit model, a metal wire forming a planar spiral inductor is split into n short and straight metal wire segments, and the inductance Ldi of each short and straight metal wire can be represented as self inductance Lsi and mutual inductance
Figure GDA0003605294910000031
And summing, recording the total inductance Ld of the planar spiral inductor including the sum of the inductances of all the short straight metal lines as:
Figure GDA0003605294910000032
wherein the self-inductance of the short straight metal wire
Figure GDA0003605294910000033
Mutual inductance of short straight metal wires
Figure GDA0003605294910000034
Weff is the effective line width, l is the length of the short and straight metal lines, t is the metal thickness, and d is the distance between the two metal lines;
the resistance of each metal line of the planar spiral inductor is expressed as: r ═ p · l)/(Weff · tm);
wherein rho is resistivity in ohm-cm and tm is metal thickness;
the effect of capacitance between metal lines according to the planar spiral inductor is a parasitic effect, and the parasitic capacitance is denoted as
Figure GDA0003605294910000035
It is located outside the segment inductance of the adjacent short straight metal line; the coupling capacitance per unit length of the segmented inductor is denoted CcCapacitance C comprising an air zone across the coupling gapcdAnd a capacitance C of the dielectric regioncaThus, the total parasitic capacitance between adjacent short straight metal lines of the planar spiral inductor is
Figure GDA0003605294910000036
Figure GDA0003605294910000037
∑i,j(Ccd+Cca): i, j total parasitic capacitance formed by the sum of the coupling capacitances of the segmented inductances of the adjacent short straight metal lines;
Ccdand CcaExpressed as:
Figure GDA0003605294910000038
Figure GDA0003605294910000039
wherein s is the area of the metal line, w is the line width, n is the number of segments of the metal line, h is the distance between the conductor and the substrate, CfIs the fringe capacitance, ∈0Is the dielectric constant of free space, epsilonrIs the relative permittivity of the dielectric medium;
the air bridge capacitance effect is another parasitic effect related to the overlapping of two different metal conductor layers of the planar spiral inductor; since the length of the air bridge area is much smaller than the whole metal wire of the planar spiral inductor, the resistance and the inductance of the part are ignored, and only the parasitic main capacitor C of the air bridge is consideredmm：
Figure GDA0003605294910000041
Wherein epsilon0(overlap area)In which the dielectric constant, t, of the free space in the overlap region of two different metal conductor layers of the planar spiral inductorairBridge is the thickness of the air bridge, i.e. the air gap spacing;
by the total inductance Ld of the planar spiral inductor, the resistance of each metal line is represented as R, and the total parasitic capacitance of one short straight metal line is represented as R
Figure GDA0003605294910000042
Air bridge parasitic main capacitor CmmThe parameters are considered in a centralized manner, and the generated planar spiral inductor is optimally designed;
s2: the quality factor Q is improved by reducing the loss of the radio frequency passive device:
the overall filter quality factor Q is derived as the following equation:
Figure GDA0003605294910000043
the higher the Q value, the lower the loss of future rf devices will be, where h' is the substrate thickness, λ is the free space wavelength, η is the wave impedance, f is the operating frequency, μ is the free space permeability, σ is the metal conductor conductivity, λgFor guiding the wavelength, Z0Tan delta is the substrate dielectric loss, epsilon, for microstrip line input impedancerIs a relative dielectric constant,. epsilonreIs the effective dielectric constant;
the formula integrates three factors of conductor loss, dielectric loss and radiation loss; therefore, a substrate with high thickness and a metal with low resistance are selected to improve the quality factor; the width and the thickness of the metal wire are properly increased, so that the loss is effectively reduced; selecting effective dielectric constant epsilonreThe substrate material with larger dielectric loss tan delta is used for improving the quality factor, thereby gallium arsenide is selected as the substrate layer to realize the effective dielectric constant epsilon re12 to 12.90, and a substrate dielectric loss tan delta of 0.002 to 0.006; depositing a SiNx substrate layer on the upper surface of the gallium arsenide substrate layer in the LC low-pass filter chip, and performing Ar gas sputtering etching on the SiNx substrate layer at room temperature to enhance the adhesion between the SiNx and the top seed metal conductor layer;
s3: sputtering a seed metal conductor layer of gold and titanium alloy on the top of the SiNx substrate layer to help the growth of a subsequent metal conductor layer;
s4: coating photoresist on the seed metal conductor layer of gold and titanium alloy, patterning, and growing copper or gold by electron beam evaporation technology; then stripping off the redundant photoresist, and finally forming a metal pattern of the planar spiral inductor and the parallel plate capacitor;
s5: etching the unstructured seed metal conductor layer with Ar gas to match the grown subsequent metal conductor layer;
s6: depositing photoresist on the surface of the filter again to prevent wet oxidation, and removing bubbles in the photoresist by using a vacuum furnace;
s7: and the chip of the LC low-pass filter is connected to the PCB by using COB (chip on Board) packaging through epoxy adhesive, a gold wire between the chip of the LC low-pass filter and the PCB adopts an aluminum wedge welding mode, the upper surface of the PCB is a ground layer, and the ground layer is connected to the ground layer on the lower bottom surface through a dense via hole array, so that the low-pass filter realizes a better grounding effect.
The working principle of the invention is as follows:
the low-pass filter is provided with three transmission zeros, an input end of the low-pass filter is connected with a first pair of LC parallel resonance units, an output end of the first pair of LC parallel resonance units is connected with an input end of a second pair of LC parallel resonance units, and an output end of the second pair of LC parallel resonance units is connected with an output end of the low-pass filter; a grounding capacitor is connected between the first pair of LC parallel resonance units and the second pair of LC parallel resonance units; the first pair of LC parallel resonance units comprises an inductor L1; a capacitor C1 connected in parallel with the inductor L1; the second pair of LC parallel resonance units comprising: an inductance L2; a capacitor C2 connected in parallel with the inductor L2; the grounding capacitor comprises: a capacitance C3; the inductor L1 and the inductor L2 adopt plane spiral inductors, and the overlapped part of the plane spiral inductors adopts an air bridge structure; the capacitor C1, the capacitor C2 and the capacitor C3 are parallel plate capacitors, and the SiNx substrate layer is located between the parallel plate capacitors and used for improving the capacitance.
The IPD low-pass filter comprises two dielectric substrate layers and three metal conductor layers; the two dielectric substrate layers comprise a gallium arsenide substrate layer and a SiNx substrate layer which are arranged from bottom to top, wherein the gallium arsenide substrate layer is a substrate; a metal conductor layer is arranged on the lower surface of the gallium arsenide substrate layer, and the metal conductor layer is a metal ground; metal conductor layers are respectively arranged on the upper side and the lower side of the SiNx substrate layer to form a filter structure layer, and a capacitor C3 in a grounding capacitor in the filter structure layer is in grounding connection with the metal ground layer through a grounding through hole of the gallium arsenide substrate layer;
the photoresist is used as a material for finally forming the passivation layer, so that the cost can be reduced and the yield can be improved.
Since the photoresist solution has a higher pressure than the outside. Most of the bubbles disappeared when the wafer coated with the photoresist was placed in a vacuum oven for 30 minutes. When the metal conductor layer in the metal ground layer electrode and the capacitance inductor is manufactured, the electron beam evaporation technology is adopted, the problems caused by electroplating, such as difficulty in thickness control, more designed processing steps, rough surface of the processed metal and the like, can be well solved, and the resistance value of the metal conductor layer can be effectively controlled. By using PECVD (chemical vapor deposition) to deposit the material, a high PECVD working pressure generates an increased number of ions, so that the ion flux to the wafer surface of the substrate layer is increased, while the surface roughness of the material deposited onto the wafer can be greatly reduced by reducing the deposition rate. Also using N2Annealing or O2/H2The plasma treatment removes organic matters and oxide pollution on the surface of the metal, and the reliability of the integrated circuit is improved.
Compared with the prior art, the invention has the following beneficial effects: (1) using the photoresist as a material for finally forming the passivation layer can reduce the cost and improve the yield. (2) When the metal electrode and the metal conductor layer in the capacitor and the inductor are manufactured, the electron beam evaporation technology is adopted, the problems caused by electroplating, such as difficulty in thickness control, more designed processing steps, rough surface of the processed metal and the like, can be well solved, and the resistance value of the metal conductor layer can be effectively controlled. (3) The invention has small in-band difference loss, three transmission zeros outside the band and good high-frequency suppression. (4) The IPD processing technology can realize smaller chip area, lower cost and power consumption and better compatibility with active devices. (5) The invention adopts COB (chip on Board) packaging, which is an alternative scheme of the traditional integrated circuit packaging process. Such a connection may simplify the design and manufacturing process and improve the radio frequency performance of short interconnect paths without the need for conventional device packaging. In addition, the lead points near the ground plane can reduce radiation loss and improve reliability.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings;
FIG. 1 is a schematic diagram of an equivalent circuit of the present invention;
FIG. 2 is a schematic structural view of the present invention;
FIG. 3 is a schematic diagram of the circuit model structure of FIG. 2;
FIG. 4 is a schematic diagram of a partial circuit model structure of the segment inductor in FIG. 3;
fig. 5 is a schematic cross-sectional view of a COB package of the present invention;
FIG. 6 is a schematic diagram of a structural layer of the present invention;
FIG. 7 is a diagram illustrating simulation results according to an embodiment of the present invention;
the low-pass filter comprises a 1-gold wire, a 2-LC low-pass filter chip, a 3-metal cover, a 4-PCB, a 5-lower bottom ground layer, a 6-via hole array, a 7-epoxy adhesive, 8-photoresist, a 9-filter structure layer, a 10-gallium arsenide substrate layer, a 11-metal ground layer, a 12-metal conductor layer and a 13-SiNx substrate layer.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention. The following is further explained with reference to the accompanying drawings;
in order to overcome the defects of the prior art, in fig. 1 to 7, the present invention provides a high-impedance band-rejection low-pass filter for 5G communication, including:
the medium substrate layer comprises a gallium arsenide substrate layer 10 and a SiNx substrate layer 13 which are arranged from bottom to top, wherein the gallium arsenide substrate layer 10 is a substrate;
a metal conductor layer 12 including a metal ground layer 11 provided on the lower surface of the gallium arsenide substrate layer 10;
the filter structure layer 9 is used for realizing a filter function, and comprises a filter structure layer formed on the gallium arsenide substrate layer 10 by photoetching, metal deposition, dry etching and high-temperature oxidation etching and respectively positioned on the upper surface and the lower surface of the SiNx substrate layer 13, and the filter structure layer 9 is electrically connected with the metal ground layer 11 in a connection mode of a grounding through hole, namely a Through Silicon Via (TSV) of the gallium arsenide substrate layer 10;
and the passivation layer is used for covering the filter structure layer 9.
The filter structure layer 9 includes an LC low-pass filter and a ground capacitor;
the LC low-pass filter comprises a first pair of LC parallel resonance units and a second pair of LC parallel resonance units;
the input ends of the first pair of LC parallel resonance units are electrically connected with the input end of the LC low-pass filter; the output end of the first pair of LC parallel resonance units is electrically connected with the input end of the second pair of LC parallel resonance units, and the output end of the second pair of LC parallel resonance units is electrically connected with the electrical output end of the LC low-pass filter;
one end of the grounding capacitor is electrically connected between the output end of the first pair of LC parallel resonance units and the input end of the second pair of LC parallel resonance units, and the other end is electrically connected with the metal ground layer 11 through the grounding via of the gallium arsenide substrate layer 10.
In the high-impedance band rejection low-pass filter for 5G communications, the first pair of LC parallel resonant units includes:
an inductance L1; a capacitor C1 connected in parallel with the inductor L1; the second pair of LC parallel resonance units comprising: an inductance L2; a capacitor C2 connected in parallel with the inductor L2; the grounding capacitor comprises: a capacitance C3; the inductor L1 and the inductor L2 adopt plane spiral inductors, and the overlapped part of the plane spiral inductors adopts an air bridge structure; the capacitor C1, the capacitor C2 and the capacitor C3 are parallel-plate capacitors, and the SiNx substrate layer 13 is located between the parallel-plate capacitors and used for improving capacitance.
The inductors L1 and L2 are metal winding coils in octagonal spiral structures, and the inductors L1 and L2 adopt 3 turns of metal winding coils.
The preparation and packaging process of the high-impedance band-rejection low-pass filter for 5G communication comprises the following steps:
s1: establishing a circuit model of the low-pass filter, splitting the metal wire forming the planar spiral inductor into 10 short and straight metal wire segments in the circuit model, wherein the inductance Ldi of each short and straight metal wire can be widely expressed as self inductance Lsi and mutual inductance
Figure GDA0003605294910000071
And summing, recording the total inductance Ld of the planar spiral inductor including the sum of the inductances of all the short straight metal lines as:
Figure GDA0003605294910000072
wherein the self-inductance of the short straight metal wire
Figure GDA0003605294910000073
Mutual inductance of short straight metal wires
Figure GDA0003605294910000074
Weff is the effective line width, l is the length of the short and straight metal lines, t is the metal thickness, and d is the distance between the two metal lines;
the resistance of each metal line of the planar spiral inductor is expressed as: r ═ (ρ · l)/(Weff · tm);
wherein rho is resistivity in ohm-cm and tm is metal thickness;
the effect of capacitance between metal lines according to the planar spiral inductor is a parasitic effect, and the parasitic capacitance is denoted as
Figure GDA0003605294910000081
It is located outside the segment inductor of the adjacent short straight metal line; the coupling capacitance per unit length of the segmented inductor is denoted CcCapacitance C comprising an air zone across the coupling gapcdAnd a capacitance C of the dielectric regioncaThus, the total parasitic capacitance between adjacent short straight metal lines of the planar spiral inductor is
Figure GDA0003605294910000082
Figure GDA0003605294910000083
∑i,j(Ccd+Cca): i, j total parasitic capacitance formed by the sum of the coupling capacitances of the segmented inductances of the adjacent short straight metal lines;
Ccdand CcaExpressed as:
Figure GDA0003605294910000084
Figure GDA0003605294910000085
wherein s is the area of the metal line, w is the line width, n is the number of segments of the metal line, h is the distance between the conductor and the substrate, CfIs the fringe capacitance, ∈0Is the dielectric constant of free space, epsilonrIs the relative permittivity of the dielectric medium; cfThe fringe capacitance is a capacitance generated in a high frequency case in a fringe region of a metal, and in view of the inconvenience of directly obtaining a quantitative calculation, it is considered that the longer the adjacent short straight metal line is, the higher the capacitance value of the fringe becomes.
The air bridge capacitance effect is two of planar spiral inductanceAnother parasitic effect related to the overlap of different metal conductor layers; since the length of the air bridge area is much smaller than the whole metal wire of the planar spiral inductor, the resistance and the inductance of the part are ignored, and only the parasitic main capacitor C of the air bridge is consideredmm：
Figure GDA0003605294910000086
Wherein epsilon0(overlap area)In which the dielectric constant, t, of the free space in the overlap region of two different metal conductor layers of the planar spiral inductorairBridge is the thickness of the air bridge, i.e. the air gap spacing;
by total inductance Ld of the planar spiral inductor, the resistance of each metal line is represented as R, and the total parasitic capacitance of one short straight metal line is represented as R
Figure GDA0003605294910000087
Air bridge parasitic main capacitor CmmThe parameters are considered in a centralized manner, and the generated planar spiral inductor is optimally designed;
s2: the quality factor Q is improved by reducing the loss of the radio frequency passive device:
the overall filter quality factor Q is derived as the following equation:
Figure GDA0003605294910000091
the higher the Q value, the lower the loss of the future rf device will be, where h' is the substrate thickness, λ is the free space wavelength, η is the wave impedance, f is the operating frequency, μ is the free space permeability, σ is the metal conductor conductivity, λgFor guiding the wavelength, Z0Tan delta is the substrate dielectric loss, epsilon, for microstrip line input impedancerIs a relative dielectric constant,. epsilonreIs the effective dielectric constant;
the formula integrates three factors of conductor loss, dielectric loss and radiation loss; therefore, a substrate with high thickness and a metal with low resistance are selected to improve the quality factor; is suitable forThe width and the thickness of the metal wire are improved, so that the loss is effectively reduced; selecting the effective dielectric constant εreThe substrate material with larger dielectric loss tan delta is used for improving the quality factor, and therefore gallium arsenide is selected as the substrate layer to realize the effective dielectric constant epsilon re12 to 12.90, preferably 11.2, and 0.002 to 0.006, preferably 0.003; depositing a SiNx substrate layer on the upper surface of the gallium arsenide substrate layer 10 in the LC low-pass filter chip 2, and performing Ar gas sputtering etching on the SiNx substrate layer at room temperature to enhance the adhesion between the SiNx and the top seed metal conductor layer;
s3: sputtering a seed metal conductor layer of gold and titanium alloy on the top of the SiNx substrate layer to help the growth of a subsequent metal conductor layer;
s4: coating photoresist 8 on the seed metal conductor layer of gold and titanium alloy, patterning, and growing copper or gold by electron beam evaporation; then stripping off the redundant photoresist 8, and finally forming a metal pattern;
s5: etching the unstructured seed metal conductor layer by using Ar gas to enable the unstructured seed metal conductor layer to be matched with a grown subsequent metal conductor layer;
s6: depositing photoresist 8 again on the surface of the filter to prevent moisture oxidation, and removing bubbles in the photoresist 8 using a vacuum furnace;
s7: the low-pass filter is characterized in that an LC low-pass filter chip 2 is connected to a PCB (printed circuit board) by COB (chip on Board) packaging through an epoxy adhesive 7, a gold wire 1 between the LC low-pass filter chip 2 and the PCB adopts an aluminum wedge welding mode, a grounding layer on the upper surface of the PCB is naturally abutted to and electrically connected with a metal ground layer 11 on a gallium arsenide substrate layer 10, and the grounding layer on the upper surface of the PCB is connected to a lower bottom surface grounding layer 5 through a dense via array 6, so that the low-pass filter realizes a better grounding effect.
With reference to fig. 1 to 4, the LC low-pass filter is a low-pass filter with three transmission zeros, wherein a first pair of LC parallel resonant units is formed by connecting an inductor L1 and a capacitor C1 in parallel, a second pair of LC parallel resonant units is formed by connecting an inductor L2 and a capacitor C2 in parallel, and the impedance of the input end and the output end of the LC low-pass filter is 50 ohms.
With reference to fig. 1 and 2, the capacitors in the first pair of LC parallel resonant units, the parallel capacitors in the second pair of LC parallel resonant units adopt parallel plate capacitors, and capacitance is increased between the parallel plates through the SiNx substrate layer 13; the SiNx substrate layer 13 may be an SiN substrate layer, the inductor L1 in the first pair of LC parallel resonant cells and the inductor L2 in the second pair of LC parallel resonant cells adopt planar spiral inductors, and the overlapping portions of the inductors adopt an air bridge structure.
Using SU-8 photoresist 8 instead of SiN as the material for finally forming the passivation layer can reduce the cost and improve the yield. The bubble removal method is to use a vacuum furnace in which the gas pressure of the SU-8 photoresist 8 solution is higher than the outside. The wafer coated with SU-8 photoresist 8, including the LC low pass filter chip 2, was placed in a vacuum oven for 30 minutes, and most of the bubbles disappeared. When making metallic conductor layer 12, this application adopts electron beam evaporation technique, and it can be fine solution adopts electroplating to bring like thickness control difficulty, and the processing step of design is many to and the metal surface roughness scheduling problem that processes out, can control metallic conductor layer's resistance value effectively. The growth of the two metal conductor layers 12 of copper/gold (9.5/0.5 μm) can also be achieved by depositing the materials using PECVD (chemical vapor deposition), the high PECVD operating pressure, the increased number of ions generated, and thus the increased ion flux to the wafer surface, while the surface roughness of the materials deposited on the wafer can be greatly reduced by reducing the deposition rate. And N2 annealing or O2/H2 plasma treatment can be adopted to remove organic matters and oxide pollution on the metal surface.
Fig. 3 is a schematic diagram of a circuit model structure of a low-pass filter, in which for convenience of analysis, a metal line constituting a planar spiral inductor is divided into i-10 short and straight metal line segments, which are denoted by seg (1), seg (2) … … seg (9) and seg (10), and total parasitic capacitance between adjacent short and straight metal lines of the planar spiral inductor is denoted by seg (1), seg (2) … … seg (9) and seg (10)
Figure GDA0003605294910000101
Incorporated in FIG. 3
Figure GDA0003605294910000102
The method specifically comprises the following steps:
Figure GDA0003605294910000103
Figure GDA0003605294910000104
the parasitic main capacitance of the air bridge is denoted as Cmm. Csub-up is equivalent capacitance generated by the input end and the output end of the low-pass filter and a medium substrate layer respectively, Gsub-up is equivalent conductance generated by the input end and the output end of the low-pass filter and the medium substrate layer respectively, and Cox-up is equivalent capacitance generated by the input end and the output end of the low-pass filter and a passivation layer respectively.
Fig. 4 is a diagram illustrating that inductance segmentation areas of seg (1), seg (2) … … seg (9) and seg (10) are individually modeled to match with parameter optimization design, Ls/2 is spectrum inductance, Rs/2 is spectrum resistance, equivalent capacitance generated by the Csub inductance segmentation area and the dielectric substrate layer, Gsub is equivalent conductance generated by the inductance segmentation area and the dielectric substrate layer, and Cox is an equivalent circuit model exhibited by the equivalent capacitance generated by the inductance segmentation area and the passivation layer.
Fig. 5 shows that the main processes of COB (chip on Board) packaging are chip connection and wire bonding. A 6-inch GaAs wafer having a thickness of 400 μm was selected as the LC low-pass filter chip 2 substrate. To prevent mechanical and chemical damage, a metal cover 3 is used to protect the LC low pass filter chip 2 and to adhere to the upper PCB board layer. A detailed cross-sectional view of the thickness of the corresponding assembly as in COB packaging is shown in fig. 3. The package plate is a Teflon (r ═ 3.5) PCB board 4, 0.5mm thick, with multiple air cavities under the metal cover 3 used in the circuit assembly. The spacing between the vias is minimized to prevent mode excitation between the two layers. The effect of COB packaging on the radio frequency performance of the final LC low-pass filter chip 2 is negligible. The LC low pass filter chip 2 is attached to the PCB board by 0.025 mm epoxy adhesive 7 to achieve the correct orientation and flatness of the LC low pass filter chip 2. And connecting the gold wire 1 between the LC low-pass filter chip 2 and the PCB by adopting an aluminum wedge welding scheme. The upper surface of the PCB board 4 is a ground plane which is connected to the lower bottom ground plane 5 on the opposite side by a dense array of vias 6 for better grounding of the filter microwave operation.
In the IPD, the wafer microwave test is a commonly used test method, and the wafer microwave test is as follows: the wafer microwave test system comprises a network analyzer, a spectrum analyzer, a probe station, a radio frequency cable, a radio frequency connector, an adapter and a radio frequency probe. The network analyzer stimulates the device with its source connected to an input of the Device Under Test (DUT) and an output of the Device Under Test (DUT) connected to its input. The spectrum analyzer is used to measure the amplitude and frequency of the signal lines and is directly connected to the signal source. The probe station is used for production or sample testing in the laboratory. The entire probe station is placed on the shock mount during the entire radio frequency test. The radio frequency probe is fixed on a micro positioner of a probe station, a wafer is put on a chuck with the diameter of the wafer, and a vacuum tube can reach the center of the chuck through the probe station. Radio frequency cables can be divided into two categories: semi-rigid cables, which have a solid aluminum or copper sheath for protecting the semi-flexible medium of the solid conductor, and flexible cables, which cover the flexible electrolyte of the center conductor by using a more complex plastic encapsulated aluminum braided shield arrangement. The number of rf microwave connectors connected or disconnected must be considered throughout the test, and its frequency range is limited by the first circular waveguide propagating excitation in the coaxial structure. The adapter may provide conversion between connector type and gender. The rf probe is the last connection module in the rf probing system to contact the Device Under Test (DUT), connecting the coaxial cable to the probe pads, and its tip contacts the probe pads on the wafer surface.
The power handling test of the LC low pass filter chip 2 generally refers to exceeding the power level at which damage occurs, typically exceeding the dynamic range of the system. Evaluation system of power handling: the signal generator generates a signal to drive the diode amplifier, the incident power of the power divider is measured by a-20 dB coupler, the P1 terminal of the tested Device (DUT) is connected with the-20 dB coupler, the P3 terminal of the tested Device (DUT) is connected with an attenuator of-40 dB, and the spectrum analyzer is directly connected with a signal source and is used for measuring the amplitude and the frequency of the signal spectral line. The spectrum analyzer needs to take into account loading effects and other measurement errors and can also be used to measure the noise level as a function of frequency, typically greater than the spectrum analyzer.
The LC low-pass filter chip 2 is also subjected to process control detection, namely PCM data is collected and statistically analyzed, the PCM data is uniformly covered on the surface of the wafer, each PCM chip is composed of a plurality of modules, and the modules have different test structures to be tested. In order to ensure the stability of the semiconductor manufacturing process, the phase change material test is used to detect the variation of the manufacturing process, and the phase change materials in operation are respectively located at the top, bottom, left, right, and center of the wafer. The number of phase change material dies on each wafer is related to three factors, respectively: wafer size, embedding location, and cost. The test structure may obtain specific information for predicting the performance of the design specification. Where both test structures are designed in connection with manufacturing, and these structures are placed on specific locations of the wafer together with the produced LC low pass filter chip 2, the process variations can be observed more carefully.
As shown in fig. 6 and 7, the low-pass filter can be manufactured on a semiconductor substrate such as GaAs, silicon, etc. by using a manufacturing process of an integrated passive device, and the size of the low-pass filter is designed to be 914 micrometers × 370 micrometers, by the above measures and optimization design consideration of various parameters, the low-pass filter with a passband of 0-1.8 GHz, an insertion loss of less than 1.2dB, and an out-of-band rejection of more than 20dB can be obtained, and is suitable for a low-pass filter of a 5G communication band, thereby having a wide application prospect.
In the description herein, references to the description of "one embodiment" or the like are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. While embodiments of the invention have been shown and described, it will be understood by those of ordinary skill in the art that: various changes, modifications, substitutions and alterations can be made to the embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

Claims (1)

1. High-impedance band suppression low-pass filter for 5G communication is characterized by comprising:
the medium substrate layer comprises a gallium arsenide substrate layer and a SiNx substrate layer which are arranged from bottom to top, wherein the gallium arsenide substrate layer is a substrate;
a metal conductor layer including a metal ground layer provided on a lower surface of the gallium arsenide substrate layer;
the filter structure layer is used for realizing a filter function and comprises a filter structure layer which is etched on the gallium arsenide substrate layer through photoetching, metal deposition, dry etching and high-temperature oxidation and is respectively positioned on the upper surface and the lower surface of the SiNx substrate layer, and the filter structure layer is electrically connected with the metal ground layer through a grounding through hole of the gallium arsenide substrate layer;
the passivation layer is used for covering the filter structure layer;
the filter structure layer comprises an LC low-pass filter and a grounding capacitor;
the LC low-pass filter comprises a first pair of LC parallel resonance units and a second pair of LC parallel resonance units;
the input ends of the first pair of LC parallel resonance units are electrically connected with the input end of the LC low-pass filter; the output end of the first pair of LC parallel resonance units is electrically connected with the input end of the second pair of LC parallel resonance units, and the output end of the second pair of LC parallel resonance units is electrically connected with the electrical output end of the LC low-pass filter;
one end of the grounding capacitor is electrically connected between the output end of the first pair of LC parallel resonance units and the input end of the second pair of LC parallel resonance units, and the other end of the grounding capacitor is electrically connected with the metal ground layer through a grounding through hole of the gallium arsenide substrate layer;
the first pair of LC parallel resonance units includes:
an inductance L1;
a capacitor C1 connected in parallel with the inductor L1;
the second pair of LC parallel resonance units comprising:
an inductance L2;
a capacitor C2 connected in parallel with the inductor L2;
the grounding capacitor comprises: a capacitor C3;
the inductor L1 and the inductor L2 adopt plane spiral inductors, and the overlapped part of the plane spiral inductors adopts an air bridge structure;
the capacitor C1, the capacitor C2 and the capacitor C3 adopt parallel plate capacitors, and the SiNx substrate layer is positioned between the parallel plate capacitors and used for improving the capacitance;
the inductors L1 and L2 are metal winding coils in octagonal spiral structures, and the inductors L1 and L2 adopt 3 turns of metal winding coils;
the preparation and packaging process of the high-impedance band-rejection low-pass filter for 5G communication specifically comprises the following steps:
s1: establishing a circuit model of the low-pass filter, splitting the metal wire forming the planar spiral inductor into n short and straight metal wire segments in the circuit model, wherein the inductance Ldi of each short and straight metal wire can be expressed as self-inductance Lsi and mutual inductance Ldi
Figure FDA0003605294900000021
And summing, recording the total inductance Ld of the planar spiral inductor including the sum of the inductances of all the short straight metal lines as:
Figure FDA0003605294900000022
n belongs to a natural number;
wherein the self-inductance of the short straight metal wire
Figure FDA0003605294900000023
Short straightMutual inductance of metal wires
Figure FDA0003605294900000024
Weff is the effective line width, l is the length of the short and straight metal lines, t is the metal thickness, and d is the distance between the two metal lines;
the resistance of each metal line of the planar spiral inductor is expressed as: r ═ p · l)/(Weff · tm);
wherein rho is resistivity in ohm-cm and tm is metal thickness;
the effect of capacitance between metal lines according to the planar spiral inductor is a parasitic effect, and the parasitic capacitance is denoted as
Figure FDA0003605294900000025
It is located outside the segment inductance of the adjacent short straight metal line; the coupling capacitance per unit length of the segmented inductor is denoted CcCapacitance C comprising an air zone across the coupling gapcdAnd a capacitance C of the dielectric regioncaThus, the total parasitic capacitance between adjacent short straight metal lines of the planar spiral inductor is
Figure FDA0003605294900000026
Figure FDA0003605294900000027
∑i,j(Ccd+Cca): i, j total parasitic capacitance formed by the sum of the coupling capacitances of the segmented inductances of the adjacent short straight metal lines;
Ccdand CcaExpressed as:
Figure FDA0003605294900000028
Figure FDA0003605294900000029
wherein s is the area of the metal line, w is the line width, n is the number of segments of the metal line, h is the distance between the conductor and the substrate, CfIs the fringe capacitance, ∈0Is the dielectric constant of free space, epsilonrIs the relative permittivity of the dielectric medium;
the air bridge capacitance effect is another parasitic effect related to the overlapping of two different metal conductor layers of the planar spiral inductor; since the length of the air bridge area is much smaller than the whole metal wire of the planar spiral inductor, the resistance and the inductance of the part are ignored, and only the parasitic main capacitor C of the air bridge is consideredmm：
Figure FDA00036052949000000210
Wherein epsilon0(overlaparea)In which the dielectric constant, t, of the free space in the overlapping region of two different metal conductor layers of the planar spiral inductorairBridge is the thickness of the air bridge, i.e. the air gap spacing;
by the total inductance Ld of the planar spiral inductor, the resistance of each metal line is represented as R, and the total parasitic capacitance of one short straight metal line is represented as R
Figure FDA0003605294900000031
Air bridge parasitic main capacitor CmmThe parameters are considered in a centralized manner, and the generated planar spiral inductor is optimally designed;
s2: the quality factor Q is improved by reducing the loss of the radio frequency passive device:
the overall filter quality factor Q is derived as the following equation:
Figure FDA0003605294900000032
the higher the Q value, the lower the loss of the future rf device, where h' is the substrate thickness, λ is the free space wavelength, and η is the wave resistanceReactance, f is the operating frequency, μ is the free space permeability, σ is the metal conductor conductivity, λgFor guiding the wavelength, Z0Tan delta is the substrate dielectric loss, epsilon, for microstrip line input impedancerIs a relative dielectric constant,. epsilonreIs the effective dielectric constant;
the formula integrates three factors of conductor loss, dielectric loss and radiation loss; therefore, a substrate with high thickness and a metal with low resistance are selected to improve the quality factor; the width and the thickness of the metal wire are properly increased, so that the loss is effectively reduced; selecting the effective dielectric constant εreThe substrate material with larger dielectric loss tan delta is used for improving the quality factor, thereby gallium arsenide is selected as the substrate layer to realize the effective dielectric constant epsilonre12 to 12.90, and a substrate dielectric loss tan delta of 0.002 to 0.006; depositing a SiNx substrate layer on the upper surface of the gallium arsenide substrate layer in the LC low-pass filter chip, and performing Ar gas sputtering etching on the SiNx substrate layer at room temperature to enhance the adhesion between the SiNx and the top seed metal conductor layer;
s3: sputtering a seed metal conductor layer of gold and titanium alloy on the top of the SiNx substrate layer to help the growth of a subsequent metal conductor layer;
s4: coating photoresist on the seed metal conductor layer of gold and titanium alloy, patterning, and growing copper or gold by electron beam evaporation technology; then stripping off the redundant photoresist, and finally forming a metal pattern of the planar spiral inductor and the parallel plate capacitor;
s5: etching the unstructured seed metal conductor layer with Ar gas to match the grown subsequent metal conductor layer;
s6: depositing photoresist on the surface of the filter again to prevent wet oxidation, and removing bubbles in the photoresist by using a vacuum furnace;
s7: and the chip of the LC low-pass filter is connected to the PCB by using COB (chip on Board) packaging through epoxy adhesive, a gold wire between the chip of the LC low-pass filter and the PCB adopts an aluminum wedge welding mode, the upper surface of the PCB is a ground layer, and the ground layer is connected to the ground layer on the lower bottom surface through a dense via hole array, so that the low-pass filter realizes a better grounding effect.
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