CN113299603A - Manufacturing method of backboard structure, display panel and display device - Google Patents
Manufacturing method of backboard structure, display panel and display device Download PDFInfo
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- CN113299603A CN113299603A CN202110431742.XA CN202110431742A CN113299603A CN 113299603 A CN113299603 A CN 113299603A CN 202110431742 A CN202110431742 A CN 202110431742A CN 113299603 A CN113299603 A CN 113299603A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
Abstract
The application relates to a manufacturing method of a back plate structure, the back plate structure, a display panel and a display device. The manufacturing method of the back plate structure comprises the following steps: forming a conductive pattern layer on one surface of the backboard substrate; arranging an insulating layer on one surface of the backboard substrate and covering the conductive pattern layer; arranging a first protective film on one surface of the insulating layer, which is far away from the back plate substrate, and arranging the back plate substrate on one surface of the first protective film, which is far away from the insulating layer; repeating the steps to enable the plurality of back plate structures to be sequentially superposed to form a processing unit; cutting the processing unit to enable the lead patterns to be exposed out of the side face of the peripheral area to form a side face binding area; forming metal wires in the side binding area, wherein the metal wires are arranged corresponding to the lead patterns to form electrical connection; and separating the plurality of back plate structures of the processing unit and tearing off the first protective film. Therefore, the influence of the wiring area of the binding area on the frame of the display panel can be reduced, and the purpose of reducing the width of the frame of the display panel is achieved.
Description
Technical Field
The present disclosure relates to the field of display technologies, and in particular, to a method for manufacturing a backplane structure, a display panel, and a display device.
Background
In the Display field, such as Liquid Crystal Displays (LCDs), Organic Light-Emitting Semiconductors (OLEDs), Light-Emitting diodes (LEDs), Micro-LED screens, the larger a single screen body is, the higher the manufacturing cost (price/area) is, so that a general super-large screen is usually formed by splicing a plurality of small screens together to reduce the cost per unit area. Since a general screen has a frame, the display area of the tiled screen has a plurality of non-display dark areas, which reduces the display quality. How to reduce the size of the splicing seam of the spliced screen has become a popular research object in the industry.
Disclosure of Invention
Therefore, it is necessary to provide a method for manufacturing a backplane that realizes ultra-narrowing of a spliced screen in a splicing process, aiming at the problem that the splicing seam of the current spliced screen is too large.
According to one aspect of the application, the back plate structure comprises:
the backboard substrate is provided with a display area and a peripheral area arranged around the display area;
the conductive layer comprises a display pattern and a lead pattern, the display pattern is arranged in the display area, the lead pattern is arranged in the peripheral area, and the display pattern is electrically connected with the lead pattern;
the insulating layer is arranged on one side, provided with the conductive layer, of the backboard substrate and covers the conductive layer;
the manufacturing method of the back plate structure is characterized by comprising the following steps:
forming the conductive layer on one surface of the backboard substrate;
arranging the insulating layer on one surface of the backboard substrate and covering the conductive layer;
arranging a first protective film on one surface of the insulating layer, which is far away from the backboard substrate;
arranging the backboard substrate on one surface, away from the insulating layer, of the first protective film;
repeating the steps to enable the plurality of back plate structures to be sequentially superposed to form a processing unit;
cutting the processing unit on the peripheral area to enable the lead patterns to be exposed out of the side face of the peripheral area, and forming a side face binding area;
forming metal wires in the side binding area, wherein the metal wires are arranged corresponding to the lead patterns to form electric connection;
separating the plurality of the back plate structures of the processing unit and tearing off the first protection film.
In one embodiment, after the cutting the processing unit in the peripheral area to expose the lead pattern on the side surface of the peripheral area to form a side bonding area, a metal trace is formed in the side bonding area, and before the metal trace is disposed corresponding to the lead pattern to form an electrical connection, the method further includes:
grinding the side bonding regions to uniformly expose the lead patterns.
In one embodiment, the forming the conductive layer on the surface of the backplane substrate specifically includes:
forming a metal layer on one surface of the backboard substrate;
and the metal layer forms a conductive pattern through a composition process, and the conductive patterns are jointly constructed to form the lead pattern layer.
In one embodiment, the step of forming a metal trace in the side bonding area, where the metal trace and the lead pattern are correspondingly disposed to form an electrical connection, includes:
and forming the metal wiring in the side binding area by silk-screen printing or transfer printing technology.
In one embodiment, the forming of the metal trace in the side bonding area, where the metal trace and the lead pattern are correspondingly disposed to form an electrical connection specifically includes:
forming a metal layer in the side binding region;
the metal layer forms routing patterns through a composition process, and the routing patterns are jointly constructed to form the metal routing.
In one embodiment, the material of the backplane substrate comprises glass.
In one embodiment, the material of the conductive layer includes at least one of titanium, aluminum, magnesium, silver, tungsten, copper, gold, and graphene.
In one embodiment, the material of the metal trace includes any one of copper, aluminum, and tin.
As a general inventive concept, the present application further provides a back plate structure, which is manufactured by the above manufacturing method.
As a general inventive concept, the present application also provides a display panel including the above-described backplane structure.
As one general inventive concept, the present application also provides a display device including the above-described display panel.
According to the manufacturing method of the backboard structure, the lead patterns are exposed out of the side face of the peripheral area to form the side face binding area, then the metal wires arranged corresponding to the lead patterns are formed in the side face binding area, and the display patterns in the display area are in metalized connection with the wires in the side face binding area. Therefore, the influence of the wiring area of the binding area on the frame of the display panel can be reduced, and the purpose of reducing the width of the frame of the display panel is achieved. Meanwhile, the influence of wiring in a COF (chip On film) mode On the frame of the display panel can be reduced, and the ultra-narrowing of the spliced screen in the splicing process is realized. Furthermore, the accuracy requirements on the backplane substrate side face are lower compared to side binding.
Drawings
Fig. 1 is a schematic flow chart illustrating a method for manufacturing a backplane structure according to an embodiment of the present disclosure;
FIG. 2 is a schematic flow chart illustrating a method for fabricating a backplane structure in accordance with a preferred embodiment of the present application;
fig. 3 is a schematic view illustrating a manufacturing process of a backplane structure according to an embodiment of the present disclosure.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present application more comprehensible, embodiments accompanying the present application are described in detail below with reference to the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application. This application is capable of embodiments in many different forms than those described herein and that modifications may be made by one skilled in the art without departing from the spirit and scope of the application and it is therefore not intended to be limited to the specific embodiments disclosed below.
In the description of the present application, it is to be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," "circumferential," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the present application and for simplicity in description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be considered limiting of the present application.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present application, "plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
In this application, unless expressly stated or limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can include, for example, fixed connections, removable connections, or integral parts; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may be directly contacting the first and second features or indirectly contacting the first and second features through intervening media. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.
It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "upper," "lower," "left," "right," and the like as used herein are for illustrative purposes only and do not denote a unique embodiment.
Micro light emitting diode (Micro LED) technology, i.e., LED scaling and matrixing technology, refers to a high-density Micro-sized LED array integrated on one chip. Micro light emitting diodes are receiving more and more attention in the application field of large-sized tiled screens due to their excellent characteristics of self-luminescence, high luminous efficiency, high contrast, wide working temperature range, low power consumption, excellent water and oxygen barrier properties, fast response time and the like.
With the development of narrow-frame or even frameless full-screen technology, a great deal of related technologies are developed, such as side wiring (side wiring), but due to the limitation of side wiring, the reduction of display frames still has a certain bottleneck, so that the edges of the display panel still remain a certain frame, a frameless full-screen in the true sense cannot be realized, and the limitation of frame splicing and joint on splicing display is realized, so that the difficulty in realizing high-resolution display is high.
Therefore, the present application provides a method for manufacturing a backplane, a display panel and a display device, which can preferably improve the above problems.
The following describes a method for manufacturing the backplane structure 10, a display panel, and a display device according to the present application with reference to the drawings.
Fig. 1 is a schematic flow chart illustrating a method for manufacturing a backplane structure 10 according to an embodiment of the present disclosure; FIG. 2 is a flow chart illustrating a method for fabricating the backplane structure 10 in a preferred embodiment of the present application; fig. 3 is a schematic manufacturing flow chart of the backplane structure 10 according to an embodiment of the present application. For the purpose of illustration, only the structures described in connection with the present application are illustrated in the drawings.
The manufacturing method of the backplane structure 10 disclosed in at least one embodiment of the present application is used for manufacturing the backplane structure 10 including the backplane substrate 11, the conductive layer 12, and the insulating layer 13, which are sequentially stacked.
In some embodiments, the backplane substrate 11 is a carrier of the conductive layer 12, and the backplane substrate 11 has a display area 111 and a peripheral area 112 disposed around the periphery of the display area 111.
In some embodiments, conductive layer 12 receives an external signal through peripheral region 112 and transmits the signal to display region 111. The conductive layer 12 includes a display pattern 121 formed in the display area 111 and a lead pattern 122 formed in the peripheral area 112, and the lead pattern 122 is electrically connected to the display pattern 121.
Since the display pattern 121 of the display area 111 and the lead line pattern 122 of the peripheral area 112 are easily corroded in a high temperature and high humidity environment, the electrical connection performance between the lead line pattern 122 and the display pattern 121 is affected, and the display area 111 cannot achieve the corresponding functions. Therefore, in some embodiments, an insulating layer 13 may be covered on the conductive layer 12 to avoid the risk of corrosion of the display pattern 121 and the wiring pattern 122.
The manufacturing method of the back plate structure 10 provided by the embodiment of the application includes the following steps:
s310: and forming the conductive pattern layer 12 on one surface of the backplane substrate 11.
Specifically, the material of the backplane substrate 11 should not be limited, and may be a conventional PCB substrate, a glass substrate, or other substrates, which is determined according to the actual situation.
The material of the conductive layer 12 is not limited, and is determined according to the actual situation. The material of conductive layer 12 may be a metal, such as: ti (titanium), Al (aluminum), Mg (magnesium), Ag (silver), W (tungsten), Cu (copper), gold (Au), and graphene. It should be understood that the material of the conductive layer 12 may be selected so as not to degrade the performance of the backplane structure 10 due to its own resistance. For example, the material of conductive layer 12 may also include at least one of the materials described above. As a preferred embodiment, Cu has good conductivity, which is beneficial to reduce the response time of the backplane substrate 11, and therefore, the material of the conductive layer 12 may be Cu.
And S320, arranging the insulating layer 13 on one surface of the backboard substrate 11 and covering the conductive layer 12.
Specifically, the insulating layer 13 may be formed by printing, coating and curing a dense-texture colloid with a good moisture-shielding effect, and the insulating layer 13 may not only insulate and insulate the lead pattern 122 and the display pattern 121, but also insulate moisture, thereby preventing the lead pattern 122 and the display pattern 121 from being corroded.
S330, arranging a first protective film 200 on one surface of the insulating layer 13, which is far away from the backboard substrate 11, and arranging the backboard substrate 11 on one surface of the first protective film 200, which is far away from the insulating layer 13.
Specifically, the first protection film 200 is disposed on one surface of the insulating layer 13 of one backplate structure 10 away from the backplate substrate 11, and the backplate substrate 11 of another backplate structure 10 is disposed on one surface of the first protection film 200 away from the insulating layer 13, and the first protection film 200 plays a role in separating the backplate structures 10.
And S340, repeating the steps to enable a plurality of back plate structures 10 to be sequentially overlapped to form a processing unit 100.
Specifically, the steps S310, S320 and S330 are repeated in sequence for a plurality of times to form a processing unit 100 including a plurality of stacked backplate structures 10, and each backplate structure 10 in the processing unit 100 is separated by the first protective film 200. In some embodiments, the forward projection of the other layers of the backplane structures 10 in the processing unit 100 except the first layer of the backplane structure 10 onto the first layer of the backplane structure 10 coincides with the outline of the first layer of the backplane structure 10, for example, the forward projection of the peripheral regions 112 of the other layers of the backplane structures 10 onto the first layer of the backplane structure 10 coincides with the outline of the peripheral region 112 of the first layer of the backplane structure 10; the lead line patterns 122 of the other layer of back plate structure 10 coincide with the lead line patterns 122 of the first layer of back plate structure 10 in a forward projection onto the first layer of back plate structure 10.
The number of the backplane structures 10 included in the processing unit 100 is not specifically limited, and should be selected according to the actual processing requirement. Specifically, in some embodiments, the processing unit 100 includes two back plate structures 10 stacked in sequence, and may also include three back plate structures 10 stacked in sequence or more than three back plate structures.
S350, cutting the processing unit 100 on the peripheral area 112 to expose the lead pattern 122 on the side of the peripheral area 112, so as to form a side bonding area.
Specifically, the processing unit 100 may be cut in the peripheral area 112 along the thickness direction of the backplane substrate 11, or the processing unit 100 may be cut in the peripheral area 112 along other directions, as long as the lead patterns 122 are exposed to the side of the peripheral area 112, which is not limited herein.
S370: and forming a metal wire 14 at the side bonding area, wherein the metal wire 14 is arranged corresponding to the lead pattern 122 to form an electrical connection.
Specifically, the metal trace 14 is formed on the side bonding area formed after the machining unit 100 is cut, and the metal trace 14 and the lead pattern 122 are electrically connected correspondingly. Therefore, the influence of the wiring area of the binding area on the frame of the display panel can be reduced, and the purpose of reducing the width of the frame of the display panel is achieved. The influence of the wiring of the COF mode on the frame of the display panel can be reduced, and the ultra-narrowing of the splicing screen in the splicing process is realized.
The material of the metal trace 14 may be any simple metal substance of copper, aluminum, steel, and tin; alternatively, the material of the metal trace 14 may also be an alloy of the above simple metals, such as an aluminum-tin alloy.
In some embodiments, after the metal trace 14 is formed on the side bonding area formed after the machining unit 100 is cut, and the metal trace 14 and the lead pattern 122 are electrically connected correspondingly, a second protective film is further disposed on the metal trace 14. In some embodiments, an organic or inorganic second protective film may be formed on the metal trace 14 by deposition or attachment. Thus, the short circuit condition caused by the conductive particles falling between the metal wires 14 can be prevented, and the metal wires 14 can be prevented from being damaged in the assembling process of the back plate structure 10, so as to avoid the open circuit condition.
S380: the plurality of the back plate structures 10 of the processing unit 100 are separated and the first protection film 200 is torn off.
Specifically, the first protective film 200 can protect the display patterns 121 located in the display region 111 during the cutting and grinding process of the processing unit 100, and facilitate the metal traces 14 in the side bonding region to be neatly split when the back plate structures 10 are separated.
In some embodiments, after step S350 and before step S370, the method further includes the steps of:
s360: the side bonding regions are ground to uniformly expose the lead patterns 122.
Specifically, before the machining unit 100 is cut, a mark is marked on a corresponding position of the machining unit 100 to form a cutting path, so that the cutting operation is facilitated. For example, the mark is a dashed line and is located on a side of the peripheral region 112 away from the display region 111. However, in the actual operation process, the cutting operation cannot be completely performed according to the preset cutting path, so that the cutting surface is not flat, and the width of the frame is affected. Therefore, after the cutting step, the grinding step is required to reduce the influence of the flatness of the cut surface of the processing unit 100 on the frame width.
In some embodiments, step S310 includes the steps of:
firstly, a metal layer is formed by adopting a multi-time sputtering mode, then photoresist is coated, then the photoresist is exposed by utilizing a mask plate, the photoresist to be removed is etched by utilizing a developing solution, then the part of the metal layer which is not covered by the photoresist is etched, and finally the remaining photoresist is stripped, so that the required conductive pattern is formed, and the conductive pattern is jointly constructed to form the conductive pattern layer 12.
In other embodiments, the required conductive patterns may be obtained by forming a conductive metal grid on the backplane substrate 11, and the conductive patterns are jointly configured to form the conductive layer 12; or depositing a conductive film, such as a graphene film, on the backplane substrate 11, and obtaining the conductive layer 12 in a laser manner; the required conductive pattern can also be obtained by directly silk-screen printing the conductive paste on the back substrate 11, and the conductive pattern jointly forms the conductive pattern layer 12.
It is to be understood that the above examples are for illustrative purposes only and are not to be construed as limiting the present application.
In some embodiments, step S370 includes the steps of:
the metal traces 14 are formed in the side bonding areas by screen printing or transfer printing.
In some embodiments, step S370 includes the steps of:
firstly, a metal layer is formed in a side binding area by adopting a multi-time sputtering mode, then photoresist is coated, then the photoresist is exposed by utilizing a mask plate, the photoresist to be removed is etched by utilizing developing solution, then the part of the metal layer which does not cover the photoresist is etched, and finally the remaining photoresist is stripped, so that the required wiring pattern is formed, and the wiring pattern is jointly constructed to form the metal wiring 14.
As a general inventive concept, the present application further provides a back plate structure 10, and the back plate structure 10 is manufactured by the above-mentioned manufacturing method.
As a general inventive concept, the present application further provides a display panel, which includes the backplane structure 10, wherein a plurality of micro light emitting diodes are distributed on the backplane structure 10 in an array. In some embodiments, the display panel may be an LCD, an OLED, or a Micro LED.
As one general inventive concept, the present application also provides a display device including the above-described display panel. The display device may be a cell phone screen, a computer screen, a television screen, electronic paper, an electronic painted screen, a dashboard, or other type of display device.
In the manufacturing method of the back plate structure 10, the display panel and the display device, the lead pattern 122 in the back plate structure 10 is exposed on the side surface of the peripheral region 112 to form the side binding region, and then the metal wires 14 corresponding to the lead pattern 122 are formed in the side binding region, so that the display pattern 121 of the display region 111 and the wires in the side binding region are connected in a metallization manner. Therefore, the influence of the wiring area of the binding area on the frame of the display panel can be reduced, and the purpose of reducing the width of the frame of the display panel is achieved. Meanwhile, the influence of wiring in a COF (chip On film) mode On the frame of the display panel can be reduced, and the ultra-narrowing of the spliced screen in the splicing process is realized. Furthermore, the accuracy requirements for the backplane substrate 11 side are lower compared to side bonding.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the claims. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (11)
1. A method of making a backplane structure, the backplane structure comprising:
the backboard substrate is provided with a display area and a peripheral area arranged around the display area;
the conductive layer comprises a display pattern and a lead pattern, the display pattern is arranged in the display area, the lead pattern is arranged in the peripheral area, and the display pattern is electrically connected with the lead pattern;
the insulating layer is arranged on one side, provided with the conductive layer, of the backboard substrate and covers the conductive layer;
the manufacturing method of the back plate structure is characterized by comprising the following steps:
forming the conductive layer on one surface of the backboard substrate;
arranging the insulating layer on one surface of the backboard substrate and covering the conductive layer;
arranging a first protective film on one surface, away from the back plate substrate, of the insulating layer, and arranging the back plate substrate on one surface, away from the insulating layer, of the first protective film;
repeating the steps to enable the plurality of back plate structures to be sequentially superposed to form a processing unit;
cutting the processing unit on the peripheral area to enable the lead patterns to be exposed out of the side face of the peripheral area, and forming a side face binding area;
forming metal wires in the side binding area, wherein the metal wires are arranged corresponding to the lead patterns to form electrical connection;
separating the plurality of the back plate structures of the processing unit and tearing off the first protection film.
2. The method for manufacturing a backplane structure according to claim 1, wherein the step of cutting the processing unit at the peripheral area to expose the lead patterns to the side surfaces of the peripheral area and forming side bonding areas is further performed before forming metal traces at the side bonding areas, and the step of forming the metal traces corresponding to the lead patterns to form electrical connections further includes:
grinding the side bonding regions to uniformly expose the lead patterns.
3. The method according to claim 1, wherein the step of forming the conductive layer on the backplane substrate comprises:
forming a metal layer on one surface of the backboard substrate;
and the metal layer forms a conductive pattern through a composition process, and the conductive patterns are jointly constructed to form the lead pattern layer.
4. The method for manufacturing a backplane structure according to claim 1, wherein the step of forming a metal trace in the side bonding area, the step of forming an electrical connection between the metal trace and the lead pattern being specifically:
and forming the metal wiring in the side binding area by silk-screen printing or transfer printing technology.
5. The method for manufacturing a backplane structure according to claim 1, wherein the forming of the metal trace in the side bonding area, the metal trace being disposed corresponding to the lead pattern to form an electrical connection, specifically comprises:
forming a metal layer in the side binding region;
the metal layer forms routing patterns through a composition process, and the routing patterns are jointly constructed to form the metal routing.
6. The method of claim 1, wherein the material of the backplane substrate comprises glass.
7. The method of claim 1, wherein the material of the conductive layer comprises at least one of titanium, aluminum, magnesium, silver, tungsten, copper, gold, and graphene.
8. The method for manufacturing a back plate according to claim 1, wherein the material of the metal traces comprises any one of copper, aluminum and tin.
9. A backboard structure, characterized in that the backboard structure is manufactured by the manufacturing method according to any one of claims 1 to 8.
10. A display panel comprising the backplane structure of claim 9.
11. A display device characterized in that the display device comprises the display panel according to claim 10.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110431742.XA CN113299603A (en) | 2021-04-21 | 2021-04-21 | Manufacturing method of backboard structure, display panel and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110431742.XA CN113299603A (en) | 2021-04-21 | 2021-04-21 | Manufacturing method of backboard structure, display panel and display device |
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| CN113299603A true CN113299603A (en) | 2021-08-24 |
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| CN202110431742.XA Withdrawn CN113299603A (en) | 2021-04-21 | 2021-04-21 | Manufacturing method of backboard structure, display panel and display device |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113764564A (en) * | 2021-08-31 | 2021-12-07 | Tcl华星光电技术有限公司 | Substrate preparation method and membrane structure |
| WO2023236279A1 (en) * | 2022-06-08 | 2023-12-14 | 深圳市华星光电半导体显示技术有限公司 | Method for manufacturing display panel, and display panel |
-
2021
- 2021-04-21 CN CN202110431742.XA patent/CN113299603A/en not_active Withdrawn
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113764564A (en) * | 2021-08-31 | 2021-12-07 | Tcl华星光电技术有限公司 | Substrate preparation method and membrane structure |
| CN113764564B (en) * | 2021-08-31 | 2024-01-23 | Tcl华星光电技术有限公司 | Substrate preparation method and diaphragm structure |
| WO2023236279A1 (en) * | 2022-06-08 | 2023-12-14 | 深圳市华星光电半导体显示技术有限公司 | Method for manufacturing display panel, and display panel |
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Application publication date: 20210824 |