CN113296324A - Display substrate, driving method thereof, display panel and display device - Google Patents

Abstract

The invention provides a display substrate, a driving method thereof, a display panel and a display device, wherein the display substrate comprises: the liquid crystal display device comprises a substrate, a plurality of sub-pixels arranged on the substrate in an array mode, a plurality of data lines extending along a first direction, a plurality of grid lines extending along a second direction intersecting with the first direction, a plurality of first-type control switches and a plurality of second-type control switches, wherein one sub-pixel, one first-type control switch coupled with the sub-pixels and one second-type control switch coupled with the sub-pixels are arranged in a minimum area defined by the data lines and the grid lines; the data line is arranged between two adjacent columns of sub-pixels; in the same column of sub-pixels, the first type control switch coupled to each sub-pixel is alternately coupled to two adjacent data lines in turn, and the second type control switch coupled to each sub-pixel is coupled to the same one of the two adjacent data lines.

Description

Display substrate, driving method thereof, display panel and display device

Technical Field

The invention relates to the technical field of display, in particular to a display substrate, a driving method thereof, a display panel and a display device.

Background

The pixel architecture in the existing display products adopts either a Column (Column) architecture or a Z Inversion (Inversion) architecture. Under the Z-inversion framework, the polarities of two adjacent sub-pixels in the display screen are opposite, and the Z-inversion framework has a good effect in displaying, but when the Z-inversion framework is applied to a display screen with a high refresh rate, a high resolution and a large size, a situation of insufficient charging occurs, so that charging of adjacent Data lines (Data) to pixels in some pictures (generally mixed color pictures) has differences, which shows that the pixel brightness is not uniform under the same gray scale voltage, and visible horizontal lines or vertical lines, namely Fine lines, appear on the pictures, and the Fine line Pitch problem caused by insufficient charging can be solved under the column framework. In addition, when the column architecture is applied to a display screen with a low refresh rate, the problem of poor shaking patterns can occur, and the poor shaking patterns can be avoided under the Z-inversion architecture. That is, the column architecture and the Z-inversion architecture each have advantages and disadvantages. Once the display device is manufactured, only one pixel structure, such as a column structure or a Z-inversion structure, can be used. If the function of another framework is needed, only the mask plate can be changed to be prepared again, and the cost is very high.

Disclosure of Invention

The invention provides a display substrate, a driving method thereof, a display panel and a display device, which are used for being compatible with two pixel architectures.

In a first aspect, an embodiment of the present invention provides a display substrate, including:

the liquid crystal display device comprises a substrate, a plurality of sub-pixels arranged on the substrate in an array mode, a plurality of data lines extending along a first direction, a plurality of grid lines extending along a second direction intersecting with the first direction, a plurality of first-type control switches and a plurality of second-type control switches, wherein one sub-pixel, one first-type control switch coupled with the sub-pixels and one second-type control switch coupled with the sub-pixels are arranged in a minimum area defined by the data lines and the grid lines;

the data line is arranged between two adjacent columns of sub-pixels; in the same column of sub-pixels, the first type control switch coupled to each sub-pixel is alternately coupled to two adjacent data lines in turn, and the second type control switch coupled to each sub-pixel is coupled to the same one of the two adjacent data lines.

In a possible implementation manner, two gate lines are disposed between two adjacent rows of the sub-pixels in the plurality of sub-pixels, and a gate of the first-type control switch coupled to each row of the sub-pixels in the plurality of sub-pixels is sequentially coupled to an odd-numbered gate line arranged along the first direction in the plurality of gate lines; the grid electrode of the second control switch coupled with each row of sub-pixels in the plurality of sub-pixels is sequentially coupled with a second even number of grid lines arranged along the first direction in the plurality of grid lines.

In a possible implementation manner, the display substrate further includes a display area and a non-display area surrounding the display area, the non-display area includes a plurality of cascaded even-numbered stage shift registers and a plurality of cascaded odd-numbered stage shift registers, each even-numbered stage shift register is coupled to the even-numbered gate lines, and each odd-numbered stage shift register is coupled to the odd-numbered gate lines.

In a possible implementation manner, each odd-numbered stage shift register is configured to control the first-type control switch unit coupled to the odd-numbered gate line to be turned on, and each even-numbered stage shift register is configured to control the second-type control switch unit coupled to the even-numbered gate line to be turned off, and polarities of two adjacent sub-pixels in the plurality of sub-pixels are opposite.

In a possible implementation manner, each even-level shift register is configured to control the second-type control switch coupled to the even-numbered gate line to be turned on, and each odd-level shift register is configured to control the first-type control switch coupled to the odd-numbered gate line to be turned off, and the polarity of each sub-pixel in the same column of sub-pixels in the plurality of sub-pixels is the same, and the polarities of the sub-pixels in two adjacent columns of sub-pixels are opposite.

In a possible implementation manner, the display substrate includes a pixel electrode located on the substrate, and a common electrode located between the substrate and the pixel electrode, two common electrodes corresponding to two adjacent sub-pixels in the same row of sub-pixels are disconnected from each other, and an orthogonal projection of a data line between the two adjacent sub-pixels on the substrate and an orthogonal projection of the two common electrodes on the substrate do not overlap each other.

In a possible implementation manner, the common electrodes corresponding to the sub-pixels in the same row are arranged in an uninterrupted manner in the whole layer, and the orthographic projection of the data line between two adjacent sub-pixels in the same row on the substrate completely falls into the area range of the orthographic projection of the common electrodes corresponding to the sub-pixels in the same row on the substrate.

In one possible implementation manner, a transparent organic film is disposed between the data line and the common electrode between two adjacent sub-pixels in the same row of sub-pixels.

In a second aspect, an embodiment of the present invention provides a display panel, including:

a display substrate as claimed in any preceding claim.

In a third aspect, an embodiment of the present invention provides a display device, including:

such as the display panel described above.

In a fourth aspect, an embodiment of the present invention provides a method for driving a display substrate, including:

under a first refreshing frequency, controlling the first type of control switch to be turned on and the second type of control switch to be turned off, and alternately loading first data signals with opposite polarities to the plurality of data lines so that the polarities of two adjacent sub-pixels in the plurality of sub-pixels are opposite;

and under a second refresh frequency which is greater than the first refresh frequency, controlling the second type control switch to be turned on and the first type control switch to be turned off, and alternately loading second data signals with opposite polarities to the plurality of data lines, so that the polarities of each sub-pixel in the same column of sub-pixels in the plurality of sub-pixels are the same, and the polarities of the sub-pixels in two adjacent columns are opposite.

In one possible implementation, at the first refresh frequency, the method further includes:

and loading a first scanning signal to an odd-numbered gate line arranged along the first direction in the plurality of gate lines through a plurality of cascaded odd-numbered stage shift registers, and charging each sub-pixel under the loading of the first data signal and the first scanning signal.

In one possible implementation, at the second refresh frequency, the method further includes:

and loading a second scanning signal to even-numbered gate lines arranged along the first direction in the plurality of gate lines through a plurality of cascaded even-numbered stage shift registers, and charging each sub-pixel under the loading of the second data signal and the second scanning signal.

The invention has the following beneficial effects:

the embodiment of the invention provides a display substrate, a driving method thereof, a display panel and a display device, wherein a sub-pixel, a first type control switch coupled with the sub-pixel and a second type control switch coupled with the sub-pixel are arranged in a minimum area surrounded by a data line and a grid line in the display substrate, a data line is arranged between two adjacent columns of sub-pixels, in the same column of sub-pixels, the first type control switch coupled with each sub-pixel is sequentially and alternately coupled with two adjacent data lines, the second type control switch coupled with each sub-pixel is coupled with the same data line in two adjacent data lines, therefore, the polarities of two adjacent sub-pixels in the plurality of sub-pixels are opposite by controlling the first type control switch to be turned on and the second type control switch to be turned off, namely, the display substrate realizes a Z-inversion framework, the first type of control switch can be controlled to be turned off, and the second type of control switch can be controlled to be turned on, so that the polarity of each sub-pixel in the same column of sub-pixels in the plurality of sub-pixels is the same, and the polarities of two adjacent columns of sub-pixels are opposite, namely, the display substrate realizes a column architecture, namely, the display substrate can be compatible with two pixel architectures including a Z-inversion architecture and a column architecture, and the use performance of the display substrate is ensured.

Drawings

FIG. 1 is a schematic structural diagram of a conventional column-structured display panel;

FIG. 2 is a schematic structural diagram of a conventional Z-inversion display panel;

fig. 3 is a schematic structural diagram of a display substrate according to an embodiment of the invention;

fig. 4 is a schematic structural diagram of a display substrate according to an embodiment of the invention;

fig. 5 is a schematic structural diagram of a display substrate according to an embodiment of the invention;

fig. 6 is a schematic structural diagram of a display substrate according to an embodiment of the present invention;

FIG. 7 is a schematic view of a display substrate according to an embodiment of the present invention;

FIG. 8 is a schematic structural diagram of the display substrate shown in FIG. 4 implementing a Z-inversion scheme;

FIG. 9 is a schematic diagram of one of the structures of the display substrate of FIG. 4 implementing a column architecture;

FIG. 10 is a cross-sectional view taken along the MM direction in FIG. 3;

FIG. 11 is a cross-sectional view taken along the MM direction in FIG. 3;

FIG. 12 is a schematic view of one of the cross-sectional structures along the MM direction in FIG. 3;

fig. 13 is a schematic structural diagram of a display panel according to an embodiment of the present invention;

fig. 14 is a schematic structural diagram of a display device according to an embodiment of the invention;

fig. 15 is a flowchart of a method for driving a display substrate according to an embodiment of the invention.

Description of reference numerals:

spx-subpixels; Gate-Gate lines; Data-Data lines; 1-a substrate base plate; 2-a first type control switch; 3-a second type control switch; r-red sub-pixel; g-green sub-pixel; b-blue sub-pixel; a-a display area; b-a non-display area; 4-even stage shift register; 5-odd-numbered stage shift registers; 6-pixel electrode; 7-a common electrode; 8-a gate insulating layer; 9-a passivation layer; 10-transparent organic film; 100-a display substrate; 200-display panel.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the drawings of the embodiments of the present invention. It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. And the embodiments and features of the embodiments may be combined with each other without conflict. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the invention without any inventive step, are within the scope of protection of the invention.

Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. The use of the word "comprise" or "comprises", and the like, in the context of this application, is intended to mean that the elements or items listed before that word, in addition to those listed after that word, do not exclude other elements or items.

It should be noted that the sizes and shapes of the figures in the drawings are not to be considered true scale, but are merely intended to schematically illustrate the present invention. And the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout.

In the prior art, the conventional display panel adopts a column architecture as shown in fig. 1, wherein a Gate line Gate is disposed between two adjacent rows of sub-pixels Spx, a Data line Data is disposed between two adjacent columns of sub-pixels Spx, the polarities of each sub-pixel Spx in the same column of sub-pixels Spx are the same, and the polarities of the sub-pixels Spx in the two adjacent columns are opposite. Or, a Z-inversion architecture as shown in fig. 2 is adopted, in which one Gate line Gate is disposed between two adjacent rows of sub-pixels Spx, one Data line Data is disposed between two adjacent columns of sub-pixels Spx, and the polarities of two adjacent sub-pixels Spx are opposite. However, in high refresh rate, high resolution, large size displays, the Z-inversion scheme can cause the Fine Pitch problem, and in low refresh rate displays, the column scheme can cause the wiggle texture problem. That is, the column architecture and the Z-inversion architecture each have disadvantages. In the prior art, once the display device is manufactured, either the column structure or the Z-inversion structure is adopted, and if the function of the other structure is needed, only the mask plate can be changed to be manufactured again.

In view of this, embodiments of the present invention provide a display substrate, a driving method thereof, a display panel and a display device, which are compatible with two pixel architectures.

Fig. 3 is a schematic structural diagram of a display substrate according to an embodiment of the present invention, specifically, the display substrate includes:

a substrate 1, a plurality of sub-pixels Spx arranged in an array on the substrate 1, a plurality of Data lines Data extending along a first direction, a plurality of Gate lines Gate extending along a second direction intersecting the first direction, a plurality of first-type control switches 2, and a plurality of second-type control switches 3, wherein one of the sub-pixels Spx, one of the first-type control switches 2 coupled to the sub-pixel Spx, and one of the second-type control switches 3 coupled to the sub-pixel Spx are disposed in a minimum region surrounded by the Data lines Data and the Gate lines Gate;

one Data line Data is arranged between two adjacent columns of sub-pixels Spx, in the same column of sub-pixels Spx, the first-type control switch 2 coupled with each sub-pixel Spx is alternately coupled with two adjacent Data lines Data in turn, and the second-type control switch 3 coupled with each sub-pixel Spx is coupled with the same Data line Data in the two adjacent Data lines Data.

In a specific implementation process, the substrate 1 may be a rigid substrate such as glass or silicon, and may also be a flexible substrate, which is not limited herein. A plurality of sub-pixels Spx are arrayed on the substrate 1, and the number of the plurality of sub-pixels Spx can be set according to the size of the display substrate, the size of the pixel resolution, and the size of the single sub-pixel Spx in practical applications, which is not limited herein.

Still referring to fig. 3, the first direction may be a direction indicated by an arrow X, the second direction may be a direction indicated by an arrow Y, and the first direction and the second direction intersect each other, so that a plurality of Data lines Data extending along the first direction and a plurality of Gate lines Gate extending along the second direction intersect each other to define a plurality of pixel regions, in practical applications, a minimum region defined by the Data lines Data and the Gate lines Gate may be a plurality of, and one sub-pixel Spx is disposed in each minimum region, that is, the minimum region corresponds to one pixel region, and the minimum region is indicated by a dashed-line box a in fig. 3.

Still referring to fig. 3, the display substrate further includes a plurality of first type control switches 2 and a plurality of second type control switches 3, and the number of the first type control switches 2 and the number of the second type control switches 3 are equal to the number of the sub-pixels Spx. One Data line Data is arranged between every two adjacent columns of sub-pixels Spx, in the same column of sub-pixels Spx, the first-type control switch 2 coupled with each sub-pixel Spx is alternately coupled with two adjacent Data lines Data in turn, and the second-type control switch 3 coupled with each sub-pixel Spx is coupled with the same Data line Data of the two adjacent Data lines Data, so that when Data signals with opposite polarities are loaded to the plurality of Data lines Data alternately, the first-type control switch 2 can be controlled to be turned on, the second-type control switch 3 can be controlled to be turned off, so that the polarities of two adjacent sub-pixels Spx in the plurality of sub-pixels Spx are opposite, and the display substrate realizes a Z-inversion architecture, and the second-type control switch 3 can be controlled to be turned on by controlling the first-type control switch 2 to be turned off, so that the polarities of each sub-pixel Spx in the same column of sub-pixels Spx in the plurality of sub-pixels Spx are the same, the polarities of two adjacent columns of sub-pixels Spx are opposite, so that the display substrate realizes a column architecture.

In the embodiment of the invention, the sub-pixels Spx in the same column of the array substrate have the same color, and the sub-pixels Spx in two adjacent columns of the array substrate have different colors, as shown in fig. 3, the sub-pixels Spx include three sub-pixels Spx with different colors, namely, a red sub-pixel, a green sub-pixel, and a blue sub-pixel.

In the embodiment of the present invention, as shown in fig. 4, specifically, two Gate lines Gate are disposed between two adjacent rows of sub-pixels Spx in the plurality of sub-pixels Spx, and the Gate of the first-type control switch 2 coupled to each row of sub-pixels Spx in the plurality of sub-pixels Spx is sequentially coupled to the odd-numbered Gate lines Gate arranged along the first direction in the plurality of Gate lines Gate; the Gate of the second control switch 3 coupled to each row of sub-pixels Spx of the plurality of sub-pixels Spx is sequentially coupled to the even-numbered Gate lines Gate arranged along the first direction of the plurality of Gate lines Gate.

In a specific implementation, two Gate lines Gate are disposed between two adjacent rows of sub-pixels Spx in the plurality of sub-pixels Spx, the Gate of the first-type control switch 2 coupled to each row of sub-pixels Spx in the plurality of sub-pixels Spx is coupled to the odd-numbered Gate line Gate arranged along the first direction in turn, as shown in fig. 4, the Gate of each first-type control switch 2 coupled to each sub-pixel Spx in the first row of sub-pixels Spx is coupled to the first Gate line Gate, the Gate of each first-type control switch 2 coupled to each sub-pixel Spx in the second row of sub-pixels Spx is coupled to the third Gate line Gate, the Gate of each first-type control switch 2 coupled to each sub-pixel Spx in the third row of sub-pixels Spx is coupled to the fifth Gate line Gate, and for each sub-pixel Spx in the other rows of pixels the manner that the odd-numbered Gate of each first-type control switch 2 is coupled to the first Gate line Gate, and will not be described in detail. Accordingly, the Gate of the second control switch 3 coupled to each row of sub-pixels Spx of the plurality of sub-pixels Spx is sequentially coupled to the even-numbered Gate lines Gate arranged along the first direction of the plurality of Gate lines Gate, as shown in fig. 4, the Gate of each of the second control switches 3 coupled to the sub-pixels Spx of the first row of sub-pixels Spx is coupled to a second Gate line Gate, the Gate of each of the second control switches 3 coupled to the sub-pixels Spx of the second row of sub-pixels Spx is coupled to the fourth Gate line Gate, the Gate of each of the second type control switches 3 coupled to a respective sub-pixel Spx of the third row of sub-pixels Spx is coupled to a sixth Gate line Gate, the coupling manner of the Gate of each of the second control switches 3 coupled to the sub-pixels Spx in other rows of pixels and the even-numbered Gate lines Gate will not be described in detail.

In a specific implementation process, the coupling manners between the first-type control switch 2 and the second-type control switch 3 and the plurality of Gate lines Gate may also be as shown in fig. 5, and the coupling relationships between the two types of control switches and the plurality of Gate lines Gate may be set by using the manners shown in fig. 4 or fig. 5 according to actual application requirements, which is not limited herein.

In the embodiment of the present invention, as shown in fig. 6, one of the structural diagrams of the display substrate is shown, specifically, the display substrate further includes a display area a and a non-display area B surrounding the display area a, the non-display area B includes a plurality of cascaded even-numbered stage shift registers 4 and a plurality of cascaded odd-numbered stage shift registers 5, each even-numbered stage shift register 4 is coupled to the even-numbered Gate line, and each odd-numbered stage shift register 5 is coupled to the odd-numbered Gate line.

In a specific implementation process, the specific distribution of the display area a and the non-display area B surrounding the display area a in the display substrate may be one of the situations shown in fig. 6, and the distribution between the display area a and the non-display area B may also be set according to an actual application requirement, which is not limited herein. The non-display area B includes a plurality of cascade-connected even-numbered stage shift registers 4 and a plurality of cascade-connected odd-numbered stage shift registers 5, each even-numbered Gate line Gate of the plurality of Gate lines Gate is coupled to one of the even-numbered stage shift registers 4, and accordingly, the number of the even-numbered stage shift registers 4 is equal to the number of the even-numbered Gate line gates of the plurality of Gate lines Gate. In addition, each of the odd-numbered Gate lines of the plurality of Gate lines Gate is coupled to one of the odd-numbered stage shift registers 5, and accordingly, the number of the odd-numbered stage shift registers 5 is equal to the number of the odd-numbered Gate lines Gate of the plurality of Gate lines Gate. In practical applications, the coupling relationship between the even-numbered stage shift register 4 and the odd-numbered stage shift register 5 and the plurality of Gate lines Gate may be set according to specific needs, and is not limited herein.

In a specific implementation process, the even-level shift register 4 and the odd-level shift register 5 may be respectively disposed at two opposite sides of the Gate lines Gate, as shown in fig. 6, the odd-level shift register 5 is disposed at the left side of the display area a, and the even-level shift register 4 is disposed at the right side of the display area a. Further, the odd-numbered stage shift register 5 and the even-numbered stage shift register 4 may be arranged in the manner shown in fig. 7, the odd-numbered stage shift register 5 being arranged on the right side of the display area a, and the even-numbered stage shift register 4 being arranged on the left side of the display area a. In practical applications, the setting can be performed according to specific needs, and is not limited herein.

In an embodiment of the present invention, as shown in fig. 8, one of the structural diagrams of the display substrate shown in fig. 4 implementing a Z-inversion architecture is shown, specifically, each odd-numbered stage shift register 5 is used to control the first-type control switch 2 coupled to the odd-numbered Gate line Gate to be turned on, each even-numbered stage shift register 4 is used to control the second-type control switch 3 coupled to the even-numbered Gate line Gate to be turned off, and polarities of two adjacent sub-pixels Spx in the plurality of sub-pixels Spx are opposite.

In a specific implementation process, since each even-numbered stage shift register 4 is coupled to the even-numbered Gate line, each odd-numbered stage shift register 5 is coupled to the odd-numbered Gate line, and each even-numbered stage shift register 4 and each odd-numbered stage shift register 5 are driven independently, the first-type control switch 2 coupled to the corresponding odd-numbered Gate line may be controlled to be turned on under the driving of the plurality of cascaded odd-numbered stage shift registers 5, and the second-type control switch 3 coupled to the corresponding even-numbered Gate line may be controlled to be turned off under the driving of the plurality of cascaded even-numbered stage shift registers 4, so that the polarities of the two adjacent sub-pixels Spx are opposite, thereby implementing a Z-inversion architecture of the display substrate.

In an embodiment of the invention, as shown in fig. 9, one of the structure diagrams of the display substrate shown in fig. 4 implementing a column architecture is shown, specifically, each even-level shift register 4 is configured to control the second-type control switch 3 coupled to the even-numbered Gate line Gate to be turned on, each odd-level shift register 5 is configured to control the first-type control switch 2 coupled to the odd-numbered Gate line Gate to be turned off, each sub-pixel Spx in the same column of sub-pixels Spx in the plurality of sub-pixels Spx has the same polarity, and the polarities of the sub-pixels Spx in two adjacent columns are opposite.

In a specific implementation process, the second-type control switches 3 coupled to the corresponding even-numbered Gate lines may be controlled to be turned on under the driving of the plurality of cascaded even-numbered stage shift registers 4, and the first-type control switches 2 coupled to the corresponding odd-numbered Gate lines may be controlled to be turned off under the driving of the plurality of cascaded odd-numbered stage shift registers 5, so that the polarities of the sub-pixels Spx in the same column of sub-pixels Spx are the same, and the polarities of the sub-pixels Spx in two adjacent columns are opposite, thereby implementing a column architecture of the display substrate.

In a specific implementation process, as shown in fig. 8 and 9, by respectively driving the plurality of cascaded even-level shift registers 4 and the plurality of cascaded odd-level shift registers 5, flexible switching between a column architecture and a Z-inversion architecture of the display substrate is realized, and the use performance of the display substrate is ensured.

In the embodiment of the present invention, as shown in fig. 10, a schematic cross-sectional structure along the MM direction in fig. 3, specifically, the display substrate includes a pixel electrode 6 located on the substrate 1, and a common electrode 7 located between the substrate 1 and the pixel electrode 6, two common electrodes 7 corresponding to two adjacent sub-pixels Spx in the same row of sub-pixels Spx are disposed in a disconnected manner, and an orthogonal projection of a Data line Data between the two adjacent sub-pixels Spx on the substrate 1 does not overlap with an orthogonal projection of the two common electrodes 7 on the substrate 1.

In a specific implementation, and as also shown in fig. 10, the display substrate includes a pixel electrode 6 on the substrate 1, and a common electrode 7 located between the substrate 1 and the pixel electrode 6, the common electrode 7, the Data line Data and the pixel electrode 6 being sequentially disposed away from the substrate 1, wherein the Data line Data is made of a source drain layer, a gate insulating layer 8 is disposed between the Data line Data and the common electrode 7, the occurrence of short circuits between the Data lines Data and the common electrodes 7 is prevented by the gate insulating layer 8, a passivation layer 9 is provided between the Data lines Data and the pixel electrodes 6, the occurrence of short circuits between the Data lines Data and the pixel electrodes 6 is avoided by the passivation layer 9, thereby ensuring the usability of the display substrate. In addition, the two common electrodes 7 corresponding to two adjacent sub-pixels Spx in the same row of sub-pixels Spx are disconnected, and the orthographic projection of the Data line Data between the two adjacent sub-pixels Spx on the substrate 1 and the orthographic projection of the two common electrodes 7 on the substrate 1 are not overlapped with each other, so that the generation of capacitance caused by overlapping between the Data line Data and the common electrodes 7 is avoided, and the use performance of the display substrate is improved.

In the embodiment of the present invention, as shown in fig. 11, a schematic cross-sectional structure along the MM direction in fig. 3 is shown, specifically, the common electrode 7 corresponding to the same row of sub-pixels Spx is disposed without interruption in the whole layer, and an orthographic projection of the Data line Data between two adjacent sub-pixels Spx in the same row of sub-pixels Spx on the substrate 1 completely falls within the area of the orthographic projection of the common electrode 7 corresponding to the same row of sub-pixels Spx on the substrate 1.

In a specific implementation process, as shown in fig. 11, the Data line Data, the common electrode 7, and the pixel electrode 6 are sequentially disposed away from the substrate 1, a gate insulating layer 8 is disposed between the common electrode 7 and the Data line Data, a short circuit between the common electrode 7 and the Data line Data is avoided by the gate insulating layer 8, a passivation layer 9 is disposed between the common electrode 7 and the pixel electrode 6, and a short circuit between the common electrode 7 and the pixel electrode 6 is avoided by the passivation layer 9. The common electrode 7 corresponding to the sub-pixel Spx in the same row is arranged without interruption in the whole layer, that is, the common electrode 7 corresponding to the sub-pixel Spx in the same row is designed in the whole surface, so that the aperture opening ratio of the display substrate is improved, and the display quality of the display substrate is improved. In addition, the orthographic projection of the Data line Data between two adjacent sub-pixels Spx in the same row of sub-pixels Spx on the substrate 1 completely falls within the area range of the orthographic projection of the common electrode 7 corresponding to the sub-pixels Spx on the substrate 1.

In the embodiment of the present invention, as shown in fig. 12, a schematic cross-sectional structure along the MM direction in fig. 3 is shown, specifically, a transparent organic film 10 is disposed between the Data line Data and the common electrode 7 between two adjacent sub-pixels Spx in the same row of sub-pixels Spx, the overlap capacitance between the Data line Data and the common electrode 7 is reduced by the transparent organic film 10, and in practical applications, the transparent organic film 10 with a suitable thickness may be selected according to specific needs, which is not limited herein.

The first control switch 2 and the second control switch 3 may be Thin Film Transistors (TFTs) or Metal Oxide Semiconductor field effect transistors (MOS), and are not limited herein. In addition, as shown in fig. 10 to 12, the display substrate may further include other film layers besides the substrate 1, the common electrode 7, the gate insulating layer 8, the transparent organic layer, the Data line Data, the passivation layer 9, and the pixel electrode 6, for example, a black Matrix (Block Matrix), a cover plate, and the like. The specific structure of each shift register in the even-numbered stage shift register 4 and the odd-numbered stage shift register 5 can refer to related arrangements in the prior art, and is not limited herein.

Based on the same inventive concept, as shown in fig. 13, an embodiment of the present invention further provides a display panel including any one of the display substrates 100 provided by the embodiments of the present invention. The Display panel may be a Liquid Crystal Display (LCD) panel, or may also be an Organic Light Emitting Diode (OLED) Display panel, which is not limited herein. The principle of the display panel to solve the problem is similar to the display substrate 100, so the implementation of the display panel can be referred to the implementation of the display substrate 100, and repeated descriptions are omitted.

Based on the same inventive concept, as shown in fig. 14, an embodiment of the present invention further provides a display device, where the display device includes the display panel 200 as described above, and the principle of the display device to solve the problem is similar to that of the display panel 200, so that the implementation of the display device may refer to the implementation of the display panel 200, and repeated details are omitted.

In a specific implementation process, the display device provided in the embodiment of the present invention may be any product or component having a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, and a navigator. Other essential components of the display device are understood by those skilled in the art, and are not described herein nor should they be construed as limiting the present invention.

Based on the same inventive concept, as shown in fig. 15, an embodiment of the present invention further provides a driving method of a display substrate as described above, including:

s101: under a first refreshing frequency, controlling the first type of control switch to be turned on and the second type of control switch to be turned off, and alternately loading first data signals with opposite polarities to the plurality of data lines so that the polarities of two adjacent sub-pixels in the plurality of sub-pixels are opposite;

s102: and under a second refresh frequency which is greater than the first refresh frequency, controlling the second type control switch to be turned on and the first type control switch to be turned off, and alternately loading second data signals with opposite polarities to the plurality of data lines, so that the polarities of each sub-pixel in the same column of sub-pixels in the plurality of sub-pixels are the same, and the polarities of the sub-pixels in two adjacent columns are opposite.

The execution sequence between step S101 and step S102 may be to execute step S101 first and then step S102, or may be to execute step S102 first and then step S101, and may be specifically set according to the actual application.

In a specific implementation process, at the first refresh frequency, the first type control switch is controlled to be turned on and the second type control switch is controlled to be turned off, and the first data signals with opposite polarities are alternately loaded to the plurality of data lines, so that the polarities of two adjacent sub-pixels Spx in the plurality of sub-pixels Spx are opposite, thereby ensuring that the display substrate has a Z-inversion structure at the first refresh frequency. Because the first refresh frequency is a low refresh frequency, for example, 30Hz, 60Hz, etc., the display substrate adopts a Z-inversion architecture, thereby avoiding the occurrence of the wiggle, and improving the display quality of the display substrate at the low refresh frequency.

In a specific implementation process, at a second refresh frequency greater than the first refresh frequency, the second-type control switch 3 is controlled to be turned on and the first-type control switch 2 is controlled to be turned off, and second Data signals with opposite polarities are alternately loaded to the plurality of Data lines Data, so that the polarities of each sub-pixel Spx in the same column of sub-pixels Spx in the plurality of sub-pixels Spx are the same, and the polarities of two adjacent columns of sub-pixels Spx are opposite, thereby ensuring that the display substrate has a column structure at the second refresh frequency. When the second refresh frequency is a high refresh frequency greater than the first refresh frequency, for example, 90Hz, 120Hz, etc., the display substrate adopts a column architecture, thereby avoiding the Fine Pitch problem caused by insufficient high-frequency charging and improving the display quality of the display substrate at the high refresh frequency.

In an embodiment of the present invention, at the first refresh frequency, the method further includes:

and loading a first scanning signal to an odd-numbered gate line arranged along the first direction in the plurality of gate lines through a plurality of cascaded odd-numbered stage shift registers, and charging each sub-pixel under the loading of the first data signal and the first scanning signal.

In a specific implementation process, at the first refresh frequency, a first scan signal may be applied to an odd-numbered Gate line Gate arranged in the first direction from among the Gate lines gates through a plurality of cascaded odd-numbered stage shift registers 5, and each sub-pixel Spx is charged under the application of the first data signal and the first scan signal. It may be that the timing control circuit provided in the non-display area B outputs a clock control signal to each of the odd-numbered stage shift registers 5, thereby controlling each odd-numbered Gate line Gate coupled to the corresponding odd-numbered stage shift register 5 to be turned on row by row, and accordingly, the corresponding first-type control switch 2 on each odd-numbered Gate line Gate is turned on, and a corresponding first scanning signal is applied to each odd-numbered Gate line Gate, at this time, each even-numbered stage shift register 4 controls each corresponding even-numbered stage Gate line Gate to output a low voltage, and accordingly, each corresponding second-type control switch 3 on each even-numbered stage Gate line Gate is turned off, therefore, the display substrate is ensured to adopt a Z-inversion framework, the pixel voltage written in each odd-row sub-pixel Spx is ensured not to be interfered, and the use performance of the display substrate is improved.

In a specific implementation process, when the display substrate shown in fig. 4 is adopted and the display substrate is adjusted to the Z-inversion architecture shown in fig. 8, a signal of a first data line coupled to a Chip On Fim (COF) on the leftmost side of the display area a may be used as an initial data signal through the timing control circuit. When the display substrate is switched from the Z-inversion scheme shown in fig. 8 to the column scheme shown in fig. 9, the timing control circuit may use the signal of the second data line coupled to the COF on the leftmost side of the display area a as the initial data signal, so as to implement flexible switching from the Z-inversion scheme to the column scheme.

In an embodiment of the present invention, at the second refresh frequency, the method further includes:

and loading a second scanning signal to the even-numbered gate line arranged along the first direction in the plurality of gate lines through a plurality of cascaded even-numbered shift registers, and charging each sub-pixel under the loading of the second data signal and the second scanning signal.

In a specific implementation process, at the second refresh frequency, a second scan signal may be applied to an even-numbered Gate line Gate arranged in the first direction from among the Gate lines gates through a plurality of cascaded even-numbered stage shift registers 4, and each of the sub-pixels Spx is charged under the application of the second data signal and the second scan signal. The timing control circuit disposed in the non-display area B may output a clock control signal to each even-numbered stage shift register 4, so as to control each even-numbered Gate line coupled to the corresponding even-numbered stage shift register 4 to be turned on line by line, and accordingly, the corresponding second control switch 3 on each even-numbered Gate line is turned on, and a corresponding second scanning signal is applied to each even-numbered Gate line, at this time, each odd-numbered stage shift register 5 controls each corresponding odd-numbered Gate line to output a low voltage, and accordingly, the corresponding first control switch 2 on each odd-numbered Gate line is turned off, so that the display substrate is ensured to adopt a column architecture, and meanwhile, the pixel voltage written in each even-numbered sub-pixel Spx is ensured not to be interfered, and the use performance of the display substrate is improved.

The embodiment of the invention provides a display substrate, a driving method thereof, a display panel and a display device, wherein in the display substrate, a sub-pixel Spx, a first type control switch 2 coupled with a sub-pixel Spx and a second type control switch 3 coupled with a sub-pixel Spx are arranged in a minimum area surrounded by Data lines Data and Gate lines Gate, a Data line Data is arranged between two adjacent columns of sub-pixels Spx, in the same column of sub-pixels Spx, the first type control switch 2 coupled with each sub-pixel Spx is alternately coupled with two adjacent Data lines Data in turn, the second type control switch 3 coupled with each sub-pixel Spx is coupled with the same Data line Data in two adjacent Data lines Data, therefore, the polarities of two adjacent sub-pixels Spx in a plurality of sub-pixels Spx are opposite by controlling the first type control switch 2 to be turned on and the second type control switch 3 to be turned off, that is, the display substrate realizes a Z-inversion architecture, and the polarities of each sub-pixel Spx in the same column of sub-pixels Spx in the plurality of sub-pixels Spx are the same and the polarities of the adjacent two columns of sub-pixels Spx are opposite by controlling the first type control switch 2 to be turned off and the second type control switch 3 to be turned on, that is, the display substrate realizes a column architecture, that is, the display substrate can be compatible with two pixel architectures including the Z-inversion architecture and the column architecture, and the use performance of the display substrate is ensured.

While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the invention.

It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.

Claims (13)

1. A display substrate, comprising:

the liquid crystal display device comprises a substrate, a plurality of sub-pixels arranged on the substrate in an array mode, a plurality of data lines extending along a first direction, a plurality of grid lines extending along a second direction intersecting with the first direction, a plurality of first-type control switches and a plurality of second-type control switches, wherein one sub-pixel, one first-type control switch coupled with the sub-pixels and one second-type control switch coupled with the sub-pixels are arranged in a minimum area defined by the data lines and the grid lines;

the data line is arranged between two adjacent columns of sub-pixels, the first type control switch coupled with each sub-pixel is sequentially and alternately coupled with two adjacent data lines in the same column of sub-pixels, and the second type control switch coupled with each sub-pixel is coupled with the same data line in the two adjacent data lines.

2. The display substrate according to claim 1, wherein two gate lines are disposed between two adjacent rows of the plurality of sub-pixels, and a gate of the first type control switch coupled to each row of the plurality of sub-pixels is sequentially coupled to an odd number of the plurality of gate lines arranged along the first direction; the grid electrode of the second control switch coupled with each row of sub-pixels in the plurality of sub-pixels is sequentially coupled with a second even number of grid lines arranged along the first direction in the plurality of grid lines.

3. The display substrate of claim 2, wherein the display substrate further comprises a display area and a non-display area surrounding the display area, the non-display area comprising a plurality of cascaded even stage shift registers and a plurality of cascaded odd stage shift registers, each even stage shift register coupled to the even gate line and each odd stage shift register coupled to the odd gate line.

4. The display substrate according to claim 3, wherein each odd-numbered stage shift register is configured to control the first type control switch unit coupled to the odd-numbered gate line to be turned on, and each even-numbered stage shift register is configured to control the second type control switch coupled to the even-numbered gate line to be turned off, and two adjacent sub-pixels in the plurality of sub-pixels have opposite polarities.

5. The display substrate of claim 3, wherein each even-numbered stage shift register is configured to control the second-type control switch coupled to the even-numbered gate line to be turned on, and each odd-numbered stage shift register is configured to control the first-type control switch coupled to the odd-numbered gate line to be turned off, and each of the sub-pixels in the same column of the plurality of sub-pixels has the same polarity, and two adjacent columns of the sub-pixels have opposite polarities.

6. The display substrate according to claim 1, wherein the display substrate comprises a pixel electrode located on the substrate, and a common electrode located between the substrate and the pixel electrode, two common electrodes corresponding to two adjacent sub-pixels in a same row of sub-pixels are disconnected from each other, and an orthogonal projection of a data line between the two adjacent sub-pixels on the substrate does not overlap with an orthogonal projection of the two common electrodes on the substrate.

7. The display substrate according to claim 1, wherein the common electrode corresponding to the sub-pixels in the same row is disposed without interruption in the whole layer, and an orthogonal projection of the data line between two adjacent sub-pixels in the same row on the substrate completely falls within an area range of an orthogonal projection of the common electrode corresponding to the sub-pixels in the same row on the substrate.

8. The display substrate according to claim 7, wherein a transparent organic film is disposed between the data line and the common electrode between two adjacent sub-pixels in the same row of sub-pixels.

9. A display panel, comprising:

a display substrate according to any one of claims 1 to 8.

10. A display device, comprising:

the display panel of claim 9.

11. A method of driving a display substrate according to any one of claims 1 to 8, comprising:

under a first refreshing frequency, controlling the first type of control switch to be turned on and the second type of control switch to be turned off, and alternately loading first data signals with opposite polarities to the plurality of data lines so that the polarities of two adjacent sub-pixels in the plurality of sub-pixels are opposite;

and under a second refresh frequency which is greater than the first refresh frequency, controlling the second type control switch to be turned on and the first type control switch to be turned off, and alternately loading second data signals with opposite polarities to the plurality of data lines, so that the polarities of each sub-pixel in the same column of sub-pixels in the plurality of sub-pixels are the same, and the polarities of the sub-pixels in two adjacent columns are opposite.

12. The driving method of claim 11, wherein at the first refresh frequency, the method further comprises:

and loading a first scanning signal to an odd-numbered gate line arranged along the first direction in the plurality of gate lines through a plurality of cascaded odd-numbered stage shift registers, and charging each sub-pixel under the loading of the first data signal and the first scanning signal.

13. The driving method of claim 11, wherein at the second refresh frequency, the method further comprises:

and loading a second scanning signal to even-numbered gate lines arranged along the first direction in the plurality of gate lines through a plurality of cascaded even-numbered stage shift registers, and charging each sub-pixel under the loading of the second data signal and the second scanning signal.

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