CN113258944B - SRS transmitting circuit, method and device - Google Patents
SRS transmitting circuit, method and device Download PDFInfo
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- CN113258944B CN113258944B CN202110515077.2A CN202110515077A CN113258944B CN 113258944 B CN113258944 B CN 113258944B CN 202110515077 A CN202110515077 A CN 202110515077A CN 113258944 B CN113258944 B CN 113258944B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
- H04B1/0483—Transmitters with multiple parallel paths
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- H—ELECTRICITY
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- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
- H04B7/04—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
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Abstract
The application provides SRS transmitting circuit, method and device, wherein the circuit comprises: baseband chip, radio frequency chip, first processing module and second processing module, wherein, first processing module is used for: converting the first radio frequency signal into a third radio frequency signal, and outputting the third radio frequency signal to the first antenna or the second antenna; the second processing module is used for: and converting the second radio frequency signal into a fourth radio frequency signal, and outputting the fourth radio frequency signal to the third antenna or the fourth antenna. The complexity of a circuit structure and a control method of a transmitting channel in a terminal which supports T1R4 and T2R4SRS antenna round-robin is reduced.
Description
Technical Field
The present disclosure relates to the field of communications, and in particular, to a circuit, a method, and an apparatus for transmitting a channel sounding reference signal (Sounding Reference Signal, SRS).
Background
Currently, a terminal supporting 5G may support 2×2 multiple-in multiple-out (MIMO) uplink and 4×4MIMO downlink. Under the configuration, the terminal simultaneously supports T1R4 and T2R4 as the SRS supporting capability of the current highest level, and the throughput rate of the cell can be improved to the greatest extent.
However, the circuit structure and control method of the transmit channels in the terminals supporting both T1R4 and T2R4 are complex.
Disclosure of Invention
The application provides an SRS transmitting method and device, which reduces the complexity of a circuit structure and a control method of a transmitting channel in a terminal supporting T1R4 and T2R4 simultaneously.
In a first aspect, an embodiment of the present application provides an SRS transmission circuit, including: the device comprises a baseband chip, a radio frequency chip, a first processing module and a second processing module, wherein,
the first output end of the baseband chip is connected with the first input end of the radio frequency chip, and the second output end of the baseband chip is connected with the second input end of the radio frequency chip; the first output end of the radio frequency chip is connected with the input end of the first processing module, the first end of the first processing module is connected with the first antenna, and the second end of the first processing module is connected with the second antenna; the second output end of the radio frequency chip is connected with the input end of the second processing module, the first end of the second processing module is connected with the third antenna, and the second end of the second processing module is connected with the fourth antenna;
the baseband chip is used for: outputting a first baseband signal through the first output end and outputting a second baseband signal through the second output end;
the radio frequency chip is used for: converting the first baseband signal into a first radio frequency signal, and outputting the first radio frequency signal through a first output end of the radio frequency chip; converting the second baseband signal into a second radio frequency signal, and outputting the second radio frequency signal through a second output end of the radio frequency chip;
The first processing module is used for: converting the first radio frequency signal into a third radio frequency signal, and outputting the third radio frequency signal to the first antenna or the second antenna;
the second processing module is used for: and converting the second radio frequency signal into a fourth radio frequency signal, and outputting the fourth radio frequency signal to the third antenna or the fourth antenna.
The circuit can support antenna round trip under T1R4 and T2R4 modes, and compared with the prior art which needs to set a transmitting path under the T1R4 mode and a transmitting path under the T2R4 mode respectively, the circuit is simpler, and therefore the circuit complexity of the SRS transmitting path in the terminal is reduced.
In one possible implementation, the radio frequency chip is further configured to: outputting the first radio frequency signal through a second output end of the radio frequency chip;
the second processing module is further configured to: and converting the first radio frequency signal into a fifth radio frequency signal, and outputting the fifth radio frequency signal to the third antenna or the fourth antenna.
In one possible implementation, the first processing module includes: the first signal processing module, the first switch and the second switch; wherein,
The first end of the first signal processing module is used as an input end of the first processing module, and the second end of the first signal processing module is connected with the first end of the first switch; the second end of the first switch is used as the first end of the first processing module, and the third end of the first switch is connected with the first end of the second switch; the second end of the second switch is used as the second end of the first processing module;
the first signal processing module is used for: in a T1R4 mode, converting the first radio frequency signal into a third radio frequency signal, and outputting the third radio frequency signal to the first switch;
the first switch is used for: gating a path between the first end and the second end, or gating a path between the first end and the third end;
the second switch is used for: the path between the first end and the second end is gated.
In one possible implementation, the second processing module includes: the second signal processing module, the third switch and the fourth switch; wherein,
the first end of the second signal processing module is used as an input end of the second processing module, and the second end of the second signal processing module is connected with the first end of the third switch; the second end of the third switch is connected with the first end of the fourth switch, and the third end is used as the second end of the second processing module; the second end of the fourth switch is used as the first end of the second processing module;
The second signal processing module is used for: in a T1R4 mode, converting the second radio frequency signal into a fourth radio frequency signal, and outputting the fourth radio frequency signal to the third switch;
the third switch is used for: gating a path between the first end and the second end, or gating a path between the first end and the third end;
the fourth switch is used for: the path between the first end and the second end is gated.
In one possible implementation, the second processing module includes: the second signal processing module, the third switch and the fourth switch; wherein,
the first end of the second signal processing module is used as an input end of the second processing module, and the second end of the second signal processing module is connected with the first end of the third switch; the second end of the third switch is connected with the first end of the fourth switch, and the third end is used as the second end of the second processing module; the second end of the fourth switch is used as the first end of the second processing module;
the second signal processing module is used for: in a T1R4 mode, converting the first radio frequency signal into a fifth radio frequency signal, and outputting the fifth radio frequency signal to the third switch;
the third switch is used for: gating a path between the first end and the second end, or gating a path between the first end and the third end;
The fourth switch is used for: the path between the first end and the second end is gated.
In one possible implementation, the first signal processing module is independent of the first switch or integrated as one device.
In a possible implementation, the second signal processing module is independent of the third switch or integrated as one device.
In a second aspect, an embodiment of the present application provides a method for transmitting SRS, including:
if the SRS signal is determined to be transmitted from the ith antenna, acquiring the ith information corresponding to the ith antenna from preset information corresponding to each antenna; the i-th information includes: control parameters of the switch when transmitting the SRS signal using the ith antenna, and an SRS indicator; i is 1,2,3, or 4;
the method comprises the steps of acquiring SRS indicators from ith information, and acquiring SRS processing information corresponding to the SRS indicators from processing information corresponding to each SRS indicator preset in NV, wherein the SRS processing information comprises the following steps: processing parameters of the processing module to the radio frequency signals and processing parameters of the radio frequency chip to the baseband signals;
the radio frequency chip is controlled to process the baseband signal according to the processing parameters indicated by the SRS processing information to obtain a radio frequency signal;
The control processing module processes the radio frequency signals according to the processing parameters indicated by the SRS processing information to obtain SRS signals;
and controlling each switch to select a path according to the control parameter indicated by the ith information, and transmitting the SRS signal to the ith antenna on the selected path.
In one possible implementation, the method further includes:
presetting ith information corresponding to an ith antenna, wherein the ith information comprises: control parameters of a switch in the corresponding path of the ith antenna and SRS indicators;
presetting SRS processing information corresponding to each SRS indicator, wherein the SRS processing information comprises: processing parameters of the processing module on the radio frequency signals and processing parameters of the radio frequency chip on the baseband signals.
In a third aspect, an embodiment of the present application provides an SRS transmission apparatus, including:
the acquisition module is used for acquiring the ith information corresponding to the ith antenna from the preset information corresponding to each antenna if the SRS signal is determined to be transmitted from the ith antenna; the i-th information includes: control parameters of the switch when transmitting the SRS signal using the ith antenna, and an SRS indicator; i is 1,2,3, or 4; the method comprises the steps of obtaining SRS indicators from the ith information, and obtaining SRS processing information corresponding to the SRS indicators from preset processing information corresponding to the SRS indicators, wherein the SRS processing information comprises the following steps: processing parameters of the processing module to the radio frequency signals and processing parameters of the radio frequency chip to the baseband signals;
The control module is used for controlling the radio frequency chip to process the baseband signal according to the processing parameters indicated by the SRS processing information to obtain a radio frequency signal; the control processing module processes the radio frequency signals according to the processing parameters indicated by the SRS processing information to obtain SRS signals; and controlling each switch to select a path according to the control parameter indicated by the ith information, and transmitting the SRS signal to the ith antenna on the selected path.
In a third aspect, an embodiment of the present application provides a chip module, including the circuit of any one of the first aspects.
In a fourth aspect, an embodiment of the present application provides a chip module, including the apparatus of the third aspect.
In a fifth aspect, embodiments of the present application provide a computer-readable storage medium having a computer program stored therein, which when run on a computer, causes the computer to perform the method of any of the second aspects.
In a sixth aspect, the present application provides a computer program for performing the method of the first aspect when the computer program is executed by a computer.
In one possible design, the program in the sixth aspect may be stored in whole or in part on a storage medium packaged with the processor, or in part or in whole on a memory not packaged with the processor.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of one example of SRS transmission circuitry in a terminal supporting T1R4 and T2R4 SRS antenna sounding;
FIG. 2 is a schematic diagram of the SRS transmission circuit of the present application;
FIG. 3 is a schematic diagram of SRS transmission circuit according to the present application;
FIG. 4 is a schematic diagram of SRS transmission circuit according to the present application;
FIG. 5 is a schematic diagram of information set in NV of the present application;
FIG. 6 is a flow chart of an SRS transmission method of the present application;
FIG. 7 is a schematic diagram of SRS transmission circuit according to the present application;
fig. 8 is a structural diagram of an SRS transmission apparatus according to the present application.
Detailed Description
The terminology used in the description section of the present application is for the purpose of describing particular embodiments of the present application only and is not intended to be limiting of the present application.
In Downlink multiple-input multiple-output (DL-MIMO) transmission, if the network side device can accurately acquire transmission parameters from the network side device to each receiving antenna of the terminal, the number of transmission layers can be furthest scheduled, so that the Downlink transmission rate is improved, especially in a 5G communication system, the throughput rate of the whole cell can be remarkably improved through massive multiple-in multiple-out (massive MIMO) and beamforming.
The key of the network side device obtaining the transmission parameters from the network side device to the receiving antennas of the terminal is that each receiving antenna of the terminal needs to transmit the SRS respectively. In a TDD system, a network side device can accurately calculate uplink transmission parameters from each receiving antenna of a terminal to the network side device through SRS transmitted by each receiving antenna of the terminal, and due to reciprocity of uplink and downlink transmission parameters, the network side device calculates downlink transmission parameters from the network side device to each receiving antenna of the terminal.
Therefore, the ability of the terminal to transmit SRS on each receiving antenna is a key feature of the terminal in a MIMO-enabled communication system, such as a 5G communication system, long term evolution (long Term Evolution, LTE), LTE evolution (LTE-Advance), LTE-a Pro and possibly future evolution systems, and is particularly important for improving the throughput of the whole cell.
Taking a terminal supporting 5G as an example, the terminal supports 2×2mimo in uplink and 4×4mimo in downlink, and the terminal supports T1R4 (transmit 1round 4) and T2R4 (transmit 2round 4) as the SRS supporting capability of the current highest level, so that the throughput rate of the cell can be improved to the greatest extent. There are typically 4 antennas per NR band on the hardware of the terminal, two antennas for reception only and two other antennas for transmission and reception. As shown in fig. 1, in order to support 2×2 uplink multiple input multiple output (UL-MIMO), the radio frequency front end of the terminal includes two PAs, two corresponding transmission paths, one is a Main Tx path, and the other is a MIMO Tx path; to support 4 x 4dl-MIMO, the rf front-end includes 4 receive paths, which typically include transmit-receive switches, filters, low Noise Amplifiers (LNAs), and the like.
To support SRS, a Power Amplifier (PA) is not typically added directly to the terminal, but by adding a switch (switch) to the PA output, the uplink SRS can be transmitted to two antennas that are purely used for reception. For example, as shown in fig. 1, in order to enable the terminal to support T2R4, as shown in fig. 1, a switch 1 and a switch 2 are added, so that the switch 1 transmits one path of SRS signal to the antenna 1 or the antenna 2 by gating different paths, and the switch 2 transmits the other path of SRS signal to the antenna 3 or the antenna 4 by gating different paths; in order to enable the terminal to support T1R4, since signals need to be transmitted to four antennas in turn from the Main Tx path, one output end of the switch 1 is connected to the input end of the switch 2, so that one path of SRS signal can be transmitted to the antenna 1 or the antenna 2 through gating of the switch 1, transmitted to the switch 2 through gating of the switch 2, and transmitted to the antenna 3 or the antenna 4 through gating of the switch 2, so that the SRS signal can be transmitted on the 4 antennas in turn through a switch-switching manner, in this manner, in the T1R4 mode, the SRS signal needs to be output to the antenna 3 or the antenna 4 through a relatively longer trace for transmission, and the loss is relatively larger.
Typically, the rf transmit channel side includes an rf integrated circuit (RFIC) and an rf front end module (RF Front end module, RFFE), which includes a PA, a filter, an rf switch, an antenna, and the like. A common control scheme for RFICs is a serial peripheral interface (Serial Peripheral Interface, SPI). The control mode of FEM mainly includes mobile industry processor interface (Mobile Industry Processor Interface, MIPI) and General-purpose input/output (GPIO), and the control of each RF transmitting channel FEM includes the logic control of PA and the logic control of switch.
In order to realize control of the radio frequency channels, a control logic storage space of the whole link is reserved for each radio frequency channel in NV, and corresponding logic parameters are configured in the corresponding storage space. For the radio frequency transmit channels, the configuration of Tx ports, the configuration of PA control parameters, the configuration of Switch control parameters, etc. are included. NV is a generic term of radio frequency channel control logic, and is stored in a user terminal in a certain organization structure for software call to realize the receiving and transmitting control of the radio frequency channel.
Thus, compared with the previous 4G terminal, the complexity of the 5G terminal supporting the T1R4 and T2R4 antenna round trip of SRS is greatly improved no matter the hardware architecture or the control of the radio frequency transmission channel.
Therefore, the application provides an SRS transmitting device and method, which can reduce the complexity of a circuit structure and a control method of a transmitting channel in a terminal.
Fig. 2 is a circuit diagram of one embodiment of an SRS transmission apparatus according to the present application, as shown in fig. 2, where the apparatus includes:
the first output end OUT11 of the baseband chip 10 is connected with the first input end IN21 of the radio frequency chip 20, and the second output end OUT12 of the baseband chip 10 is connected with the second input end IN22 of the radio frequency chip 20; the first output end OUT21 of the radio frequency chip 20 is connected with the input end IN31 of the first processing module 30, the first end P31 of the first processing module 30 is connected with the first antenna ant1, and the second end P32 is connected with the second antenna ant2; the second output end OUT22 of the radio frequency chip 20 is connected with the input end IN41 of the second processing module 40, the first end P41 of the second processing module 40 is connected with the third antenna ant3, and the second end P42 is connected with the fourth antenna ant4;
The baseband chip 10 is for: in the T1R4 mode or the T2R4 mode, the first baseband signal is output to the rf chip 20 through the first output terminal OUT11, and the second baseband signal is output to the rf chip 20 through the second output terminal OUT 12;
the radio frequency chip 20 is for: converting the first baseband signal into a first radio frequency signal, and outputting the first radio frequency signal to the first processing module 30 through the first output terminal OUT21 of the radio frequency chip 20; converting the second baseband signal into a second radio frequency signal, and outputting the second radio frequency signal to the second processing module 40 through the second output terminal OUT22 of the radio frequency chip 20;
the first processing module 30 is configured to: converting the first radio frequency signal into a third radio frequency signal, and outputting the third radio frequency signal to the first antenna ant1 through the first end P31 or to the second antenna ant2 through the second end P32;
the second processing module 40 is configured to: the second rf signal is converted into a fourth rf signal, and the fourth rf signal is output to the third antenna ant3 through the first end P41 or is output to the fourth antenna ant4 through the second end P42.
The operation principle of the circuit diagram in the T1R4 mode and the T2R4 mode will be described.
In the T2R4 mode, two SRS signals requiring dual transmission are transmitted on two antennas, and the working principle in the mode is as follows:
The baseband chip 10 sends two paths of baseband signals, namely a first baseband signal and a second baseband signal, to the radio frequency chip 20; the rf chip 20 operates in Tx MIMO mode when: after being converted into a first radio frequency signal, the first baseband signal is converted into a third radio frequency signal through the first processing module 30 and is output to the first antenna ant1 or the second antenna ant2; the second baseband signal is converted into a second radio frequency signal, then converted into a fourth radio frequency signal by the second processing module 40, and output to the third antenna ant3 or the fourth antenna ant4; thus realizing the transmission of two SRS signals which are transmitted in double at any moment on two antennas.
In the T1R4 mode, one SRS signal requiring single transmission is transmitted on one antenna of the four antennas, and the working principle in the mode is as follows:
if the SRS signal needs to be transmitted on the first antenna ant1, the baseband chip 10 outputs the first baseband signal to the rf chip 20 through the first output terminal OUT11, and after the rf chip 20 converts the first baseband signal into the first rf signal, the first rf signal is converted into the third rf signal by the first processing module 30 and output to the first antenna ant1;
if the SRS signal needs to be transmitted on the second antenna ant2, the baseband chip 10 outputs the first baseband signal to the rf chip 20 through the first output terminal OUT11, and after the rf chip 20 converts the first baseband signal into the first rf signal, the first rf signal is converted into the third rf signal through the first processing module 30 and output to the second antenna ant2;
If the SRS signal needs to be transmitted on the third antenna ant3, the baseband chip 10 outputs the second baseband signal to the rf chip 20 through the second output terminal OUT12, and after the rf chip 20 converts the second baseband signal to the second rf signal, the second rf signal is converted to the fourth rf signal by the second processing module 40 and is output to the third antenna ant3;
if the SRS signal needs to be transmitted on the fourth antenna ant4, the baseband chip 10 outputs the second baseband signal to the rf chip 20 through the second output terminal OUT12, and after the rf chip 20 converts the second baseband signal to the second rf signal, the second rf signal is converted to the fourth rf signal by the second processing module 40 and output to the fourth antenna ant4.
The first baseband signal and the second baseband signal generated in the T1R4 mode or the T2R4 mode may be referred to as SRS signals.
Therefore, the circuit can also support antenna round trip under the T1R4 and T2R4 modes, and compared with the prior art in which a transmitting path under the T1R4 mode and a transmitting path under the T2R4 mode are required to be respectively set, the SRS transmitting device has the advantage that the realizing circuit is simpler, so that the circuit complexity of the SRS transmitting path in the terminal is reduced.
Alternatively, as shown in fig. 3, the first processing module 30 may include: a first signal processing module 50, a first switch 60, and a second switch 70, wherein,
the first terminal P51 of the first signal processing module 50 is used as the input terminal IN31 of the first processing module 30, and the second terminal P52 is connected to the first terminal P61 of the first switch 60; the second terminal P62 of the first switch 60 is used as the first terminal P31 of the first processing module 30, and is connected to the first antenna ant1; the third terminal P63 of the first switch 60 is connected to the first terminal P71 of the second switch 70, and the second terminal P72 of the second switch 70 is connected to the second antenna ant2 as the second terminal P32 of the first processing module 30.
The first signal processing module 50 is configured to convert the first rf signal into a third rf signal, and output the third rf signal to the first switch 60 through the second terminal P52. The process of converting the first radio frequency signal to a third radio frequency signal may include, but is not limited to: and performing power amplification processing and/or filtering processing on the first radio frequency signal.
The first switch 60 may be used to gate a path between the first terminal P61 and the second terminal P62, and output the received third radio frequency signal to the first antenna ant1 through the second terminal P62; the first switch 60 may also be used to gate a path between the first terminal P61 and the third terminal P63, and output the received third radio frequency signal to the second switch 70 through the third terminal P63.
The second switch 70 may be used to gate a path between the first terminal P71 and the second terminal P72, and output the received third radio frequency signal to the second antenna ant2 through the second terminal P72.
Alternatively, as shown in fig. 3, the second processing module 40 may include: a second signal processing module 80, a third switch 90 and a fourth switch 100, wherein,
the first end P81 of the second signal processing module 80 is used as the input end IN41 of the second processing module 40, and the second end P82 is connected to the first end P91 of the third switch 90; the third terminal P93 of the third switch 90 is used as the second terminal P42 of the second processing module 40 and is connected to the fourth antenna ant4; the second terminal P92 of the third switch 90 is connected to the first terminal P101 of the fourth switch 100, and the second terminal P102 of the fourth switch 100 is connected to the third antenna ant3 as the first terminal P41 of the second processing module 40.
The second signal processing module 80 is configured to convert the second rf signal into a fourth rf signal, and output the fourth rf signal to the third switch 90 through the second terminal P82. The process of converting the second radio frequency signal to a fourth radio frequency signal may include, but is not limited to: and carrying out power amplification processing on the second radio frequency signal, and carrying out filtering processing on the second radio frequency signal.
The third switch 90 may be configured to gate a path between the first terminal P91 and the third terminal P93, and output the received fourth radio frequency signal to the fourth antenna ant4 through the third terminal P93; the third switch 90 may be further configured to gate a path between the first terminal P91 and the second terminal P102, and output the received fourth radio frequency signal to the fourth switch 100 through the second terminal P102.
The fourth switch 100 may be configured to gate a path between the first terminal P101 and the second terminal P102, and output the received fourth radio frequency signal to the third antenna ant3 through the second terminal P102.
Optionally, in order to enable the terminal to support MIMO and to be able to distinguish between signals received on the first antenna ant1, the second antenna ant2, the third antenna ant3, and the fourth antenna ant4, respectively, as shown in fig. 3, the circuit may further include:
the first switch 60 may further include a fourth terminal P64, and the first switch 60 may be configured to gate a path between the second terminal P62 and the fourth terminal P64, and transmit the signal received by the first antenna ant1 to the third receiving terminal IN23 of the radio frequency chip 20 through the fourth terminal P64;
the second switch 70 may further include a third terminal P73, and the second switch 70 may be configured to gate a path between the second terminal P72 and the third terminal P73, and transmit the signal received by the second antenna ant2 to the fourth receiving terminal IN24 of the radio frequency chip 20 through the third terminal P73;
the fourth switch 100 may further include a third terminal P103, and the fourth switch 100 may be configured to gate a path between the second terminal P102 and the third terminal P103, and transmit the signal received by the third antenna ant3 to the fifth receiving terminal IN25 of the radio frequency chip 20 through the third terminal P103;
The third switch 90 may further include a fourth terminal P94, and the third switch 90 may be configured to gate a path between the third terminal P93 and the fourth terminal P94, and transmit the signal received by the fourth antenna ant4 to the sixth receiving terminal IN26 of the radio frequency chip 20 through the fourth terminal P94;
accordingly, the RF chip 20 may also be used to: converting the signal received through the third receiving terminal IN23 into a baseband signal, and transmitting the baseband signal to the first input terminal IN11 of the baseband chip 10 through the third output terminal OUT 23; converting the signal received through the fourth receiving terminal IN24 into a baseband signal, and transmitting the baseband signal to the second input terminal IN12 of the baseband chip 10 through the fourth output terminal OUT 24; converting the signal received through the fifth receiving terminal IN25 into a baseband signal, and transmitting the baseband signal to the third input terminal IN13 of the baseband chip 10 through the fifth output terminal OUT 25; the signal received through the sixth receiving terminal IN26 is converted into a baseband signal, and is transmitted to the fourth input terminal IN14 of the baseband chip 10 through the sixth output terminal OUT 26.
The signal receiving on each antenna is realized through the channels.
In fig. 3, the first signal processing module 50 and the first switch 60 exist independently, in another embodiment, as shown in fig. 4, the first signal processing module 50 and the first switch 60 may be integrated into one device, and the integrated device performs the functions of the first signal processing module 50 and the first switch 60; in fig. 3, the second signal processing module 80 and the third switch 90 are independent, and in another embodiment, as shown in fig. 4, the second signal processing module 80 and the third switch 90 may be integrated into one device, and the integrated device performs the functions of the second signal processing module 80 and the third switch 90.
In the SRS transmission apparatus according to another embodiment provided in the present application, unlike the embodiment shown in fig. 2, the radio frequency chip 20 according to the present embodiment may also be used for: converting the first baseband signal into a first radio frequency signal, and outputting the first radio frequency signal to the second processing module 40 through the second output terminal OUT22 of the radio frequency chip 20;
the second processing module 40 may be configured to: the first rf signal is converted into a fifth rf signal, and the fifth rf signal is output to the third antenna ant3 through the first end P41 or is output to the fourth antenna ant4 through the second end P42.
In the T1R4 mode, one SRS signal requiring single transmission is transmitted on one antenna of the four antennas, and the working principle in the mode is as follows:
if the SRS signal needs to be transmitted on the first antenna ant1, the baseband chip 10 outputs the first baseband signal to the rf chip 20 through the first output terminal OUT11, and after the rf chip 20 converts the first baseband signal into the first rf signal, the first rf signal is converted into the third rf signal by the first processing module 30 and output to the first antenna ant1;
if the SRS signal needs to be transmitted on the second antenna ant2, the baseband chip 10 outputs the first baseband signal to the rf chip 20 through the first output terminal OUT11, and after the rf chip 20 converts the first baseband signal into the first rf signal, the first rf signal is converted into the third rf signal through the first processing module 30 and output to the second antenna ant2;
If the SRS signal needs to be transmitted on the third antenna ant3, the baseband chip 10 outputs the first baseband signal to the rf chip 20 through the first output terminal OUT11, and after the rf chip 20 converts the first baseband signal into the first rf signal, the first rf signal is converted into a fifth rf signal through the second processing module 40 and is output to the third antenna ant3;
if the SRS signal needs to be transmitted on the fourth antenna ant4, the baseband chip 10 outputs the first baseband signal to the rf chip 20 through the first output terminal OUT11, and after the rf chip 20 converts the first baseband signal into the first rf signal, the first rf signal is converted into the fifth rf signal by the second processing module 40 and output to the fourth antenna ant4.
The working principle of the SRS transmission apparatus in the T2R4 mode in this embodiment may refer to the corresponding description in fig. 2, and in this embodiment, implementation of the first processing module and the second processing module may refer to the embodiments shown in fig. 3 and fig. 4, which are not repeated here.
In the SRS transmission apparatus according to the further embodiment provided in the present application, unlike the embodiment shown in fig. 2, the radio frequency chip 20 according to the present embodiment may also be used for: converting the second baseband signal into a second radio frequency signal, and outputting the second radio frequency signal to the first processing module 30 through the first output terminal OUT21 of the radio frequency chip 20;
The first processing module 30 may also be configured to: the second rf signal is converted into a sixth rf signal, and the sixth rf signal is output to the first antenna ant1 through the first end P31 or is output to the second antenna ant2 through the second end P32.
In the T1R4 mode, one SRS signal requiring single transmission is transmitted on one antenna of the four antennas, and the working principle in the mode is as follows:
if the SRS signal needs to be transmitted on the first antenna ant1, the baseband chip 10 outputs the second baseband signal to the rf chip 20 through the second output terminal OUT12, and after the rf chip 20 converts the second baseband signal to the second rf signal, the second rf signal is converted to the sixth rf signal by the first processing module 30 and output to the first antenna ant1;
if the SRS signal needs to be transmitted on the second antenna ant2, the baseband chip 10 outputs the second baseband signal to the rf chip 20 through the second output terminal OUT12, and after the rf chip 20 converts the second baseband signal to the second rf signal, the second rf signal is converted to a sixth rf signal by the first processing module 30 and output to the second antenna ant2;
if the SRS signal needs to be transmitted on the third antenna ant3, the baseband chip 10 outputs the second baseband signal to the rf chip 20 through the second output terminal OUT12, and after the rf chip 20 converts the second baseband signal to the second rf signal, the second rf signal is converted to the fourth rf signal by the second processing module 40 and is output to the third antenna ant3;
If the SRS signal needs to be transmitted on the fourth antenna ant4, the baseband chip 10 outputs the second baseband signal to the rf chip 20 through the second output terminal OUT12, and after the rf chip 20 converts the second baseband signal to the second rf signal, the second rf signal is converted to the fourth rf signal by the second processing module 40 and output to the fourth antenna ant4.
The working principle of the SRS transmission apparatus in the T2R4 mode in this embodiment may refer to the corresponding description in fig. 2, and in this embodiment, implementation of the first processing module and the second processing module may refer to the embodiments shown in fig. 3 and fig. 4, which are not repeated here.
Based on the structure of the device, the application also provides a SRS transmitting method.
As shown in fig. 5, the NV of the rf signal output may be preset with: based on the channel selection information of each antenna, processing parameters of two paths of baseband signals output by the baseband chip are based. Taking the SRS transmission apparatus shown in fig. 2 as an example, the following information may be preset:
First SRS processing information 550 including: the radio frequency chip processes parameters of the first baseband signal and the first processing module processes parameters of the first radio frequency signal;
second SRS processing information 560 including: the processing parameters of the radio frequency chip to the second baseband signal and the processing parameters of the second processing module to the second radio frequency signal.
As shown in fig. 6, the method may include:
step 601: if the SRS signal is determined to be transmitted from the ith antenna, acquiring the ith information corresponding to the ith antenna from preset information corresponding to each antenna; the i-th information includes: control parameters of the switch when transmitting the SRS signal using the ith antenna, and an SRS indicator; i is 1,2,3, or 4;
step 602: the method comprises the steps of obtaining SRS indicators from the ith information, and obtaining SRS processing information corresponding to the SRS indicators from preset processing information corresponding to the SRS indicators, wherein the SRS processing information comprises the following steps: processing parameters of the processing module to the radio frequency signals and processing parameters of the radio frequency chip to the baseband signals;
step 603: the radio frequency chip is controlled to process the baseband signal according to the processing parameters indicated by the SRS processing information to obtain a radio frequency signal;
step 604: the control processing module processes the radio frequency signals according to the processing parameters indicated by the SRS processing information to obtain SRS signals;
The SRS signals in this step are radio frequency signals obtained by processing by the processing module, for example, the third to sixth radio frequency signals described above.
Step 605: and controlling each switch to select a path according to the control parameter indicated by the ith information, and transmitting the SRS signal to the ith antenna on the selected path.
The path selection includes path selection from the input end to the output end of the radio frequency chip, path selection from the input end to the output end in the first processing module, and the like.
Based on the embodiment shown in fig. 2, in the T1R4 mode, if an SRS signal is transmitted from the first antenna, then: acquiring first information corresponding to a first antenna from preset information corresponding to the antenna, acquiring a first SRS indicator from the first information, acquiring first SRS processing information, controlling a radio frequency chip to process a first baseband signal according to the first SRS processing information to obtain a first radio frequency signal, controlling a first processing module to process the first radio frequency signal according to the first SRS processing signal to obtain a third radio frequency signal, and performing path selection according to a first control parameter of a switch in the first information so as to transmit the third radio frequency signal to the first antenna, wherein the first antenna transmits the third radio frequency signal;
If the SRS signal is transmitted from the second antenna, then: acquiring second information corresponding to a second antenna from preset information corresponding to the antenna, acquiring a first SRS indicator from the second information, acquiring first SRS processing information, controlling a radio frequency chip to process a first baseband signal according to the first SRS processing information to obtain a first radio frequency signal, controlling a first processing module to process the first radio frequency signal according to the first SRS processing information to obtain a third radio frequency signal, and performing path selection according to a second control parameter of a switch in the second information so as to transmit the third radio frequency signal to the second antenna, wherein the second antenna transmits the third radio frequency signal;
if the SRS signal is transmitted from the third antenna, then: acquiring third information corresponding to a third antenna from preset information corresponding to the antenna, acquiring a second SRS indicator from the third information, further acquiring second SRS processing information, controlling a radio frequency chip to process a second baseband signal according to the second SRS processing information to acquire a second radio frequency signal, controlling a second processing module to process the second radio frequency signal according to the second SRS processing information to acquire a fourth radio frequency signal, and performing path selection according to a third control parameter of a switch in the third information so as to transmit the fourth radio frequency signal to the third antenna, wherein the third antenna transmits the fourth radio frequency signal;
If the SRS signal is transmitted from the fourth antenna, then: acquiring fourth information corresponding to a fourth antenna from preset information corresponding to the antenna, acquiring a second SRS indicator from the fourth information, further acquiring second SRS processing information, controlling a radio frequency chip to process a second baseband signal according to the second SRS processing information to obtain a second radio frequency signal, controlling a second processing module to process the second radio frequency signal according to the second SRS processing information to obtain a fourth radio frequency signal, and performing path selection according to a fourth control parameter of a switch in the fourth information so as to transmit the fourth radio frequency signal to the fourth antenna, wherein the fourth antenna transmits the fourth radio frequency signal.
In the T2R4 mode, if the SRS signal is transmitted from the first antenna and the third antenna, the specific processing procedure may refer to the processing procedure of transmitting the SRS signal from the first antenna and the SRS signal from the third antenna in the T1R4 mode, respectively; if the SRS signal is transmitted from the second antenna and the fourth antenna, the specific process flow may refer to the process flow of transmitting the SRS signal from the second antenna and the process flow of transmitting the SRS signal from the fourth antenna in the T1R4 mode, respectively.
The method shown in fig. 6 may be applied to both the T1R4 mode and the T2R4 mode. The method of fig. 6 may be implemented by a controller, and in this case, referring to fig. 7, a first end of the controller 710 may be connected to a memory 720, where the above NV is stored in the memory 720. The output end of the controller 710 is respectively connected to the rf chip, the first processing module, and the second processing module, so as to execute the method shown in fig. 6, and control the above devices.
It is to be understood that some or all of the steps or operations in the above embodiments are merely examples, and embodiments of the present application may also perform other operations or variations of various operations. Furthermore, the various steps may be performed in a different order presented in the above embodiments, and it is possible that not all of the operations in the above embodiments are performed.
Fig. 8 is a block diagram of an SRS transmission apparatus according to the present application, and as shown in fig. 8, the apparatus 800 may include.
An obtaining module 810, configured to obtain, if it is determined that the SRS signal is transmitted from the ith antenna, the ith information corresponding to the ith antenna from preset information corresponding to each antenna; the i-th information includes: control parameters of the switch when transmitting the SRS signal using the ith antenna, and an SRS indicator; i is 1,2,3, or 4; the method comprises the steps of acquiring SRS indicators from ith information, and acquiring SRS processing information corresponding to the SRS indicators from processing information corresponding to each SRS indicator preset in NV, wherein the SRS processing information comprises the following steps: processing parameters of the processing module to the radio frequency signals and processing parameters of the radio frequency chip to the baseband signals;
the control module 820 is configured to control the radio frequency chip to process the baseband signal according to the processing parameter indicated by the SRS processing information, so as to obtain a radio frequency signal; the control processing module processes the radio frequency signals according to the processing parameters indicated by the SRS processing information to obtain SRS signals; and controlling each switch to select a path according to the control parameter indicated by the ith information, and transmitting the SRS signal to the ith antenna on the selected path.
The apparatus provided by the embodiment shown in fig. 8 may be used to implement the technical solution of the method embodiment shown in fig. 6 of the present application, and the implementation principle and technical effects may be further referred to in the related description of the method embodiment.
It should be understood that the above division of the modules of the apparatus shown in fig. 8 is merely a division of a logic function, and may be fully or partially integrated into a physical entity or may be physically separated. And these modules may all be implemented in software in the form of calls by the processing element; or can be realized in hardware; it is also possible that part of the modules are implemented in the form of software called by the processing element and part of the modules are implemented in the form of hardware. For example, the acquisition module may be a separately established processing element or may be implemented integrated in a certain chip of the terminal. The implementation of the other modules is similar. In addition, all or part of the modules can be integrated together or can be independently implemented. For example, the SRS transmitting device may be a chip or a chip module, or the data transmitting device may be a chip or a part of a chip module. In implementation, each step of the above method or each module above may be implemented by an integrated logic circuit of hardware in a processor element or an instruction in a software form.
The embodiment of the application provides a chip module, which comprises a circuit shown in any one of the embodiments of fig. 2-4.
The embodiment of the application provides a chip module, which comprises a device shown in fig. 8.
Embodiments of the present application also provide a computer-readable storage medium having a computer program stored therein, which when run on a computer, causes the computer to perform the method provided by the embodiment shown in fig. 6 of the present application.
The present embodiments also provide a computer program product comprising a computer program which, when run on a computer, causes the computer to perform the method provided by the embodiment shown in fig. 6 of the present application.
In the embodiments of the present application, "at least one" means one or more, and "a plurality" means two or more. "and/or", describes an association relation of association objects, and indicates that there may be three kinds of relations, for example, a and/or B, and may indicate that a alone exists, a and B together, and B alone exists. Wherein A, B may be singular or plural. The character "/" generally indicates that the context-dependent object is an "or" relationship. "at least one of the following" and the like means any combination of these items, including any combination of single or plural items. For example, at least one of a, b and c may represent: a, b, c, a and b, a and c, b and c or a and b and c, wherein a, b and c can be single or multiple.
Those of ordinary skill in the art will appreciate that the various elements and algorithm steps described in the embodiments disclosed herein can be implemented as a combination of electronic hardware, computer software, and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, and are not repeated herein.
In several embodiments provided herein, any of the functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: a usb disk, a removable hard disk, a Read-Only Memory (hereinafter referred to as ROM), a random access Memory (Random Access Memory) and various media capable of storing program codes such as a magnetic disk or an optical disk.
The foregoing is merely specific embodiments of the present application, and any person skilled in the art may easily conceive of changes or substitutions within the technical scope of the present application, which should be covered by the protection scope of the present application. The protection scope of the present application shall be subject to the protection scope of the claims.
Claims (8)
1. An SRS transmission circuit, comprising: the device comprises a baseband chip, a radio frequency chip, a first processing module and a second processing module, wherein,
the first output end of the baseband chip is connected with the first input end of the radio frequency chip, and the second output end of the baseband chip is connected with the second input end of the radio frequency chip; the first output end of the radio frequency chip is connected with the input end of the first processing module, the first end of the first processing module is connected with the first antenna, and the second end of the first processing module is connected with the second antenna; the second output end of the radio frequency chip is connected with the input end of the second processing module, the first end of the second processing module is connected with the third antenna, and the second end of the second processing module is connected with the fourth antenna;
the baseband chip is used for: outputting a first baseband signal through the first output end and outputting a second baseband signal through the second output end;
The radio frequency chip is used for: converting the first baseband signal into a first radio frequency signal, and outputting the first radio frequency signal through a first output end of the radio frequency chip; converting the second baseband signal into a second radio frequency signal, and outputting the second radio frequency signal through a second output end of the radio frequency chip;
the first processing module is used for: converting the first radio frequency signal into a third radio frequency signal, and outputting the third radio frequency signal to the first antenna or the second antenna;
the second processing module is used for: converting the second radio frequency signal into a fourth radio frequency signal, and outputting the fourth radio frequency signal to the third antenna or the fourth antenna;
the SRS transmission circuit further includes: the output end of the controller is respectively connected with the radio frequency chip, the first processing module and the second processing module, the controller is also connected with the memory, and the memory is used for storing NV; the NV comprises: first information, second information, third information, and fourth information; the first information includes: a first SRS indicator using a first control parameter of a switch in the first processing module when the first antenna transmits SRS signals; the second information includes: a first SRS indicator using a second control parameter of a switch in the first processing module when the second antenna transmits SRS signals; the third information includes: a second SRS indicator, using a third control parameter of a switch in the second processing module when a third antenna transmits SRS signals; the fourth information includes: a second SRS indicator, using a fourth control parameter of a switch in the second processing module when the fourth antenna transmits SRS signals; the first SRS indicator is used for indicating first SRS processing information, and the second SRS indicator is used for indicating second SRS processing information; the first SRS processing information includes: the processing parameters of the radio frequency chip to the first baseband signal and the processing parameters of the first processing module to the first radio frequency signal; the second SRS processing information includes: the processing parameters of the radio frequency chip to the second baseband signal and the processing parameters of the second processing module to the second radio frequency signal;
The controller is used for:
determining to transmit an SRS signal from a first antenna, and acquiring first information from NV of the memory; acquiring the first SRS indicator from the first information, and acquiring first SRS processing information corresponding to the first SRS indicator from NV of the memory; controlling the radio frequency chip to process the first baseband signal according to the processing parameters of the radio frequency chip on the first baseband signal; controlling the first processing module to process the first radio frequency signal according to the processing parameter of the first radio frequency signal; controlling the first processing module to perform switch control according to the first control parameter;
determining to transmit SRS signals from a second antenna, and acquiring second information from NV of the memory; acquiring the first SRS indicator from the second information, and acquiring first SRS processing information corresponding to the first SRS indicator from NV of the memory; controlling the radio frequency chip to process the first baseband signal according to the processing parameters of the radio frequency chip on the first baseband signal; controlling the first processing module to process the first radio frequency signal according to the processing parameter of the first radio frequency signal; controlling the first processing module to perform switch control according to the second control parameter;
Determining to transmit SRS signals from a third antenna, and acquiring third information from NV of the memory; acquiring the second SRS indicator from the third information, and acquiring second SRS processing information corresponding to the second SRS indicator from NV of the memory; controlling the radio frequency chip to process the second baseband signal according to the processing parameters of the radio frequency chip on the second baseband signal; controlling the second processing module to process the second radio frequency signal according to the processing parameter of the second radio frequency signal; controlling the second processing module to perform switch control according to the third control parameter;
determining to transmit SRS signals from a fourth antenna, and acquiring fourth information from NV of the memory; acquiring the second SRS indicator from the fourth information, and acquiring second SRS processing information corresponding to the second SRS indicator from NV of the memory; controlling the radio frequency chip to process the second baseband signal according to the processing parameters of the radio frequency chip on the second baseband signal; controlling the second processing module to process the second radio frequency signal according to the processing parameter of the second radio frequency signal; and controlling the second processing module to perform switch control according to the fourth control parameter.
2. The circuit of claim 1, wherein the radio frequency chip is further configured to: outputting the first radio frequency signal through a second output end of the radio frequency chip;
the second processing module is further configured to: and converting the first radio frequency signal into a fifth radio frequency signal, and outputting the fifth radio frequency signal to the third antenna or the fourth antenna.
3. The circuit of claim 1 or 2, wherein the first processing module comprises: the first signal processing module, the first switch and the second switch; wherein,
the first end of the first signal processing module is used as an input end of the first processing module, and the second end of the first signal processing module is connected with the first end of the first switch; the second end of the first switch is used as the first end of the first processing module, and the third end of the first switch is connected with the first end of the second switch; the second end of the second switch is used as the second end of the first processing module;
the first signal processing module is used for: in a T1R4 mode, converting the first radio frequency signal into a third radio frequency signal, and outputting the third radio frequency signal to the first switch;
the first switch is used for: gating a path between the first end and the second end, or gating a path between the first end and the third end;
The second switch is used for: the path between the first end and the second end is gated.
4. A circuit according to claim 3, wherein the second processing module comprises: the second signal processing module, the third switch and the fourth switch; wherein,
the first end of the second signal processing module is used as an input end of the second processing module, and the second end of the second signal processing module is connected with the first end of the third switch; the second end of the third switch is connected with the first end of the fourth switch, and the third end is used as the second end of the second processing module; the second end of the fourth switch is used as the first end of the second processing module;
the second signal processing module is used for: in a T1R4 mode, converting the second radio frequency signal into a fourth radio frequency signal, and outputting the fourth radio frequency signal to the third switch;
the third switch is used for: gating a path between the first end and the second end, or gating a path between the first end and the third end;
the fourth switch is used for: the path between the first end and the second end is gated.
5. A circuit according to claim 3, wherein the second processing module comprises: the second signal processing module, the third switch and the fourth switch; wherein,
The first end of the second signal processing module is used as an input end of the second processing module, and the second end of the second signal processing module is connected with the first end of the third switch; the second end of the third switch is connected with the first end of the fourth switch, and the third end is used as the second end of the second processing module; the second end of the fourth switch is used as the first end of the second processing module;
the second signal processing module is used for: in a T1R4 mode, converting the first radio frequency signal into a fifth radio frequency signal, and outputting the fifth radio frequency signal to the third switch;
the third switch is used for: gating a path between the first end and the second end, or gating a path between the first end and the third end;
the fourth switch is used for: the path between the first end and the second end is gated.
6. A circuit according to claim 3, wherein the first signal processing module is either independent of the first switch or integrated as one device.
7. The circuit of claim 4 or 5, wherein the second signal processing module is independent of the third switch or integrated as one device.
8. A chip module comprising the circuit of any one of claims 1 to 7.
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| CN202110515077.2A CN113258944B (en) | 2021-05-12 | 2021-05-12 | SRS transmitting circuit, method and device |
| PCT/CN2021/140524 WO2022237176A1 (en) | 2021-05-12 | 2021-12-22 | Srs transmitting circuit, method and device |
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