CN113258944A - SRS transmission circuit, method and device - Google Patents

SRS transmission circuit, method and device Download PDF

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Publication number
CN113258944A
CN113258944A CN202110515077.2A CN202110515077A CN113258944A CN 113258944 A CN113258944 A CN 113258944A CN 202110515077 A CN202110515077 A CN 202110515077A CN 113258944 A CN113258944 A CN 113258944A
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China
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signal
radio frequency
processing module
switch
srs
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CN202110515077.2A
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CN113258944B (en
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巫兆祥
王致远
乔威
刘入忠
栾国兵
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Spreadtrum Communications Shanghai Co Ltd
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Spreadtrum Communications Shanghai Co Ltd
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Priority to CN202110515077.2A priority Critical patent/CN113258944B/en
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Priority to PCT/CN2021/140524 priority patent/WO2022237176A1/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02Transmitters
    • H04B1/04Circuits
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02Transmitters
    • H04B1/04Circuits
    • H04B1/0483Transmitters with multiple parallel paths
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/02Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
    • H04B7/0413MIMO systems

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Transceivers (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Transmitters (AREA)

Abstract

The application provides an SRS transmission circuit, a method and a device, the circuit comprises: baseband chip, radio frequency chip, first processing module and second processing module, wherein, first processing module is used for: converting the first radio frequency signal into a third radio frequency signal, and outputting the third radio frequency signal to the first antenna or the second antenna; the second processing module is used for: and converting the second radio frequency signal into a fourth radio frequency signal, and outputting the fourth radio frequency signal to the third antenna or the fourth antenna. The circuit structure and the control method of the transmitting channel in the terminal which simultaneously supports T1R4 and T2R4SRS antenna transmission are reduced.

Description

SRS transmission circuit, method and device
Technical Field
The present invention relates to the field of communications, and in particular, to a channel Sounding Reference Signal (SRS) transmitting circuit, method and apparatus.
Background
Currently, a terminal supporting 5G may support 2 × 2 multiple-input multiple-output (MIMO) uplink, and may support 4 × 4MIMO downlink. Under the configuration, the terminal simultaneously supports T1R4 and T2R4 as the SRS supporting capability with the highest current level, and the throughput rate of the cell can be improved to the greatest extent.
However, the circuit structure and the control method of the transmission channel in the terminal supporting both T1R4 and T2R4 are complicated.
Disclosure of Invention
The application provides an SRS transmission method and an SRS transmission device, which reduce the complexity of a circuit structure and a control method of a transmission channel in a terminal simultaneously supporting T1R4 and T2R 4.
In a first aspect, an SRS transmission circuit according to an embodiment of the present application includes: a baseband chip, a radio frequency chip, a first processing module and a second processing module, wherein,
the first output end of the baseband chip is connected with the first input end of the radio frequency chip, and the second output end of the baseband chip is connected with the second input end of the radio frequency chip; the first output end of the radio frequency chip is connected with the input end of a first processing module, the first end of the first processing module is connected with a first antenna, and the second end of the first processing module is connected with a second antenna; the second output end of the radio frequency chip is connected with the input end of a second processing module, the first end of the second processing module is connected with a third antenna, and the second end of the second processing module is connected with a fourth antenna;
the baseband chip is used for: outputting a first baseband signal through the first output terminal, and outputting a second baseband signal through the second output terminal;
the radio frequency chip is used for: converting the first baseband signal into a first radio frequency signal, and outputting the first radio frequency signal through a first output end of the radio frequency chip; converting the second baseband signal into a second radio frequency signal, and outputting the second radio frequency signal through a second output end of the radio frequency chip;
the first processing module is configured to: converting the first radio frequency signal into a third radio frequency signal, and outputting the third radio frequency signal to the first antenna or the second antenna;
the second processing module is configured to: and converting the second radio frequency signal into a fourth radio frequency signal, and outputting the fourth radio frequency signal to the third antenna or the fourth antenna.
The circuit can support antenna transmission in T1R4 and T2R4 modes, and compared with the prior art that a transmission path in a T1R4 mode and a transmission path in a T2R4 mode need to be respectively arranged, the circuit is simpler to realize, and the circuit complexity of an SRS transmission path in the terminal is reduced.
In one possible implementation manner, the radio frequency chip is further configured to: outputting the first radio frequency signal through a second output end of the radio frequency chip;
the second processing module is further configured to: and converting the first radio frequency signal into a fifth radio frequency signal, and outputting the fifth radio frequency signal to the third antenna or the fourth antenna.
In one possible implementation, the first processing module includes: the device comprises a first signal processing module, a first switch and a second switch; wherein,
the first end of the first signal processing module is used as the input end of the first processing module, and the second end of the first signal processing module is connected with the first end of the first switch; the second end of the first switch is used as the first end of the first processing module, and the third end of the first switch is connected with the first end of the second switch; a second end of the second switch is used as a second end of the first processing module;
the first signal processing module is configured to: in a T1R4 mode, converting the first rf signal into a third rf signal, and outputting the third rf signal to the first switch;
the first switch is used for: gating a path between the first terminal and the second terminal, or gating a path between the first terminal and the third terminal;
the second switch is used for: a path between the first terminal and the second terminal is gated.
In one possible implementation, the second processing module includes: the second signal processing module, the third switch and the fourth switch; wherein,
the first end of the second signal processing module is used as the input end of the second processing module, and the second end of the second signal processing module is connected with the first end of the third switch; the second end of the third switch is connected with the first end of the fourth switch, and the third end of the third switch is used as the second end of the second processing module; a second end of the fourth switch is used as a first end of the second processing module;
the second signal processing module is configured to: in a T1R4 mode, converting the second radio frequency signal into a fourth radio frequency signal, and outputting the fourth radio frequency signal to the third switch;
the third switch is to: gating a path between the first terminal and the second terminal, or gating a path between the first terminal and the third terminal;
the fourth switch is configured to: a path between the first terminal and the second terminal is gated.
In one possible implementation, the second processing module includes: the second signal processing module, the third switch and the fourth switch; wherein,
the first end of the second signal processing module is used as the input end of the second processing module, and the second end of the second signal processing module is connected with the first end of the third switch; the second end of the third switch is connected with the first end of the fourth switch, and the third end of the third switch is used as the second end of the second processing module; a second end of the fourth switch is used as a first end of the second processing module;
the second signal processing module is configured to: in a T1R4 mode, converting the first rf signal into a fifth rf signal, and outputting the fifth rf signal to the third switch;
the third switch is to: gating a path between the first terminal and the second terminal, or gating a path between the first terminal and the third terminal;
the fourth switch is configured to: a path between the first terminal and the second terminal is gated.
In a possible implementation, the first signal processing module is independent of the first switch, or integrated into one device.
In a possible implementation, the second signal processing module is present independently of the third switch or integrated into one device.
In a second aspect, an embodiment of the present application provides a method for transmitting an SRS, including:
if the fact that the SRS signal is transmitted from the ith antenna is determined, acquiring ith information corresponding to the ith antenna from preset information corresponding to each antenna; the ith information includes: control parameters of a switch when the antenna i transmits the SRS signal and the SRS indicator; i is 1, 2, 3, or 4;
acquiring an SRS indicator from the ith information, and acquiring SRS processing information corresponding to the SRS indicator from processing information corresponding to each SRS indicator preset in NV, wherein the SRS processing information comprises: the processing module processes parameters of the radio frequency signals and parameters of the radio frequency chip processes baseband signals;
controlling a radio frequency chip to process the baseband signal according to the processing parameters indicated by the SRS processing information to obtain a radio frequency signal;
the control processing module processes the radio frequency signal according to the processing parameters indicated by the SRS processing information to obtain an SRS signal;
and controlling each switch to select a path according to the control parameter indicated by the ith information, and transmitting the SRS signal to the ith antenna on the selected path.
In one possible implementation manner, the method further includes:
presetting ith information corresponding to an ith antenna, wherein the ith information comprises: the ith antenna corresponds to control parameters of a switch in a path and an SRS indicator;
presetting SRS processing information corresponding to each SRS indicator, wherein the SRS processing information comprises: the processing module is used for processing parameters of the radio frequency signals and processing parameters of the radio frequency chip are used for processing the baseband signals.
In a third aspect, an embodiment of the present application provides an apparatus for transmitting an SRS, including:
an obtaining module, configured to obtain ith information corresponding to an ith antenna from preset information corresponding to each antenna if it is determined that an SRS signal is transmitted from the ith antenna; the ith information includes: control parameters of a switch when the antenna i transmits the SRS signal and the SRS indicator; i is 1, 2, 3, or 4; acquiring an SRS indicator from the ith information, and acquiring SRS processing information corresponding to the SRS indicator from processing information corresponding to each preset SRS indicator, wherein the SRS processing information comprises: the processing module processes parameters of the radio frequency signals and parameters of the radio frequency chip processes baseband signals;
the control module is used for controlling the radio frequency chip to process the baseband signal according to the processing parameters indicated by the SRS processing information to obtain a radio frequency signal; the control processing module processes the radio frequency signal according to the processing parameters indicated by the SRS processing information to obtain an SRS signal; and controlling each switch to select a path according to the control parameter indicated by the ith information, and transmitting the SRS signal to the ith antenna on the selected path.
In a third aspect, an embodiment of the present application provides a chip module, including the circuit of any one of the first aspects.
In a fourth aspect, an embodiment of the present application provides a chip module including the apparatus of the third aspect.
In a fifth aspect, embodiments of the present application provide a computer-readable storage medium, in which a computer program is stored, which, when run on a computer, causes the computer to perform the method of any one of the second aspects.
In a sixth aspect, the present application provides a computer program for performing the method of the first aspect when the computer program is executed by a computer.
In a possible design, the program in the sixth aspect may be stored in whole or in part on a storage medium packaged with the processor, or in part or in whole on a memory not packaged with the processor.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic diagram of one example of an SRS transmission circuit in a terminal supporting T1R4 and T2R4SRS antenna transmission;
FIG. 2 is a schematic diagram of an SRS transmission circuit according to the present application;
FIG. 3 is a schematic diagram of an SRS transmission circuit according to the present application;
FIG. 4 is a schematic diagram of an SRS transmission circuit according to the present application;
FIG. 5 is a diagram illustrating information set in NV of the present application;
fig. 6 is a flowchart of an SRS transmission method according to the present application;
FIG. 7 is a schematic diagram of an SRS transmission circuit according to the present application;
fig. 8 is a structural diagram of an SRS transmitting apparatus according to the present application.
Detailed Description
The terminology used in the description of the embodiments section of the present application is for the purpose of describing particular embodiments of the present application only and is not intended to be limiting of the present application.
In Downlink multiple-input multiple-output (DL-MIMO) transmission, if a network side device can accurately obtain transmission parameters from the network side device to each receiving antenna of a terminal, the number of transmission layers can be scheduled to the maximum extent, so as to improve a Downlink transmission rate, and especially in a 5G communication system, through massive multiple-in multiple-out (massive MIMO) and beamforming, a throughput rate of a whole cell can be significantly improved.
The key for the network side device to obtain the transmission parameters from the network side device to each receiving antenna of the terminal is that each receiving antenna of the terminal needs to transmit the SRS. In the TDD system, the network side device may accurately calculate uplink transmission parameters from each receiving antenna of the terminal to the network side device through the received SRS transmitted from each receiving antenna of the terminal, and the network side device also calculates downlink transmission parameters from the network side device to each receiving antenna of the terminal due to reciprocity of the uplink and downlink transmission parameters.
Therefore, the capability of the terminal to transmit the SRS on each receiving antenna is particularly important for improving the throughput of the whole cell as a key characteristic of the terminal in a communication system supporting MIMO, such as a 5G communication system, a Long Term Evolution (LTE), an LTE-advanced (LTE-advanced), an LTE-a Pro and a future possible Evolution system.
Taking a terminal supporting 5G as an example, the terminal supports 2 × 2MIMO uplink and 4 × 4MIMO downlink, and the terminal simultaneously supports T1R4(transmit 1 sounding 4) and T2R4(transmit 2 sounding 4) as the SRS support capability of the current highest level, so that the throughput of the cell can be improved to the maximum extent. There are usually 4 antennas per NR band in the hardware of the terminal, two antennas are used for receiving only, and the other two antennas are used for transmitting and receiving. As shown in fig. 1, in order to support 2 × 2 uplink multiple input multiple output (UL-MIMO), the rf front end of the terminal includes two PAs, corresponding to two transmission paths, one is Main Tx path, and the other is MIMO Tx path; to support 4 × 4DL-MIMO, the rf front end includes 4 receive paths, and the receive paths typically include transmit/receive switches, filters, Low Noise Amplifiers (LNAs), and so on.
In order to support SRS, a Power Amplifier (PA) is not added directly to the terminal, but a switch (switch) is added to the PA output terminal, so that the uplink SRS can be transmitted to two antennas which are used for receiving only. For example, as shown in fig. 1, in order to enable the terminal to support T2R4, referring to fig. 1, a switch 1 and a switch 2 are added, so that the switch 1 transmits one SRS signal to the antenna 1 or the antenna 2 by gating different paths, and the switch 2 transmits the other SRS signal to the antenna 3 or the antenna 4 by gating different paths; in order to enable the terminal to support T1R4, since signals need to be transmitted to four antennas in turn from Main Tx path, one output end of the switch 1 is connected to the input end of the switch 2, so that one path of SRS signals can be transmitted to the antenna 1 or the antenna 2 through the gate of the switch 1, transmitted to the switch 2 through the gate of the switch 1, and transmitted to the antenna 3 or the antenna 4 through the gate of the switch 2, and thereby SRS signals can be transmitted on 4 antennas in turn by switching the switches, in this way, in the T1R4 mode, SRS signals need to be transmitted to the antenna 3 or the antenna 4 through a relatively longer trace, and the loss is relatively larger.
Generally, the RF transmission channel end includes a Radio Frequency Integrated Circuit (RFIC) and a radio frequency Front end module (RFFE), and the RFFE includes a PA, a filter, a radio frequency switch, an antenna, and the like. A common control method of the RFIC is Serial Peripheral Interface (SPI). The FEM mainly includes a Mobile Industry Processor Interface (MIPI) and a General-purpose I/O port (GPIO), and the FEM control includes PA logic control and switch logic control.
In order to realize the control of the rf channels, a control logic storage space of the whole link is usually reserved in the NV for each rf channel, and corresponding logic parameters are configured in the corresponding storage space. For the rf transmit channel, the configuration of Tx port, the configuration of PA control parameters, the configuration of Switch control parameters, etc. are included. NV is a generic name of radio frequency channel control logic, and is stored in a user terminal in a certain organization structure, and is used for software call to realize the transceiving control of a radio frequency channel.
Thus, compared with the previous 4G terminal, the complexity of the T1R4 supporting SRS and the 5G terminal supporting T2R4 antenna transmission is greatly improved regardless of the hardware architecture or the control of the radio frequency transmission channel.
Therefore, the present application provides an SRS transmission apparatus and method, which can reduce the complexity of a circuit structure and a control method of a transmission channel in a terminal.
Fig. 2 is a circuit diagram of an embodiment of an SRS transmitting apparatus according to the present application, as shown in fig. 2, the apparatus includes:
the first output end OUT11 of the baseband chip 10 is connected to the first input end IN21 of the RF chip 20, and the second output end OUT12 of the baseband chip 10 is connected to the second input end IN22 of the RF chip 20; the first output end OUT21 of the rf chip 20 is connected to the input end IN31 of the first processing module 30, the first end P31 of the first processing module 30 is connected to the first antenna ant1, and the second end P32 is connected to the second antenna ant 2; the second output end OUT22 of the rf chip 20 is connected to the input end IN41 of the second processing module 40, the first end P41 of the second processing module 40 is connected to the third antenna ant3, and the second end P42 is connected to the fourth antenna ant 4;
the baseband chip 10 is used for: in the T1R4 mode or the T2R4 mode, the first baseband signal is output to the rf chip 20 through the first output terminal OUT11, and the second baseband signal is output to the rf chip 20 through the second output terminal OUT 12;
the rf chip 20 is configured to: converting the first baseband signal into a first radio frequency signal, and outputting the first radio frequency signal to the first processing module 30 through a first output end OUT21 of the radio frequency chip 20; converting the second baseband signal into a second rf signal, and outputting the second rf signal to the second processing module 40 through a second output terminal OUT22 of the rf chip 20;
the first processing module 30 is configured to: converting the first radio frequency signal into a third radio frequency signal, and outputting the third radio frequency signal to the first antenna ant1 through the first terminal P31, or outputting the third radio frequency signal to the second antenna ant2 through the second terminal P32;
the second processing module 40 is configured to: the second rf signal is converted into a fourth rf signal, and the fourth rf signal is output to the third antenna ant3 through the first terminal P41, or is output to the fourth antenna ant4 through the second terminal P42.
The operation principle of the circuit diagram in the T1R4 mode and the T2R4 mode will be described.
In the T2R4 mode, two paths of SRS signals which need to be transmitted in two directions are transmitted over two antennas, and the working principle in the mode is as follows:
the baseband chip 10 sends the first baseband signal and the second baseband signal to the radio frequency chip 20; the rf chip 20 operates in Tx MIMO mode, where: after the first baseband signal is converted into a first rf signal, the first rf signal is converted into a third rf signal by the first processing module 30, and the third rf signal is output to the first antenna ant1 or the second antenna ant 2; the second baseband signal is converted into a second rf signal, and then converted into a fourth rf signal by the second processing module 40, and output to the third antenna ant3 or the fourth antenna ant 4; therefore, the two paths of SRS signals which are transmitted at any moment are transmitted on the two antennas.
In a T1R4 mode, a single SRS signal is required to be transmitted through one of four antennas, and the operating principle in the mode is as follows:
if the SRS signal needs to be transmitted through the first antenna ant1, the baseband chip 10 outputs the first baseband signal to the rf chip 20 through the first output terminal OUT11, and after the rf chip 20 converts the first baseband signal into the first rf signal, the first rf signal is converted into a third rf signal through the first processing module 30 and output to the first antenna ant 1;
if the SRS signal needs to be transmitted through the second antenna ant2, the baseband chip 10 outputs the first baseband signal to the rf chip 20 through the first output terminal OUT11, and after the rf chip 20 converts the first baseband signal into the first rf signal, the first rf signal is converted into a third rf signal through the first processing module 30 and output to the second antenna ant 2;
if the SRS signal needs to be transmitted through the third antenna ant3, the baseband chip 10 outputs the second baseband signal to the rf chip 20 through the second output terminal OUT12, and after the rf chip 20 converts the second baseband signal into the second rf signal, the second rf signal is converted into a fourth rf signal through the second processing module 40 and output to the third antenna ant 3;
if the SRS signal needs to be transmitted through the fourth antenna ant4, the baseband chip 10 outputs the second baseband signal to the rf chip 20 through the second output terminal OUT12, and after the rf chip 20 converts the second baseband signal into the second rf signal, the second rf signal is converted into the fourth rf signal through the second processing module 40 and output to the fourth antenna ant 4.
The first baseband signal, the second baseband signal, and the first to fourth rf signals generated in the T1R4 mode or the T2R4 mode may be referred to as SRS signals.
Therefore, the circuit can also support antenna transmission in the T1R4 and T2R4 modes, and compared with the prior art in which a transmission path in the T1R4 mode and a transmission path in the T2R4 mode need to be respectively arranged, the SRS transmission device of the present application has a simpler implementation circuit, thereby reducing the circuit complexity of the SRS transmission path in the terminal.
Alternatively, as shown in fig. 3, the first processing module 30 may include: a first signal processing module 50, a first switch 60, and a second switch 70, wherein,
the first terminal P51 of the first signal processing module 50 is used as the input terminal IN31 of the first processing module 30, and the second terminal P52 is connected to the first terminal P61 of the first switch 60; the second terminal P62 of the first switch 60 is connected to the first antenna ant1 as the first terminal P31 of the first processing module 30; the third terminal P63 of the first switch 60 is connected to the first terminal P71 of the second switch 70, and the second terminal P72 of the second switch 70 is connected to the second antenna ant2 as the second terminal P32 of the first processing module 30.
The first signal processing module 50 is configured to convert the first radio frequency signal into a third radio frequency signal, and output the third radio frequency signal to the first switch 60 through the second terminal P52. The process of converting the first radio frequency signal to the third radio frequency signal may include, but is not limited to: and performing power amplification processing and/or filtering processing on the first radio frequency signal.
The first switch 60 may be configured to gate a path between the first terminal P61 and the second terminal P62, and output the received third rf signal to the first antenna ant1 through the second terminal P62; the first switch 60 may also be used to gate a path between the first terminal P61 and the third terminal P63, and output the received third rf signal to the second switch 70 through the third terminal P63.
The second switch 70 may be configured to gate a path between the first terminal P71 and the second terminal P72, and output the received third rf signal to the second antenna ant2 through the second terminal P72.
Alternatively, as shown in fig. 3, the second processing module 40 may include: a second signal processing module 80, a third switch 90, and a fourth switch 100, wherein,
the first terminal P81 of the second signal processing module 80 is used as the input terminal IN41 of the second processing module 40, and the second terminal P82 is connected to the first terminal P91 of the third switch 90; the third terminal P93 of the third switch 90 is connected to the fourth antenna ant4 as the second terminal P42 of the second processing module 40; the second terminal P92 of the third switch 90 is connected to the first terminal P101 of the fourth switch 100, and the second terminal P102 of the fourth switch 100 is used as the first terminal P41 of the second processing module 40 and is connected to the third antenna ant 3.
The second signal processing module 80 is configured to convert the second radio frequency signal into a fourth radio frequency signal, and output the fourth radio frequency signal to the third switch 90 through the second terminal P82. The process of converting the second radio frequency signal to the fourth radio frequency signal may include, but is not limited to: and performing power amplification processing on the second radio frequency signal, and performing filtering processing on the second radio frequency signal.
The third switch 90 may be configured to gate a path between the first terminal P91 and the third terminal P93, and output the received fourth rf signal to the fourth antenna ant4 through the third terminal P93; the third switch 90 may also be used to gate a path between the first terminal P91 and the second terminal P102, and output the received fourth rf signal to the fourth switch 100 through the second terminal P102.
The fourth switch 100 may be configured to gate a path between the first terminal P101 and the second terminal P102, and output the received fourth rf signal to the third antenna ant3 through the second terminal P102.
Optionally, in order to enable the terminal to support MIMO and distinguish signals respectively received at the first antenna ant1, the second antenna ant2, the third antenna ant3 and the fourth antenna ant4, as shown in fig. 3, the circuit may further include:
the first switch 60 may further include a fourth terminal P64, and the first switch 60 may be configured to gate a path between the second terminal P62 and the fourth terminal P64, so as to transmit a signal received by the first antenna ant1 to the third receiving terminal IN23 of the rf chip 20 through the fourth terminal P64;
the second switch 70 may further include a third terminal P73, and the second switch 70 may be configured to gate a path between the second terminal P72 and the third terminal P73, and transmit a signal received by the second antenna ant2 to the fourth receiving terminal IN24 of the rf chip 20 through the third terminal P73;
the fourth switch 100 may further include a third terminal P103, and the fourth switch 100 may be configured to gate a path between the second terminal P102 and the third terminal P103, and transmit a signal received by the third antenna ant3 to the fifth receiving terminal IN25 of the rf chip 20 through the third terminal P103;
the third switch 90 may further include a fourth terminal P94, and the third switch 90 may be configured to gate a path between the third terminal P93 and the fourth terminal P94, so as to transmit a signal received by the fourth antenna ant4 to the sixth receiving terminal IN26 of the rf chip 20 through the fourth terminal P94;
accordingly, the rf chip 20 can also be used to: converting the signal received by the third receiving terminal IN23 into a baseband signal, and transmitting the baseband signal to the first input terminal IN11 of the baseband chip 10 through the third output terminal OUT 23; converting the signal received by the fourth receiving terminal IN24 into a baseband signal, and transmitting the baseband signal to the second input terminal IN12 of the baseband chip 10 through the fourth output terminal OUT 24; converting the signal received through the fifth receiving terminal IN25 into a baseband signal, and transmitting the baseband signal to the third input terminal IN13 of the baseband chip 10 through the fifth output terminal OUT 25; the signal received through the sixth receiving terminal IN26 is converted into a baseband signal, and is transmitted to the fourth input terminal IN14 of the baseband chip 10 through the sixth output terminal OUT 26.
The signal receiving on each antenna is realized through the above channels.
In fig. 3, the first signal processing module 50 and the first switch 60 are independent, and in another embodiment, as shown in fig. 4, the first signal processing module 50 and the first switch 60 may be integrated into a single device, and the integrated device performs the functions of the first signal processing module 50 and the first switch 60; while the second signal processing module 80 and the third switch 90 are independent in fig. 3, in another embodiment, as shown in fig. 4, the second signal processing module 80 and the third switch 90 may be integrated into a single device, and the integrated device performs the functions of the second signal processing module 80 and the third switch 90.
In an SRS transmitting apparatus according to another embodiment provided in the present application, different from the embodiment shown in fig. 2, the rf chip 20 of the present embodiment may further be configured to: converting the first baseband signal into a first radio frequency signal, and outputting the first radio frequency signal to the second processing module 40 through a second output end OUT22 of the radio frequency chip 20;
the second processing module 40 may be configured to: the first rf signal is converted into a fifth rf signal, and the fifth rf signal is output to the third antenna ant3 through the first terminal P41, or is output to the fourth antenna ant4 through the second terminal P42.
In a T1R4 mode, a single SRS signal is required to be transmitted through one of four antennas, and the operating principle in the mode is as follows:
if the SRS signal needs to be transmitted through the first antenna ant1, the baseband chip 10 outputs the first baseband signal to the rf chip 20 through the first output terminal OUT11, and after the rf chip 20 converts the first baseband signal into the first rf signal, the first rf signal is converted into a third rf signal through the first processing module 30 and output to the first antenna ant 1;
if the SRS signal needs to be transmitted through the second antenna ant2, the baseband chip 10 outputs the first baseband signal to the rf chip 20 through the first output terminal OUT11, and after the rf chip 20 converts the first baseband signal into the first rf signal, the first rf signal is converted into a third rf signal through the first processing module 30 and output to the second antenna ant 2;
if the SRS signal needs to be transmitted through the third antenna ant3, the baseband chip 10 outputs the first baseband signal to the rf chip 20 through the first output terminal OUT11, and after the rf chip 20 converts the first baseband signal into the first rf signal, the first rf signal is converted into a fifth rf signal through the second processing module 40 and output to the third antenna ant 3;
if the SRS signal needs to be transmitted through the fourth antenna ant4, the baseband chip 10 outputs the first baseband signal to the rf chip 20 through the first output terminal OUT11, and after the rf chip 20 converts the first baseband signal into the first rf signal, the first rf signal is converted into the fifth rf signal through the second processing module 40 and output to the fourth antenna ant 4.
The working principle of the SRS transmitting device in the T2R4 mode in this embodiment may refer to the corresponding description in fig. 2, and the implementation of the first processing module and the second processing module in this embodiment may refer to the embodiments shown in fig. 3 and fig. 4, which is not described herein again.
In an SRS transmitting apparatus according to another embodiment provided in the present application, different from the embodiment shown in fig. 2, the rf chip 20 of the present embodiment may further be configured to: converting the second baseband signal into a second rf signal, and outputting the second rf signal to the first processing module 30 through a first output end OUT21 of the rf chip 20;
the first processing module 30 may also be configured to: the second rf signal is converted into a sixth rf signal, and the sixth rf signal is output to the first antenna ant1 through the first terminal P31, or output to the second antenna ant2 through the second terminal P32.
In a T1R4 mode, a single SRS signal is required to be transmitted through one of four antennas, and the operating principle in the mode is as follows:
if the SRS signal needs to be transmitted through the first antenna ant1, the baseband chip 10 outputs the second baseband signal to the rf chip 20 through the second output terminal OUT12, and after the rf chip 20 converts the second baseband signal into the second rf signal, the second rf signal is converted into the sixth rf signal through the first processing module 30 and output to the first antenna ant 1;
if the SRS signal needs to be transmitted through the second antenna ant2, the baseband chip 10 outputs the second baseband signal to the rf chip 20 through the second output terminal OUT12, and after the rf chip 20 converts the second baseband signal into the second rf signal, the second rf signal is converted into a sixth rf signal through the first processing module 30 and output to the second antenna ant 2;
if the SRS signal needs to be transmitted through the third antenna ant3, the baseband chip 10 outputs the second baseband signal to the rf chip 20 through the second output terminal OUT12, and after the rf chip 20 converts the second baseband signal into the second rf signal, the second rf signal is converted into a fourth rf signal through the second processing module 40 and output to the third antenna ant 3;
if the SRS signal needs to be transmitted through the fourth antenna ant4, the baseband chip 10 outputs the second baseband signal to the rf chip 20 through the second output terminal OUT12, and after the rf chip 20 converts the second baseband signal into the second rf signal, the second rf signal is converted into the fourth rf signal through the second processing module 40 and output to the fourth antenna ant 4.
The working principle of the SRS transmitting device in the T2R4 mode in this embodiment may refer to the corresponding description in fig. 2, and the implementation of the first processing module and the second processing module in this embodiment may refer to the embodiments shown in fig. 3 and fig. 4, which is not described herein again.
Based on the structure of the device, the application also provides an SRS transmission method.
As shown in fig. 5, NV of the rf signal output may have preset therein: and based on the path selection information of each antenna and based on the processing parameters of the two paths of baseband signals output by the baseband chip. Taking the SRS transmitting apparatus shown in fig. 2 as an example, the following information may be preset:
first information 510, comprising: a first control parameter of the switch, a first SRS indicator, when the first antenna ant1 is used to transmit SRS signals; the first SRS indicator indicates first SRS processing information. Taking fig. 2 as an example, the first control parameters of the switch may include: controlling a path between the first processing module gate input terminal IN31 and the first terminal P31; taking fig. 3 as an example, the first control parameters of the switch may include: the first switch 60 is controlled to gate a parameter of a path between the first terminal P61 and the second terminal P62.
Second information 520, including: a second control parameter of the switch, the first SRS indicator, when the second antenna ant2 is used to transmit the SRS signal. Taking fig. 2 as an example, the second control parameters of the switch may include: controlling a path between the first processing module gate input terminal IN31 and the second terminal P32; taking fig. 3 as an example, the second control parameters of the switch may include: the first switch 60 is controlled to gate the parameter of the path between the first terminal P61 and the third terminal P63, and the second switch 70 is controlled to gate the parameter of the path between the first terminal P71 and the second terminal P72.
Third information 530, including: a third control parameter, a second SRS indicator, switched when the SRS signal is transmitted using the third antenna ant 3; the second SRS indicator indicates second SRS processing information. Taking fig. 2 as an example, the third control parameters of the switch may include: controlling a path between the second processing module gate input terminal IN41 and the first terminal P41; taking fig. 3 as an example, the third control parameters of the switch may include: the third switch 90 is controlled to gate a parameter of the path between the first terminal P91 and the third terminal P93.
Fourth information 540, including: a fourth control parameter of the switch, a second SRS indicator, when the SRS signal is transmitted using the fourth antenna ant 4. Taking fig. 2 as an example, the fourth control parameter of the switch may include: controlling a path between the second processing module gate input terminal IN41 and the second terminal P42; taking fig. 3 as an example, the fourth control parameter of the switch may include: the third switch 90 is controlled to gate the parameter of the path between the first terminal P91 and the second terminal P92, and the fourth switch 100 is controlled to gate the parameter of the path between the first terminal P101 and the second terminal P102.
The first SRS processing information 550 includes: the processing parameters of the radio frequency chip to the first baseband signal and the processing parameters of the first processing module to the first radio frequency signal;
the second SRS processing information 560 includes: the radio frequency chip processes parameters of the second baseband signal, and the second processing module processes parameters of the second radio frequency signal.
As shown in fig. 6, the method may include:
step 601: if the fact that the SRS signal is transmitted from the ith antenna is determined, acquiring ith information corresponding to the ith antenna from preset information corresponding to each antenna; the ith information includes: control parameters of a switch when the antenna i transmits the SRS signal and the SRS indicator; i is 1, 2, 3, or 4;
step 602: acquiring an SRS indicator from the ith information, and acquiring SRS processing information corresponding to the SRS indicator from processing information corresponding to each preset SRS indicator, wherein the SRS processing information comprises: the processing module processes parameters of the radio frequency signals and parameters of the radio frequency chip processes baseband signals;
step 603: controlling a radio frequency chip to process the baseband signal according to the processing parameters indicated by the SRS processing information to obtain a radio frequency signal;
step 604: the control processing module processes the radio frequency signal according to the processing parameters indicated by the SRS processing information to obtain an SRS signal;
the SRS signal in this step is also a radio frequency signal obtained by processing by the processing module, such as the third to sixth radio frequency signals.
Step 605: and controlling each switch to select a path according to the control parameter indicated by the ith information, and transmitting the SRS signal to the ith antenna on the selected path.
The path selection comprises path selection from an input end to an output end of the radio frequency chip, path selection from the input end to the output end in the first processing module and the like.
Based on the embodiment shown in fig. 2, in the T1R4 mode, if an SRS signal is transmitted from the first antenna: acquiring first information corresponding to a first antenna from information corresponding to a preset antenna, acquiring a first SRS indicator from the first information, acquiring first SRS processing information, controlling a radio frequency chip to process a first baseband signal according to the first SRS processing information to obtain a first radio frequency signal, controlling a first processing module to process the first radio frequency signal according to the first SRS processing signal to obtain a third radio frequency signal, and performing path selection according to a first control parameter of a switch in the first information to transmit the third radio frequency signal to the first antenna, wherein the first antenna transmits the third radio frequency signal;
if the SRS signal is transmitted from the second antenna: acquiring second information corresponding to a second antenna from information corresponding to a preset antenna, acquiring a first SRS indicator from the second information, acquiring first SRS processing information, controlling a radio frequency chip to process a first baseband signal according to the first SRS processing information to obtain a first radio frequency signal, controlling a first processing module to process the first radio frequency signal according to the first SRS processing information to obtain a third radio frequency signal, and performing path selection according to a second control parameter of a switch in the second information to transmit the third radio frequency signal to the second antenna, wherein the second antenna transmits the third radio frequency signal;
if an SRS signal is transmitted from the third antenna: acquiring third information corresponding to a third antenna from the preset information corresponding to the antenna, acquiring a second SRS indicator from the third information, further acquiring second SRS processing information, controlling a radio frequency chip to process a second baseband signal according to the second SRS processing information to obtain a second radio frequency signal, controlling a second processing module to process the second radio frequency signal according to the second SRS processing information to obtain a fourth radio frequency signal, and performing path selection according to a third control parameter of a switch in the third information to transmit the fourth radio frequency signal to the third antenna, wherein the third antenna transmits the fourth radio frequency signal;
if the SRS signal is transmitted from the fourth antenna: the method comprises the steps of obtaining fourth information corresponding to a fourth antenna from information corresponding to a preset antenna, obtaining a second SRS indicator from the fourth information, further obtaining second SRS processing information, controlling a radio frequency chip to process a second baseband signal according to the second SRS processing information to obtain a second radio frequency signal, controlling a second processing module to process the second radio frequency signal according to the second SRS processing information to obtain a fourth radio frequency signal, and performing access selection according to a fourth control parameter of a switch in the fourth information to transmit the fourth radio frequency signal to the fourth antenna, wherein the fourth radio frequency signal is transmitted by the fourth antenna.
In the T2R4 mode, if SRS signals are transmitted from the first antenna and the third antenna, specific processing flows may refer to processing flows of transmitting SRS signals from the first antenna and transmitting SRS signals from the third antenna in the T1R4 mode, respectively; if SRS signals are transmitted from the second antenna and the fourth antenna, the specific processing flow may refer to the processing flow of SRS signal transmission from the second antenna and SRS signal transmission from the fourth antenna in the T1R4 mode, respectively.
The method shown in FIG. 6 may be applied in the T1R4 mode and in the T2R4 mode. The method shown in fig. 6 may be implemented by a controller, and at this time, referring to fig. 7, a first end of the controller 710 may be connected to a memory 720, and the memory 720 stores the NV. The output end of the controller 710 is connected to the rf chip, the first processing module, and the second processing module, respectively, to execute the method shown in fig. 6, so as to complete the control of the above devices.
It is to be understood that some or all of the steps or operations in the above-described embodiments are merely examples, and other operations or variations of various operations may be performed by the embodiments of the present application. Further, the various steps may be performed in a different order presented in the above-described embodiments, and it is possible that not all of the operations in the above-described embodiments are performed.
Fig. 8 is a block diagram of an apparatus for transmitting SRS according to the present application, and as shown in fig. 8, the apparatus 800 may include.
An obtaining module 810, configured to obtain ith information corresponding to an ith antenna from preset information corresponding to each antenna if it is determined that an SRS signal is transmitted from the ith antenna; the ith information includes: control parameters of a switch when the antenna i transmits the SRS signal and the SRS indicator; i is 1, 2, 3, or 4; acquiring an SRS indicator from the ith information, and acquiring SRS processing information corresponding to the SRS indicator from processing information corresponding to each SRS indicator preset in NV, wherein the SRS processing information comprises: the processing module processes parameters of the radio frequency signals and parameters of the radio frequency chip processes baseband signals;
a control module 820, configured to control the radio frequency chip to perform baseband signal processing according to the processing parameter indicated by the SRS processing information, so as to obtain a radio frequency signal; the control processing module processes the radio frequency signal according to the processing parameters indicated by the SRS processing information to obtain an SRS signal; and controlling each switch to select a path according to the control parameter indicated by the ith information, and transmitting the SRS signal to the ith antenna on the selected path.
The apparatus provided in the embodiment shown in fig. 8 may be used to implement the technical solution of the method embodiment shown in fig. 6 of the present application, and the implementation principle and technical effects thereof may be further referred to in the related description of the method embodiment.
It should be understood that the division of the modules of the apparatus shown in fig. 8 is merely a logical division, and the actual implementation may be wholly or partially integrated into one physical entity or may be physically separated. And these modules can be realized in the form of software called by processing element; or may be implemented entirely in hardware; and part of the modules can be realized in the form of calling by the processing element in software, and part of the modules can be realized in the form of hardware. For example, the obtaining module may be a separately established processing element, or may be implemented by being integrated in a certain chip of the terminal. Other modules are implemented similarly. In addition, all or part of the modules can be integrated together or can be independently realized. For example, the SRS transmitting device may be a chip or a chip module, or the data transmission device may be a part of a chip or a chip module. In implementation, each step of the above method or each module above may be implemented by an integrated logic circuit of hardware in a processor element or an instruction in the form of software.
An embodiment of the present application provides a chip module, which includes a circuit shown in any one of fig. 2 to 4.
The embodiment of the application provides a chip module, which comprises the device shown in fig. 8.
Embodiments of the present application further provide a computer-readable storage medium, in which a computer program is stored, and when the computer program runs on a computer, the computer is caused to execute the method provided by the embodiment shown in fig. 6 of the present application.
Embodiments of the present application also provide a computer program product, which includes a computer program, when the computer program runs on a computer, causing the computer to execute the method provided by the embodiment shown in fig. 6 of the present application.
In the embodiments of the present application, "at least one" means one or more, "a plurality" means two or more. "and/or" describes the association relationship of the associated objects, and means that there may be three relationships, for example, a and/or B, and may mean that a exists alone, a and B exist simultaneously, and B exists alone. Wherein A and B can be singular or plural. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship. "at least one of the following" and similar expressions refer to any combination of these items, including any combination of singular or plural items. For example, at least one of a, b, and c may represent: a, b, c, a and b, a and c, b and c or a and b and c, wherein a, b and c can be single or multiple.
Those of ordinary skill in the art will appreciate that the various elements and algorithm steps described in connection with the embodiments disclosed herein can be implemented as electronic hardware, computer software, or combinations of electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the several embodiments provided in the present application, any function, if implemented in the form of a software functional unit and sold or used as a separate product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
The above description is only for the specific embodiments of the present application, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present disclosure, and all the changes or substitutions should be covered by the protection scope of the present application. The protection scope of the present application shall be subject to the protection scope of the claims.

Claims (13)

1. An SRS transmission circuit, comprising: a baseband chip, a radio frequency chip, a first processing module and a second processing module, wherein,
the first output end of the baseband chip is connected with the first input end of the radio frequency chip, and the second output end of the baseband chip is connected with the second input end of the radio frequency chip; the first output end of the radio frequency chip is connected with the input end of a first processing module, the first end of the first processing module is connected with a first antenna, and the second end of the first processing module is connected with a second antenna; the second output end of the radio frequency chip is connected with the input end of a second processing module, the first end of the second processing module is connected with a third antenna, and the second end of the second processing module is connected with a fourth antenna;
the baseband chip is used for: outputting a first baseband signal through the first output terminal, and outputting a second baseband signal through the second output terminal;
the radio frequency chip is used for: converting the first baseband signal into a first radio frequency signal, and outputting the first radio frequency signal through a first output end of the radio frequency chip; converting the second baseband signal into a second radio frequency signal, and outputting the second radio frequency signal through a second output end of the radio frequency chip;
the first processing module is configured to: converting the first radio frequency signal into a third radio frequency signal, and outputting the third radio frequency signal to the first antenna or the second antenna;
the second processing module is configured to: and converting the second radio frequency signal into a fourth radio frequency signal, and outputting the fourth radio frequency signal to the third antenna or the fourth antenna.
2. The circuit of claim 1, wherein the radio frequency chip is further configured to: outputting the first radio frequency signal through a second output end of the radio frequency chip;
the second processing module is further configured to: and converting the first radio frequency signal into a fifth radio frequency signal, and outputting the fifth radio frequency signal to the third antenna or the fourth antenna.
3. The circuit of claim 1 or 2, wherein the first processing module comprises: the device comprises a first signal processing module, a first switch and a second switch; wherein,
the first end of the first signal processing module is used as the input end of the first processing module, and the second end of the first signal processing module is connected with the first end of the first switch; the second end of the first switch is used as the first end of the first processing module, and the third end of the first switch is connected with the first end of the second switch; a second end of the second switch is used as a second end of the first processing module;
the first signal processing module is configured to: in a T1R4 mode, converting the first rf signal into a third rf signal, and outputting the third rf signal to the first switch;
the first switch is used for: gating a path between the first terminal and the second terminal, or gating a path between the first terminal and the third terminal;
the second switch is used for: a path between the first terminal and the second terminal is gated.
4. The circuit of claim 3, wherein the second processing module comprises: the second signal processing module, the third switch and the fourth switch; wherein,
the first end of the second signal processing module is used as the input end of the second processing module, and the second end of the second signal processing module is connected with the first end of the third switch; the second end of the third switch is connected with the first end of the fourth switch, and the third end of the third switch is used as the second end of the second processing module; a second end of the fourth switch is used as a first end of the second processing module;
the second signal processing module is configured to: in a T1R4 mode, converting the second radio frequency signal into a fourth radio frequency signal, and outputting the fourth radio frequency signal to the third switch;
the third switch is to: gating a path between the first terminal and the second terminal, or gating a path between the first terminal and the third terminal;
the fourth switch is configured to: a path between the first terminal and the second terminal is gated.
5. The circuit of claim 3, wherein the second processing module comprises: the second signal processing module, the third switch and the fourth switch; wherein,
the first end of the second signal processing module is used as the input end of the second processing module, and the second end of the second signal processing module is connected with the first end of the third switch; the second end of the third switch is connected with the first end of the fourth switch, and the third end of the third switch is used as the second end of the second processing module; a second end of the fourth switch is used as a first end of the second processing module;
the second signal processing module is configured to: in a T1R4 mode, converting the first rf signal into a fifth rf signal, and outputting the fifth rf signal to the third switch;
the third switch is to: gating a path between the first terminal and the second terminal, or gating a path between the first terminal and the third terminal;
the fourth switch is configured to: a path between the first terminal and the second terminal is gated.
6. The circuit of claim 3, wherein the first signal processing module is independent from the first switch or integrated into one device.
7. The circuit of claim 4 or 5, wherein the second signal processing module is independent of the third switch or integrated into one device.
8. A method for transmitting SRS, comprising:
if the fact that the SRS signal is transmitted from the ith antenna is determined, acquiring ith information corresponding to the ith antenna from preset information corresponding to each antenna; the ith information includes: control parameters of a switch when the antenna i transmits the SRS signal and the SRS indicator; i is 1, 2, 3, or 4;
acquiring an SRS indicator from the ith information, and acquiring SRS processing information corresponding to the SRS indicator from processing information corresponding to each SRS indicator preset in NV, wherein the SRS processing information comprises: the processing module processes parameters of the radio frequency signals and parameters of the radio frequency chip processes baseband signals;
controlling a radio frequency chip to process the baseband signal according to the processing parameters indicated by the SRS processing information to obtain a radio frequency signal;
the control processing module processes the radio frequency signal according to the processing parameters indicated by the SRS processing information to obtain an SRS signal;
and controlling each switch to select a path according to the control parameter indicated by the ith information, and transmitting the SRS signal to the ith antenna on the selected path.
9. The method of claim 8, further comprising:
presetting ith information corresponding to an ith antenna, wherein the ith information comprises: the ith antenna corresponds to control parameters of a switch in a path and an SRS indicator;
presetting SRS processing information corresponding to each SRS indicator, wherein the SRS processing information comprises: the processing module is used for processing parameters of the radio frequency signals and processing parameters of the radio frequency chip are used for processing the baseband signals.
10. An apparatus for transmitting an SRS, comprising:
an obtaining module, configured to obtain ith information corresponding to an ith antenna from preset information corresponding to each antenna if it is determined that an SRS signal is transmitted from the ith antenna; the ith information includes: control parameters of a switch when the antenna i transmits the SRS signal and the SRS indicator; i is 1, 2, 3, or 4; acquiring an SRS indicator from the ith information, and acquiring SRS processing information corresponding to the SRS indicator from processing information corresponding to each preset SRS indicator, wherein the SRS processing information comprises: the processing module processes parameters of the radio frequency signals and parameters of the radio frequency chip processes baseband signals;
the control module is used for controlling the radio frequency chip to process the baseband signal according to the processing parameters indicated by the SRS processing information to obtain a radio frequency signal; the control processing module processes the radio frequency signal according to the processing parameters indicated by the SRS processing information to obtain an SRS signal; and controlling each switch to select a path according to the control parameter indicated by the ith information, and transmitting the SRS signal to the ith antenna on the selected path.
11. A chip module comprising the circuit of any one of claims 1 to 7.
12. A chip module comprising the apparatus of claim 10.
13. A computer-readable storage medium, in which a computer program is stored which, when run on a computer, causes the computer to carry out the method according to claim 8 or 9.
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