CN113258659A - Charging circuit - Google Patents
Charging circuit Download PDFInfo
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- CN113258659A CN113258659A CN202110580305.4A CN202110580305A CN113258659A CN 113258659 A CN113258659 A CN 113258659A CN 202110580305 A CN202110580305 A CN 202110580305A CN 113258659 A CN113258659 A CN 113258659A
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- 230000009467 reduction Effects 0.000 description 8
- 235000008429 bread Nutrition 0.000 description 5
- 230000006872 improvement Effects 0.000 description 5
- 230000009286 beneficial effect Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000004134 energy conservation Methods 0.000 description 4
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/02—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries for charging batteries from ac mains by converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/14—Arrangements for reducing ripples from dc input or output
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J2207/00—Indexing scheme relating to details of circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J2207/20—Charging or discharging characterised by the power electronics converter
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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- Power Engineering (AREA)
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Abstract
The present disclosure provides a charging circuit. The charging circuit comprises a driving control circuit, a power factor correction circuit, a level conversion circuit and a resonant switch circuit; the drive control circuit is respectively connected with the power factor correction circuit, the level conversion circuit and the resonance switch circuit; the level conversion circuit is connected between the power factor correction circuit and the resonance switch circuit, and is used for adjusting the output voltage of the power factor correction circuit and providing the adjusted voltage for the resonance switch circuit.
Description
Technical Field
The present disclosure relates to electronic circuits, and more particularly, to a charging circuit.
Background
The current commonly used charger circuit topology is shown in fig. 1, a Power frequency alternating current is rectified by a rectifying circuit to be a steamed bread wave, a high-voltage direct current is output by an active PFC (Power Factor Correction) circuit, and the high-voltage direct current is reduced by a rear-stage resonant switch circuit and then is supplied to a load or a battery for charging. In the process, the active PFC circuit outputs constant high voltage, and the voltage and the constant current are stabilized through the resonant switching circuit at the rear stage. When the charger is fully loaded and output, the charger can achieve ideal charging efficiency. However, when the charger outputs a light load, the charging efficiency of the charger may be reduced. Therefore, it is necessary to provide a new charging circuit to improve the charging efficiency.
Disclosure of Invention
It is an object of the present disclosure to provide a new charging circuit to improve charging efficiency.
According to a first aspect of the present disclosure, a charging circuit is provided. The charging circuit comprises a driving control circuit, a power factor correction circuit, a level conversion circuit and a resonant switch circuit; the drive control circuit is respectively connected with the power factor correction circuit, the level conversion circuit and the resonance switch circuit; the level conversion circuit is connected between the power factor correction circuit and the resonance switch circuit, and is used for adjusting the output voltage of the power factor correction circuit and providing the adjusted voltage for the resonance switch circuit.
Optionally, the power factor correction circuit includes a Boost circuit, where the Boost circuit includes a first inductor, a first MOS transistor, and a diode;
the first end of the first inductor is connected with the positive electrode of the preceding stage power supply;
the drain electrode of the first MOS tube is connected with the second end of the first inductor, and the source electrode of the first MOS tube is connected with the negative electrode of the preceding stage power supply;
the anode of the diode is connected with the second end of the first inductor;
the level conversion circuit is connected between the cathode of the diode and the cathode of the preceding power supply.
Optionally, the level shift circuit includes a first capacitor, a second MOS transistor, a third MOS transistor, a fourth MOS transistor, and a fifth MOS transistor; the level conversion circuit further comprises a first element, wherein the first element is an inductor or a capacitor;
the second MOS tube and the third MOS tube are connected in series between a first connection point and a second connection point;
the fourth MOS tube and the fifth MOS tube are connected in series between a second connection point and the negative electrode of the preceding stage power supply;
the first end of the first capacitor is connected with the first connection point, and the second end of the first capacitor is connected with the second connection point;
the first end of the second capacitor is connected with the second connection point, and the second end of the second capacitor is connected with the negative electrode of the preceding stage power supply;
the first end of the first element is connected with a connection point of the second MOS tube and the third MOS tube, and the second end of the first element is connected with a connection point of the fourth MOS tube and the fifth MOS tube.
Optionally, the level shift circuit is connected between a cathode of the diode and a cathode of the pre-stage power supply, and includes: the cathode of the diode is connected with the second connection point;
the resonant switch circuit is connected between the first connection point and the negative electrode of the preceding stage power supply.
Optionally, the level shift circuit is connected between a cathode of the diode and a cathode of the pre-stage power supply, and includes: the cathode of the diode is connected with the first connecting point;
the resonant switch circuit is connected between a second connection point and a negative electrode of the pre-stage power supply.
Optionally, the power factor correction circuit includes a Boost circuit, where the Boost circuit includes a first inductor, a first MOS transistor, and a diode;
the first end of the first inductor is connected with the positive electrode of the preceding stage power supply;
the anode of the diode is connected with the second end of the first inductor, and the cathode of the diode is connected with the first connecting point;
the drain electrode of the first MOS tube is connected with the second end of the first inductor, and the source electrode of the first MOS tube is connected with the second connection point;
the level conversion circuit comprises a first capacitor, a second MOS tube, a third MOS tube, a fourth MOS tube and a fifth MOS tube; the level conversion circuit further comprises a first element, wherein the first element is an inductor or a capacitor;
the second MOS tube and the third MOS tube are connected in series between a first connection point and a second connection point;
the fourth MOS tube and the fifth MOS tube are connected in series between a second connection point and the negative electrode of the preceding stage power supply;
the first end of the first capacitor is connected with the first connection point, and the second end of the first capacitor is connected with the second connection point;
the first end of the second capacitor is connected with the second connection point, and the second end of the second capacitor is connected with the negative electrode of the preceding stage power supply;
the first end of the first element is connected with a connection point of the second MOS tube and the third MOS tube, and the second end of the first element is connected with a connection point of the fourth MOS tube and the fifth MOS tube.
Optionally, the resonant switching circuit is connected between the first connection point and the negative electrode of the preceding stage power supply; or,
the resonant switch circuit is connected between a second connection point and a negative electrode of the pre-stage power supply.
Optionally, the first element is an inductor, and the level shift circuit further includes a third capacitor;
the first end of the first element is connected with the connection point of the second MOS tube and the third MOS tube, and the first element comprises: the third capacitor is connected in series between the first end of the first element and a connection point of the second MOS tube and the third MOS tube.
Optionally, the resonant switching circuit comprises: the sixth MOS tube, the seventh MOS tube and the resonant cavity;
the sixth MOS tube and the seventh MOS tube are connected in series between the first connecting point and the negative electrode of the preceding power supply, or the sixth MOS tube and the seventh MOS tube are connected in series between the second connecting point and the negative electrode of the preceding power supply;
and the resonant cavity is connected between the connection point of the sixth MOS tube and the seventh MOS tube and the negative electrode of the preceding power supply.
Optionally, the power factor correction circuit is a Boost voltage Boost circuit, and/or the resonant switching circuit is an LLC bridge resonant circuit.
Optionally, the driving control circuit is configured to adjust a duty ratio of the power factor correction circuit according to a load of the charging circuit to achieve a constant current output of the resonant switching circuit.
Optionally, the driving control circuit is configured to control a switching frequency of the resonant switching circuit to be consistent with a resonant frequency of the resonant switching circuit.
Optionally, the drive control circuit is configured to control a switching frequency of the level shift circuit to be an integral multiple of a resonant frequency of the resonant switching circuit.
Optionally, the level shift circuit includes a resonant circuit, and the driving control circuit is configured to control a switching frequency of the level shift circuit to be consistent with a resonant frequency of the level shift circuit.
The embodiment of the disclosure provides a charging circuit, wherein a level conversion circuit is added between a power factor correction circuit and a resonant switch circuit, the level conversion circuit is used for adjusting the output voltage of the power factor correction circuit, and the adjusted voltage is provided for the resonant switch circuit.
Other features of the present disclosure and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the disclosure and together with the description, serve to explain the principles of the disclosure.
Fig. 1 is a circuit diagram of a charging circuit provided in the conventional art;
fig. 2 is a block diagram of a charging circuit provided by an embodiment of the present disclosure;
fig. 3 to 10 are circuit diagrams of charging circuits provided in first to eighth embodiments of the present disclosure.
Description of reference numerals:
Lbst-a first inductance, Qbst-a first MOS transistor, Dbst-a diode; qbal1-second MOS transistor, Qbal2-third MOS transistor, Qbal3-fourth MOS transistor, Qbal4-fifth MOS transistor, Cbst1-a first capacitance, Cbst2-a second capacitance, Lbal-a second inductance, Cbal-a third capacitance; qllc1-sixth MOS transistor, Qllc2-seventh MOS transistor, Lr-a third inductance, Lm-fourth inductance, Qr-a fourth capacitance(ii) a The secondary side of the R' -transformer refracts to the primary side impedance; p1-first connection point, P2-second connection point, P3-third connection point, P4-fourth connection point, P5-fifth connection point.
Detailed Description
Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions, and numerical values set forth in these embodiments do not limit the scope of the present disclosure unless specifically stated otherwise.
The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the disclosure, its application, or uses.
Techniques and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail, but are intended to be considered a part of the specification where appropriate.
In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.
Fig. 2 is a block diagram of a charging circuit provided by an embodiment of the present disclosure. Referring to fig. 2, the present disclosure provides a charging circuit. The charging circuit comprises a driving control circuit, a power factor correction circuit, a level conversion circuit and a resonant switching circuit. The drive control circuit is respectively connected with the power factor correction circuit, the level conversion circuit and the resonant switch circuit. The level conversion circuit is connected between the power factor correction circuit and the resonance switch circuit and is used for adjusting the output voltage of the power factor correction circuit and providing the adjusted voltage for the resonance switch circuit.
The embodiment of the disclosure provides a charging circuit, wherein a level conversion circuit is added between a power factor correction circuit and a resonant switch circuit, the level conversion circuit is used for adjusting the output voltage of the power factor correction circuit, and the adjusted voltage is provided for the resonant switch circuit.
The power factor correction circuit in the embodiments of the present disclosure may be an active PFC circuit. The power factor correction circuit in the embodiments of the present disclosure may be a Boost voltage Boost circuit. The level conversion circuit in the embodiment of the present disclosure is not a PFC circuit and does not have a function of power factor correction. The resonant switching circuit in the embodiments of the present disclosure may be an LLC bridge resonant circuit, for example, the resonant switching circuit may be an LLC full-bridge resonant switching circuit or an LLC half-bridge resonant switching circuit.
In the embodiment of the disclosure, the transformation ratio of the level conversion circuit is M: N, and M and N are positive integers and different values. If M is larger than N, the level conversion circuit is a booster circuit. If M is less than N, the level conversion circuit is a voltage reduction circuit. The transformation ratio of the level conversion circuit can be determined according to actual needs, and the specific structure and connection mode of the level conversion circuit can be designed according to the transformation ratio.
In one embodiment, the resonant switching circuit requires a relatively high input voltage, the level shifter circuit is a boost circuit, the power factor correction circuit mainly performs power factor correction, and the charging circuit mainly performs boosting through the level shifter circuit to meet the requirement of the input voltage of the resonant switching circuit. In this case, the power factor correction circuit does not need to have a large gain, and the duty ratio thereof can be smaller, which is beneficial to improving the efficiency of the power factor correction circuit, thereby improving the overall efficiency of the charging circuit. Because the duty ratio of the power factor correction circuit can be smaller, the output voltage can be lower, and a main power tube in the power factor correction circuit can be a power MOS tube with lower voltage stress, thereby reducing the hardware cost.
In one embodiment, the resonant switching circuit needs a lower input voltage, and the level shift circuit is a step-down circuit, that is, the preceding power supply is power factor corrected by the power factor correction circuit and then is provided to the resonant switching circuit after being stepped down by the level shift circuit. The voltage reduction is realized by utilizing the level conversion circuit instead of arranging the Buck voltage reduction circuit behind the power factor correction circuit, the efficiency of the level conversion circuit is higher than that of the Buck voltage reduction circuit, and the overall efficiency of the charging circuit is favorably improved.
In one embodiment, the driving control circuit may output a PWM (pulse width modulation) driving signal to the power factor correction circuit. The drive control circuit adjusts the duty ratio of the PWM drive signal according to the load condition of the charging circuit, namely adjusts the duty ratio of the power factor correction circuit, so as to realize the constant current output of the resonant switching circuit.
In one embodiment, the drive control circuit may output a fixed pulse width, fixed frequency drive signal to the resonant switching circuit. The frequency of the driving signal is set according to the resonant frequency of the resonant switching circuit, so that the switching frequency of the resonant switching circuit is consistent with the resonant frequency of the resonant switching circuit. Through the mode, the resonant switch circuit works in a complete resonance state, the over-resonance condition is not easy to occur, the efficiency of the resonant switch circuit is favorably improved, the overall efficiency of the charging circuit is improved, the optimal efficiency is realized in a full-power range, and the purposes of energy conservation and efficiency improvement are realized.
In one embodiment, the level shift circuit includes a switching circuit and does not include a resonance circuit, and in this case, the drive control circuit may output the PWM drive signal to the level shift circuit. The drive control circuit adjusts the duty ratio of the PWM drive signal to ensure that the switching frequency of the level conversion circuit is unchanged. By adjusting the duty ratio of the PWM driving signal, the switching frequency of the level shift circuit can be made constant and a preset integral multiple of the resonant frequency of the resonant switching circuit. Through this kind of mode, can reduce charging circuit's ripple, promote charging circuit's stability. In one embodiment, the switching frequency of the level shifting circuit is 3 or more times the resonant frequency of the resonant switching circuit.
In one embodiment, the level shift circuit includes a switching circuit and a resonant circuit connected to the switching circuit, in which case the drive control circuit may output a fixed pulse width and fixed frequency drive signal to the level shift circuit. The frequency of the drive signal is set according to an integral multiple of the resonant frequency of the resonant switching circuit such that the switching frequency of the level shifter circuit is an integral multiple of the resonant frequency of the resonant switching circuit. Through this kind of mode, can reduce charging circuit's ripple, promote charging circuit's stability. In one embodiment, the switching frequency of the level shifting circuit is 3 or more times the resonant frequency of the resonant switching circuit.
In one embodiment, the level shift circuit includes a switching circuit and a resonant circuit connected to the switching circuit, in which case the drive control circuit may output a fixed pulse width and fixed frequency drive signal to the level shift circuit. The frequency of the driving signal is set according to the resonant frequency of the level shift circuit so that the switching frequency of the level shift circuit is the same as the resonant frequency of the level shift circuit. Through the mode, the level conversion circuit works in a resonance state, the efficiency of the level conversion circuit is favorably improved, and the overall efficiency of the charging circuit is improved.
On the basis of the hardware circuit of the charging circuit provided by the embodiment of the disclosure, better energy conservation and efficiency improvement can be realized, and the cost is reduced.
< first embodiment >
Referring to fig. 3, a charging circuit according to a first embodiment of the present disclosure is described. The power factor correction circuit is a Boost circuit, and the resonant switching circuit is an LLC bridge resonant circuit.
The charging circuit includes a Boost voltage Boost circuit 200, a level conversion circuit 300, and an LLC bridge resonant circuit 400. The level shift circuit 300 is connected between the Boost voltage Boost circuit 200 and the LLC bridge resonant circuit 400, and is configured to adjust an output voltage of the Boost voltage Boost circuit 200 and provide the adjusted voltage to the LLC bridge resonant circuit 400.
The charging circuit further comprises a driving control circuit, and the driving control circuit is respectively connected with the Boost voltage boosting circuit 200, the level conversion circuit 300 and the LLC bridge resonant circuit 400 so as to respectively drive and control the Boost voltage boosting circuit 200, the level conversion circuit 300 and the LLC bridge resonant circuit 400.
The previous power Vin supplied to the Boost circuit 200 may be from a rectifier circuit 100 disposed at a previous stage, specifically, the rectifier circuit 100 rectifies the power frequency ac power into a steamed bread power and supplies the steamed bread power to the Boost circuit 200, and the rectifier circuit 100 may be a full-bridge rectifier circuit, for example. The negative pole of the preceding power Vin is the ground terminal.
Boost voltage-up circuit 200 includes a first inductor LbstA first MOS transistor QbstAnd a diode Dbst. First inductance LbstFirst terminal and preceding stage power supply VinIs connected to the positive electrode. First MOS transistor QbstDrain electrode of and first inductor LbstIs connected with the second end, and the source electrode is connected with a preceding power supply VinThe first MOS transistor may be a P-channel MOS transistor. Diode DbstPositive pole and first inductance LbstIs connected to the second terminal of diode DbstIs connected to the second connection point P2.
The level shift circuit 300 is connected to the diode DbstAnd the negative electrode of the preceding power source Vin. The level shift circuit 300 includes a first capacitor Cbst1A second capacitor Cbst2A second MOS transistor Qbal1And a third MOS transistor Qbal2And a fourth MOS transistor Qbal3And a fifth MOS transistor Qbal4A second inductor LbalAnd a third capacitor Cbal. Second MOS transistor Qbal1And a third MOS transistor Qbal2Is connected in series between the first connection point P1 and the second connection point P2, and the voltage of the first connection point P1 is marked as VOThe voltage at the second connection point P2 is denoted as Vbst. Specifically, the second MOS transistor Qbal1Is connected with a first connection point P1, and a second MOS transistor Qbal1Source electrode of and third MOS transistor Qbal2Is connected to the drain of the third MOS transistor Qbal2Is connected with a second connection point P2, and a second MOS transistor Qbal1And a third MOS transistor Qbal2Can be a P-channel MOS tube. Fourth MOS transistor Qbal3And a firstFive MOS tubes Qbal4Connected in series between the second connection point P2 and the negative pole of the preceding power Vin, and specifically, the fourth MOS transistor Qbal3Is connected with a second connection point P2, and a fourth MOS transistor Qbal3Source electrode of and fifth MOS transistor Qbal4Is connected to the drain of the fifth MOS transistor Qbal4Is connected with the cathode of the preceding power Vin, and a fourth MOS tube Qbal3And a fifth MOS transistor Qbal4Can be a P-channel MOS tube. A first capacitor Cbst1Is connected with the first connection point P1 and the second connection point P2. Second capacitor Cbst2Is connected to the second connection point P2, and the second end is connected to the negative electrode of the front stage power source Vin. Third capacitor CbalIs connected to a third connection point P3, a third capacitor CbalSecond terminal and second inductor LbalIs connected to the first terminal of a second inductor LbalIs connected with a fourth connection point P4, the third connection point P3 is a second MOS transistor Qbal1And a third MOS transistor Qbal2The fourth connection point P4 is the fourth MOS transistor Qbal3And a fifth MOS transistor Qbal4The connection point between them. Third capacitor CbalAnd a second inductance LbalAn LC series resonant circuit is formed.
The LLC bridge resonant circuit 400 is connected between the first connection point P1 and the negative pole of the front stage power source Vin. LLC bridge resonant circuit 400 includes: sixth MOS transistor Qllc1And a seventh MOS transistor Qllc2And a resonant cavity 401. Sixth MOS transistor Qllc1And a seventh MOS transistor Qllc2Is connected in series between the output terminal of the level shift circuit 300 and the negative electrode of the previous power Vin, and the voltage at the output terminal of the level shift circuit 300 is recorded as VOUTThat is, the LLC bridge resonant circuit 400 has an input voltage VOUT. In the first embodiment, the output terminal V of the level shift circuit 300OUTIs a first connection point P1, specifically, a sixth MOS transistor Qllc1Is connected with the first connection point P1, and a sixth MOS transistor Qllc1Source electrode of and seventh MOS transistor Qllc2Is connected to the drain of the seventh MOS transistor Qllc2Is connected with the negative electrode of the preceding power Vin, and a sixth MOS transistor Qllc1And a seventh MOS transistor Qllc2Can be a P-channel MOS tube. The resonant cavity 401 includes a third inductance LrA fourth inductor LmAnd a fourth capacitor QrThird inductance LrIs a resonant inductor, a fourth capacitor QrIs a resonant capacitor, a fourth inductor LmIs an excitation inductance. Third inductance LrIs connected to the fifth connection point P5, a fourth capacitor QrIs connected to the negative pole of the preceding power Vin. Fourth inductor LmIs connected in series with the third inductor LrSecond terminal and fourth capacitor QrBetween the second ends of the first and second MOS transistors Q, and a fifth connection point P5 is a sixth MOS transistor Qllc1And a seventh MOS transistor Qllc2The connection point between them. R' is the equivalent impedance of the secondary of the transformer refracted to the primary.
And the drive control circuit outputs corresponding drive signals to the gates of the first MOS transistor to the seventh MOS transistor. In the first embodiment, the level shifter 300 is a voltage booster, and the conversion ratio of the level shifter 300 is 1:2, i.e. Vbst and VOUTThe ratio of (A) to (B) is 1: 2.
In the first embodiment, the LLC bridge resonant circuit 400 needs a higher input voltage, the level conversion circuit 300 is a Boost circuit, the Boost circuit 200 mainly functions to correct the power factor, and the charging circuit mainly performs boosting through the level conversion circuit 300 to meet the requirement for the input voltage of the LLC bridge resonant circuit 400. In this case, the Boost voltage Boost circuit 200 does not need to have a large gain, and the duty ratio thereof may be relatively small, which is advantageous to improve the efficiency of the Boost voltage Boost circuit 200, thereby improving the overall efficiency of the charging circuit. Because the duty ratio of the Boost circuit 200 can be relatively small, the output voltage can be relatively low, and the first MOS transistor Q in the Boost circuit 200bstThe power mos tube with lower voltage stress can be selected, so that the hardware cost is reduced.
In the first embodiment, the drive control circuit may output the PWM drive signal to the Boost voltage boosting circuit 200. The drive control circuit adjusts the duty ratio of the PWM drive signal according to the load condition of the charging circuit to affect the output voltage of the Boost voltage circuit 200, thereby realizing the constant current output of the LLC bridge resonant circuit 400.
In the first embodiment, the driving control circuit may output a driving signal with a fixed pulse width and a fixed frequency to the LLC bridge resonant circuit 400. The frequency of the driving signal input to the LLC bridge resonant circuit 400 is set according to the resonant frequency of the LLC bridge resonant circuit 400, so that the switching frequency of the LLC bridge resonant circuit 400 coincides with the resonant frequency of the LLC bridge resonant circuit 400. Through the mode, the LLC bridge resonant circuit 400 works in a complete resonance state, the over-resonance condition is not easy to occur, the efficiency of the LLC bridge resonant circuit 400 is favorably improved, the overall efficiency of the charging circuit is improved, the optimal efficiency is realized in a full-power range, and the purposes of energy conservation and efficiency improvement are realized.
In the first embodiment, the driving control circuit may output two driving signals with fixed pulse width and fixed frequency to the level shifter circuit 300. Wherein, the first path of driving signal is respectively input to the second MOS transistor Qbal1Gate of and fourth MOS transistor Qbal3The second path of driving signal opposite to the first path of driving signal is respectively input to the third MOS tube Qbal2Grid and fifth MOS tube Qbal4The second MOS transistor Qbal1And a fourth MOS transistor Qbal3Simultaneously on/off, third MOS transistor Qbal2And a fifth MOS transistor Qbal4And simultaneously turned on/off. The frequency of the driving signal input to the level shifter circuit 300 is set according to an integral multiple of the resonance frequency of the LLC bridge resonant circuit 400, so that the switching frequency of the level shifter circuit 300 is an integral multiple of the resonance frequency of the LLC bridge resonant circuit 400. Through this kind of mode, can reduce charging circuit's ripple, promote charging circuit's stability. In one embodiment, the switching frequency of level shifter circuit 300 is 3 or more times the resonant frequency of LLC bridge resonant circuit 400.
In the first embodiment, the driving control circuit may output a driving signal of a fixed pulse width and a fixed frequency to the level shift circuit 300. The frequency of the driving signal input to the level shifter circuit 300 is set according to the resonance frequency of the level shifter circuit 300 so that the switching frequency of the level shifter circuit 300 is the same as the resonance frequency of the level shifter circuit 300. In this way, the level shift circuit 300 operates in a resonant state, which is beneficial to improving the efficiency of the level shift circuit 300, and thus improving the overall efficiency of the charging circuit.
< second embodiment >
Referring to fig. 4, a charging circuit according to a second embodiment of the present disclosure is described.
The second embodiment is similar to the first embodiment as shown in fig. 4 and 3, and the description thereof will not be repeated. The second embodiment differs from the first embodiment in that: in the second embodiment, the diode DbstIs connected to the first connection point P1, and the LLC bridge resonant circuit 400 is connected between the second connection point P2 and the negative terminal of the preceding power Vin. Specifically, the sixth MOS transistor Qllc1Is connected with the second connection point P2, and a sixth MOS transistor Qllc1Source electrode of and seventh MOS transistor Qllc2Is connected to the drain of the seventh MOS transistor Qllc2Is connected to the negative pole of the preceding power Vin.
And the drive control circuit outputs corresponding drive signals to the gates of the first MOS transistor to the seventh MOS transistor. In the second embodiment, the level shifter 300 is a voltage-dropping circuit, and the conversion ratio of the level shifter 300 is 2:1, i.e. Vbst and VOUTThe ratio of (A) to (B) is 2: 1.
In the second embodiment, the LLC bridge resonant circuit 400 requires a lower input voltage, and the level shifter circuit 300 is a step-down circuit, i.e. a front-stage power supply VinThe supplied voltage is boosted by the Boost voltage circuit 200 and then reduced by the level shifter circuit 300 before being supplied to the LLC bridge resonant circuit 400. The second embodiment utilizes the level conversion circuit 300 to realize voltage reduction, instead of arranging a Buck voltage reduction circuit behind the Boost voltage boosting circuit 200 to realize voltage reduction, the efficiency of the level conversion circuit 300 is higher than that of the Buck voltage reduction circuit, which is beneficial to improving the overall efficiency of the charging circuit.
< third embodiment >
Next, referring to fig. 5, a charging circuit provided in a third embodiment of the present disclosure is described. The power factor correction circuit is a Boost circuit, and the resonant switching circuit is an LLC bridge resonant circuit.
The charging circuit includes a Boost voltage Boost circuit 200, a level conversion circuit 300, and an LLC bridge resonant circuit 400. The level shift circuit 300 is connected between the Boost voltage Boost circuit 200 and the LLC bridge resonant circuit 400, and is configured to adjust an output voltage of the Boost voltage Boost circuit 200 and provide the adjusted voltage to the LLC bridge resonant circuit 400.
The charging circuit further comprises a driving control circuit, and the driving control circuit is respectively connected with the Boost voltage boosting circuit 200, the level conversion circuit 300 and the LLC bridge resonant circuit 400 so as to respectively drive and control the Boost voltage boosting circuit 200, the level conversion circuit 300 and the LLC bridge resonant circuit 400.
The previous power Vin supplied to the Boost circuit 200 may be from a rectifier circuit 100 disposed at a previous stage, specifically, the rectifier circuit 100 rectifies the power frequency ac power into a steamed bread power and supplies the steamed bread power to the Boost circuit 200, and the rectifier circuit 100 may be a full-bridge rectifier circuit, for example. The negative pole of the preceding power Vin is the ground terminal.
Boost voltage-up circuit 200 includes a first inductor LbstA first MOS transistor QbstAnd a diode Dbst. First inductance LbstFirst terminal and preceding stage power supply VinIs connected to the positive electrode. First MOS transistor QbstDrain electrode of and first inductor LbstThe source is connected with the second connection point P2, and the first MOS transistor may be a P-channel MOS transistor. Diode DbstPositive pole and first inductance LbstIs connected to the second terminal of diode DbstIs connected to the first connection point P1.
The level shift circuit 300 includes a first capacitor Cbst1A second capacitor Cbst2A second MOS transistor Qbal1And a third MOS transistor Qbal2And a fourth MOS transistor Qbal3And a fifth MOS transistor Qbal4A second inductor LbalAnd a third capacitor Cbal. Second MOS transistor Qbal1And a third MOS transistor Qbal2Is connected in series between the first connection point P1 and the second connection point P2, and the voltage of the first connection point P1 is marked as VOThe voltage at the second connection point P2 is denoted as Vbst. Specifically, the second MOS transistor Qbal1Is connected with a first connection point P1, and a second MOS transistor Qbal1Source electrode of and third MOS transistor Qbal2Is connected to the drain of the third MOS transistor Qbal2Is connected with a second connection point P2, and a second MOS transistor Qbal1And a third MOS transistor Qbal2Can be a P-channel MOS tube. Fourth MOS transistor Qbal3And a fifth MOS transistor Qbal4Connected in series between the second connection point P2 and the negative pole of the preceding power Vin, and specifically, the fourth MOS transistor Qbal3Is connected with a second connection point P2, and a fourth MOS transistor Qbal3Source electrode of and fifth MOS transistor Qbal4Is connected to the drain of the fifth MOS transistor Qbal4Is connected with the cathode of the preceding power Vin, and a fourth MOS tube Qbal3And a fifth MOS transistor Qbal4Can be a P-channel MOS tube. A first capacitor Cbst1Is connected with the first connection point P1 and the second connection point P2. A first capacitor Cbst1Is connected with the first connection point P1 and the second connection point P2. Second capacitor Cbst2Is connected to the second connection point P2, and the second end is connected to the negative electrode of the front stage power source Vin. Third capacitor CbalIs connected to a third connection point P3, a third capacitor CbalSecond terminal and second inductor LbalIs connected to the first terminal of a second inductor LbalIs connected with a fourth connection point P4, the third connection point P3 is a second MOS transistor Qbal1And a third MOS transistor Qbal2The fourth connection point P4 is the fourth MOS transistor Qbal3And a fifth MOS transistor Qbal4The connection point between them. Third capacitor CbalAnd a second inductance LbalAn LC series resonant circuit is formed.
The LLC bridge resonant circuit 400 is connected between the first connection point P1 and the negative pole of the front stage power source Vin. LLC bridge resonant circuit 400 includes: sixth MOS transistor Qllc1And a seventh MOS transistor Qllc2And a resonant cavity 401. Sixth MOS transistor Qllc1And a seventh MOS transistor Qllc2Is connected in series between the output terminal of the level shift circuit 300 and the negative electrode of the previous power Vin, and the voltage at the output terminal of the level shift circuit 300 is recorded as VOUTThat is, the LLC bridge resonant circuit 400 has an input voltage VOUT. In this third embodiment, electricityOutput terminal V of flat conversion circuit 300OUTIs a first connection point P1, specifically, a sixth MOS transistor Qllc1Is connected with the first connection point P1, and a sixth MOS transistor Qllc1Source electrode of and seventh MOS transistor Qllc2Is connected to the drain of the seventh MOS transistor Qllc2Is connected with the negative electrode of the preceding power Vin, and a sixth MOS transistor Qllc1And a seventh MOS transistor Qllc2Can be a P-channel MOS tube. The resonant cavity 401 includes a third inductance LrA fourth inductor LmAnd a fourth capacitor QrThird inductance LrIs a resonant inductor, a fourth capacitor QrIs a resonant capacitor, a fourth inductor LmIs an excitation inductance. Third inductance LrIs connected to the fifth connection point P5, a fourth capacitor QrIs connected to the negative pole of the preceding power Vin. Fourth inductor LmIs connected in series with the third inductor LrSecond terminal and fourth capacitor QrBetween the second ends of the first and second MOS transistors Q, and a fifth connection point P5 is a sixth MOS transistor Qllc1And a seventh MOS transistor Qllc2The connection point between them. R' is the equivalent impedance of the secondary of the transformer refracted to the primary.
And the drive control circuit outputs corresponding drive signals to the gates of the first MOS transistor to the seventh MOS transistor. In the third embodiment, the level shifter 300 is a voltage booster, and the conversion ratio of the level shifter 300 is (1-D/2):1, i.e. Vbst and VOUTThe ratio of (1-D/2) to (1), D is the duty ratio of the PWM driving signal input to the Boost circuit 200. In the third embodiment, D may be in the range of (0,1), and the ratio of the level shift circuit 300 may be in the range of (0.5, 1).
In the third embodiment, the LLC bridge resonant circuit 400 needs a higher input voltage, the level conversion circuit 300 is a Boost circuit, the Boost circuit 200 mainly functions to correct the power factor, and the charging circuit mainly performs boosting through the level conversion circuit 300 to meet the requirement for the input voltage of the LLC bridge resonant circuit 400. In this case, the Boost voltage Boost circuit 200 does not need to have a large gain, and the duty ratio thereof may be relatively small, which is advantageous to improve the efficiency of the Boost voltage Boost circuit 200, thereby improving the overall efficiency of the charging circuit. Due to Boost of Boost circuit 200The duty ratio can be relatively small, the output voltage can be relatively low, and the first MOS transistor Q in the Boost voltage-up circuit 200bstThe power mos tube with lower voltage stress can be selected, so that the hardware cost is reduced.
In the third embodiment, the drive control circuit may output the PWM drive signal to the Boost voltage boosting circuit 200. The drive control circuit adjusts the duty ratio of the PWM drive signal according to the load condition of the charging circuit to affect the output voltage of the Boost voltage circuit 200, thereby realizing the constant current output of the LLC bridge resonant circuit 400.
In the third embodiment, the driving control circuit may output a driving signal with a fixed pulse width and a fixed frequency to the LLC bridge resonant circuit 400. The frequency of the driving signal input to the LLC bridge resonant circuit 400 is set according to the resonant frequency of the LLC bridge resonant circuit 400, so that the switching frequency of the LLC bridge resonant circuit 400 coincides with the resonant frequency of the LLC bridge resonant circuit 400. Through the mode, the LLC bridge resonant circuit 400 works in a complete resonance state, the over-resonance condition is not easy to occur, the efficiency of the LLC bridge resonant circuit 400 is favorably improved, the overall efficiency of the charging circuit is improved, the optimal efficiency is realized in a full-power range, and the purposes of energy conservation and efficiency improvement are realized.
In the third embodiment, the driving control circuit may output two driving signals with fixed pulse width and fixed frequency to the level shifter circuit 300. Wherein, the first path of driving signal is respectively input to the second MOS transistor Qbal1Gate of and fourth MOS transistor Qbal3The second path of driving signal opposite to the first path of driving signal is respectively input to the third MOS tube Qbal2Grid and fifth MOS tube Qbal4The second MOS transistor Qbal1And a fourth MOS transistor Qbal3Simultaneously on/off, third MOS transistor Qbal2And a fifth MOS transistor Qbal4And simultaneously turned on/off. The frequency of the driving signal input to the level shifter circuit 300 is set according to an integral multiple of the resonance frequency of the LLC bridge resonant circuit 400, so that the switching frequency of the level shifter circuit 300 is an integral multiple of the resonance frequency of the LLC bridge resonant circuit 400. In this way, ripple of the charging circuit can be reduced, and stability of the charging circuit is improvedAnd (4) sex. In one embodiment, the switching frequency of level shifter circuit 300 is 3 or more times the resonant frequency of LLC bridge resonant circuit 400.
In the third embodiment, the drive control circuit may output a drive signal of a fixed pulse width and a fixed frequency to the level shift circuit 300. The frequency of the driving signal input to the level shifter circuit 300 is set according to the resonance frequency of the level shifter circuit 300 so that the switching frequency of the level shifter circuit 300 is the same as the resonance frequency of the level shifter circuit 300. In this way, the level shift circuit 300 operates in a resonant state, which is beneficial to improving the efficiency of the level shift circuit 300, and thus improving the overall efficiency of the charging circuit.
< fourth embodiment >
Next, referring to fig. 6, a charging circuit provided in a fourth embodiment of the present disclosure is described.
The fourth embodiment is similar to the third embodiment as shown in fig. 6 and 5, and the description thereof will not be repeated. The fourth embodiment differs from the third embodiment in that: in the fourth embodiment, the LLC bridge resonant circuit 400 is connected between the second connection point P2 and the negative electrode of the front-stage power source Vin. Specifically, the sixth MOS transistor Qllc1Is connected with the second connection point P2, and a sixth MOS transistor Qllc1Source electrode of and seventh MOS transistor Qllc2Is connected to the drain of the seventh MOS transistor Qllc2Is connected to the negative pole of the preceding power Vin.
And the drive control circuit outputs corresponding drive signals to the gates of the first MOS transistor to the seventh MOS transistor. In the fourth embodiment, the level shifter 300 is a step-down circuit, and the conversion ratio of the level shifter 300 is (2-D):1, i.e., Vbst and VOUTThe ratio of (2-D) to (1), D is the duty ratio of the PWM drive signal input to the Boost voltage-boosting circuit 200. In the fourth embodiment, the range of D may be (0,1), and the range of the ratio of the level shift circuit 300 is (1, 2).
< fifth embodiment >
Fig. 7 is a charging circuit according to a fifth embodiment of the present disclosure, which is similar to the first embodiment shown in fig. 3 and will not be described again, except that: level of electricityThe third capacitor C is omitted from the conversion circuit 300balSecond inductance LbalIs directly connected to the third connection point P3.
< sixth embodiment >
Fig. 8 is a charging circuit according to a sixth embodiment of the present disclosure, which is similar to the second embodiment shown in fig. 4, and the difference is that: the third capacitor C is omitted from the level shift circuit 300balSecond inductance LbalIs directly connected to the third connection point P3.
< seventh embodiment >
Fig. 9 is a charging circuit according to a seventh embodiment of the present disclosure, which is similar to the third embodiment shown in fig. 5, and the difference is that: the third capacitor C is omitted from the level shift circuit 300balSecond inductance LbalIs directly connected to the third connection point P3.
< eighth embodiment >
Fig. 10 is a charging circuit according to an eighth embodiment of the present disclosure, and the similarities with the fourth embodiment shown in fig. 6 are not repeated, except that: the third capacitor C is omitted from the level shift circuit 300balSecond inductance LbalIs directly connected to the third connection point P3.
With the fifth to eighth embodiments, the level shift circuit does not include a resonance circuit therein, in which case the drive control circuit may output the PWM drive signal to the level shift circuit. The drive control circuit adjusts the duty ratio of the PWM drive signal to ensure that the switching frequency of the level conversion circuit is unchanged. By adjusting the duty ratio of the PWM driving signal, the switching frequency of the level shifter circuit can be made constant and be a preset integral multiple of the resonant frequency of the LLC bridge resonant circuit. Through this kind of mode, can reduce charging circuit's ripple, promote charging circuit's stability. In one embodiment, the switching frequency of the level shifter circuit is 3 or more times the resonant frequency of the LLC bridge resonant circuit.
For the fifth to eighth embodiments, the second inductor LbalCapacitors may be substituted. In the second inductor LbalIn the case of replacing the capacitor, the drive control circuit may output the PWM drive signal to the level conversion circuit. The drive control circuit adjusts the duty ratio of the PWM drive signal to ensure that the switching frequency of the level conversion circuit is unchanged. By adjusting the duty ratio of the PWM driving signal, the switching frequency of the level shifter circuit can be made constant and be a preset integral multiple of the resonant frequency of the LLC bridge resonant circuit. Through this kind of mode, can reduce charging circuit's ripple, promote charging circuit's stability. In one embodiment, the switching frequency of the level shifter circuit is 3 or more times the resonant frequency of the LLC bridge resonant circuit.
In the disclosed embodiment, the second inductance LbalAnd a third capacitance CbalIs referred to as a first element. The level shift circuit provided by the embodiment of the disclosure may also include a second inductor LbalAnd a third capacitance CbalAnd both constitute an LC series resonant circuit. The level shift circuit provided by the embodiment of the present disclosure may also be provided with only the first element, that is, only the second inductor LbalAnd a third capacitance CbalOne of them. These are all implementations of level shifting circuits.
The embodiment of the disclosure also provides a charger. The charger comprises the charging circuit provided by any one of the previous embodiments. The charger may be provided with a power chip, and the power chip is provided with the drive control circuit and is configured to output corresponding drive signals to the MOS transistors.
The drive control circuit and the power supply chip in the embodiment of the disclosure can be internally provided with a processor and a memory, the memory stores instructions, and the processor can run the instructions to realize control management of the work of the charging circuit.
The embodiments in this specification are described in a progressive manner, and the same and similar parts among the embodiments can be referred to each other. In some cases, the actions or steps recited in an embodiment may be performed in a different order than in the embodiment and still achieve desirable results. The computer readable storage medium may be a tangible device that can hold and store the instructions for use by the instruction execution device.
The computer program instructions for carrying out operations of the present invention may be assembler instructions, Instruction Set Architecture (ISA) instructions, machine-related instructions, microcode, firmware instructions, state setting data, or source or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. In some embodiments, aspects of the present invention are implemented by personalizing an electronic circuit, such as a programmable logic circuit, a Field Programmable Gate Array (FPGA), or a Programmable Logic Array (PLA), with state information of computer-readable program instructions, which can execute the computer-readable program instructions.
Having described embodiments of the present invention, the foregoing description is intended to be exemplary, not exhaustive, and not limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope of the described embodiments. The terminology used herein is chosen in order to best explain the principles of the embodiments, the practical application, or improvements made to the technology in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein. The scope of the invention is defined by the appended claims.
Claims (14)
1. A charging circuit is characterized by comprising a driving control circuit, a power factor correction circuit, a level conversion circuit and a resonant switch circuit;
the drive control circuit is respectively connected with the power factor correction circuit, the level conversion circuit and the resonance switch circuit;
the level conversion circuit is connected between the power factor correction circuit and the resonance switch circuit, and is used for adjusting the output voltage of the power factor correction circuit and providing the adjusted voltage for the resonance switch circuit.
2. The charging circuit of claim 1, wherein the power factor correction circuit comprises a Boost circuit comprising a first inductance (L)bst) A first MOS transistor (Q)bst) And a diode (D)bst);
The first inductance (L)bst) First terminal and preceding stage power supply (V)in) The positive electrode of (1) is connected;
the first MOS transistor (Q)bst) And the first inductor (L)bst) Is connected to the second terminal of the first power supply, and the source is connected to the preceding power supply (V)in) The negative electrode of (1) is connected;
the diode (D)bst) And the first inductor (L)bst) Is connected with the second end of the first end;
the level conversion circuit is connected to the diode (D)bst) And the negative electrode of the preceding power supply (Vin).
3. A charging circuit according to claim 2, characterized in that the level shifting circuit comprises a first capacitance (C)bst1) A second capacitor (C)bst2) And a second MOS transistor (Q)bal1) And a third MOS transistor (Q)bal2) And a fourth MOS transistor (Q)bal3) And a fifth MOS transistor (Q)bal4) (ii) a The level conversion circuit further comprises a first element, wherein the first element is an inductor or a capacitor;
the second MOS transistor (Q)bal1) And the third MOS transistor (Q)bal2) Connected in series between the first connection point and the second connection point;
the fourth MOS transistor (Q)bal3) And the fifth MOS transistor (Q)bal4) Is connected in series between a second connection point and the negative pole of the preceding power supply (Vin);
the first capacitor (C)bst1) The first end of the first connecting rod is connected with the first connecting point, and the second end of the first connecting rod is connected with the second connecting point;
the second capacitance (C)bst2) First end and second end ofThe second connection point is connected, and the second end is connected with the negative electrode of the preceding stage power supply (Vin);
a first end of the first element and a second MOS transistor (Q)bal1) And a third MOS transistor (Q)bal2) Is connected with the connection point (P3), and the second end is connected with the fourth MOS tube (Q)bal3) And a fifth MOS transistor (Q)bal4) Is connected to the connection point (P4).
4. A charging circuit according to claim 3, characterized in that the level shift circuit is connected to the diode (D)bst) And a negative electrode of the preceding power supply (Vin), comprising: the diode (D)bst) Is connected with the second connection point;
the resonant switching circuit is connected between a first connection point and a negative electrode of the preceding power supply (Vin).
5. A charging circuit according to claim 3, characterized in that the level shift circuit is connected to the diode (D)bst) And a negative electrode of the preceding power supply (Vin), comprising: the diode (D)bst) The negative electrode of the first connecting point is connected with the first connecting point;
the resonant switch circuit is connected between a second connection point and a negative pole of the preceding stage power supply (Vin).
6. The charging circuit of claim 1, wherein the power factor correction circuit comprises a Boost circuit comprising a first inductance (L)bst) A first MOS transistor (Q)bst) And a diode (D)bst);
The first inductance (L)bst) First terminal and preceding stage power supply (V)in) The positive electrode of (1) is connected;
the diode (D)bst) And the first inductor (L)bst) The negative electrode is connected with the first connecting point;
the first MOS transistor (Q)bst) And the first inductor (L)bst) Is connected to the second terminal, the source electrode is connected to the second terminalConnecting points;
the level shift circuit comprises a first capacitor (C)bst1) A second capacitor (C)bst2) And a second MOS transistor (Q)bal1) And a third MOS transistor (Q)bal2) And a fourth MOS transistor (Q)bal3) And a fifth MOS transistor (Q)bal4) (ii) a The level conversion circuit further comprises a first element, wherein the first element is an inductor or a capacitor;
the second MOS transistor (Q)bal1) And the third MOS transistor (Q)bal2) Connected in series between the first connection point and the second connection point;
the fourth MOS transistor (Q)bal3) And the fifth MOS transistor (Q)bal4) Is connected in series between a second connection point and the negative pole of the preceding power supply (Vin);
the first capacitor (C)bst1) The first end of the first connecting rod is connected with the first connecting point, and the second end of the first connecting rod is connected with the second connecting point;
the second capacitance (C)bst2) Is connected with a second connection point, and a second end is connected with the negative electrode of the preceding power supply (Vin);
a first end of the first element and a second MOS transistor (Q)bal1) And a third MOS transistor (Q)bal2) Is connected with the connection point (P3), and the second end is connected with the fourth MOS tube (Q)bal3) And a fifth MOS transistor (Q)bal4) Is connected to the connection point (P4).
7. A charging circuit according to claim 6, characterized in that the resonant switching circuit is connected between a first connection point and the negative pole of the preceding power supply (Vin); or,
the resonant switch circuit is connected between a second connection point and a negative pole of the preceding stage power supply (Vin).
8. A charging circuit according to any of claims 3-7, characterized in that the first component is an inductor and the level shifter circuit further comprises a third capacitor (C)bal);
A first end of the first element and a second MOS transistor (Q)bal1) And a third MOS transistor (Q)bal2) Is connected with the connection point (P3)The method comprises the following steps: the third capacitance (C)bal) A second MOS transistor (Q) connected in series with the first end of the first elementbal1) And a third MOS transistor (Q)bal2) Between the connection points (P3).
9. The charging circuit of any of claims 3-7, wherein the resonant switching circuit comprises: sixth MOS transistor (Q)llc1) And a seventh MOS transistor (Q)llc2) And a resonant cavity;
the sixth MOS transistor (Q)llc1) And a seventh MOS transistor (Q)llc2) Is connected in series between the first connection point and the negative electrode of the preceding power supply (Vin), or the sixth MOS transistor (Q)llc1) And a seventh MOS transistor (Q)llc2) Is connected in series between a second connection point and the negative pole of the preceding power supply (Vin);
the resonant cavity is connected to the sixth MOS transistor (Q)llc1) And a seventh MOS transistor (Q)llc2) And a negative electrode of the preceding power supply (Vin).
10. The charging circuit according to claim 1, wherein the power factor correction circuit is a Boost circuit, and/or the resonant switching circuit is an LLC bridge resonant circuit.
11. The charging circuit according to any one of claims 1 to 10, wherein the driving control circuit is configured to adjust a duty cycle of the power factor correction circuit according to a load of the charging circuit to achieve a constant current output of the resonant switching circuit.
12. The charging circuit according to any one of claims 1 to 10, wherein the drive control circuit is configured to control a switching frequency of the resonant switching circuit to coincide with a resonant frequency of the resonant switching circuit.
13. The charging circuit according to any one of claims 1 to 10, wherein the driving control circuit is configured to control the switching frequency of the level shift circuit to be an integral multiple of the resonant frequency of the resonant switching circuit.
14. The charging circuit according to any one of claims 1 to 10, wherein the level shift circuit includes a resonant circuit, and the driving control circuit is configured to control a switching frequency of the level shift circuit to be consistent with a resonant frequency of the level shift circuit.
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