CN113242188A - Microwave channel full-switching network construction method, control method and coding and decoding method - Google Patents
Microwave channel full-switching network construction method, control method and coding and decoding method Download PDFInfo
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Abstract
The invention discloses a microwave channel full-switching network construction method, a control method and a coding and decoding method, which comprise the following steps: s1, designing an input network, carrying out binary tree mesh expansion on each port in the ports on the input side, and ending the expansion until a plurality of terminal nodes are generated; s2, designing an output network, performing binary tree mesh expansion on each port of the output side port by using a switch, and ending the expansion until a plurality of terminal nodes are generated; s3, designing a cross network, wherein the input network completes cross interconnection between sub-nodes of the input and output networks in the step; the invention realizes a microwave channel full-switching network which can be expanded at will and has no pre-stored code table, and provides a coding and decoding method which can be regularly input and controlled.
Description
Technical Field
The invention relates to the field of microwave, control and coding and decoding, in particular to a microwave channel full-switching network construction method, a control method and a coding and decoding method.
Background
In order to meet the requirements of complex beam switching and digital processing reconstruction, a modern multi-channel receiving system needs to construct a microwave channel switching network capable of being switched randomly between an antenna array and a digital processor, and the current complex switching network mainly adopts the following mode: (1) the control is realized by adopting a storage lookup table mode, generally, because the path selection of a full-switching network is arbitrary, and the coding and decoding process for switch control is complicated and irregular, the control is not suitable for the realization of embedded software with limited logic resources, and the expandability is poor; (2) in a complex low-frequency control network and a microwave switching network, signals are arranged in a crisscross mode, but the cross coupling is too much, so that the signal transmission quality is reduced, such as the crosstalk probability is increased.
Disclosure of Invention
The invention aims to overcome the defects of the prior art, provides a microwave channel full-switching network construction method, a control method and a coding and decoding method, realizes a microwave channel full-switching network which can be expanded at will and has no pre-stored code table, provides a coding and decoding method which can be regularly input and controlled, and realizes the selection of any signal route by controlling the action of a switch through a serial-parallel conversion chip which can be serially expanded. In the embodiment, the control circuit unit can be programmed, the network scale is easy to expand, and the signal exchange transmission quality and the electromagnetic compatibility are improved.
The purpose of the invention is realized by the following scheme:
a method for constructing a microwave channel full-switching network comprises the following steps:
s1, designing an input network, carrying out binary tree mesh expansion on each port in the ports on the input side, and ending the expansion until a plurality of terminal nodes are generated;
s2, designing an output network, performing binary tree mesh expansion on each port of the output side port by using a switch, and ending the expansion until a plurality of terminal nodes are generated;
s3, designing a cross network, wherein the input network completes cross interconnection between the sub nodes of the input network and the output network.
Further, in step S3, the method includes the steps of:
s31, numbering a xxx node in the tree-type expanded network of the nth input port in the input side port as RFn _ xxx; n is a positive integer;
s32, converting the binary-coded node sequence xxx into a decimal number X, where the node is the m-th X +1 node of the nth input port;
s33, numbering the yyy nodes in the tree expansion network of the m-th output port of the output side port, wherein the node number is RFm _ yyy;
s34, converting the binary-coded node serial number yyy into a decimal number Y, where the node is the nth-Y +1 node of the mth output port;
and S35, interconnecting the mth node of the nth input port to the nth node of the mth output port through a high-frequency transmission line.
Further, the crossover network may be physically implemented using microwave multi-layer boards or cables.
A control method based on any one of the above microwave channel full-switching networks, comprising the steps of:
a1, designing a control unit, performing coding control on the switch of a switching network by adopting a serial shift register circuit in a mode of inputting serial control code bits and outputting parallel control code bits, and when the parallel bits need to be increased due to network scale expansion, performing expansion by adopting a mode of connecting a plurality of registers in series;
and A2, based on the control unit in the step A1, realizing the mapping process of the control code bits corresponding to the input and output network control lines.
Further, in step a2, the method specifically includes the steps of:
a21, performing code bit mapping on a switch control line of the tree network formed on the nth input port side, wherein the control line mapping code bit of the first row of switches is (n-1) × r +1, the control line mapping code bit of the second row of switches is (n-1) × r +2, the control line mapping code bits are sequentially increased in number, and the control line code bit of the nth row of switches is mapped into n × r; in this way, the code bits required by N tree networks formed by N input ports are numbered from 1 to Nr;
a22, according to the same processing as that in step a21, performs code bit mapping on the switch control lines of the tree network formed on the M output port sides, and obtains code bit numbers Nr +1 to Nr + Mc.
A coding and decoding method based on the control method of the microwave channel full-switching network, comprising the steps of:
b1, writing out the code bit number corresponding to each input port according to the control code bit mapping process corresponding to the input/output network control line; the code bit number of the network input port number 1 is 1-r, the code bit number of the network input port number 2 is r + 1-2 r, and the analogy is repeated, and the code bit number of the network input port number N is (N-1) × r + 1-Nxr;
b2, starting from the input port number 1, selecting the communicated output port number according to the route thereof, and giving a code value of code bits 1-r corresponding to the 1 st input port; the code value is a binary value corresponding to the output port number-1 communicated by the routing;
b3, according to the output port number from the input port number 2 to the input port number N, giving the code value of the corresponding residual code bit; after the code bits from the input port number 2 to the input port number N are obtained in step B1, according to the input port number routing selection communication output port numbers, code values of the code bits r +1 to N × r corresponding to the ports are given, where the code values are binary values corresponding to the routing communication output port number-1;
b4, according to the input port number selected by the output port number route, giving the code value of the code bit corresponding to all the output ports; the code bit corresponding to the 1 st output port number is N x r + 1-N x r + c, and the like, the code bit corresponding to the output port number M is N x r + (M-1) c + 1-N x r + M, and the code value is a binary value corresponding to the input port number-1 communicated with the routing;
b5, when the circuit description is carried out by adopting the hardware description language, the circuit description is carried out in sequence according to the priority of the logic selection; preferentially describing a code value process of an input port network code bit corresponding to an input port number 1, wherein in the process, the output port network code bit selected by the input port 1 is given, so that code bits 1-r are obtained, and values of c code bits in N x r + 1-Nr + Mc under the condition that the code values of the code bits 1-r are determined;
b6, describing a decoding process of the input port number 1 with the highest priority, then describing a decoding process of the input port number 2, obtaining code bits r + 1-2 r, and values of c code bits in N r + 1-Nr + Mc under the condition that the code bit values of r + 1-2 r are determined; through the compiling process, the code values of the N x r code bits are input every time, and the control of all switches involved in one-time exchange switching is completed.
The beneficial effects of the invention include:
the invention realizes a microwave channel full-switching network which can be expanded at will and has no pre-stored code table, and simultaneously provides a coding and decoding method which can be regularly input and controlled. In the embodiment, the control circuit unit can be programmed, the network scale is easy to expand, and the signal exchange transmission quality and the electromagnetic compatibility are improved.
In the embodiment of the invention, the complex switching network is decoupled into the function independent units, so that the design and implementation process is simplified;
in the embodiment of the invention, the network scale is easy to expand, and the switching network of any scale can be completed through the expansion of the tree network;
in the embodiment of the invention, the design process is stylized, parameterization is realized by the input-output distribution network circuit interconnection relation, the control bit coding mode and the like, and semi-automatic design can be carried out by automatic wiring assistance and the like according to design parameters;
in the embodiment of the invention, the control code table does not need to be prestored, the storage resource of the logic device is saved, and the method is suitable for realizing field programmable logic devices (FPGA and the like);
in the embodiment of the present invention, control of the switching route and the like are accomplished using a limited serial code value (N × r bits).
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a schematic diagram of an input network forming method in an embodiment of the present invention;
FIG. 2 is a schematic diagram illustrating an output network forming method according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a cross-network forming method according to an embodiment of the present invention;
FIG. 4 is a diagram illustrating a hardware circuit of a control unit according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of the number of network code bits input to the nth input port according to an embodiment of the present invention;
fig. 6 is a schematic diagram of the number of bits of the output network code of the mth output port in the embodiment of the present invention;
fig. 7 is a schematic diagram of 2 × 4 switching network relationships in an embodiment of the present invention.
Detailed Description
All features disclosed in all embodiments in this specification, or all methods or process steps implicitly disclosed, may be combined and/or expanded, or substituted, in any way, except for mutually exclusive features and/or steps.
Example 1
As shown in fig. 1 to 7, in the present embodiment, the scale is one N × M (parameter N, M is an integer power of 2, for example, N is 2)c，M＝2r) The specific implementation of the switching network is described in detail.
The design method of the embodiment of the invention comprises the following implementation steps:
and (3) designing an input network, performing binary tree type mesh expansion on each of N ports on the input side by using a single-pole double-throw Switch (SPDT), and ending the expansion until M terminal nodes are generated. Expanded view of the nth port as shown in fig. 1, the tree node is represented by RFn _ xxx, and represents the xxx node of the nth input port. (Note: optional, when the SPDT switch is used to select the upper branch, the binary switch logic control value of the control line is "0", and when the lower branch is selected, the switch logic control value is "1")
And (4) output network design, wherein a single-pole double-throw switch is used for carrying out binary tree type mesh expansion on each port in the M ports on the output side until N terminal nodes are generated, and the expansion is finished. Expanded view of mth port as shown in fig. 2, the tree node is represented by RFm _ xxx, which represents the xxx node of the mth output port.
And designing a cross network, wherein the input network completes cross interconnection between the child nodes of the input network and the output network in the step, and the interconnection method specifically comprises the following steps:
numbering a xxx node in the tree-type expanded network of an nth input port in the ports (N input ports) on the input side as RFn _ xxx;
the binary-coded node sequence number xxx is converted into a decimal number X, and the node is the m-th X +1 node of the nth input port. For example, the node number RF5_010 represents the 3 rd node of the 5 th input port;
the node number of the yyy node in the tree expansion network of the M-th output port in the output side port (the total M output ports) is RFm _ yyy;
the binary-coded node serial number yyy is converted into a decimal number Y, and the node is the n-th (Y + 1) node of the m-th output port. For example, node number RF2_100 represents the 5 th node of the 2 nd output port;
interconnecting the mth node of the nth input port to the nth node of the mth output port through a high-frequency transmission line;
m × N interconnection lines are needed for completing the whole cross interconnection;
the cross network can be physically implemented by microwave multilayer boards or cables.
The control unit is designed, as shown in fig. 4, because the network scale is generally large, the control of the switch of the switching network is performed by adopting a serial shift register circuit, and performing coding control in a mode of inputting serial control code bits and outputting parallel control code bits, and when the parallel bits need to be increased due to the expansion of the network scale, the control unit can be expanded in a mode of connecting a plurality of registers in series.
The control code bit mapping process corresponding to the input and output network control line includes the following steps:
and carrying out code bit mapping on the SPDT switch control line of the tree network formed on the nth input port side. As shown in fig. 5, the control line mapping code bits of the first column of switches are (n-1) × r +1, and the second column of switches
And the control line mapping code bit of the column switch is (n-1) × r +2, the control line mapping code bits are sequentially increased, and the control line mapping code bit of the r-th column switch is n × r. In this way, the code bits required for the N tree networks formed by the N input ports are numbered from 1 to Nr.
In the same way, as shown in fig. 6, the SPDT switch control line of the tree network formed on the M output port sides is mapped with code bits, the code bits being numbered Nr +1 to Nr + Mc.
The code value coding process of each code bit needs 8 | for an 8 x 8 network due to the communication randomness of a switching network! The code table is controlled, so that a large amount of storage resources are consumed for forming the code value by adopting the traditional pre-storage lookup table mode. The embodiment of the invention provides a code bit coding method suitable for being realized by a field programmable logic device (FPGA or CPLD and the like) by combining the concrete realization process of the constructed network, and the method comprises the following steps:
firstly, writing out the code bit number corresponding to each input port according to the control code bit mapping process corresponding to the input and output network control line. The code bit number of the 1 st input port of the network is 1-r, the code bit number of the 2 nd input port is r + 1-2 r, and the analogy is repeated, and the code bit number of the Nth port is (N-1) × r + 1-Nxr;
then, starting from the input port number 1, according to the output port number communicated with the routing selection, the code value of the code bits 1-r corresponding to the 1 st input port is given. The code value is a binary value corresponding to the output port number-1 of the routing connection, and the mapping table is shown in the following table.
Table 1 code value table of code bits corresponding to input port number
| Code bit corresponding to input |
|
|
|
… | Code bit r-1 | Code bit r |
| Code bit corresponding to input |
Code bit r +1 | Code bit r +2 | Code bit r +3 | … | Code bit 2r-1 | Code bit 2r |
| … | … | … | … | … | … | … |
| Code bit corresponding to input port number N | Code bits (N-1) × r +1 | Code bits (N-1) × r +2 | Code bits (N-1) × r +3 | … | Code bits Nr-1 | Code bits Nr |
| |
0 | 0 | 0 | … | 0 | 0 |
| |
0 | 0 | 0 | … | 0 | 1 |
| |
… | 1 | 0 | |||
| … | … | … | … | … | … | … |
| Output |
1 | 1 | 1 | … | 1 | 1 |
In the same method, the code value of the corresponding residual code bit is given according to the input port number 2 to the input port number N, namely the output port number of the routing selection.
In the same method, the code values of the code bits corresponding to all the output ports are given according to the output port number 'input port number for routing', and the mapping table is as follows.
Table 2 code value table of code bits corresponding to output port number
When the circuit description is carried out by adopting a hardware description language, the circuit description is carried out in sequence according to the priority of logic selection so as to avoid the circuit synthesis from generating logic conflict. Preferentially describing a code value process of an input port network code bit corresponding to an input port number 1, wherein in the process, the output port network code bit selected by the input port 1 is required to be given, so that code bits 1-r can be obtained, and values of c code bits in N x r + 1-Nr + Mc under the condition that the code values of the code bits 1-r are determined;
taking the decoding process of the input port number 1 with the highest priority as an example, the description table of decoding is as follows.
TABLE 3 code bit value taking Table based on input port number go-to
And describing the decoding process of the input port number 2 to obtain code bits r + 1-2 r and values of c code bits in the N r + 1-Nr + Mc under the condition that the code bits of the r + 1-2 r are determined.
Through the compiling process, the code values of the N x r code bits are input every time, and the control of all switches involved in one-time exchange switching can be completed.
Example 2
Taking a2 x 4 switching network as an example, the design process is as follows:
the input network, the output network, and the crossover network are implemented as shown in fig. 7, where the design parameter value N is 2, M is 4, c is 1, and r is 2.
According to the code bit code value table defined by the input port destination:
TABLE 4 code bit value taking Table based on input port number go-to
For network control, it is necessary to input a code value of 4 code bits, for example, it is necessary to switch an input 1 port to an output 3 port, and an input 2 port to an output 4 port, and it is necessary to input 4 code bit values [1,0,1,1], according to table 3, [ code bit 1: the code bit 8 is [1,0,1,1, x, x,0,1] (x represents 0 or 1, and any value), and the function can be correctly realized through the signal flow direction relation inspection of the network in fig. 7.
The parts not involved in the present invention are the same as or can be implemented using the prior art.
The above-described embodiment is only one embodiment of the present invention, and it will be apparent to those skilled in the art that various modifications and variations can be easily made based on the application and principle of the present invention disclosed in the present application, and the present invention is not limited to the method described in the above-described embodiment of the present invention, so that the above-described embodiment is only preferred, and not restrictive.
Other embodiments than the above examples may be devised by those skilled in the art based on the foregoing disclosure, or by adapting and using knowledge or techniques of the relevant art, and features of various embodiments may be interchanged or substituted and such modifications and variations that may be made by those skilled in the art without departing from the spirit and scope of the present invention are intended to be within the scope of the following claims.
The functionality of the present invention, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium, and all or part of the steps of the method according to the embodiments of the present invention are executed in a computer device (which may be a personal computer, a server, or a network device) and corresponding software. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, or an optical disk, exist in a read-only Memory (RAM), a Random Access Memory (RAM), and the like, for performing a test or actual data in a program implementation.
Claims (6)
1. A method for constructing a microwave channel full-switching network is characterized by comprising the following steps:
s1, designing an input network, carrying out binary tree mesh expansion on each port in the ports on the input side, and ending the expansion until a plurality of terminal nodes are generated;
s2, designing an output network, performing binary tree mesh expansion on each port of the output side port by using a switch, and ending the expansion until a plurality of terminal nodes are generated;
s3, designing a cross network, wherein the input network completes cross interconnection between the sub nodes of the input network and the output network.
2. The method for constructing a microwave channel full-switching network according to claim 1, wherein in step S3, the method comprises the steps of:
s31, numbering a xxx node in the tree-type expanded network of the nth input port in the input side port as RFn _ xxx; n is a positive integer;
s32, converting the binary-coded node sequence xxx into a decimal number X, where the node is the m-th X +1 node of the nth input port;
s33, numbering the yyy nodes in the tree expansion network of the m-th output port of the output side port, wherein the node number is RFm _ yyy;
s34, converting the binary-coded node serial number yyy into a decimal number Y, where the node is the nth-Y +1 node of the mth output port;
and S35, interconnecting the mth node of the nth input port to the nth node of the mth output port through a high-frequency transmission line.
3. The method as claimed in claim 2, wherein the cross network is implemented physically by microwave multi-layer board or cable.
4. A control method based on the microwave channel full-switching network of any claim 1 to 3, characterized by comprising the steps of:
a1, designing a control unit, performing coding control on the switch of a switching network by adopting a serial shift register circuit in a mode of inputting serial control code bits and outputting parallel control code bits, and when the parallel bits need to be increased due to network scale expansion, performing expansion by adopting a mode of connecting a plurality of registers in series;
and A2, based on the control unit in the step A1, realizing the mapping process of the control code bits corresponding to the input and output network control lines.
5. The control method according to claim 4, wherein in the step A2, the method specifically comprises the steps of:
a21, performing code bit mapping on a switch control line of the tree network formed on the nth input port side, wherein the control line mapping code bit of the first row of switches is (n-1) × r +1, the control line mapping code bit of the second row of switches is (n-1) × r +2, the control line mapping code bits are sequentially increased in number, and the control line code bit of the nth row of switches is mapped into n × r; in this way, the code bits required by N tree networks formed by N input ports are numbered from 1 to Nr;
a22, according to the same processing as that in step a21, performs code bit mapping on the switch control lines of the tree network formed on the M output port sides, and obtains code bit numbers Nr +1 to Nr + Mc.
6. A coding and decoding method based on the control method of the microwave channel full-switching network of claim 4, characterized by comprising the steps of:
b1, writing out the code bit number corresponding to each input port according to the control code bit mapping process corresponding to the input/output network control line; the code bit number of the network input port number 1 is 1-r, the code bit number of the network input port number 2 is r + 1-2 r, and the analogy is repeated, and the code bit number of the network input port number N is (N-1) × r + 1-Nxr;
b2, starting from the input port number 1, selecting the communicated output port number according to the route thereof, and giving a code value of code bits 1-r corresponding to the 1 st input port; the code value is a binary value corresponding to the output port number-1 communicated by the routing;
b3, according to the output port number from the input port number 2 to the input port number N, giving the code value of the corresponding residual code bit; after the code bits from the input port number 2 to the input port number N are obtained in step B1, according to the input port number routing selection communication output port numbers, code values of the code bits r +1 to N × r corresponding to the ports are given, where the code values are binary values corresponding to the routing communication output port number-1;
b4, according to the input port number selected by the output port number route, giving the code value of the code bit corresponding to all the output ports; the code bit corresponding to the 1 st output port number is N x r + 1-N x r + c, and the like, the code bit corresponding to the output port number M is N x r + (M-1) c + 1-N x r + M, and the code value is a binary value corresponding to the input port number-1 communicated with the routing;
b5, when the circuit description is carried out by adopting the hardware description language, the circuit description is carried out in sequence according to the priority of the logic selection; preferentially describing a code value process of an input port network code bit corresponding to an input port number 1, wherein in the process, the output port network code bit selected by the input port 1 is given, so that code bits 1-r are obtained, and values of c code bits in N x r + 1-Nr + Mc under the condition that the code values of the code bits 1-r are determined;
b6, describing a decoding process of the input port number 1 with the highest priority, then describing a decoding process of the input port number 2, obtaining code bits r + 1-2 r, and values of c code bits in N r + 1-Nr + Mc under the condition that the code bit values of r + 1-2 r are determined; through the compiling process, the code values of the N x r code bits are input every time, and the control of all switches involved in one-time exchange switching is completed.
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