CN113218544A - Micro-pressure sensor chip with stress concentration structure and preparation method thereof - Google Patents

Micro-pressure sensor chip with stress concentration structure and preparation method thereof Download PDF

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CN113218544A
CN113218544A CN202110462410.8A CN202110462410A CN113218544A CN 113218544 A CN113218544 A CN 113218544A CN 202110462410 A CN202110462410 A CN 202110462410A CN 113218544 A CN113218544 A CN 113218544A
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island
peninsula
shaped groove
stress concentration
strip
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CN113218544B (en
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赵立波
李学琛
韩香广
乔智霞
皇咪咪
李伟
徐廷中
杨萍
高漪
王鸿雁
关卫军
吴永顺
李支康
朱瑄
王久洪
魏于昆
山涛
蒋庄德
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SHAANXI INSTITUTE OF METROLOGY SCIENCE
Xian Jiaotong University
Xian Aerospace Propulsion Institute
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SHAANXI INSTITUTE OF METROLOGY SCIENCE
Xian Jiaotong University
Xian Aerospace Propulsion Institute
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01LMEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L1/00Measuring force or stress, in general
    • G01L1/18Measuring force or stress, in general using properties of piezo-resistive materials, i.e. materials of which the ohmic resistance varies according to changes in magnitude or direction of force applied to the material
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/02Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01LMEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L19/00Details of, or accessories for, apparatus for measuring steady or quasi-steady pressure of a fluent medium insofar as such details or accessories are not special to particular types of pressure gauges
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01LMEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L9/00Measuring steady of quasi-steady pressure of fluid or fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means
    • G01L9/02Measuring steady of quasi-steady pressure of fluid or fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means by making use of variations in ohmic resistance, e.g. of potentiometers, electric circuits therefor, e.g. bridges, amplifiers or signal conditioning
    • G01L9/06Measuring steady of quasi-steady pressure of fluid or fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means by making use of variations in ohmic resistance, e.g. of potentiometers, electric circuits therefor, e.g. bridges, amplifiers or signal conditioning of piezo-resistive devices
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2201/00Specific applications of microelectromechanical systems
    • B81B2201/02Sensors
    • B81B2201/0264Pressure sensors

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Measuring Fluid Pressure (AREA)
  • Pressure Sensors (AREA)

Abstract

本发明公开了具有应力集中结构的微压传感器芯片及其制备方法,包括承压薄膜、双C型槽、硅基底、压敏电阻条、金属引线和防过载玻璃基底。硅基底背面深硅刻蚀形成承压薄膜以及半岛与岛屿结构,在硅基底正面刻蚀两组C型槽。相对应的两个C型槽之间形成应力集中区域,四个压敏电阻条布置在该应力集中区域上。芯片背腔的岛屿与岛屿之间、岛屿与半岛之间的间隙可以进一步提高压敏电阻条处的应力集中效果。

Figure 202110462410

The invention discloses a micro-pressure sensor chip with a stress concentration structure and a preparation method thereof, comprising a pressure-bearing film, a double C-shaped groove, a silicon substrate, a piezoresistor strip, a metal lead and an overload-proof glass substrate. The backside of the silicon substrate is deeply etched to form a pressure-bearing film and peninsula and island structures, and two sets of C-shaped grooves are etched on the front side of the silicon substrate. A stress concentration area is formed between the corresponding two C-shaped grooves, and four varistor strips are arranged on the stress concentration area. The gaps between the islands and between the islands and the peninsulas of the chip back cavity can further improve the stress concentration effect at the varistor strips.

Figure 202110462410

Description

Micro-pressure sensor chip with stress concentration structure and preparation method thereof
Technical Field
The invention belongs to the technical field of micro-electromechanical sensors, and particularly relates to a micro-pressure sensor chip with a stress concentration structure and a preparation method thereof.
Background
With the development of the MEMS technology, the MEMS micro-pressure sensor has been widely applied to the fields of aerospace, food industry, smart home, biomedical, and the like; with the rapid development of various fields, higher requirements are put forward on the performance, the volume and the like of the sensor, and particularly, an MEMS micro-pressure sensor with stable performance, high dynamic performance and high sensitivity is urgently needed to guarantee in the field of biological medicine.
According to different measurement principles, the MEMS micro-pressure sensor is mainly classified into a piezoresistive type, a piezoelectric type, a capacitive type, a resonant type, and the like. Compared with MEMS micro-pressure sensors with other principles, the MEMS piezoresistive micro-pressure sensor has the advantages of wide measurement range, high linearity, good dynamic response, simple signal output form, high sensitivity, low processing cost and the like, thereby being widely applied.
Sensitivity and linearity of a MEMS piezoresistive pressure sensor are the most important working criteria, but conventional sensitivity enhancement through film thickness reduction and diaphragm size increase generally results in reduced linearity and affects the dynamic performance of the sensor. In the design of the MEMS piezoresistive micro-pressure sensor, the mutual restriction relationship between the sensitivity and the linearity of the sensor is weakened, and the improvement of the sensitivity and the linearity is particularly important.
At present, the minimum measuring range of the mature MEMS piezoresistive micro-pressure sensor products in the market is mostly in the kPa level, but pressure measurement needs to be carried out on the Pa level in the fields of biological medicine, height detection and the like. Therefore, how to improve the sensitivity of the sensor and solve the contradiction between the sensitivity and the linearity is a difficult point which needs to be broken through urgently for the reliable and accurate measurement of the MEMS piezoresistive micro-pressure sensor.
Disclosure of Invention
The invention provides a micro-pressure sensor chip with a stress concentration structure and a preparation method thereof, which can improve the sensitivity of a sensor and solve the contradiction between the sensitivity and the linearity.
In order to achieve the purpose, the micro-pressure sensor chip with the stress concentration structure comprises a silicon substrate and a glass substrate bonded with the silicon substrate, wherein a back cavity is etched on the back surface of the silicon substrate, the bottom surface of the back cavity is a pressure-bearing thin film, and a first peninsula, a second peninsula, a first island, a second island and a third island are arranged in the back cavity; the pressure-bearing film comprises a first peninsula, a second peninsula, a back cavity, a first pressure-sensitive resistor strip, a second pressure-sensitive resistor strip, a third pressure-sensitive resistor strip and a fourth pressure-sensitive resistor strip, wherein the first peninsula and the second peninsula are connected with the edge of the inner side wall of the back cavity, gaps are formed among the first island and the first peninsula, the third island and the second peninsula, the first island and the second island, and the second island and the third island; the first piezoresistor strip, the second piezoresistor strip, the third piezoresistor strip and the fourth piezoresistor strip are connected through the heavily doped ohmic contact region and the metal pad to form a Wheatstone bridge.
Further, the first peninsula, the first island, the second island, the third island and the second peninsula are sequentially arranged.
Further, a gap between the first peninsula and the first island, a gap between the first island and the second island, a gap between the second island and the third island, and a gap width between the third island and the second peninsula are 5 μm to 100 μm.
Further, the widths of the first island, the second island, the third island, the first peninsula and the second peninsula are equal.
Furthermore, a first C-shaped groove, a second C-shaped groove, a third C-shaped groove and a fourth C-shaped groove are etched on the front surface of the pressure-bearing film; four stress concentration areas are formed between the first C-shaped groove and the second C-shaped groove and between the second C-shaped groove and the fourth C-shaped groove, and are respectively positioned in a gap between the first semi-island and the first island, a gap between the first island and the second island, a gap between the second island and the third island and right above a gap between the third island and the second semi-island.
Furthermore, the depth of the first C-shaped groove, the second C-shaped groove, the third C-shaped groove and the fourth C-shaped groove is 10% -80% of the thickness of the pressure-bearing film.
Furthermore, a groove and a through hole are formed in the glass substrate, and the width of the groove is larger than that of the back cavity.
A preparation method of a micro-pressure sensor chip with a stress concentration structure comprises the following steps:
step 1, depositing silicon dioxide on the front side of an SOI (silicon on insulator) silicon chip, etching the silicon dioxide above the regions of a first piezoresistor strip, a second piezoresistor strip, a third piezoresistor strip and a fourth piezoresistor strip to expose the top layer monocrystalline silicon of the SOI silicon chip, then carrying out boron ion light doping on the exposed region of the top layer monocrystalline silicon to form a first piezoresistor strip, a second piezoresistor strip, a third piezoresistor strip and a fourth piezoresistor strip, and then removing the residual silicon dioxide;
step 2, depositing silicon dioxide on the front surface of the structure obtained in the step 1, and removing the silicon dioxide in the lead hole area;
step 3, sputtering metal on the front surface of the structure obtained in the step 2, photoetching by using a metal lead plate, and forming a metal bonding pad;
step 4, removing redundant silicon by taking the silicon dioxide buried layer in the SOI silicon wafer as an etching stop layer to form a back cavity, a first peninsula, a second peninsula, a first island, a second island and a third island to obtain a silicon substrate;
step 5, etching the overload-proof glass by using a glass etching plate to form a groove, and manufacturing a through hole on the overload-proof glass in a mechanical mode, a laser processing mode and the like;
and 6, bonding the silicon substrate manufactured in the step 4 with the glass substrate processed in the step 5 to obtain the micro-pressure sensor chip.
Further, before the step 6, the front surface of the chip obtained in the step 4 is subjected to photoetching and dry etching to form a first C-shaped groove, a second C-shaped groove, a third C-shaped groove and a fourth C-shaped groove.
Compared with the prior art, the invention has at least the following beneficial technical effects:
according to the invention, peninsula and island structures are added in the back cavity of the pressure-bearing film, gaps exist between the islands and between the peninsulas, and the gaps have a stress concentration effect because of the abrupt change of rigidity. By arranging the piezoresistive strips directly above the gap, the sensitivity of the sensor can be greatly improved. In addition, due to the introduction of the peninsula and island structures, the rigidity of the pressure-bearing film is greatly increased, and the linearity of the sensor is improved.
In order to further improve the sensitivity of the sensor chip, transverse rigidity mutation is introduced by manufacturing two groups of C-shaped grooves, so that transverse stress is concentrated between the adjacent C-shaped grooves. The peninsula and island structure and the C-shaped groove structure are introduced simultaneously, so that the stress concentration area is limited at the transverse position and the longitudinal position, the area of the stress concentration area is further reduced, a better stress concentration effect is obtained, the amplitude of voltage output converted by piezoresistive effect is improved, and finally the measurement sensitivity of the sensor is improved.
The arrangement of the peninsula and island structures in the same line allows the piezoresistive nonlinearity of the sensor to be lower than if the peninsula and island structures were uniformly arranged on the edge of the diaphragm. If the piezoresistor R is1、R2、R3、R4The piezoresistive nonlinearity of (1) is NL1、NL2、NL3、NL4Overall non-linearity NL for a sensor structure with peninsulas and islands uniformly disposed on the edge of the diaphragm1Is composed of
Figure BDA0003042775660000041
For sensor structures with peninsula and island structures arranged in a single straight line, the overall nonlinearity NL is2Is composed of
Figure BDA0003042775660000042
This shows that the non-linearities of the four piezoresistors can cancel each other to some extent when the peninsulas are arranged in the same line with the island structure. Therefore, the pressure sensor using the structure in which the peninsula and the island structure are arranged on the same straight line has a characteristic of being able to reduce the overall nonlinearity.
Further, a gap between the first peninsula and the first island, a gap between the first island and the second island, and a gap between the second island and the third island, wherein a gap width between the third island and the second peninsula is 5 μm to 100 μm, and a smaller gap width increases etching difficulty, and a larger gap width increases stress diffusion reduction sensitivity.
Furthermore, the widths of the first island, the second island, the third island, the first peninsula and the second peninsula are equal, so that the stress concentration area is rectangular, and the stress uniformity is ensured.
Further, a first C-shaped groove, a second C-shaped groove, a third C-shaped groove and a fourth C-shaped groove are etched on the front surface of the pressure-bearing film, four stress concentration regions are formed between the first C-shaped groove and the second C-shaped groove and between the third C-shaped groove and the fourth C-shaped groove, the stress concentration regions are respectively located in gaps between the first semi-island and the first island, gaps between the first island and the second island, gaps between the second island and the third island and gaps between the third island and the second semi-island, and the stress concentration regions are limited between the gaps and the two opposite C-shaped grooves, so that the stress concentration effect is enhanced, and the sensitivity is increased.
Furthermore, the depth of the first C-shaped groove, the second C-shaped groove, the third C-shaped groove and the fourth C-shaped groove is 10% -80% of the thickness of the pressure-bearing film, and the effect that the rigidity of the pressure-bearing film is reduced and the sensitivity of the dynamic C-shaped groove is improved due to the fact that the depth of the C-shaped groove is too small is limited due to the fact that the depth of the C-shaped groove is too large.
Furthermore, a groove and a through hole are formed in the glass substrate, the width of the groove is larger than that of the back cavity, and the bonded glass substrate does not block the movement of the peninsula and the island structure.
The preparation method of the sensor chip only relates to conventional MEMS processes such as ion implantation, annealing, anodic bonding, PECVD and the like, and hundreds of chips can be simultaneously manufactured on the same 4-inch SOI wafer, so the sensor chip has the characteristic of low cost and is easy for batch production.
Drawings
FIG. 1 is a schematic axial view of the present invention;
FIG. 2 is a schematic front view of the present invention;
FIG. 3 is a schematic backside isometric view of the present invention;
FIG. 4 is a schematic axial view of an overload protective glass substrate according to the present invention;
FIG. 5 is a schematic view of a C-shaped groove structure;
FIG. 6a is a partial enlarged view of FIG. 1A;
FIG. 6B is a partial enlarged view of FIG. 1B;
FIG. 7 is a schematic diagram of a Wheatstone bridge formed by the varistor strips of the present invention;
FIG. 8a is a schematic diagram of the structure of an SOI silicon wafer;
FIG. 8b is a schematic structural diagram obtained in step 2 of the preparation method according to the present invention;
FIG. 8c is a schematic structural diagram obtained in step 3 of the preparation method according to the present invention;
FIG. 8d is a schematic structural diagram obtained in step 5 of the preparation method according to the present invention;
FIG. 8e is a schematic structural diagram obtained in step 6 of the preparation method according to the present invention;
FIG. 8f is a schematic structural diagram obtained in step 7 of the preparation method according to the present invention;
FIG. 8g is a schematic diagram of the structure obtained in step 8 of the preparation method according to the present invention;
FIG. 8h is a schematic structural diagram of step 9 of the preparation method of the present invention;
FIG. 9a is a schematic view of the invention at section A-A of FIG. 2 in an unloaded state;
FIG. 9b is a schematic view of the invention in a loaded state at section A-A of FIG. 2;
FIG. 9c is a schematic view of the present invention at section A-A of FIG. 2 in an overload condition;
FIG. 10 is a schematic view of the stress distribution of a flat membrane structure of the same size under pressure;
FIG. 11 is a schematic view of the stress distribution under pressure according to the present invention.
In the drawings: 1. silicon substrate, 2, pressure-bearing film, 3-1, a first C-shaped groove, 3-2, a second C-shaped groove, 3-3, a third C-shaped groove, 3-4, a fourth C-shaped groove, 4-1, a first piezoresistor strip, 4-2, a second piezoresistor strip, 4-3, a third piezoresistor strip, 4-4, a fourth piezoresistor strip, 5-1, a first heavily doped ohmic contact region, 5-2, a second heavily doped ohmic contact region, 5-3, a third heavily doped ohmic contact region, 5-4, a fourth heavily doped ohmic contact region, 6-1, a first metal pad, 6-2, a second metal pad, 6-3, a third metal pad, 6-4, a fourth metal pad, 7, a glass substrate, 8-1, a first half island, 8-2, Second peninsula, 9-1, first islands, 9-2, second islands, 9-3, third islands, 10, grooves, 11, through holes, 12, top-layer monocrystalline silicon, 13, buried silicon dioxide layers, 14, and bottom-layer monocrystalline silicon.
Detailed Description
In order to make the objects and technical solutions of the present invention clearer and easier to understand. The present invention will be described in further detail with reference to the following drawings and examples, wherein the specific examples are provided for illustrative purposes only and are not intended to limit the present invention.
In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like, indicate orientations or positional relationships based on those shown in the drawings, and are used only for convenience in describing the present invention and for simplicity in description, and do not indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and thus, are not to be construed as limiting the present invention. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless otherwise specified. In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
Referring to fig. 1 and 5, the sensor chip is structurally divided into a silicon substrate 1 and a glass substrate 7 bonded with the silicon substrate 1, wherein a square pressure-bearing thin film 2 is arranged in the middle of the silicon substrate 1.
Referring to fig. 2, the structural layer of the front surface of the pressure-bearing film is as follows: the front surface of the pressure-bearing film 2 is provided with a first C-shaped groove 3-1 and a second C-shaped groove 3-2 which are positioned on the inner side of the pressure-bearing film 2, and a third C-shaped groove 3-3 and a fourth C-shaped groove 3-4 which are positioned on the outer side of the pressure-bearing film 2, the depths of the first C-shaped groove to the fourth C-shaped groove are equal and are 10% -80% of the thickness of the pressure-bearing film 2, and the widths of the first C-shaped groove to the fourth C-shaped groove are slightly larger than the widths of gaps between an island and between the island and a peninsula.
Gaps are arranged between the first C-shaped groove 3-1 and the second C-shaped groove 3-2, and between the third C-shaped groove 3-3 and the fourth C-shaped groove, so that stress concentration areas are formed. The first piezoresistor strip 4-1 and the second piezoresistor strip 4-2 are arranged at the gap of the first C-shaped groove 3-1 and the second C-shaped groove 3-2, the third piezoresistor strip 4-3 and the fourth piezoresistor strip 4-4 are arranged at the gap of the third C-shaped groove 3-3 and the fourth C-shaped groove 3-4, namely, the piezoresistor strips are arranged in a stress concentration area, the sizes of all the piezoresistor strips are consistent, and the directions of all the piezoresistor strips are along the crystal direction with the maximum piezoresistance coefficient.
The first heavily doped ohmic contact region 5-1, the second heavily doped ohmic contact region 5-2, the third heavily doped ohmic contact region 5-3 and the fourth heavily doped ohmic contact region 5-4 connect the first piezoresistor strip 4-1, the second piezoresistor strip 4-2, the third piezoresistor strip 4-3 and the fourth piezoresistor strip 4-4 in sequence to form a closed loop Wheatstone bridge as shown in figure 7, and the input and output of electric signals are realized through the first metal pad 6-1, the second metal pad 6-2, the third metal pad 6-3 and the fourth metal pad 6-4.
Referring to fig. 2, a first heavily doped ohmic contact region 5-1 connects the end of a varistor strip 4-1 to the end of a third varistor strip 4-3, a second heavily doped ohmic contact region 5-2 connects the head of the varistor strip 4-1 to the end of a second varistor strip 4-2, a third heavily doped ohmic contact region 5-3 connects the head of the third varistor strip 4-3 to the end of a fourth varistor strip 4-4, a fourth heavily doped ohmic contact region 5-4 connects the head of the second varistor strip 4-2 to the head of the fourth varistor strip 4-4, a first metal pad 6-1 is connected to the head of the first varistor strip 4-1, a second metal pad 6-2 is connected to the end of the first varistor strip 4-1, and a third metal pad 6-3 is connected to the end of the fourth varistor strip 4-4, the fourth metal pad 6-4 is connected to the head end of the fourth varistor strip 4-4.
Referring to fig. 3, the back cavity structure mainly includes: a first peninsula 8-1, a second peninsula 8-2 connected with the inner side wall of the silicon substrate, and a first island 9-1, a second island 9-2 and a third island 9-3 connected with the back surface of the pressure-bearing thin film. The first peninsula 8-1, the first island 9-1, the second island 9-2, the third island 9-3 and the second peninsula 8-2 are arranged in sequence and are positioned on the same straight line. Four gaps are formed between the first peninsula 8-1 and the first island 9-1, between the first island 9-1 and the second island 9-2, between the second island 9-2 and the third island 9-3, and between the third island 9-3 and the second peninsula 8-2, and the width of the gap is 10 μm to 100 μm, so that stress is concentrated in the gap region. The widths of the first island 9-1, the second island 9-2, the third island 9-3, the first peninsula 8-1 and the second peninsula 8-2 are consistent and are all 140-300 μm, and the lengths of the peninsula and the islands are optimally designed on the basis of obtaining the maximum measurement sensitivity of the sensor.
Referring to fig. 1, 2 and 3, the first C-shaped groove 3-1 and the second C-shaped groove 3-2 are identical in structure and size and are symmetrically distributed, and the third C-shaped groove 3-3 and the fourth C-shaped groove 3-4 are identical in structure and size and are symmetrically distributed. The first C-shaped groove 3-1 and the second C-shaped groove 3-2 are located on two sides directly above the gap between the first island 9-1 and the second island 9-2, and the second island 9-2 and the third island 9-3, and the third C-shaped groove 3-3 and the fourth C-shaped groove 3-4 are located on two sides directly above the gap between the first island 9-1 and the first peninsula 8-1, and the third island 9-3 and the second peninsula 8-2. The first varistor strip 4-1 and the fourth varistor strip 4-4 are located in the gap between the third C-shaped groove 3-3 and the fourth C-shaped groove 3-4, and the second varistor strip 4-2 and the third varistor strip 4-3 are located in the gap between the first C-shaped groove 3-1 and the second C-shaped groove 3-2.
Referring to fig. 4, the glass substrate 7 is an overload prevention glass substrate, and is provided with a groove 10 and a through hole 11, wherein the width of the groove 10 is slightly larger than the width of the pressure-bearing film 2, and the depth of the groove 10 is determined by the displacement of the pressure-bearing film 2 at full scale and the overload prevention multiple, so that the first island 9-1, the second island 9-2, and the third island 9-3 do not interfere with the groove 10 at the maximum overload prevention. The through hole 11 is formed by machining or laser processing, for the purpose of differential pressure measurement.
Referring to fig. 8h, the silicon chip backside is bonded to the glass substrate 7.
Referring to fig. 6a and 6b, the first piezo-resistor strip 4-1, the second piezo-resistor strip 4-2, the third piezo-resistor strip 4-3 and the fourth piezo-resistor strip 4-4 all adopt a single resistor strip structure, the sizes are consistent, the initial resistance values of the four resistor strips are the same, and the length directions of the four resistor strips are along the crystal direction of the maximum piezoresistive coefficient.
Referring to fig. 8a to 8h, a method for manufacturing a micro-pressure sensor chip having a stress concentration structure includes the steps of:
step 1, referring to fig. 8a, cleaning an SOI silicon wafer by using a hydrofluoric acid solution, wherein the SOI silicon wafer consists of a top monocrystalline silicon 12, a silicon dioxide buried layer 13 and a bottom monocrystalline silicon 14, and the top monocrystalline silicon 12 of the SOI silicon wafer is an N-type 100 crystal face;
step 2, referring to fig. 8b, depositing a silicon dioxide layer on the cleaned top layer monocrystalline silicon 12 by a Plasma Enhanced Chemical Vapor Deposition (PECVD) method, etching off silicon dioxide above the areas of the piezoresistor strips 4-1, the second piezoresistor strips 4-2, the third piezoresistor strips 4-3 and the fourth piezoresistor strips 4-4 by using a piezoresistor plate to expose the top layer monocrystalline silicon 12, and lightly doping boron ions in the exposed areas of the top layer monocrystalline silicon to form the first piezoresistor strips 4-1, the second piezoresistor strips 4-2, the third piezoresistor strips 4-3 and the fourth piezoresistor strips 4-4, and then removing the residual silicon dioxide;
step 3, referring to fig. 8c, depositing silicon dioxide on the front surface of the SOI silicon wafer with the structure obtained in the step 2 in a PECVD (plasma enhanced chemical vapor deposition) mode, etching off silicon dioxide above an ohmic contact region 5-1, a second heavily-doped ohmic contact region 5-2, a third heavily-doped ohmic contact region 5-3 and a fourth heavily-doped ohmic contact region 5-4 by using an ohmic contact plate to expose top layer monocrystalline silicon, and carrying out boron ion heavy doping on the exposed top layer monocrystalline silicon to form a first heavily-doped ohmic contact region 5-1, a second heavily-doped ohmic contact region 5-2, a third heavily-doped ohmic contact region 5-3 and a fourth heavily-doped ohmic contact region 5-4, and then removing the silicon dioxide and annealing;
step 4, depositing silicon dioxide on the front side of the SOI silicon wafer with the structure obtained in the step 3 in a PECVD mode, and removing the silicon dioxide in the lead hole area by using a lead hole plate;
step 5, referring to fig. 8d, sputtering metal on the front surface of the SOI silicon wafer with the structure obtained in the step 4, photoetching by using a metal lead plate, and forming a first metal pad 6-1, a second metal pad 6-2, a third metal pad 6-3 and a fourth metal pad 6-4 in a stripping and corrosion mode;
step 6, referring to fig. 8e, photoetching the bottom layer monocrystalline silicon 14 of the SOI silicon wafer obtained in the step 5 by using a back cavity etching plate, and removing redundant silicon by using a silicon dioxide buried layer 13 in the SOI wafer as an etching stop layer in a dry method to form a back cavity, a first peninsula 8-1, a second peninsula 8-2, a first island 9-1, a second island 9-2 and a third island 9-3 to obtain a silicon substrate 1; the bottom surface of the back cavity is the pressure-bearing film 2;
and 7, referring to fig. 8f, photoetching and dry etching are carried out on the front surface of the chip obtained in the step 6 by using a front surface etching plate to form a first C-shaped groove 3-1, a second C-shaped groove 3-2, a third C-shaped groove 3-3 and a fourth C-shaped groove 3-4, so that the silicon substrate 1 is obtained.
Step 8, referring to fig. 8g, etching is carried out on the glass substrate 7 by using a glass etching plate to form a groove 10, and a through hole 11 is formed in the overload-proof glass in a mechanical mode, a laser processing mode and the like;
and 9, referring to fig. 8h, carrying out anodic bonding on the silicon substrate 1 manufactured in the step 7 and the glass substrate 7 processed in the step 8 to obtain the micro-pressure sensor chip.
Compared with the traditional C-type film and E-type film structure sensor chips, the micro-pressure sensor chip with the stress concentration structure has the advantages that the overall rigidity of the pressure-bearing film 2 is enhanced by adopting the structures of the first peninsula 8-1, the second peninsula 8-2, the first island 9-1, the second island 9-2 and the third island 9-3, and transverse and longitudinal rigidity mutations are simultaneously formed by adopting the gaps among the first peninsula 8-1, the second peninsula 8-2, the first island 9-1, the second island 9-2 and the third island 9-3 and the gaps among the first C-shaped groove 3-1, the second C-shaped groove 3-2 and the third C-shaped groove 3-3 and the fourth C-shaped groove 3-4, so that the rigidity mutations of the first piezoresistor strip 4-1 and the second piezoresistor strip 4-2 are enhanced, stress in the area where the third strip 4-3 and the fourth strip 4-4 are located. Therefore, the sensor chip has the characteristics of high sensitivity, good linearity, strong overload prevention capability and the like.
The working principle of the sensor chip of the invention is as follows:
in the unloaded state, the cross-sectional view of the structure of the chip of the present invention is shown in FIG. 9 a. Referring to fig. 9b, when the front surface of the sensor chip is subjected to a pressure P, the pressure-bearing film 2 begins to recess, and the region of the first piezoresistive stripe 4-1 directly above the gap between the first peninsula 8-1 and the first island 9-1 is a tensile region, and the resistance value thereof increases according to the piezoresistive effect of silicon; the region where the fourth piezoresistor strip 4-4 is located right above the gap between the second peninsula 8-2 and the third island 9-3 is also a tensile region, and the resistance value is increased according to the piezoresistive effect of silicon; the region of the second piezoresistor strip 4-2 right above the gap between the first island 9-1 and the second island 9-2 is a pressed region, and the resistance value is reduced according to the piezoresistive effect of silicon; the two voltage-sensitive resistor strips with increased resistance values and the two voltage-sensitive resistor strips with reduced resistance values can form a Wheatstone full bridge to realize the conversion from the pressure signals to the voltage signals.
The third piezoresistive stripe 4-3 directly above the gap between the second island 9-2 and the third island 9-3 is also a stressed region, and its resistance value increases according to the piezoresistive effect of silicon. The first C-shaped groove 3-1, the second C-shaped groove 3-2, the third C-shaped groove 3-3 and the fourth C-shaped groove 3-4 enable the stress of the area where the first piezoresistor strip 4-1, the second piezoresistor strip 4-2, the third piezoresistor strip 4-3 and the fourth piezoresistor strip 4-4 are located to be more concentrated, the resistance value of the piezoresistor can be changed greatly, and the measurement sensitivity of the sensor is improved. The structure of the first peninsula 8-1, the second peninsula 8-2, the first island 9-1, the second island 9-2 and the third island 9-3 further increases the rigidity of the pressure-bearing film 2 and reduces the nonlinearity of the sensor.
Referring to fig. 9c, when the sensor is overloaded, the first, second and third islands 9-1, 9-2 and 9-3 begin to contact the bottom of the overload-prevention glass groove 10, and the glass substrate 7 plays a role of limiting and protecting, so that the pressure-bearing film 2 can be prevented from being damaged due to excessive stress.
Referring to fig. 10 and fig. 11, under the action of 500Pa pressure, the stress of the present invention is more than 8 times of the stress of the same-size flat membrane structure, i.e. the stress of the present invention is improved by 800% compared with the same-size flat membrane structure, so the present structure has the characteristic of high sensitivity.
The main technical indexes achieved by the invention are as follows:
1. measurement range: 0 to 500 Pa;
2. and (3) measuring precision: better than 0.5% FS;
3. sensitivity: greater than 50 μ V/V/Pa;
4. working temperature: -50 to 120 ℃;
5. natural frequency: greater than 5 kHz.
The sensor chip provided by the invention has the resolution of Pa level, has the characteristics of high sensitivity, high linearity, low cost and the like, and is favorable for realizing batch production.
The above description is only one embodiment of the present invention, and not all or only one embodiment, and any equivalent alterations made by those skilled in the art after reading the present specification are covered by the claims of the present invention.

Claims (9)

1.一种具有应力集中结构的微压传感器芯片,其特征在于,包括硅基底(1)以及与硅基底(1)键合的玻璃基底(7),硅基底(1)背面刻蚀有背腔,背腔的底面为承压薄膜(2),背腔中设置有第一半岛(8-1),第二半岛(8-2),第一岛屿(9-1),第二岛屿(9-2)和第三岛屿(9-3);其中,第一半岛(8-1),第二半岛(8-2)与背腔的内侧壁边缘相连,第一岛屿(9-1)与第一半岛(8-1)、第三岛屿(9-3)与第二半岛(8-2)、第一岛屿(9-1)与第二岛屿(9-2)以及第二岛屿(9-2)与第三岛屿(9-3)之间均具有间隙,所述承压薄膜(2)正面设置在所述间隙的正上方分别设置有第一压敏电阻条(4-1),第二压敏电阻条(4-2),第三压敏电阻条(4-3)和第四压敏电阻条(4-4);所述第一压敏电阻条(4-1),第二压敏电阻条(4-2),第三压敏电阻条(4-3),第四压敏电阻条(4-4)通过重掺杂欧姆接触区以及金属焊盘连接形成惠斯通电桥。1. A micro-pressure sensor chip with a stress concentration structure, characterized in that it comprises a silicon substrate (1) and a glass substrate (7) bonded to the silicon substrate (1), and the silicon substrate (1) is etched with a back surface. The bottom surface of the back cavity is a pressure-bearing film (2), and the back cavity is provided with a first peninsula (8-1), a second peninsula (8-2), a first island (9-1), a second island ( 9-2) and the third island (9-3); wherein, the first peninsula (8-1), the second peninsula (8-2) are connected with the edge of the inner wall of the dorsal cavity, and the first island (9-1) with the first peninsula (8-1), the third island (9-3) and the second peninsula (8-2), the first island (9-1) and the second island (9-2), and the second island ( There is a gap between 9-2) and the third island (9-3), and the front surface of the pressure-bearing film (2) is provided with a first piezoresistor strip (4-1) directly above the gap, respectively. , the second varistor strip (4-2), the third varistor strip (4-3) and the fourth varistor strip (4-4); the first varistor strip (4-1) , the second varistor strip (4-2), the third varistor strip (4-3), and the fourth varistor strip (4-4) are connected by heavily doped ohmic contact regions and metal pads to form a Stone bridge. 2.根据权利要求1所述的一种具有应力集中结构的微压传感器芯片,其特征在于,所述第一半岛(8-1),第一岛屿(9-1)、第二岛屿(9-2)、第三岛屿(9-3)和第二半岛(8-2)依次排列。2. A micro-pressure sensor chip with a stress concentration structure according to claim 1, wherein the first peninsula (8-1), the first island (9-1), the second island (9) -2), the third island (9-3) and the second peninsula (8-2) are arranged in order. 3.根据权利要求1或2所述的具有应力集中结构的微压传感器芯片,其特征在于,所述第一半岛(8-1)与第一岛屿(9-1)之间的间隙,第一岛屿(9-1)与第二岛屿(9-2)之间的间隙,第二岛屿(9-2)与第三岛屿(9-3)之间的间隙,第三岛屿(9-3)与第二半岛(8-2)之间的间隙宽度为5μm~100μm。3. The micro-pressure sensor chip with stress concentration structure according to claim 1 or 2, characterized in that, the gap between the first peninsula (8-1) and the first island (9-1), the first The gap between the first island (9-1) and the second island (9-2), the gap between the second island (9-2) and the third island (9-3), the third island (9-3) ) and the second peninsula (8-2) have a gap width of 5 μm to 100 μm. 4.根据权利要求1所述的一种具有应力集中结构的微压传感器芯片,其特征在于,所述第一岛屿(9-1)、第二岛屿(9-2)、第三岛屿(9-3)、第一半岛(8-1)和第二半岛(8-2)的宽度相等。4. A micro-pressure sensor chip with a stress concentration structure according to claim 1, wherein the first island (9-1), the second island (9-2), the third island (9 -3), the width of the first peninsula (8-1) and the second peninsula (8-2) are equal. 5.根据权利要求1所述的一种具有应力集中结构的微压传感器芯片,其特征在于,所述承压薄膜(2)正面刻蚀有第一C型槽(3-1)、第二C型槽(3-2)、第三C型槽(3-3)和第四C型槽(3-4);所述第一C型槽(3-1)与第二C型槽(3-2)之间,第二C型槽(3-3)与第四C型槽(3-4)之间形成四个应力集中区域,所述应力集中区域均分别位于第一半岛(8-1)与第一岛屿(9-1)之间的间隙,第一岛屿(9-1)与第二岛屿(9-2)之间的间隙,第二岛屿(9-2)与第三岛屿(9-3)之间的间隙,第三岛屿(9-3)与第二半岛(8-2)之间的间隙的正上方。5. A micro-pressure sensor chip with a stress concentration structure according to claim 1, wherein the pressure-bearing film (2) is etched with a first C-shaped groove (3-1), a second The C-shaped groove (3-2), the third C-shaped groove (3-3) and the fourth C-shaped groove (3-4); the first C-shaped groove (3-1) and the second C-shaped groove ( 3-2), four stress concentration areas are formed between the second C-shaped groove (3-3) and the fourth C-shaped groove (3-4), and the stress concentration areas are respectively located in the first peninsula (8). -1) the gap between the first island (9-1), the gap between the first island (9-1) and the second island (9-2), the second island (9-2) and the third island The gap between the islands (9-3), just above the gap between the third island (9-3) and the second peninsula (8-2). 6.根据权利要求5所述的一种具有应力集中结构的微压传感器芯片,其特征在于,所述第一C型槽(3-1)、第二C型槽(3-2)、第三C型槽(3-3)和第四C型槽(3-4)的深度为承压薄膜(2)厚度的10%~80%。6. A micro-pressure sensor chip with a stress concentration structure according to claim 5, wherein the first C-shaped groove (3-1), the second C-shaped groove (3-2), the first C-shaped groove (3-2), the The depths of the third C-shaped grooves (3-3) and the fourth C-shaped grooves (3-4) are 10% to 80% of the thickness of the pressure-bearing film (2). 7.根据权利要求1所述的一种具有应力集中结构的微压传感器芯片,其特征在于,所述玻璃基底(7)上开设有凹槽(10)以及通孔(11),所述凹槽(10)宽度大于背腔的宽度。7 . The micro-pressure sensor chip with a stress concentration structure according to claim 1 , wherein a groove ( 10 ) and a through hole ( 11 ) are formed on the glass substrate ( 7 ). The width of the groove (10) is greater than the width of the back cavity. 8.一种具有应力集中结构的微压传感器芯片的制备方法,其特征在于,包括以下步骤:8. A method for preparing a micro-pressure sensor chip with a stress concentration structure, comprising the following steps: 步骤1、在SOI硅片正面沉积二氧化硅,刻蚀掉第一压敏电阻条(4-1),第二压敏电阻条(4-2),第三压敏电阻条(4-3)和第四压敏电阻条(4-4)区域上方的二氧化硅,露出SOI硅片的顶层单晶硅,然后对顶层单晶硅的裸露区域进行硼离子轻掺杂,形成第一压敏电阻条(4-1),第二压敏电阻条(4-2),第三压敏电阻条(4-3),第四压敏电阻条(4-4),之后去除剩余二氧化硅;Step 1. Deposit silicon dioxide on the front of the SOI silicon wafer, and etch away the first varistor strip (4-1), the second varistor strip (4-2), and the third varistor strip (4-3). ) and the silicon dioxide above the fourth varistor strip (4-4) area, exposing the top single crystal silicon of the SOI silicon wafer, and then lightly doping the exposed area of the top single crystal silicon with boron ions to form a first pressure The varistor strip (4-1), the second varistor strip (4-2), the third varistor strip (4-3), the fourth varistor strip (4-4), and then remove the remaining dioxide silicon; 步骤2、在步骤1得到的结构正面沉积二氧化硅,去除引线孔区域的二氧化硅;Step 2, deposit silicon dioxide on the front of the structure obtained in step 1, and remove the silicon dioxide in the lead hole area; 步骤3、在步骤2得到的结构正面溅射金属,利用金属引线版进行光刻,并形成金属焊盘;Step 3, sputtering metal on the front of the structure obtained in step 2, using a metal lead plate for photolithography, and forming a metal pad; 步骤4、以SOI硅片中二氧化硅埋层(13)作为刻蚀停止层去除多余的硅,形成背腔、第一半岛(8-1),第二半岛(8-2)、第一岛屿(9-1)、第二岛屿(9-2)和第三岛屿(9-3),得到硅基底(1);Step 4. Use the silicon dioxide buried layer (13) in the SOI silicon wafer as an etch stop layer to remove excess silicon to form a back cavity, a first peninsula (8-1), a second peninsula (8-2), and a first peninsula (8-2). Island (9-1), second island (9-2) and third island (9-3) to obtain silicon substrate (1); 步骤5、使用玻璃刻蚀版在防过载玻璃(7)上进行刻蚀形成凹槽(10),并在防过载玻璃上通过机械、激光加工等方式制作通孔(11);Step 5, using a glass etching plate to etch the anti-overload glass (7) to form grooves (10), and make through holes (11) on the anti-overload glass by means of mechanical, laser processing, etc.; 步骤6、将步骤4制作的硅基底(1)与步骤5处理后的玻璃基底(7)键合,得到微压传感器芯片。Step 6, bonding the silicon substrate (1) produced in step 4 with the glass substrate (7) processed in step 5 to obtain a micro-pressure sensor chip. 9.根据权利要求8所述的一种具有应力集中结构的微压传感器芯片的制备方法,其特征在于,在进行步骤6之前,对步骤4得到的芯片正面进行光刻和干法刻蚀,形成第一C型槽(3-1)、第二C型槽(3-2),第三C型槽(3-3)和第四C型槽(3-4)。9 . The method for preparing a micro-pressure sensor chip with a stress concentration structure according to claim 8 , wherein, before step 6 is performed, photolithography and dry etching are performed on the front side of the chip obtained in step 4, 10 . A first C-shaped groove (3-1), a second C-shaped groove (3-2), a third C-shaped groove (3-3) and a fourth C-shaped groove (3-4) are formed.
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