CN113205747A - Array substrate, display panel and display device - Google Patents
Array substrate, display panel and display device Download PDFInfo
- Publication number
- CN113205747A CN113205747A CN202110482457.0A CN202110482457A CN113205747A CN 113205747 A CN113205747 A CN 113205747A CN 202110482457 A CN202110482457 A CN 202110482457A CN 113205747 A CN113205747 A CN 113205747A
- Authority
- CN
- China
- Prior art keywords
- pixel
- pixel electrode
- common electrode
- along
- electrode layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 60
- 239000003990 capacitor Substances 0.000 claims abstract description 31
- 238000002161 passivation Methods 0.000 claims description 11
- 239000003086 colorant Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 239000004973 liquid crystal related substance Substances 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- SLXKOJJOQWFEFD-UHFFFAOYSA-N 6-aminohexanoic acid Chemical compound NCCCCCC(O)=O SLXKOJJOQWFEFD-UHFFFAOYSA-N 0.000 description 1
- 230000008094 contradictory effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The application discloses an array substrate, a display panel and display equipment, which comprise a substrate, a plurality of pairs of scanning lines, a plurality of data lines, a plurality of pixel units and a plurality of storage capacitor units, wherein the scanning lines are arranged on the substrate at intervals along the row direction; the data lines are arranged on the substrate at intervals along the column direction; the pixel units are arranged between each pair of scanning lines and distributed in a rectangular array, two columns of pixel units connected with the data lines are arranged on two sides of each data line respectively, two pixel units on two sides of each data line are connected with two scanning lines of a pair of scanning lines respectively, and in a plurality of pixel units on the same row along the row direction, two pixel units spaced by one pixel unit are connected to the same scanning line; along the column direction, the capacitance values of the storage capacitors corresponding to the pixel units in two adjacent columns are different. The array substrate provided by the application can reduce the brightness difference of adjacent pixels caused by the delay of data signals due to the sharing of the data lines.
Description
Technical Field
The application relates to the technical field of display, in particular to an array substrate, a display panel and display equipment.
Background
As shown in fig. 1, in the dual-Gate pixel array, two adjacent pixel units in the horizontal direction share a data line Source, and two scan lines Gate are disposed between two adjacent pixel units in the vertical direction; compared with the traditional pixel array in which only one data line and one scanning line are arranged between two adjacent pixel units, the double-gate pixel array can reduce half of the data lines and increase the number of the scanning lines by one time. Since the number of the scan lines Gate is doubled, the pixel on time of each row is shortened under the condition that the refresh frequency of the picture per second is not changed, and the pixel charging difference caused by the signal delay becomes obvious. Because the driving sequence of the pixels on two sides of the same data line Source is different, the delay of the data signal can cause the charging difference of adjacent pixels, thereby generating the display defect of different brightness in the horizontal direction.
Therefore, a new display substrate is needed to solve the above technical problems.
Content of application
The main purpose of the present application is to provide an array substrate, a display panel and a display device, which aim to solve the technical problem of uneven brightness in the horizontal direction due to data signal delay in the existing dual-gate pixel array.
To achieve the above object, the present application provides an array substrate comprising:
a substrate base plate;
the scanning lines are arranged on the substrate at intervals along the row direction;
the data lines are arranged on the substrate base plate at intervals along the column direction;
the pixel units are arranged between each pair of scanning lines and distributed in a rectangular array, two columns of pixel units connected with the data lines are arranged on two sides of each data line respectively, two pixel units on two sides of each data line are connected with two scanning lines of a pair of scanning lines respectively, and two pixel units spaced by one pixel unit in a plurality of pixel units on the same row are connected to the same scanning line along the row direction;
along the column direction, the capacitance values of the storage capacitors corresponding to the pixel units in two adjacent columns are different.
Optionally, the pixel units include common electrode layers, insulating layers and passivation layers sequentially stacked on the substrate, the pixel units include first pixel electrodes and second pixel electrodes respectively disposed on two sides of the data lines, a first storage capacitor is formed between each first pixel electrode and the corresponding common electrode layer, a second storage capacitor is formed between each second pixel electrode and the corresponding common electrode layer, and capacitance values of the first storage capacitors and capacitance values of the second storage capacitors are different.
Optionally, the relative area of the first pixel electrode and the common electrode layer corresponding thereto along the extending direction of the scan line is different from the relative area of the second pixel electrode and the common electrode layer corresponding thereto along the extending direction of the scan line.
Optionally, widths of the plurality of common electrode layers in the extending direction of the scan lines are uniform, and a width of the first pixel electrode in the extending direction of the scan lines is different from a width of the second pixel electrode in the extending direction of the scan lines.
Optionally, a width of the first pixel electrode in the extending direction of the scan line is the same as a width of the second pixel electrode in the extending direction of the scan line, and a width of the common electrode layer corresponding to the first pixel electrode in the extending direction of the scan line is different from a width of the common electrode layer corresponding to the second pixel electrode in the extending direction of the scan line.
Optionally, in a direction perpendicular to a plane of the display substrate, a distance between the first pixel electrode and the common electrode layer corresponding thereto is different from a distance between the second pixel electrode and the common electrode layer corresponding thereto.
Optionally, the thickness of the passivation layer between the first pixel electrode and the common electrode layer corresponding thereto is different from the thickness of the passivation layer between the second pixel electrode and the common electrode layer corresponding thereto in a direction perpendicular to the plane of the display substrate.
Optionally, a thickness of the insulating layer between the first pixel electrode and the common electrode layer corresponding thereto is different from a thickness of the insulating layer between the second pixel electrode and the common electrode layer corresponding thereto in a direction perpendicular to a plane of the display substrate.
Optionally, the first pixel electrode and the second pixel electrode arranged at intervals along the extending direction of the scanning line include a red pixel electrode, a green pixel electrode, and a blue pixel electrode, and the red pixel electrode, the green pixel electrode, and the blue pixel electrode are periodically arranged along the extending direction of the scanning line.
The application also provides a display panel which comprises the array substrate.
The application also provides a display device which comprises the array substrate.
In the technical scheme of this application, the capacitance value through setting up the electric capacity that first pixel electrode corresponds is less than the capacitance value that second pixel electrode corresponds for in same time, the electric capacity that first pixel electrode corresponds can the charging rate higher, with reduce or avoid first pixel electrode and second pixel electrode because the different light and shade degree that leads to of charging effect differs.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
FIG. 1 is a schematic diagram of a partial structure of an array substrate in the prior art;
fig. 2 is a schematic partial structural view of an array substrate according to an embodiment of the present disclosure;
fig. 3 is another schematic structural diagram of a portion of an array substrate according to an embodiment of the present disclosure;
FIG. 4 is an enlarged schematic view of portion A of FIG. 3;
FIG. 5 is a schematic cross-sectional view of a storage capacitor according to an embodiment of the present application;
fig. 6 is a schematic cross-sectional view of a storage capacitor according to another embodiment of the present application.
The implementation, functional features and advantages of the objectives of the present application will be further explained with reference to the accompanying drawings.
Examples reference numbers illustrate:
| reference numerals | Name (R) | Reference numerals | Name (R) |
| 1 | |
3 | |
| 4 | Pixel unit | 5 | A |
| 7 | |
9 | |
| 91 | |
93 | |
| 95 | Passivation layer |
Detailed Description
The technical solutions in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that all the directional indications (such as up, down, left, right, front, and rear … …) in the embodiment of the present application are only used to explain the relative position relationship between the components, the movement situation, and the like in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indication is changed accordingly.
In addition, descriptions in this application as to "first", "second", etc. are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicit to the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present application, "plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
Moreover, the technical solutions in the embodiments of the present application may be combined with each other, but it is necessary to be able to be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination of the technical solutions should not be considered to exist, and is not within the protection scope of the present application.
The application provides an array substrate.
As shown in fig. 2, the array substrate provided by the embodiment of the present application includes: a substrate (not shown), a plurality of pairs of scanning lines 3, a plurality of data lines 1 and a plurality of pixel units 4, wherein the scanning lines 3 are arranged on the substrate at intervals along a row direction; the data lines 1 are arranged on the substrate at intervals along the column direction; the pixel units 4 are arranged between each pair of the scanning lines 3 and distributed in a rectangular array, two rows of the pixel units 4 connected with the data lines 1 are respectively arranged on two sides of each data line 1, and the two pixel units 4 on two sides of each data line 1 are respectively connected with the two scanning lines 3 of the pair of the scanning lines 3; in the row direction, two pixel units 4 which are separated by one pixel unit 4 in a plurality of pixel units 4 in the same row are connected to the same scanning line 3; along the column direction, the capacitance values of the storage capacitors corresponding to the pixel units 4 in two adjacent columns are different
In the present embodiment, the data line 1 extends in the "up" to "down" direction in the drawing, and the data line 1 is used to supply a data signal. Each data line 1 needs to be sequentially and alternately connected with pixel electrodes and pixel electrodes distributed on two sides of the data line; in the "up" to "down" direction, the direction from the start end to the tail end of one pixel unit 4 is the same as the data signal propagation direction of the data line 1. In the embodiment shown in fig. 2, the data signal propagates in the direction from "up" to "down", and in the pixel electrode array from "left" to "right", the pixel unit 4 in the first column has its start end connected to the data line D1, and the pixel unit 4 in the second column has its tail end connected to the data line D1, that is, the data line D1 is connected to the start end of the pixel unit 4 in the first column, and then connected to the tail end of the pixel unit 4 in the second column, and the process sequentially goes back and forth. The data line D2 connects the pixel element 4 in the third column and the pixel element 4 in the fourth column, and so on. The scanning lines 3 extend in the "left" to "right" direction in the drawing, and the scanning lines 3 are used to supply scanning signals. Each pair of scan lines 3 intersects any two adjacent data lines 1 to form a sub-pixel region. Two scanning lines 3 of each pair of scanning lines 3 are respectively connected with the pixel units 4 of the sub-pixel area.
The color filter substrate corresponding to the pixel unit 4 may be red, green, blue, or the like, so as to form a red sub-pixel R for displaying red, a green sub-pixel G for displaying green, a blue sub-pixel B for displaying blue, or the like. Each pixel unit 4 is located in each sub-pixel region and serves as an anode of each sub-pixel. The pixel unit 4 receives the corresponding data signal as the anode voltage of the corresponding sub-pixel. The common electrode layer 91 in the pixel unit 4 forms a capacitor with the corresponding pixel electrode, so as to maintain the anode voltage of each sub-pixel in one frame. The common electrode layer 91 may specifically be a plurality of common traces sequentially arranged at intervals.
Because two rows of pixel units 4 connected with the data line 1 are respectively arranged on two sides of each data line 1, and two pixel units 4 on two sides of each data line 1 are respectively connected with two scanning lines 3 of a pair of scanning lines 3, the capacitor charging ends formed by the pixel units 4 on two sides of the same data line 1 are different, and because the pixel units 4 on two sides of the same data line 1 are respectively connected to different scanning lines 3, the effect of the charged capacitor is different. In this application, through setting up two of data line 1 both sides the capacitance value of the storage capacitor that pixel unit 4 corresponds is different for in same time, the charging rate of the storage capacitor that one pixel unit 4 corresponds is higher than the charging rate of the storage capacitor that another pixel unit 4 corresponds, and the light and shade degree that leads to because the charging effect is different is reduced or avoided two pixel electrodes is different.
Referring to fig. 5, the pixel units 4 include a common electrode layer 91, an insulating layer 93, and a passivation layer 95 sequentially stacked on the substrate, the pixel units 4 include a first pixel electrode 5 and a second pixel electrode 7 respectively disposed on two sides of the data line 1, a first storage capacitor is formed between the first pixel electrode 5 and the corresponding common electrode layer 91, a second storage capacitor is formed between the second pixel electrode 7 and the corresponding common electrode layer 91, and a capacitance value of the first storage capacitor is different from a capacitance value of the second storage capacitor. That is, in the array substrate, the first pixel electrodes 5 are arranged in a plurality of columns, the second pixel electrodes 7 are arranged in a plurality of columns, and the columns in which the first pixel electrodes 5 are arranged alternate with the columns in which the second pixel electrodes 7 are arranged in sequence.
Referring to fig. 3 and fig. 4, a relative area of the first pixel electrode 5 and the common electrode layer 91 corresponding thereto along the extending direction of the scan line 3 is different from a relative area of the second pixel electrode 7 and the common electrode layer 91 corresponding thereto along the extending direction of the scan line 3.
Because C is equal to epsilon S/d, wherein C is a capacitance value, epsilon is the relative dielectric constant of a dielectric layer between two polar plates, S is the opposite area of the two polar plates, and d is the distance between the two polar plates. By changing the relative areas of the first pixel electrode 5 and the common electrode layer 91 and the second pixel electrode 7 and the common electrode layer 91, the capacitance corresponding to the first pixel electrode 5 and the capacitance corresponding to the second pixel electrode 7 are changed. Specifically, the first storage capacitance formed by the first pixel electrode 5 may be smaller than the second storage capacitance formed by the second pixel electrode 7, or the first storage capacitance formed by the first pixel electrode 5 may be larger than the second storage capacitance formed by the second pixel electrode 7. It is only necessary to ensure the start sequence along the scan line 3, and the storage capacitance of the pixel unit 4 with data signal delay on both sides of the same data line 1 is smaller.
In one embodiment, the widths of the plurality of common electrode layers 91 along the extending direction of the scan lines 3 are uniform, and the width of the first pixel electrode 5 along the extending direction of the scan lines 3 is different from the width of the second pixel electrode 7 along the extending direction of the scan lines 3. By changing the width d1 of the first pixel electrode 5 and the second pixel electrode 7, the opposing area of the first pixel electrode 5 and the common electrode layer 91 and the opposing area of the second pixel electrode 7 and the common electrode layer 91 are changed.
In another embodiment, a width of the first pixel electrode 5 in the extending direction of the scan line 3 is the same as a width of the second pixel electrode 7 in the extending direction of the scan line 3, and a width of the common electrode layer 91 corresponding to the first pixel electrode 5 in the extending direction of the scan line 3 is different from a width of the common electrode layer 91 corresponding to the second pixel electrode 7 in the extending direction of the scan line 3. By changing the width d1 of the common electrode layer 91 opposing the first pixel electrode 5 and the second pixel electrode 7, the opposing area of the first pixel electrode 5 and the common electrode layer 91 and the opposing area of the second pixel electrode 7 and the common electrode layer 91 are changed.
Referring to fig. 5, in a direction perpendicular to the plane of the display substrate, a distance between the first pixel electrode 5 and the common electrode layer 91 corresponding thereto is different from a distance between the second pixel electrode 7 and the common electrode layer 91 corresponding thereto. For simplicity of description, the following separation distances between a and B are taken as examples along a direction perpendicular to the plane of the display substrate, unless otherwise specified. As will be understood by those skilled in the art, the common electrode layer 91 is a conductive layer, and the common electrode layer 91 forms capacitances with the first pixel electrode 5 and the second pixel electrode 7, respectively. That is, the distance between the common electrode layer 91 and the first pixel electrode 5 is changed or the distance between the common electrode layer 91 and the second pixel electrode 7 is changed, so that the capacitance value of the corresponding capacitor can be adjusted. In this application, the distance between the common electrode layer 91 and the first pixel electrode 5 can be changed by changing the thickness of each layer structure disposed between the common electrode layer 91 and the first pixel electrode 5, so as to change the capacitance value of the capacitor corresponding to the first pixel electrode 5; or the thickness of each layer structure arranged between the common electrode layer 91 and the second pixel electrode 7 is changed to change the spacing distance between the common electrode layer 91 and the second pixel electrode 7, so as to change the capacitance value of the capacitor corresponding to the second pixel electrode 7.
In one embodiment, the thickness of the passivation layer 95 between the first pixel electrode 5 and the common electrode layer 91 corresponding thereto is different from the thickness of the passivation layer 95 between the second pixel electrode 7 and the common electrode layer 91 corresponding thereto in a direction perpendicular to the plane of the display substrate. In fig. 5, a distance d2 between the common electrode layer 91 and the first pixel electrode 5 is greater than a distance d2 between the common electrode layer 91 and the second pixel electrode 7.
Referring to fig. 6, in another embodiment, the thickness of the insulating layer 93 between the first pixel electrode 5 and the common electrode layer 91 corresponding thereto is different from the thickness of the insulating layer 93 between the second pixel electrode 7 and the common electrode layer 91 corresponding thereto along a direction perpendicular to the plane of the display substrate. In fig. 6, a distance d3 between the common electrode layer 91 and the first pixel electrode 5 is greater than a distance d3 between the common electrode layer 91 and the second pixel electrode 7. The distance between the common electrode layer 91 and the first pixel electrode 5 is changed or the distance between the common electrode layer 91 and the second pixel electrode 7 is changed by changing the thickness of the insulating layer 93 or the passivation layer 95, so that the capacitance value of the capacitor corresponding to the first pixel electrode 5 or the capacitance value of the capacitor corresponding to the second pixel electrode 7 is changed.
Referring to fig. 2, the first pixel electrodes 5 and the second pixel electrodes 7 arranged at intervals along the extending direction of the scan line 3 display red, green, and blue colors through color filter substrates of different colors, and the pixel electrodes for displaying red, the pixel electrodes for displaying green, and the pixel electrodes for displaying blue are periodically arranged along the extending direction of the scan line 3. In the present embodiment, the three colors are red, green and blue, respectively, and those skilled in the art can set more other colors as needed.
The application also provides a display panel, which comprises the array substrate. The specific structure of the display panel refers to the above embodiments, and since the display device adopts all technical solutions of all the above embodiments, at least all the beneficial effects brought by the technical solutions of the above embodiments are achieved, and no further description is given here.
The display panel can be applied to various electronic information products such as mobile phones, televisions, notebooks, displays and the like, and can be but not limited to a liquid crystal display panel. As can be understood by those skilled in the art, the display panel further includes a color film substrate and a liquid crystal layer. The color film substrate is arranged opposite to the array substrate. The liquid crystal layer is positioned between the color film substrate and the array substrate.
The application also provides a display device, which comprises the array substrate. The specific structure of the display device refers to the above embodiments, and since the display device adopts all technical solutions of all the above embodiments, at least all the beneficial effects brought by the technical solutions of the above embodiments are achieved, and no further description is given here.
The above description is only a preferred embodiment of the present application, and not intended to limit the scope of the present application, and all modifications and equivalents of the subject matter of the present application, which is intended to be covered by the claims and their equivalents, or which are directly or indirectly applicable to other related arts are intended to be included within the scope of the present application.
Claims (10)
1. An array substrate, comprising:
a substrate base plate;
the scanning lines are arranged on the substrate at intervals along the row direction;
the data lines are arranged on the substrate base plate at intervals along the column direction;
the pixel units are arranged between each pair of scanning lines and distributed in a rectangular array, two columns of pixel units connected with the data lines are arranged on two sides of each data line respectively, two pixel units on two sides of each data line are connected with two scanning lines of a pair of scanning lines respectively, and two pixel units spaced by one pixel unit in a plurality of pixel units on the same row are connected to the same scanning line along the row direction;
along the column direction, the capacitance values of the storage capacitors corresponding to the pixel units in two adjacent columns are different.
2. The array substrate of claim 1, wherein the pixel units comprise a common electrode layer, an insulating layer and a passivation layer sequentially stacked on the substrate, the plurality of pixel units comprise a first pixel electrode and a second pixel electrode respectively disposed on two sides of the data line, a first storage capacitor is formed between the first pixel electrode and the corresponding common electrode layer, a second storage capacitor is formed between the second pixel electrode and the corresponding common electrode layer, and a capacitance value of the first storage capacitor is different from a capacitance value of the second storage capacitor.
3. The array substrate of claim 2, wherein a relative area of the first pixel electrode and the common electrode layer corresponding thereto along the extending direction of the scan line is different from a relative area of the second pixel electrode and the common electrode layer corresponding thereto along the extending direction of the scan line.
4. The array substrate of claim 3, wherein the widths of the plurality of common electrode layers along the extending direction of the scan lines are uniform, and the width of the first pixel electrode along the extending direction of the scan lines is different from the width of the second pixel electrode along the extending direction of the scan lines.
5. The array substrate of claim 3, wherein a width of the first pixel electrode along the extending direction of the scan line is the same as a width of the second pixel electrode along the extending direction of the scan line, and a width of the common electrode layer corresponding to the first pixel electrode along the extending direction of the scan line is different from a width of the common electrode layer corresponding to the second pixel electrode along the extending direction of the scan line.
6. The array substrate of claim 2, wherein a distance between the first pixel electrode and the common electrode layer corresponding thereto is different from a distance between the second pixel electrode and the common electrode layer corresponding thereto in a direction perpendicular to a plane in which the display substrate is positioned.
7. The array substrate of claim 6, wherein the thickness of the passivation layer between the first pixel electrode and the common electrode layer corresponding thereto is different from the thickness of the passivation layer between the second pixel electrode and the common electrode layer corresponding thereto in a direction perpendicular to the plane of the display substrate.
8. The array substrate of claim 6, wherein the thickness of the insulating layer between the first pixel electrode and the common electrode layer corresponding thereto is different from the thickness of the insulating layer between the second pixel electrode and the common electrode layer corresponding thereto in a direction perpendicular to the plane of the display substrate.
9. A display panel comprising the array substrate according to any one of claims 1 to 8.
10. A display device comprising the array substrate according to claim 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110482457.0A CN113205747A (en) | 2021-04-30 | 2021-04-30 | Array substrate, display panel and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110482457.0A CN113205747A (en) | 2021-04-30 | 2021-04-30 | Array substrate, display panel and display device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN113205747A true CN113205747A (en) | 2021-08-03 |
Family
ID=77029924
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110482457.0A Pending CN113205747A (en) | 2021-04-30 | 2021-04-30 | Array substrate, display panel and display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113205747A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023201792A1 (en) * | 2022-04-18 | 2023-10-26 | 惠州华星光电显示有限公司 | Display panel |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI247160B (en) * | 2000-04-24 | 2006-01-11 | Matsushita Electric Ind Co Ltd | Liquid crystal display device |
| CN202838291U (en) * | 2012-10-19 | 2013-03-27 | 北京京东方光电科技有限公司 | Capacitance-type embedded touch screen and display device |
| CN104267552A (en) * | 2014-09-24 | 2015-01-07 | 深圳市华星光电技术有限公司 | Array substrate and liquid crystal display panel |
| CN104898343A (en) * | 2015-06-30 | 2015-09-09 | 重庆京东方光电科技有限公司 | Array substrate, display panel and display device |
| CN105185307A (en) * | 2015-09-23 | 2015-12-23 | 上海和辉光电有限公司 | Pixel circuit |
| CN106526998A (en) * | 2016-12-13 | 2017-03-22 | 厦门天马微电子有限公司 | Array substrate, liquid crystal display panel and display device |
| CN106940505A (en) * | 2017-05-08 | 2017-07-11 | 深圳市华星光电技术有限公司 | Liquid crystal display panel and liquid crystal display device |
| CN108154861A (en) * | 2018-01-24 | 2018-06-12 | 昆山龙腾光电有限公司 | A kind of top rake voltage generation circuit and liquid crystal display device |
| US20190371257A1 (en) * | 2018-05-31 | 2019-12-05 | Wuhan China Star Optoelectronics Technology Co., Ltd. | Pixel substrate, liquid crystal display panel and liquid crystal display device |
| CN110690360A (en) * | 2019-09-26 | 2020-01-14 | 上海天马有机发光显示技术有限公司 | Display panel and display device |
-
2021
- 2021-04-30 CN CN202110482457.0A patent/CN113205747A/en active Pending
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI247160B (en) * | 2000-04-24 | 2006-01-11 | Matsushita Electric Ind Co Ltd | Liquid crystal display device |
| CN202838291U (en) * | 2012-10-19 | 2013-03-27 | 北京京东方光电科技有限公司 | Capacitance-type embedded touch screen and display device |
| CN104267552A (en) * | 2014-09-24 | 2015-01-07 | 深圳市华星光电技术有限公司 | Array substrate and liquid crystal display panel |
| CN104898343A (en) * | 2015-06-30 | 2015-09-09 | 重庆京东方光电科技有限公司 | Array substrate, display panel and display device |
| CN105185307A (en) * | 2015-09-23 | 2015-12-23 | 上海和辉光电有限公司 | Pixel circuit |
| CN106526998A (en) * | 2016-12-13 | 2017-03-22 | 厦门天马微电子有限公司 | Array substrate, liquid crystal display panel and display device |
| CN106940505A (en) * | 2017-05-08 | 2017-07-11 | 深圳市华星光电技术有限公司 | Liquid crystal display panel and liquid crystal display device |
| CN108154861A (en) * | 2018-01-24 | 2018-06-12 | 昆山龙腾光电有限公司 | A kind of top rake voltage generation circuit and liquid crystal display device |
| US20190371257A1 (en) * | 2018-05-31 | 2019-12-05 | Wuhan China Star Optoelectronics Technology Co., Ltd. | Pixel substrate, liquid crystal display panel and liquid crystal display device |
| CN110690360A (en) * | 2019-09-26 | 2020-01-14 | 上海天马有机发光显示技术有限公司 | Display panel and display device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023201792A1 (en) * | 2022-04-18 | 2023-10-26 | 惠州华星光电显示有限公司 | Display panel |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107424551B (en) | Array substrate, special-shaped display and display device | |
| US20180157135A1 (en) | Pixel structure, array substrate, and liquid crystal display panel | |
| WO2022001411A9 (en) | Array substrate, display panel, and display apparatus | |
| US20050099378A1 (en) | Liquid crystal display device and method for driving the same | |
| US20130070002A1 (en) | Display panel and display device | |
| CN215526310U (en) | Array substrate and display panel | |
| CN100507690C (en) | Color liquid crystal display device | |
| CN112147825B (en) | Pixel structure, array substrate and display panel | |
| CN105527738B (en) | Array substrate, data drive circuit, data-driven method and display device | |
| CN113985671B (en) | Array substrate and display device | |
| CN111323977A (en) | Display panel and display device | |
| CN108803178B (en) | Liquid crystal display panel | |
| JP3335895B2 (en) | Liquid crystal display | |
| KR20140035242A (en) | Pixel unit, array substrate and liquid crystal display device | |
| US10761389B2 (en) | Pixel arrangement and display panel | |
| CN113205747A (en) | Array substrate, display panel and display device | |
| US7948595B2 (en) | Liquid crystal display panel | |
| US20220121075A1 (en) | Array substrate and display panel | |
| US10802361B2 (en) | Array substrate comprising a light-shielding electrode having a main section with a vertical projection covering a data line, liquid crystal display panel and liquid crystal display device | |
| US20180143472A1 (en) | Array substrate and display panel | |
| CN114787701B (en) | Display substrate, display panel and display device | |
| CN102749772B (en) | Liquid crystal display | |
| CN113325643A (en) | Array substrate and display device | |
| JP4357613B2 (en) | LCD with integrated driver | |
| US20200184915A1 (en) | Display apparatus |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20210803 |
|
| RJ01 | Rejection of invention patent application after publication |