CN113204804A - Security module, server mainboard and server - Google Patents
Security module, server mainboard and server Download PDFInfo
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- CN113204804A CN113204804A CN202110450116.5A CN202110450116A CN113204804A CN 113204804 A CN113204804 A CN 113204804A CN 202110450116 A CN202110450116 A CN 202110450116A CN 113204804 A CN113204804 A CN 113204804A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/76—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in application-specific integrated circuits [ASIC] or field-programmable devices, e.g. field-programmable gate arrays [FPGA] or programmable logic devices [PLD]
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/16—Constructional details or arrangements
- G06F1/18—Packaging or power distribution
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/30—Authentication, i.e. establishing the identity or authorisation of security principals
- G06F21/45—Structures or tools for the administration of authentication
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/82—Protecting input, output or interconnection devices
- G06F21/85—Protecting input, output or interconnection devices interconnection devices, e.g. bus-connected or in-line devices
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0016—Inter-integrated circuit (I2C)
Abstract
The invention provides a security module, a server mainboard and a server, wherein the security module comprises: a connector; the monitoring module is characterized in that a signal input pin of the monitoring module is connected to a first group of preset pins of the connector through an SPI bus, an output pin is connected to a second group of preset pins of the connector through the SPI bus, a power supply pin is connected to a third preset pin of the connector through a power supply lead, and a control pin is connected to a fourth group of preset pins of the connector through a control signal line; and a power supply pin of the identity authentication chip is connected to a power supply pin of the monitoring module, and an input pin is connected to a preset pin on the monitoring module and a fifth preset pin of the connector through an I2C bus. By using the scheme of the invention, flexible selection of chips can be realized, the cost can be reduced, the area on the mainboard can be better saved, the application selection of the safety function can be better carried out, the configuration complexity is simplified, the types of board card stock are simplified, and the economic benefit is improved.
Description
Technical Field
The field relates to the field of computers, and more particularly to a security module, a server motherboard, and a server.
Background
With the continuous development of the technology, the security of the information data is more and more important, the security mechanism of the software is gradually improved, and the security protection measures based on the hardware are more and more important.
The server hardware security protection needs to introduce a hardware design chip or module, and the Intel promotes PFR (Platform Firmware protection and recovery) in the latest Platform design, and performs functions of detecting, protecting and recovering Platform Firmware by using FPGA (field programmable gate array) in combination with software development.
The introduction of new functions causes the GPIO resource demand of the FPGA to rise sharply, the FPGA with large size and many GPIO resources is required to be used according to the suggestion of Intel, and only the FPGA chip with the same series, the same size and low pin to pin (aiming at the pin) resources can be replaced aiming at the configuration requirement of not supporting the function, but the cost of the chip is still higher, and the cost also rises even if the PFR function is not supported.
In the existing design supporting the PFR function, a protected device is a FLASH memory (FLASH memory) and respectively belongs to a firmware storage chip of a PCH (platform control unit) and a BMC (baseboard management controller), an FPGA includes a system function and a PFR function, the system function mainly realizes system timing control, the PFR mainly realizes whether the written firmware is safe or not by comparison, the function realized by a switching unit is controlled by the FPGA, and the FLASH firmware is selected to be refreshed from the PCH or recovered by a PFGA according to whether the firmware judged by the FPGA is safe or not. The biggest defect of the existing scheme is that when the PFR function is not supported, in order to design a shared board card with the design supporting the PFR, an FPGA chip needs to select an FPGA capable of supporting the PFR function to carry out pin to pin design, the cost is increased when the PFR is not supported, and the material selection range can only be limited to the FPGA chip with high resources.
Disclosure of Invention
In view of this, an object of the embodiments of the present invention is to provide a security module, a server motherboard, and a server, which can implement flexible selection of chips, reduce cost, better save area on the motherboard, and perform application selection of security functions, simplify configuration complexity, simplify board stock types, and improve economic benefits.
In view of the above object, an aspect of an embodiment of the present invention provides a security module including:
a connector;
the monitoring module is characterized in that a signal input pin of the monitoring module is connected to a first group of preset pins of the connector through an SPI bus, an output pin is connected to a second group of preset pins of the connector through the SPI bus, a power supply pin is connected to a third preset pin of the connector through a power supply lead, and a control pin is connected to a fourth group of preset pins of the connector through a control signal line;
and a power supply pin of the identity authentication chip is connected to a power supply pin of the monitoring module, and an input pin is connected to a preset pin on the monitoring module and a fifth preset pin of the connector through an I2C bus.
According to one embodiment of the invention, the monitoring module is a security monitoring FPGA module and is configured to refresh firmware to implement PFR functionality.
According to one embodiment of the invention, the connector is a male connector and is configured to plug into a female connector on a server motherboard to connect with the server motherboard.
According to an embodiment of the invention, an on-site detection pin is further arranged on the connector, and the on-site detection pin is grounded.
In another aspect of the embodiments of the present invention, there is also provided a server board, where the server board includes:
a security module, the security module comprising:
a connector;
the monitoring module is characterized in that a signal input pin of the monitoring module is connected to a first group of preset pins of the connector through an SPI bus, an output pin is connected to a second group of preset pins of the connector through the SPI bus, a power supply pin is connected to a third preset pin of the connector through a power supply lead, and a control pin is connected to a fourth group of preset pins of the connector through a control signal line;
the power supply pin of the identity authentication chip is connected to the power supply pin of the monitoring module, and the input pin is connected to a preset pin on the monitoring module and a fifth preset pin of the connector through an I2C bus;
the connector female head is plugged with the connector, a first group of pins of the connector female head are connected to a first group of preset pins, a second group of pins are connected to a second group of preset pins, a third pin is connected to a third preset pin, a fourth group of pins are connected to a fourth group of preset pins, and a fifth pin is connected to a fifth preset pin;
a PCH chip having an output pin connected to one of the first set of pins;
the first selection pin of the switch chip is connected to one of the second group of pins, the second selection pin is connected to the output pin of the PCH chip, and the control pin is connected to one of the fourth group of pins;
the Flash chip input pin is connected to the control pin of the switch chip;
and the output end of the CPLD chip is connected to the fifth pin.
According to an embodiment of the present invention, further comprising:
the BMC chip is connected with the output pin of the first group of pins;
the first selection pin of the first switch chip is connected to the other pin of the second group of pins, the second selection pin is connected to the output pin of the BMC chip, and the control pin is connected to the other pin of the fourth group of pins;
and the input pin of the first Flash chip is connected to the control pin of the first switch chip.
According to one embodiment of the invention, the monitoring module is a security monitoring FPGA module and is configured to refresh firmware to implement PFR functionality.
According to an embodiment of the invention, an on-site detection pin is further arranged on the connector, and the on-site detection pin is grounded.
According to one embodiment of the invention, an in-place pin is arranged on the female connector head, the in-place pin is connected with the in-place detection pin, and the in-place pin is connected to the CPLD chip.
In another aspect of the embodiment of the present invention, a server is further provided, and the server includes the above server motherboard.
The invention has the following beneficial technical effects: the safety module provided by the embodiment of the invention is provided with the connector; the monitoring module is characterized in that a signal input pin of the monitoring module is connected to a first group of preset pins of the connector through an SPI bus, an output pin is connected to a second group of preset pins of the connector through the SPI bus, a power supply pin is connected to a third preset pin of the connector through a power supply lead, and a control pin is connected to a fourth group of preset pins of the connector through a control signal line; the identity authentication chip, the power pin of identity authentication chip is connected to monitoring module's power pin, the input pin is connected to the technical scheme who predetermines pin and the fifth of connector on the monitoring module through I2C bus, can realize the nimble selection of chip, can reduce cost, the area on the saving mainboard that can be better and the application of carrying out the safety function select, the complexity of configuration has been simplified, the kind of integrated circuit board stock has been simplified, promote economic benefits.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other embodiments can be obtained by using the drawings without creative efforts.
FIG. 1 is a schematic diagram of a security module according to one embodiment of the present invention;
FIG. 2 is a diagram of a server motherboard according to an embodiment of the invention;
fig. 3 is a schematic diagram of a server according to one embodiment of the invention.
Detailed Description
Embodiments of the present disclosure are described below. However, it is to be understood that the disclosed embodiments are merely examples and that other embodiments may take various and alternative forms. The figures are not necessarily to scale; certain features may be exaggerated or minimized to show details of particular components. Therefore, specific structural and functional details disclosed herein are not to be interpreted as limiting, but merely as a representative basis for teaching one skilled in the art to variously employ the present invention. As one of ordinary skill in the art will appreciate, various features illustrated and described with reference to any one of the figures may be combined with features illustrated in one or more other figures to produce embodiments that are not explicitly illustrated or described. The combination of features shown provides a representative embodiment for a typical application. However, various combinations and modifications of the features consistent with the teachings of the present disclosure may be desirable for certain specific applications or implementations.
In view of the above objects, a first aspect of embodiments of the present invention proposes an embodiment of a security module. Fig. 1 shows a schematic view of the security module.
As shown in fig. 1, the security module may include:
a connector;
the monitoring module is characterized in that a signal input pin of the monitoring module is connected to a first group of preset pins of the connector through an SPI bus, an output pin is connected to a second group of preset pins of the connector through the SPI bus, a power supply pin is connected to a third preset pin of the connector through a power supply lead, and a control pin is connected to a fourth group of preset pins of the connector through a control signal line;
and a power supply pin of the identity authentication chip is connected to a power supply pin of the monitoring module, and an input pin is connected to a preset pin on the monitoring module and a fifth preset pin of the connector through an I2C bus.
The connector is a connector male head, the connector male head can be inserted into a connector female head in the mainboard to be interconnected with the mainboard in a signal mode, the connector can also be the connector female head, and the mainboard is provided with a connector male head matched with the connector female head. The pins in the female connector and the male connector need to correspond one-to-one to enable the communication of signals on the security module and the motherboard.
The monitoring module is the safety monitoring FPGA, this FPGA chip can support PFR's function through refreshing the firmware, FPGA comes and compares with inside black and white list through the data on the control SPI bus, if the operation in the blacklist appears will be through the state that changes control signal to realize the switching unit on the control mainboard and carry out the switching of FLASH SPI bus source, thereby the harmful operation of disconnection, resume original safe firmware, thereby start the function of protection firmware security.
The identity authentication chip stores board card information and an authentication password, the CPLD on the mainboard reads information through the I2C and the FPR chip, the mainboard is powered on after the password is confirmed to be matched, and if the password is not matched, the CPLD is locked and is not powered on any more, so that the function of mutual matching of a mainboard and a security module is realized, and the security is enhanced.
According to the technical scheme, flexible selection of the chip can be realized, the cost can be reduced, the area on the mainboard can be better saved, the application selection of the safety function can be better performed, the configuration complexity is simplified, the types of board card stock are simplified, and the economic benefit is improved.
In a preferred embodiment of the invention, the monitoring module is a security monitoring FPGA module and is configured to refresh firmware to implement PFR functionality. The FPGA chip (module) can support the function of PFR through refreshing the firmware, FPGA compares with inside black and white list through the data on the control SPI bus, if the operation in the blacklist will be through the state that changes control signal, thereby realize that the switching unit on the control mainboard carries out the switching of FLASH SPI bus source, thereby disconnect harmful operation, resume original safe firmware, thereby start the function of protection firmware security.
In a preferred embodiment of the invention, the connector is a male connector and is configured to plug into a female connector on a server motherboard to connect with the server motherboard. The pins in the female connector and the male connector need to correspond one-to-one to enable the communication of signals on the security module and the motherboard.
In a preferred embodiment of the present invention, a position detection pin is further disposed on the connector, and the position detection pin is grounded.
According to the technical scheme, flexible selection of the chip can be realized, the cost can be reduced, the area on the mainboard can be better saved, the application selection of the safety function can be better performed, the configuration complexity is simplified, the types of board card stock are simplified, and the economic benefit is improved.
In view of the above object, a second aspect of the embodiments of the present invention provides a server motherboard, as shown in fig. 2, the server motherboard includes:
a security module, the security module comprising:
a connector;
the monitoring module is characterized in that a signal input pin of the monitoring module is connected to a first group of preset pins of the connector through an SPI bus, an output pin is connected to a second group of preset pins of the connector through the SPI bus, a power supply pin is connected to a third preset pin of the connector through a power supply lead, and a control pin is connected to a fourth group of preset pins of the connector through a control signal line;
the power supply pin of the identity authentication chip is connected to the power supply pin of the monitoring module, and the input pin is connected to a preset pin on the monitoring module and a fifth preset pin of the connector through an I2C bus;
the connector female head is plugged with the connector, a first group of pins of the connector female head are connected to a first group of preset pins, a second group of pins are connected to a second group of preset pins, a third pin is connected to a third preset pin, a fourth group of pins are connected to a fourth group of preset pins, and a fifth pin is connected to a fifth preset pin;
a PCH chip having an output pin connected to one of the first set of pins;
the first selection pin of the switch chip is connected to one of the second group of pins, the second selection pin is connected to the output pin of the PCH chip, and the control pin is connected to one of the fourth group of pins;
the Flash chip input pin is connected to the control pin of the switch chip;
and the output end of the CPLD chip is connected to the fifth pin.
In a preferred embodiment of the present invention, the method further comprises:
the BMC chip is connected with the output pin of the first group of pins;
the first selection pin of the first switch chip is connected to the other pin of the second group of pins, the second selection pin is connected to the output pin of the BMC chip, and the control pin is connected to the other pin of the fourth group of pins;
the input pin of the first Flash chip is connected to the control pin of the first switch chip
The safety module realizes the monitoring and recovery functions of PCH and BMC firmware, firstly, resource assessment is carried out, 4 groups of SPI buses (two inputs and two outputs) need to be supported by the safety FPGA, 2 control signals respectively control the switch chip and the first switch chip, a group of I2C is used for connecting the identity authentication chip, and a small amount of other GPIOs are added, the GPIO resources only need 50 pins, the range of selecting the FPGA is very wide, the CPLD of the system does not need to design the pins to the pins, and therefore, the selection is very flexible. The independent design of the safety module can save space on the mainboard, and the safety module can be flexibly replaced, so that any suitable connector can be selected, and the safety module board card can be connected through the mutual matching of the connectors. An identity authentication chip is designed on the security module board, and is interconnected with the system CPLD through I2C to perform identity binding, so that the function of matching one security module with one mainboard is realized, and malicious removal or replacement is prevented. When the safety module is in place, the main board CPLD detects low voltage, if the safety module is not in place, the main board CPLD detects high voltage, and at the moment, if the safety module is configured in support, the system function CPLD does not do startup action.
In a preferred embodiment of the invention, the monitoring module is a security monitoring FPGA module and is configured to refresh firmware to implement PFR functionality. The PGA chip (module) can support the function of PFR through refreshing the firmware, FPGA compares with inside black and white list through the data on the control SPI bus, if the operation in the blacklist will be through the state that changes control signal, thereby realize that the switching unit on the control mainboard carries out the switching of FLASH SPI bus source, thereby disconnect harmful operation, resume original safe firmware, thereby start the function of protection firmware security.
In a preferred embodiment of the present invention, a position detection pin is further disposed on the connector, and the position detection pin is grounded.
In a preferred embodiment of the invention, an in-place pin is arranged on the female connector head, the in-place pin is connected with the in-place detection pin, and the in-place pin is connected to the CPLD chip. When the safety module is in place, the main board CPLD detects low voltage, if the safety module is not in place, the main board CPLD detects high voltage, and at the moment, if the safety module is configured in support, the system function CPLD does not do startup action.
In view of the above object, according to a third aspect of the embodiments of the present invention, a server 1 is provided, where the server 1 includes the above server motherboard 2.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
The embodiments described above, particularly any "preferred" embodiments, are possible examples of implementations and are presented merely to clearly understand the principles of the invention. Many variations and modifications may be made to the above-described embodiments without departing from the spirit and principles of the technology described herein. All such modifications are intended to be included within the scope of this disclosure and protected by the following claims.
Claims (10)
1. A security module, comprising:
a connector;
a signal input pin of the monitoring module is connected to a first group of preset pins of the connector through an SPI bus, an output pin is connected to a second group of preset pins of the connector through the SPI bus, a power supply pin is connected to a third preset pin of the connector through a power supply lead, and a control pin is connected to a fourth group of preset pins of the connector through a control signal wire;
and a power supply pin of the identity authentication chip is connected to a power supply pin of the monitoring module, and an input pin is connected to a preset pin on the monitoring module and a fifth preset pin of the connector through an I2C bus.
2. The security module of claim 1, wherein the monitoring module is a security monitoring FPGA module and is configured to refresh firmware to implement PFR functionality.
3. The security module of claim 1, wherein the connector is a male connector and is configured to plug into a female connector on a server motherboard to connect with the server motherboard.
4. The security module of claim 1, wherein an in-place detection pin is further disposed on the connector, the in-place detection pin being grounded.
5. A server board, comprising:
a security module, the security module comprising:
a connector;
a signal input pin of the monitoring module is connected to a first group of preset pins of the connector through an SPI bus, an output pin is connected to a second group of preset pins of the connector through the SPI bus, a power supply pin is connected to a third preset pin of the connector through a power supply lead, and a control pin is connected to a fourth group of preset pins of the connector through a control signal wire;
the power supply pin of the identity authentication chip is connected to the power supply pin of the monitoring module, and the input pin is connected to a preset pin on the monitoring module and a fifth preset pin of the connector through an I2C bus;
the connector female head is plugged with the connector, a first group of pins of the connector female head are connected to the first group of preset pins, a second group of pins are connected to the second group of preset pins, a third pin is connected to the third preset pin, a fourth group of pins are connected to the fourth group of preset pins, and a fifth pin is connected to the fifth preset pin;
a PCH chip having an output pin connected to one of the first set of pins;
a switch chip, wherein a first selection pin of the switch chip is connected to one of the second group of pins, a second selection pin of the switch chip is connected to the output pin of the PCH chip, and a control pin of the switch chip is connected to one of the fourth group of pins;
the Flash chip input pin is connected to the control pin of the switch chip;
and the output end of the CPLD chip is connected to the fifth pin.
6. The server motherboard according to claim 5, further comprising:
a BMC chip connected to another of the first set of pins;
a first switch chip, wherein a first selection pin of the first switch chip is connected to another pin in the second group of pins, a second selection pin is connected to the BMC chip output pin, and a control pin is connected to another pin in the fourth group of pins;
and the input pin of the first Flash chip is connected to the control pin of the first switch chip.
7. The server motherboard of claim 5 wherein the monitoring module is a security monitoring FPGA module and is configured to refresh firmware to implement PFR functionality.
8. The server motherboard according to claim 5, wherein the connector is further provided with an on-position detection pin, and the on-position detection pin is grounded.
9. The server motherboard according to claim 8 wherein the connector header is provided with an in-place pin, the in-place pin is connected to the in-place detection pin, and the in-place pin is connected to the CPLD chip.
10. A server, characterized in that the server comprises a server motherboard according to any of claims 5 to 9.
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