CN113193950A - Data encryption method, data decryption method and storage medium - Google Patents
Data encryption method, data decryption method and storage medium Download PDFInfo
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Abstract
The invention discloses a data encryption method, a data decryption method and a storage medium, wherein the data encryption method comprises the following steps: after plaintext data are received, the plaintext data are split into plaintext character strings in a preset number; performing cyclic encryption on each plaintext character string for a preset number of times by adopting a preset encryption key sequence to obtain a ciphertext character string corresponding to each plaintext character string; the ciphertext character strings are combined to obtain ciphertext data, the problem that encryption and decryption algorithms of different levels cannot be executed in the same coprocessor in the prior art is solved, and the coprocessor achieves balance of power consumption and performance in different scenes.
Description
Technical Field
The present invention relates to the field of data encryption and decryption technologies, and in particular, to a data encryption method, a data decryption method, and a storage medium.
Background
Advanced Encryption Standard (AES) is a common symmetric Encryption algorithm, has the characteristics of high security, high speed and the like, plays an important role in the field of information security, and coprocessors are adopted in many scenes in the prior art to accelerate the AES Encryption and decryption algorithms.
Disclosure of Invention
The embodiment of the application aims to solve the problem that encryption and decryption algorithms of different levels cannot be realized in the same coprocessor by providing a data encryption method, a data decryption method and a storage medium.
The embodiment of the application provides a data encryption method, which comprises the following steps:
after plaintext data are received, the plaintext data are split into plaintext character strings in a preset number;
performing cyclic encryption on each plaintext character string for a preset number of times by adopting a preset encryption key sequence to obtain a ciphertext character string corresponding to each plaintext character string;
and merging the ciphertext character strings to obtain ciphertext data.
In an embodiment, the step of performing cyclic encryption on each plaintext character string by a preset number of times using a preset encryption key sequence includes:
sequentially extracting each plaintext character string in a cache, wherein the plaintext character strings obtained by splitting are sequentially stored in the cache according to the splitting sequence;
after each plaintext character string is extracted, extracting a first encryption key in an encryption key sequence;
encrypting the plaintext character string by adopting a first encryption key to obtain a ciphertext character string;
taking the first encryption key as a current encryption key;
acquiring a next encryption key of the current encryption key in an encryption key sequence, encrypting the ciphertext character string by adopting the next encryption key, and updating the ciphertext character string by adopting an encryption result;
taking the next encryption key as a current encryption key;
and returning to the step of executing the next encryption key of the current encryption key in the encryption key sequence until the encryption keys in the encryption key sequence are all extracted or the encryption times of the plaintext character string reach preset times, and taking the current encryption result as the ciphertext character string corresponding to the plaintext character string.
In an embodiment, the step of encrypting the plaintext character string by using the first encryption key to obtain a ciphertext character string includes: and sequentially performing round key addition operation, byte substitution table look-up operation, row displacement operation and column mixing operation on the plaintext character string by adopting the first encryption key to obtain a ciphertext character string.
In an embodiment, the step of merging the ciphertext character strings to obtain ciphertext data includes: and combining the encryption results corresponding to the ciphertext character strings according to the encryption sequence to obtain ciphertext data.
In addition, to achieve the above object, the present invention further provides a data decryption method, where the data decryption method includes:
after receiving ciphertext data, caching the ciphertext data, wherein the ciphertext data comprises a preset number of ciphertext character strings;
respectively carrying out cyclic decryption on each ciphertext character string for preset times by adopting a preset decryption key sequence to obtain a plaintext character string corresponding to each ciphertext character string;
and combining the plaintext character strings to obtain plaintext data.
In an embodiment, the step of performing cyclic decryption on each ciphertext character string by using a preset decryption key sequence for a preset number of times to obtain a plaintext character string corresponding to each ciphertext character string includes:
sequentially extracting each ciphertext character string in the cache;
after each ciphertext character string is extracted, extracting a first decryption key in a decryption key sequence;
decrypting the ciphertext character string by adopting the first decryption key to obtain a plaintext character string;
taking the first decryption key as a current decryption key;
acquiring a next decryption key of the current decryption key in the decryption key sequence, decrypting the ciphertext character string by adopting the next decryption key, and updating the plaintext character string by adopting a decryption result;
taking the next decryption key as a current decryption key;
and returning to the step of executing the next decryption key of the current decryption key in the decryption key sequence until the decryption keys in the decryption key sequence are all extracted or the decryption times of the ciphertext character string reach preset times, and taking the current decryption result as the plaintext character string corresponding to the ciphertext character string.
In an embodiment, the step of decrypting the ciphertext character string by using the first decryption key to obtain a plaintext character string includes:
and sequentially performing round key addition operation, byte inverse substitution table look-up operation, inverse row displacement operation and inverse column mixing operation on the ciphertext character string by adopting the first decryption key to obtain the plaintext character string.
In an embodiment, after receiving ciphertext data, caching the ciphertext data, where the step of including a preset number of ciphertext character strings in the ciphertext data further includes:
acquiring a working mode of a coprocessor;
determining the number of ciphertext character strings extracted from the cache each time according to the working mode;
the step of respectively performing the cyclic decryption on each ciphertext character string for the preset times by adopting a preset decryption key sequence to obtain a plaintext character string corresponding to each ciphertext character string comprises the following steps:
and respectively carrying out parallel cyclic decryption on the number of ciphertext character strings for preset times by adopting a preset decryption key sequence to obtain plaintext character strings corresponding to the number of ciphertext character strings.
In an embodiment, the step of merging the plaintext character strings to obtain plaintext data includes: and combining the decryption results corresponding to the plaintext character strings according to the decryption sequence to obtain plaintext data.
In addition, to achieve the above object, the present invention further provides a storage medium having a data encryption program and a data decryption program, the data encryption program implementing the steps of the data encryption method when executed by a processor, and the data decryption program implementing the steps of the data decryption method when executed by the processor.
The technical scheme of the data encryption method, the data decryption method and the storage medium provided in the embodiment of the application at least has the following technical effects or advantages:
after receiving plaintext data, the method splits the plaintext data into a preset number of plaintext character strings; performing cyclic encryption on each plaintext character string for a preset number of times by adopting a preset encryption key sequence to obtain a ciphertext character string corresponding to each plaintext character string; the technical scheme of combining the ciphertext character strings to obtain ciphertext data solves the problem that in the prior art, different levels of encryption algorithms are executed in the same coprocessor, and enables the coprocessor to achieve balance of power consumption and performance under different scenes.
After receiving ciphertext data, caching the ciphertext data, wherein the ciphertext data comprises a preset number of ciphertext character strings; respectively carrying out cyclic decryption on each ciphertext character string for preset times by adopting a preset decryption key sequence to obtain a plaintext character string corresponding to each ciphertext character string; the technical scheme of combining the plaintext character strings to obtain the plaintext data solves the problem that decryption algorithms of different levels are executed in the same coprocessor in the prior art, and enables the coprocessor to achieve balance of power consumption and performance under different scenes.
Drawings
FIG. 1 is a schematic diagram of a hardware operating environment of a data encryption method and a data decryption method according to the present invention;
FIG. 2 is a block diagram of data encryption and data decryption according to the present invention;
FIG. 3 is a schematic diagram of the internal structure of the coprocessor of the present invention;
FIG. 4 is a schematic flow chart of data encryption and data decryption according to the present invention;
FIG. 5 is a flowchart illustrating a first embodiment of a data encryption method according to the present invention;
FIG. 6 is a flowchart illustrating a second embodiment of a data encryption method according to the present invention;
FIG. 7 is a flowchart illustrating a fifth embodiment of a data decryption method according to the present invention;
FIG. 8 is a flowchart illustrating a sixth embodiment of a data decryption method according to the present invention;
FIG. 9 is a flowchart illustrating an eighth embodiment of a data decryption method according to the present invention;
the implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
For a better understanding of the above technical solutions, exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
As shown in fig. 1, fig. 1 is a schematic structural diagram of a hardware operating environment according to an embodiment of the present invention.
It should be noted that fig. 1 is a schematic structural diagram of a hardware operating environment of a data encryption method and a data decryption method, as shown in fig. 1, a bus interface of a coprocessor is mounted on a system bus, meanwhile, the system bus is connected with an external cache, an extended instruction interface of the coprocessor is connected with an extended instruction interface of a RISCV main processor, receives a RISCV-AES encryption/decryption extended instruction sent by the main processor, performs corresponding configuration according to the RISCV-AES encryption/decryption extended instruction, reads plaintext data or ciphertext data from the external cache through the bus interface, writes the ciphertext data generated by encryption and the plaintext data generated by decryption into the external cache after completing encryption or decryption in the coprocessor, and when the ciphertext data and the plaintext data are all written into the external cache, and generating an interrupt signal, sending the terminal signal to the RISCV main processor, and informing the RISCV main processor that AES encryption or decryption operation is completed once.
Those skilled in the art will appreciate that the hardware operating environment of the data encryption method and the data decryption method of fig. 1 is not limited in structure to the data encryption device, and may include more or fewer components than those shown, or some components may be combined, or a different arrangement of components.
It should be noted that although a logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in an order different from that shown, and the data encryption method and the data decryption method are applied to the coprocessor.
In the embodiment of the invention, AES (advanced encryption) is a block encryption standard adopted by the U.S. federal government and belongs to symmetric encryption; the length of a plaintext character string and a ciphertext character string of the AES algorithm is fixed to be 128 bits, the AES algorithm supports three lengths of 128 bits, 192 bits and 256 bits regardless of an encryption key or a decryption key, and the AES algorithm is divided into three types of AES-128, AES-192 and AES-256 according to the difference of the lengths of the keys; working modes supported by the coprocessor: the encryption/decryption algorithm comprises 1 group of data serial encryption/decryption mode, 2 group of data parallel encryption/decryption mode, 3 group of data parallel encryption/decryption mode and 4 group of data parallel encryption/decryption mode, wherein the encryption/decryption algorithm with three key lengths of AES-128, AES-192 and AES-256 is supported in each working mode.
As shown in fig. 5, in a first embodiment of the present application, a data encryption method of the present application includes the following steps:
step S110, after receiving plaintext data, splitting the plaintext data into a preset number of plaintext character strings;
step S120, a preset encryption key sequence is adopted to respectively carry out circular encryption on each plaintext character string for a preset number of times so as to obtain a ciphertext character string corresponding to each plaintext character string;
and step S130, merging the ciphertext character strings to obtain ciphertext data.
In this embodiment, in order to solve the problem that different levels of encryption/decryption algorithms cannot be performed in the same coprocessor, the present application designs a data encryption/decryption method, which is applied to an AES encryption/decryption coprocessor based on an RISCV extended instruction set, and utilizes a customized RISCV-AES encryption/decryption co-extended instruction set to schedule and implement the AES algorithm of the instruction set at the instruction set level, so that the coprocessor can flexibly execute AES algorithms of different levels, such as AES-128, AES-192, AES-256, etc., in a programmable and configurable manner, and can flexibly schedule and configure plaintext character strings according to the length of plaintext or ciphertext, for example, in a high-performance usage scenario, more coprocessor hardware resources can be called to implement multi-stage plaintext/ciphertext parallel encryption/decryption, thereby implementing fast encryption/decryption of high-speed data streams, in a low-power consumption use scene, only specific hardware resources in the coprocessor can be started, and other hardware resources enter a low-power consumption state, so that the power consumption of the coprocessor chip is reduced.
In this embodiment, as shown in fig. 2, fig. 2 is a block diagram of data encryption and data decryption, a plaintext block in fig. 2 is a plaintext character string, the length of each plaintext character string is fixed to be 128bit, a dashed arrow in fig. 2 points to represent an encryption process, a solid arrow points to represent a decryption process, during encryption, plaintext data is split into a plurality of 128-bit plaintext character strings, each plaintext character string is encrypted by an AES encryption algorithm to obtain a 128-bit ciphertext character string with a corresponding length, and the ciphertext character strings are combined to obtain final ciphertext data to be output.
In this embodiment, after obtaining the plaintext data, the plaintext data is split into a plurality of plaintext character strings and stored in an external cache, and since the length of each plaintext character string is fixed to 128 bits, the preset number of plaintext character strings can be determined according to the length of the plaintext data and the length of the plaintext character string; the preset times of the circular encryption can be determined according to the working mode of the coprocessor, the preset times of the circular encryption can be determined after the working mode of the coprocessor is determined, the preset encryption key sequence is adopted to respectively perform the circular encryption on each plaintext character string for the preset times so as to obtain a ciphertext character string corresponding to each plaintext character string, and finally all ciphertext character strings are combined to obtain ciphertext data.
In this embodiment, an internal structure diagram of the coprocessor is shown in fig. 3, the RISCV main processor sends an RISCV-AES encryption extension instruction to the coprocessor through an extension instruction port, and a decoding module of the coprocessor decodes the RISCV-AES encryption extension instruction to obtain configuration information such as a source address, a plaintext data length, a destination address, an initial key, an encryption key length, a coprocessor working mode, and the like of plaintext data; in this embodiment, taking an AES-128, 1 group of plaintext character string serial encryption mode as an example, a flow of obtaining ciphertext data by encrypting plaintext data is shown in fig. 4, first, an extended key generation module of a coprocessor extends an initial key to generate an encryption key sequence; then, the DMA module carries 1 set of plaintext character strings from the external cache in fig. 1 according to the source address of the plaintext data, writes the plaintext character strings into the memory 1 inside the coprocessor, and the control module starts AES encryption operation; then, the round key adding module obtains a first round encryption key from an encryption key sequence of the encryption key generating module, and the control module reads 1 group of plaintext character strings from the memory 1 in series; then, inputting the plaintext character string into a round key adding module 0 of an encryption operation unit, completing a first round of encryption after passing through a byte substitution lookup table, a row shift 0 and a column mixing module 0, inputting an output data stream into the round key encrypting module 0 again, and performing a second round of encryption; by analogy, when the tenth round of encryption is performed, the control module controls the data stream to skip the column mixing module 0 and directly input the data stream into the round key adding module 0 to generate 1 group of ciphertext character strings for output, the ciphertext character strings are written into the memory 2 and read out by the DMA module and are carried to a destination address, and then 1 group of plaintext character strings are encrypted; DMA then obtains 1 group of plaintext character strings from the source address, the process is repeated until all the plaintext character strings are completely encrypted, the coprocessor sends an interrupt to the RISCV main processor, AES-128 encryption is completed once, ciphertext character strings obtained by each encryption are combined to obtain ciphertext data, in the process, only specific hardware resources in the coprocessor are started, and the rest hardware resources enter a low power consumption state, so that the power consumption of the chip is reduced.
In this embodiment, a primary AES-128, 4 plaintext character string parallel encryption mode is similar to the 1 plaintext character string serial encryption mode, the difference is that the number of plaintext character strings obtained from the source address each time is different, specifically, the DMA module carries 4 plaintext character strings from the external cache according to the source address of the plaintext data, and writes the plaintext character strings into the memory 1 inside the coprocessor, and the control module starts AES encryption operation; the round key adding module firstly obtains a first round key from an encryption key sequence of the encryption key generating module, the control module reads 4 groups of plaintext character strings from the memory 1 in parallel, the 4 groups of plaintext character strings are respectively input into the round key adding module 0-the round key adding module 3 in the encryption operation unit, the first round encryption is completed after the operations of the round key adding module 0-the round key adding module 3 in the encryption operation unit are correspondingly performed respectively through the byte replacement lookup table module, the row shifting module 0-the row shifting module 3 and the column mixing module 0-the column mixing module 3, and the output data stream is input into the round key encrypting module again for the second round encryption; by analogy, when the tenth round of encryption is performed, the control module controls the data stream to skip the column mixing module 0-the column mixing module 3 and directly input into the round key adding module 0-the round key adding module 3 to generate 4 groups of ciphertext character strings for output, the ciphertext character strings are written into the memory 2 and read out by the DMA module and are carried to the destination address, and the 4 groups of plaintext character strings are encrypted in parallel; DMA then obtains 4 groups of plaintext character strings from the source address, the process is repeated until all the plaintext character strings are completely encrypted, the coprocessor sends an interrupt to the RISCV main processor to complete AES-128 encryption once, in the process, more coprocessor hardware resources can be called to realize parallel encryption of a plurality of groups of plaintext character strings, and therefore quick encryption and decryption of high-speed data streams are realized.
According to the technical scheme, the data encryption is realized by adopting the technical means that after plaintext data are received, the plaintext data are split into the plaintext character strings with the preset number, each plaintext character string is circularly encrypted for the preset times by adopting the preset encryption key sequence to obtain the ciphertext character string corresponding to each plaintext character string, and each ciphertext character string is combined to obtain ciphertext data.
As shown in fig. 6, fig. 6 is a second embodiment of the present application, and based on the first embodiment, the data encryption method of the present application includes the following steps:
step S121, sequentially extracting each plaintext character string in a cache, wherein the plaintext character strings obtained by splitting are sequentially stored in the cache according to the splitting sequence;
step S122, after each plaintext character string is extracted, extracting the first encryption key in the encryption key sequence;
step S123, encrypting the plaintext character string by adopting a first encryption key to obtain a ciphertext character string;
step S124, using the first encryption key as the current encryption key;
step S125, obtaining a next encryption key of the current encryption key in the encryption key sequence, encrypting the ciphertext character string by using the next encryption key, and updating the ciphertext character string by using an encryption result;
step S126, using the next encryption key as the current encryption key;
step S127, returning to execute the step of obtaining the next encryption key of the current encryption key in the encryption key sequence until the encryption keys in the encryption key sequence are all extracted or the encryption frequency of the plaintext character string reaches a preset frequency, and taking the current encryption result as the ciphertext character string corresponding to the plaintext character string.
In this embodiment, after receiving plaintext data, a preset number of plaintext character strings obtained by splitting may be determined according to a length of the plaintext data and a fixed length of the plaintext character strings, the plaintext character strings are sequentially stored in an external cache according to a splitting order, when a control module starts AES encryption operation, a round key addition module obtains a first encryption key from an encryption key sequence in an extended key generation module, the control module reads the plaintext character strings from a memory 1 in series, the plaintext character strings are encrypted by using the first encryption key to obtain ciphertext character strings, specifically, the plaintext character strings are input to a round key addition module 0 of an encryption operation unit, a first round of encryption is completed after a byte substitution lookup table, a row shift 0 and a mixing column module 0 are performed, and an output data stream is input to the round key encryption module 0 again; then, taking the first encryption key as a current encryption key, obtaining a next encryption key of the current encryption key in an encryption key sequence, and performing a second round of encryption on the plaintext character string by adopting the next encryption key; taking the next encryption key as the current encryption key, returning to execute the step of obtaining the next encryption key of the current encryption key in the encryption key sequence until the encryption keys in the encryption key sequence are all extracted or the encryption times of the plaintext character string reach the preset times, and taking the current encryption result as the ciphertext character string corresponding to the plaintext character string; and when the tenth round of encryption is performed, the control module controls the data stream to skip the row mixing module 0 and directly input the data stream into the round key adding module 0 to generate ciphertext character strings for output, the ciphertext character strings are written into the memory 2 and read out by the DMA module and are carried to a destination address to complete plaintext character string encryption, and in the process, the encryption result of each round is continuously updated until the ciphertext character strings are finally generated and output.
In this embodiment, a plaintext character string is continuously obtained from a source address, the process is repeated until encryption keys in an encryption key sequence are all extracted or the encryption frequency of the plaintext character string reaches a preset frequency, a coprocessor sends an interrupt signal to a RISCV main processor to complete encryption, a current encryption result is used as a ciphertext character string corresponding to the plaintext character string, ciphertext character strings obtained by each encryption are combined to obtain ciphertext data, in the process, only specific hardware resources in the coprocessing are started, and other hardware resources enter a low power consumption state, so that the power consumption of a chip is reduced.
According to the technical scheme, the effect of data encryption is achieved by adopting the technical means of circularly encrypting each plaintext character string extracted from the external cache by adopting the encryption key.
Based on the second embodiment, the data encryption method of the third embodiment of the present application includes the following steps:
and step S1231, sequentially performing round key addition operation, byte substitution table look-up operation, row displacement operation and column mixing operation on the plaintext character string by adopting the first encryption key to obtain a ciphertext character string.
In this embodiment, the process of encrypting the plaintext character string with the encryption key to obtain the ciphertext character string includes a preset number of times of circular encryption, for example, in the process of first encryption, the first encryption key is used to sequentially execute round key addition module 0 of the input encryption operation unit, the byte replaces the lookup table module, the row shift module 0 and the column mixing module 0, then the first round of encryption is completed, the output data stream is re-input into the round key encryption module 0, and the second round of encryption is performed. By analogy, when the tenth round of encryption is performed, the control module controls the data stream to skip the column mixing module 0 and directly input the data stream into the round key adding module 0 to generate and output the ciphertext character string.
In this embodiment, the encryption key is used to perform round key addition operation, byte substitution table lookup operation, row shift operation, and column mixing operation on the plaintext character string, so as to encrypt the plaintext character string.
Based on the second embodiment, the data encryption method according to the fourth embodiment of the present application further includes the following steps:
step S131, merging the encryption results corresponding to the ciphertext strings according to the encryption sequence to obtain ciphertext data.
In this embodiment, each plaintext character string is circularly encrypted for a preset number of times, a circularly encrypted result is updated to obtain an updated encrypted result and a corresponding ciphertext character string, the encrypted results corresponding to each ciphertext character string are combined according to an encryption sequence to obtain ciphertext data, specifically, the encrypted results corresponding to each ciphertext character string after encryption are sequentially stored in a destination address corresponding to an external cache according to the encryption sequence, and the encrypted results in the destination address are connected according to the encryption sequence to be combined to finally obtain ciphertext data.
In the technical scheme of this embodiment, the encryption results corresponding to the ciphertext character strings are combined according to the encryption sequence, so as to obtain ciphertext data corresponding to plaintext data.
As shown in fig. 7, fig. 7 is a fifth embodiment of the present application, and a data decryption method of the fifth embodiment includes the following steps:
step S210, after receiving ciphertext data, caching the ciphertext data, wherein the ciphertext data comprises a preset number of ciphertext character strings;
step S220, a preset decryption key sequence is adopted to respectively carry out circular decryption on each ciphertext character string for a preset number of times so as to obtain a plaintext character string corresponding to each ciphertext character string;
step S230, merging the plaintext character strings to obtain plaintext data.
In this embodiment, as shown in fig. 2, fig. 2 is a block diagram of data encryption and data decryption, a ciphertext block in fig. 2 is a ciphertext character string, the length of each ciphertext character string is fixed to 128bit, a dotted arrow in fig. 2 points to represent an encryption process, a solid arrow points to represent a decryption process, when decrypting, ciphertext data is split into a plurality of 128-bit ciphertext character strings, each ciphertext character string is decrypted by an AES decryption algorithm to obtain a plaintext character string with a corresponding length of 128bit, and the plaintext character strings are combined to obtain final plaintext data output.
In this embodiment, after the ciphertext data is obtained, the ciphertext data is split into a plurality of ciphertext character strings and stored in an external cache, because the length of each ciphertext character string is fixed to 128 bits, the preset number of ciphertext character strings can be determined according to the length of the ciphertext data and the length of the ciphertext character string; the preset times of the circular decryption are determined according to the working mode of the coprocessor, the preset times of the circular decryption can be determined after the working mode of the coprocessor is determined, the preset decryption key sequence is adopted to respectively perform the circular decryption on each ciphertext character string for the preset times so as to obtain a plaintext character string corresponding to each ciphertext character string, and finally all the plaintext character strings are combined to obtain plaintext data.
In this embodiment, an internal structure diagram of the coprocessor is shown in fig. 3, a decoding module of the coprocessor decodes the RISCV-AES decryption extension instruction to obtain configuration information such as a ciphertext source address, a ciphertext data length, a destination address, an initial key, a key length, a coprocessor working mode, and the like; in this embodiment, an AES-192 serial data decryption operation is taken as an example, and a flow of obtaining ciphertext data by encrypting plaintext data is shown in fig. 4, first, a processor sends an extended RISCV-AES decryption instruction to a coprocessor through an extended instruction interface; an expansion key generation module of the coprocessor expands the initial key to generate a decryption key sequence; the DMA module writes the acquired 1 group of 128-bit cipher text character strings into a memory 1 in the coprocessor from an external cache according to the source address of the cipher text and the data length of the cipher text, and the control module starts AES decryption operation; the round key encryption module firstly obtains a first round decryption key from a decryption key sequence of the expanded key generation module, the control module reads 1 group of ciphertext character strings from the memory 1, inputs the 1 group of ciphertext character strings into the round key encryption module 0 of the decryption operation unit, completes first round decryption after operation of the byte inverse substitution lookup table module, the inverse row displacement module 0 and the inverse column mixing module 0, and then performs second round decryption. By analogy, when the twelfth round of decryption is performed, data is output from the reverse-row displacement module 0, then the data skips the reverse-column mixing module 0 and directly enters the round key adding module 0 to generate 1 group of plaintext character strings for output, the plaintext character strings are written into the memory 2 and read out by the DMA module and are carried to the destination address; the DMA module reads the next group of ciphertext character strings from the source address, the process is repeated until all the ciphertext character strings are decrypted, the coprocessor sends an interrupt to the RISCV main processor, and one AES-192 decryption operation is completed. In the serial mode, only specific hardware resources in the co-processing are started, and other hardware resources enter a low power consumption state, so that the power consumption of the chip is reduced. In this embodiment, the parallel working mode of the coprocessor ciphertext data may also be configured, and the specific decryption process is similar to the serial data decryption operation, which is not described herein again.
According to the technical scheme, after ciphertext data are received, the ciphertext data are cached, and the ciphertext data comprise a preset number of ciphertext character strings; respectively carrying out cyclic decryption on each ciphertext character string for preset times by adopting a preset decryption key sequence to obtain a plaintext character string corresponding to each ciphertext character string; and the technical means of combining the plaintext character strings to obtain plaintext data realizes decryption of ciphertext data.
As shown in fig. 8, in a sixth embodiment of the present application, based on the fifth embodiment, a data decryption method of the present application includes the following steps:
step S221, extracting each ciphertext character string in the cache in sequence;
step S222, after each ciphertext character string is extracted, extracting a first decryption key in a decryption key sequence;
step S223, decrypting the ciphertext character string by using the first decryption key to obtain a plaintext character string;
step S224, using the first decryption key as the current decryption key;
step S225, obtaining a next decryption key of the current decryption key in the decryption key sequence, decrypting the ciphertext character string by adopting the next decryption key, and updating the plaintext character string by adopting a decryption result;
step S226, using the next decryption key as the current decryption key;
step S227, returning to the step of executing the next decryption key of the current decryption key in the decryption key sequence until the decryption keys in the decryption key sequence are all extracted or the decryption frequency of the ciphertext character string reaches a preset frequency, and taking the current decryption result as the plaintext character string corresponding to the ciphertext character string.
In this embodiment, after receiving the ciphertext data, the preset number of the split ciphertext character strings may be determined according to the length of the ciphertext data and the fixed length of the ciphertext character strings, the ciphertext character strings are sequentially stored in the external cache according to the split order, when the control module starts AES decryption operation, the round key encryption module acquires a first decryption key from a decryption key sequence in the extended key generation module, the control module reads out a ciphertext character string from the memory 1 in series, the ciphertext character string is decrypted by adopting the first decryption key to obtain a plaintext character string, specifically, the ciphertext character string is input into the round key encryption module 0 of the decryption operation unit, a first round of encryption is completed after operation of the byte reverse substitution lookup table module, the reverse shift module 0 and the reverse column mixing module 0, and an output data stream is input into the round key encryption module 0 again; then, taking the first decryption key as a current decryption key, obtaining a next decryption key of the current decryption key in a decryption key sequence, and performing a second round of decryption on the ciphertext character string by adopting the next decryption key; taking the next decryption key as the current decryption key, returning to the step of executing the next decryption key for obtaining the current decryption key in the decryption key sequence until the decryption keys in the decryption key sequence are all extracted or the decryption times of the ciphertext character string reach the preset times, and taking the current decryption result as the plaintext character string corresponding to the ciphertext character string; and when the tenth round of decryption is finished, the control module controls the data stream to skip the reverse-row mixing module 0 and directly input the data stream into the round key adding module 0 to generate plaintext character strings for output, the plaintext character strings are written into the memory 2 and read out by the DMA module and carried to a destination address to finish ciphertext character string decryption, and in the process, the decryption result of each round is continuously updated until the plaintext character strings are finally generated for output.
In this embodiment, a ciphertext character string is continuously obtained from a source address, the process is repeated until decryption keys in a decryption key sequence are all extracted or the encryption frequency of the ciphertext character string reaches a preset frequency, a coprocessor sends an interrupt signal to a RISCV main processor to complete decryption, a current decryption result is used as the plaintext character string corresponding to the ciphertext character string, plaintext character strings obtained by each decryption are combined to obtain plaintext data, in the process, only specific hardware resources in the coprocessing are started, and other hardware resources enter a low power consumption state, so that the power consumption of a chip is reduced.
According to the technical scheme, the data decryption effect is achieved by adopting the technical means of circularly decrypting each ciphertext character string extracted from the external cache by adopting the decryption key.
Based on the sixth embodiment, the data decryption method in the seventh embodiment of the present application includes the following steps:
and step S2231, sequentially executing round key addition operation, byte inverse substitution table look-up operation, inverse row displacement operation and inverse column mixed operation on the ciphertext character string by adopting the first decryption key to obtain the plaintext character string.
In this embodiment, the process of decrypting the ciphertext character string by using the decryption key to obtain the plaintext character string includes a preset number of times of circular decryption, for example, in the process of first decryption, the round key encryption module 0 of the input decryption operation unit, the byte reverse substitution lookup table module, the reverse shift module 0 and the reverse column mixing module 0 are sequentially executed on the ciphertext character string by using the first decryption key to complete the first round of decryption, the output data stream is input into the round key encryption module 0 again, and the second round of decryption is performed. By analogy, when the tenth round of decryption is performed, the control module controls the data stream to skip the reverse-column mixing module 0 and directly input the data stream into the round key adding module 0, and plaintext character strings are generated and output.
In this embodiment, the decryption key is used to perform round key addition operation, byte inverse substitution table look-up operation, inverse row displacement operation, and inverse column mixing operation on the ciphertext character string, so as to decrypt the ciphertext character string.
As shown in fig. 9, fig. 9 is an eighth embodiment of the present application, and based on the sixth embodiment, a data decryption method in the eighth embodiment of the present application includes the following steps:
step S310, acquiring the working mode of the coprocessor;
step S320, determining the number of the ciphertext character strings extracted from the cache each time according to the working mode;
the step of respectively performing the cyclic decryption on each ciphertext character string for the preset times by adopting a preset decryption key sequence to obtain a plaintext character string corresponding to each ciphertext character string comprises the following steps:
and step S330, respectively performing parallel loop decryption on the number of ciphertext character strings for a preset number of times by using a preset decryption key sequence to obtain plaintext character strings corresponding to the number of ciphertext character strings.
In this embodiment, the working modes of the coprocessor include: the method comprises the steps of 1 group of data serial decryption mode, 2 group of data parallel decryption mode, 3 group of data parallel decryption mode and 4 group of data parallel decryption mode, wherein the number of ciphertext character strings extracted from a cache each time is determined according to the working mode, for example, when the working mode of the coprocessor is 4 group of data parallel decryption mode, 4 groups of ciphertext character strings are extracted from an external cache, and the 4 groups of ciphertext character strings are respectively subjected to parallel circulating decryption for preset times by adopting a preset decryption key sequence so as to obtain 4 groups of plaintext character strings corresponding to the 4 groups of ciphertext character strings, and therefore the decryption processing speed is improved.
According to the technical scheme, the working mode of the coprocessor is obtained, the number of the ciphertext character strings extracted from the cache each time is determined according to the working mode, the number of the ciphertext character strings is decrypted in a parallel and circulating mode for the preset times by adopting the preset decryption key sequence, the plaintext character strings corresponding to the number of the ciphertext character strings are obtained, and the parallel decryption working mode is adopted, so that the decryption speed is increased.
Based on the sixth embodiment, the data decryption method in the ninth embodiment of the present application includes the following steps:
step S231, merging the decryption results corresponding to the plaintext strings according to the decryption order to obtain plaintext data.
In this embodiment, each ciphertext character string is circularly decrypted for a preset number of times, a circularly decrypted result is updated to obtain an updated decrypted result and a corresponding plaintext character string, the decrypted results corresponding to each plaintext character string are combined according to a decryption order to obtain plaintext data, specifically, each decrypted plaintext character string and the corresponding decrypted result are sequentially stored in a destination address corresponding to an external cache according to the decryption order, and the decrypted results in the destination address are connected according to the decryption order to be combined, so as to finally obtain the plaintext data.
In the technical solution of this embodiment, the decryption results corresponding to the plaintext strings are combined according to the decryption order, so as to obtain plaintext data corresponding to the ciphertext data.
Based on the same inventive concept, an embodiment of the present application further provides a storage medium, where the storage medium stores a data encryption program and a data decryption program, the data encryption program implements the steps of the data encryption method described above when executed by the processor, and the data decryption program implements the steps of the data decryption method described above when executed by the processor, and can achieve the same technical effect, and in order to avoid repetition, the description is omitted here.
Since the storage medium provided in the embodiments of the present application is a storage medium used for implementing the method in the embodiments of the present application, based on the method described in the embodiments of the present application, a person skilled in the art can understand a specific structure and a modification of the storage medium, and thus details are not described here. Computer storage media used in the methods of embodiments of the present application are all intended to be protected by the present application.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
It should be noted that in the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by one and the same item of hardware. The usage of the words first, second and third, etcetera do not indicate any ordering. These words may be interpreted as names.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (10)
1. A data encryption method, characterized in that the data encryption method comprises:
after plaintext data are received, the plaintext data are split into plaintext character strings in a preset number;
performing cyclic encryption on each plaintext character string for a preset number of times by adopting a preset encryption key sequence to obtain a ciphertext character string corresponding to each plaintext character string;
and merging the ciphertext character strings to obtain ciphertext data.
2. The data encryption method according to claim 1, wherein the step of performing the round-robin encryption for a preset number of times on each plaintext character string using a preset encryption key sequence respectively comprises:
sequentially extracting each plaintext character string in a cache, wherein the plaintext character strings obtained by splitting are sequentially stored in the cache according to the splitting sequence;
after each plaintext character string is extracted, extracting a first encryption key in an encryption key sequence;
encrypting the plaintext character string by adopting a first encryption key to obtain a ciphertext character string;
taking the first encryption key as a current encryption key;
acquiring a next encryption key of the current encryption key in an encryption key sequence, encrypting the ciphertext character string by adopting the next encryption key, and updating the ciphertext character string by adopting an encryption result;
taking the next encryption key as a current encryption key;
and returning to the step of executing the next encryption key of the current encryption key in the encryption key sequence until the encryption keys in the encryption key sequence are all extracted or the encryption times of the plaintext character string reach preset times, and taking the current encryption result as the ciphertext character string corresponding to the plaintext character string.
3. The data encryption method of claim 2, wherein the step of encrypting the plaintext string with the first encryption key to obtain a ciphertext string comprises:
and sequentially performing round key addition operation, byte substitution table look-up operation, row displacement operation and column mixing operation on the plaintext character string by adopting the first encryption key to obtain a ciphertext character string.
4. The data encryption method of claim 2, wherein the step of combining the ciphertext strings to obtain ciphertext data comprises:
and combining the encryption results corresponding to the ciphertext character strings according to the encryption sequence to obtain ciphertext data.
5. A method for data decryption, the method comprising:
after receiving ciphertext data, caching the ciphertext data, wherein the ciphertext data comprises a preset number of ciphertext character strings;
respectively carrying out cyclic decryption on each ciphertext character string for preset times by adopting a preset decryption key sequence to obtain a plaintext character string corresponding to each ciphertext character string;
and combining the plaintext character strings to obtain plaintext data.
6. The data decryption method according to claim 5, wherein the step of performing the cyclic decryption on each ciphertext character string for a preset number of times by using a preset decryption key sequence to obtain a plaintext character string corresponding to each ciphertext character string comprises:
sequentially extracting each ciphertext character string in the cache;
after each ciphertext character string is extracted, extracting a first decryption key in a decryption key sequence;
decrypting the ciphertext character string by adopting the first decryption key to obtain a plaintext character string;
taking the first decryption key as a current decryption key;
acquiring a next decryption key of the current decryption key in the decryption key sequence, decrypting the ciphertext character string by adopting the next decryption key, and updating the plaintext character string by adopting a decryption result;
taking the next decryption key as a current decryption key;
and returning to the step of executing the next decryption key of the current decryption key in the decryption key sequence until the decryption keys in the decryption key sequence are all extracted or the decryption times of the ciphertext character string reach preset times, and taking the current decryption result as the plaintext character string corresponding to the ciphertext character string.
7. The data decryption method of claim 6, wherein the step of decrypting the ciphertext string with the first decryption key to obtain a plaintext string comprises:
and sequentially performing round key addition operation, byte inverse substitution table look-up operation, inverse row displacement operation and inverse column mixing operation on the ciphertext character string by adopting the first decryption key to obtain the plaintext character string.
8. The data decryption method of claim 6, wherein the step of buffering ciphertext data after receiving the ciphertext data, the ciphertext data including a predetermined number of ciphertext strings further comprises:
acquiring a working mode of a coprocessor;
determining the number of ciphertext character strings extracted from the cache each time according to the working mode;
the step of respectively performing the cyclic decryption on each ciphertext character string for the preset times by adopting a preset decryption key sequence to obtain a plaintext character string corresponding to each ciphertext character string comprises the following steps:
and respectively carrying out parallel cyclic decryption on the number of ciphertext character strings for preset times by adopting a preset decryption key sequence to obtain plaintext character strings corresponding to the number of ciphertext character strings.
9. The data decryption method of claim 6, wherein said step of combining said plaintext strings to obtain plaintext data comprises:
and combining the decryption results corresponding to the plaintext character strings according to the decryption sequence to obtain plaintext data.
10. A storage medium storing a data encryption program that implements the steps of the data encryption method of any one of claims 1 to 4 when executed by a processor, and a data decryption program that implements the steps of the data decryption method of any one of claims 5 to 9 when executed by a processor.
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Effective date of registration: 20240111 Address after: Building A, Runhui Science and Technology Park, No. 18 Shenzhou Road, Huangpu District, Guangzhou City, Guangdong Province, 510663 (self numbered 301, 3rd floor) Patentee after: Guangzhou New Generation Chip Technology Co.,Ltd. Address before: No.18, Shenzhou Road, Huangpu District, Guangzhou, Guangdong 510656 Patentee before: GUANGDONG NEW GENERATION COMMUNICATION AND NETWORK INNOVATION INSTITUTE |