CN110880967A - Method for parallel encryption and decryption of multiple messages by adopting packet symmetric key algorithm - Google Patents

Method for parallel encryption and decryption of multiple messages by adopting packet symmetric key algorithm Download PDF

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CN110880967A
CN110880967A CN201911343580.3A CN201911343580A CN110880967A CN 110880967 A CN110880967 A CN 110880967A CN 201911343580 A CN201911343580 A CN 201911343580A CN 110880967 A CN110880967 A CN 110880967A
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王芷玲
李瑞春
白小勇
王滨
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Beijing Lianshi Networks Technology Co ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
    • H04L9/0637Modes of operation, e.g. cipher block chaining [CBC], electronic codebook [ECB] or Galois/counter mode [GCM]
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12Details relating to cryptographic hardware or logic circuitry
    • H04L2209/125Parallelization or pipelining, e.g. for accelerating processing of cryptographic operations

Abstract

The application provides a method for encrypting and decrypting multiple messages in parallel by adopting a packet symmetric key algorithm, wherein the size of a register is M, the size of a basic operation unit is N, and k is M/N data from different messages can be processed simultaneously. The method comprises the following steps: respectively putting k data from different messages into k grouped data blocks, wherein the size of each grouped data block is the same as that of a register; dividing data in each grouped data block into k sections, sequentially connecting the ith section of the k grouped data in series, then placing the data into the ith register variable, encrypting the ith register variable, dividing the encrypted data in the register variable into k sections, and connecting the jth section of each register in series to obtain the encryption result of the jth group of plaintext; the decryption method is similar to the encryption method. The invention avoids a large amount of filling when processing short messages in the current common parallel mode by parallel data blocks of different messages, and maximizes the throughput of the grouping algorithm.

Description

Method for parallel encryption and decryption of multiple messages by adopting packet symmetric key algorithm
Technical Field
The invention belongs to the technical field of coding, and particularly relates to a method for encrypting and decrypting multiple messages in parallel by adopting a block cipher algorithm.
Background
Cryptography is the subject of studying how to convey information secretly, symmetric cryptography is an important branch of cryptography, and block ciphers are also an important research direction of symmetric ciphers. The symmetric cipher is a cipher system using the same cipher key for encryption/decryption, and the block cipher treats the input plaintext block as a whole and outputs a corresponding ciphertext block.
The basic operation of block cipher algorithms represented by SM4, AES, etc. is 16/32/64 bits as basic unit of operation, whereas modern CPUs have 64,128,256, or even 512-bit registers. This means that a register can hold operands for a plurality of basic operations, and that one operation on the register (e.g. a bitwise exclusive-or operation) is equivalent to performing the corresponding operation on a plurality of operands simultaneously. Taking 128-bit registers, and 32-bit basic operation operands and bit exclusive-or operations as examples, 4 32-bit basic operation operands can be simultaneously stored in one 128-bit register, and one exclusive-or operation of two 128-bit registers is equivalent to a bit exclusive-or operation of operands that have completed 4 32-bit basic operations simultaneously.
The parallel technology for encrypting and decrypting messages by using a block cipher algorithm is mainly used for encrypting and decrypting a long message by using the method, so that the encryption and decryption speed is improved. That is, different blocks of data of the same message are loaded in a large register to realize parallel processing of different blocks of data of one message, thereby increasing the rate of encrypting and decrypting the message.
But in practical application, another scenario is faced with that a large number of messages need to be processed, and the length of each message is short, for example, when a database is encrypted, a large amount of short messages need to be processed. For example, only one packet is required to be encrypted and decrypted for encryption and decryption of a mobile phone number or a mailbox, and at the moment, the parallel encryption and decryption operation cannot be accelerated. The method provided by the invention can encrypt and decrypt a plurality of messages in parallel, thereby improving the efficiency of encryption and decryption operations.
Disclosure of Invention
The invention provides a method for encrypting and decrypting a plurality of messages in parallel by adopting a block symmetric cryptographic algorithm.
The invention discloses a method for encrypting multiple messages in parallel by adopting a packet symmetric key algorithm, which comprises the following specific steps:
the size of the register is M, the size of the basic operation unit is N, and k is M/N at the moment, namely k data from different messages can be processed simultaneously, k data from different messages are respectively put into k grouped data blocks, and the size of each grouped data block is M which is the same as the size of the register; according to the adopted encryption algorithm, generating round keys according to a key generation algorithm and k main keys, wherein the k main keys can be the same or different;
during encryption, dividing data in each packet data block into k segments according to the size N of a basic operation unit, sequentially connecting the ith segment in k packet data in series, then placing the ith segment in the ith register variable, and performing encryption operation on the ith register variable, namely performing parallel encryption operation on the ith segment of the k packet data blocks, wherein i is 1,2, …, k; completely encrypting all k register variables;
dividing encrypted data in register variables into k segments, and connecting j segments in each register in series to obtain an encryption result of j group of plaintext, wherein j is 1,2 … … k; i.e. the encrypted k data from different messages are recovered.
Preferably, where the encryption algorithm is SM4 algorithm, the register size is 128 bits, the basic arithmetic unit size is N32 bits, and k is M/N4.
Preferably, 4 data from different messages, i.e. 4 sets of plaintext, are processed simultaneously; generating 4 groups of round keys according to a key expansion algorithm, wherein each group of round keys comprises 32 round keys with 32 bits and is marked as rkij,i=0,1,…,3,j=0,1,…,31;
During encryption, the first 32 bits in each grouped data block are taken out and connected in series and then stored in a first register variable, the second 32 bits in each grouped data block are taken out and connected in series and then stored in a second register variable, the third 32 bits in each grouped data block are taken out and connected in series and then stored in a third register variable, and the fourth 32 bits in each grouped data block are taken out and connected in series and then stored in a fourth register variable;
performing an encryption operation on the 4 register variables using the 128-bit register;
respectively taking out the first 32 bits of the 4 register variables which are connected in series to serve as an encryption result of a first group of plaintext, respectively taking out the second 32 bits of the 4 register variables which are connected in series to serve as an encryption result of a second group of plaintext, respectively taking out the third 32 bits of the 4 register variables which are connected in series to serve as an encryption result of a third group of plaintext, and respectively taking out the fourth 32 bits of the 4 register variables which are connected in series to serve as an encryption result of a fourth group of plaintext.
Preferably, the k master keys are identical.
Preferably, the operation mode of the encryption method applied to the packet symmetry algorithm comprises: ECB, CBC, CTR, CFB or FPE.
And, a method for decrypting multiple messages in parallel by using a packet symmetric key algorithm, the specific steps include:
the size of the register is M, the size of the basic arithmetic unit is N, k is M/N encrypted data from different messages can be processed simultaneously, and k encrypted data are respectively put into k grouped data blocks; the size of each grouped data block is M which is the same as the size of the register; according to the adopted decryption algorithm, generating round keys according to a key generation algorithm and k main keys, wherein the k main keys can be the same or different;
during decryption, dividing data in each packet data block into k segments of M/N according to the size N of a basic operation unit, sequentially connecting ith segments of k packet data in series, then placing the ith segments into ith register variables, and performing decryption operation on the ith register variables, namely performing parallel decryption operation on the ith segments of the k packet data blocks, wherein i is 1,2 … … k; the decryption is completed on all the k register variables;
and dividing the decrypted data in the register variable into k-M/N sections, and connecting j-th sections in each register in series to obtain a j-th group of plaintext, wherein j is 1 and 2 … … k.
Preferably, wherein the decryption algorithm is the SM4 algorithm, the register size is 128 bits, and the basic arithmetic unit size is 32 bits.
Preferably, 4 encrypted data from different messages, i.e. 4 sets of ciphertext, are processed simultaneously; 4 groups of round keys are generated according to a key expansion algorithm, each group of round keys comprises 32 round keys with 32 bits and is marked as rkij,i=0,1,2,3,j=0,1,…,31;
During decryption, the first 32 bits in each grouped data block are taken out and connected in series and then stored in a first register variable, the second 32 bits in each component data block are taken out and connected in series and then stored in a second register variable, the third 32 bits in each component data block are taken out and connected in series and then stored in a third register variable, and the fourth 32 bits are taken out and connected in series and then stored in a fourth register variable;
performing a decryption operation on the 4 register variables using the 128-bit register;
and respectively taking out a first 32-bit serial connection of the 4 register variables as a decryption result of a first group of ciphertexts, respectively taking out a second 32-bit serial connection as a decryption result of a second group of ciphertexts, respectively taking out a third 32-bit serial connection as a decryption result of a third group of ciphertexts, and respectively taking out a fourth 32-bit serial connection as a decryption result of a fourth group of ciphertexts.
Preferably, the operation mode of the decryption method applied to the packet symmetry algorithm includes: ECB, CBC, CTR, CFB or FPE.
The invention has the beneficial effect that the parallel operation mode is utilized to improve the speed of encrypting and decrypting a plurality of messages by the block cipher algorithm. In the parallel operation mode, independent encryption and decryption of different data blocks can be executed in parallel by calling round functions of the grouping algorithm, and different keys can be used for encryption and decryption of different data blocks, and the same key can also be used for encryption and decryption of different data blocks. By processing the data blocks of a plurality of messages in parallel, the parallel technology of encrypting and decrypting one message by using a common block cipher algorithm is avoided, and a large amount of filling is carried out on the encrypted and decrypted short messages. The throughput of the grouping algorithm can be maximized by performing independent operations on different short message data in parallel.
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FIG. 1 is a schematic diagram of an encryption flow; and
fig. 2 is a schematic diagram of a decryption process.
Detailed Description
The application places k data from different messages into one register, depending on the instruction set and algorithm used. According to the adopted encryption and decryption algorithm, round keys are generated according to a key generation algorithm and k main keys, and the k main keys can be multiple copies of the same key or different k main keys. According to the difference of the used instruction set, the data are stored in an array with corresponding length, for example, the size of the register is M, the basic operation unit is N, and then k is M/N, i.e., M/N data from different messages can be processed simultaneously, specifically, taking SM4 algorithm as an example, a 128-bit register as an example, and the basic operation unit is 32 bits, so that each register can store 4 data from different messages, that is, k is 4, and simultaneously, 4 master keys are input, the 4 master keys can be the same or different, and 4 sets of round keys are generated according to a key expansion algorithm, each set of round keys comprises 32 round keys with 32 bits, which are denoted as rkij,i=0,1,…,3,j=0,1,…,31。
During encryption, first packet data blocks of k groups of messages are taken out according to the prior art and stored in k variables respectively. Taking the SM4 algorithm as an example, there are 4 registers, namely, the first register to the fourth register, each of which has a size of 128 bits, and the basic arithmetic unit has 32 bits, then k 128/32 equals 4, that is, data from 4 different messages can be processed simultaneously, and the storage method is as follows: and respectively taking out the first 32 bits of each message, connecting the first 32 bits in series, storing the first 32 bits in the first register variable, respectively taking out the second 32 bits of each message, connecting the second 32 bits in series, storing the second 32 bits in the second register variable, respectively taking out the third 32 bits of each message, connecting the third 32 bits in series, storing the third 32 bits in the third register variable, respectively taking out the fourth 32 bits of each message, connecting the fourth 32 bits in series, and storing the fourth 32 bits in the fourth register variable.
Since the first 32-bit block operations for a plurality of data blocks (blocks) of different messages are all the same. The operation on the 128-bit register is the same as the operation on 4 blocks of data from 4 messages being completed at the same time. The encryption operation is to perform a certain number of round transformations on the input plaintext under the action of a round key, thereby completing the encryption of the contents in the 128-bit register, which is equivalent to completing the encryption of 4 messages at the same time.
Reducing the encrypted data, respectively taking out the length bit value of a first calculation unit in 4 register variables, and serially connecting the length bit values to be used as an encryption result of a first group of plaintext; similarly, the length bit value of the kth computing unit in the 4 register variables is respectively taken out and serially connected to be used as the ciphertext after the kth plaintext is encrypted. Taking SM4 as an example, respectively taking out the first 32 bits of 4 register variables, and connecting in series to be used as an encryption result of a first group of plaintext; similarly, the kth 32 bits of the 4 register variables are respectively taken out and serially connected to be used as the ciphertext after the kth plaintext is encrypted.
Take the example of parallel encryption and decryption of 4 groups of messages using the grouping algorithm SM4 and a 128-bit instruction set. The expanded keys may be stored in a constant array RK [32] of 128 bits, where for i ═ 0, 1, …, 31, RK [ i ] is a number of 128 bits in length, which may be regarded as 4 32 bits, and the ith round expanded keys of the 1 st to 4 th group keys are stored in sequence. I.e., RK [ i ] ═ RK0i | | RK1i | | RK2i | | | RK3i, ("|" indicates concatenation).
There are 4 sets of plaintext messages to be encrypted, and the four sets of plaintext messages are respectively:
clear text message 1: a00 a01 a02 a03 plaintext message 2: A10A 11A 12A 13
Clear text message 3: a20 a21 a22 a23 plaintext message 4: A30A 31A 32A 33
Firstly, the four groups of messages are subjected to data transformation, the 1 st, 2 nd, 3 rd and 4 th 32-bit words in the 4 groups of messages are respectively taken out, new data are formed again, and the new data are respectively stored in four variables X0, X1, X2 and X3 with the length of 128 bits.
X0=A00A10A20A30,X1=A01A11A21A31
X2=A02A12A22A32,X3=A03A13A23A33
And the parallel encryption part performs 32-round conversion under the action of the round key. Wherein, the 32-round conversion can be divided into 8 operations, each operation comprises 4-round conversion, and the actual pseudo code is as follows:
Figure BDA0002332748430000051
Figure BDA0002332748430000061
Figure BDA0002332748430000062
the output of the parallel encryption is as follows:
Y0=B00B10B20B30 Y1=B01B11B21B31
Y2=B02B12B22B32 Y3=B03B13B23B33
transforming the output data to obtain the final encrypted data:
ciphertext message 1: B00B 01B 02B 03 ciphertext message 2: B10B 11B 12B 13
Ciphertext message 3: B20B 21B 22B 23 ciphertext message 4: B30B 31B 32B 33
The decryption transformation of the SM4 algorithm is the same structure as the encryption transformation, except for the order of use of the round keys.
Figure BDA0002332748430000063
Figure BDA0002332748430000071
Figure BDA0002332748430000072
The 64/128/256/512-bit registers described above may be either 64-bit registers natively supported on the target computing platform (e.g., 64-bit registers natively supported by a 64-bit chip) or extended instruction sets supported on the target computing platform, including but not limited to SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX2, FMA, AVX512, KNC, SVML, CLMUL, AMD processor supported XOP, FMA4, CVT16, etc., SIMD instruction sets, and the NEON technology of ARM.
The method for encrypting and decrypting the multiple messages in parallel by the block cipher algorithm is suitable for all working modes of the block symmetric algorithm, and the working modes comprise an ECB CBC CTR CFB, an FPE and the like.
The following illustrates an implementation of the CBC mode. And simultaneously encrypting k messages, firstly generating k groups of initial IV for the k messages, inputting a first group of plaintext of each message and a modular-two addition result of the IV corresponding to each message as parallel encrypted plaintext during encryption, wherein the encryption result is a first group of ciphertext of each message, and performing parallel encryption on a modular-two addition result of an ith group of plaintext of each message and an i-1 group of ciphertext to obtain an ith group of ciphertext, wherein i is more than or equal to 2.
The decryption process is the reverse process of the encryption process, when decrypting the first group of plaintext of each message, the first group of ciphertext blocks of each message are decrypted in parallel, and the decrypted intermediate data and the IV of the corresponding message are subjected to modulo two addition to obtain the first group of plaintext of each message. When the ith group of plaintext of each message is decrypted, the ith group of ciphertext blocks of each message are decrypted in parallel, and the decrypted intermediate data is modulo-two added with the i-1 group of ciphertext of the corresponding message to obtain the ith group of plaintext of each message. Wherein i is greater than or equal to 2.
It will be understood that the above embodiments are merely exemplary embodiments taken to illustrate the principles of the present invention, which is not limited thereto. Those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims (9)

1. A method for encrypting multiple messages in parallel by adopting a packet symmetric key algorithm is characterized by comprising the following specific steps:
the size of the register is M, the size of the basic operation unit is N, and k is M/N at the moment, namely k data from different messages can be processed simultaneously, k data from different messages are respectively put into k grouped data blocks, and the size of each grouped data block is M which is the same as the size of the register; according to the adopted encryption algorithm, generating round keys according to a key generation algorithm and k main keys, wherein the k main keys can be the same or different;
during encryption, dividing data in each packet data block into k segments according to the size N of a basic operation unit, sequentially connecting the ith segment in k packet data in series, then placing the ith segment in the ith register variable, and performing encryption operation on the ith register variable, namely performing parallel encryption operation on the ith segment of the k packet data blocks, wherein i is 1,2, …, k; completely encrypting all k register variables;
dividing encrypted data in register variables into k segments, and connecting j segments in each register in series to obtain an encryption result of j group of plaintext, wherein j is 1,2 … … k; i.e. the encrypted k data from different messages are recovered.
2. The method for parallel encryption of multiple messages using a packet symmetric key algorithm according to claim 1,
the encryption algorithm is the SM4 algorithm, the register size is 128 bits, the basic operation unit size is 32 bits, and k is M/N is 4.
3. The method for parallel encryption of multiple messages using a packet symmetric key algorithm according to claim 2,
processing 4 data from different messages simultaneously, namely 4 sets of plaintext; generating 4 groups of round keys according to a key expansion algorithm, wherein each group of round keys comprises 32 round keys with 32 bits and is marked as rkij,i=0,1,…,3,j=0,1,…,31;
During encryption, the first 32 bits in each grouped data block are taken out and connected in series and then stored in a first register variable, the second 32 bits in each grouped data block are taken out and connected in series and then stored in a second register variable, the third 32 bits in each grouped data block are taken out and connected in series and then stored in a third register variable, and the fourth 32 bits in each grouped data block are taken out and connected in series and then stored in a fourth register variable;
performing an encryption operation on the 4 register variables using the 128-bit register;
respectively taking out the first 32 bits of the 4 register variables which are connected in series to serve as an encryption result of a first group of plaintext, respectively taking out the second 32 bits of the 4 register variables which are connected in series to serve as an encryption result of a second group of plaintext, respectively taking out the third 32 bits of the 4 register variables which are connected in series to serve as an encryption result of a third group of plaintext, and respectively taking out the fourth 32 bits of the 4 register variables which are connected in series to serve as an encryption result of a fourth group of plaintext.
4. The method of claim 1, wherein the k master keys are the same.
5. The method for parallel encryption of multiple messages using a packet symmetric key algorithm according to claim 1, wherein the operation mode of the encryption method applied to the packet symmetric key algorithm comprises: ECB, CBC, CTR, CFB or FPE.
6. A method for decrypting multiple messages in parallel by adopting a packet symmetric key algorithm is characterized by comprising the following specific steps:
the size of the register is M, the size of the basic arithmetic unit is N, k is M/N encrypted data from different messages can be processed simultaneously, and k encrypted data are respectively put into k grouped data blocks; the size of each grouped data block is M which is the same as the size of the register; according to the adopted decryption algorithm, generating round keys according to a key generation algorithm and k main keys, wherein the k main keys can be the same or different;
during decryption, dividing data in each packet data block into k segments of M/N according to the size N of a basic operation unit, sequentially connecting ith segments of k packet data in series, then placing the ith segments into ith register variables, and performing decryption operation on the ith register variables, namely performing parallel decryption operation on the ith segments of the k packet data blocks, wherein i is 1,2 … … k; the decryption is completed on all the k register variables;
and dividing the decrypted data in the register variable into k-M/N sections, and connecting j-th sections in each register in series to obtain a j-th group of plaintext, wherein j is 1 and 2 … … k.
7. The method of claim 6, wherein the decryption algorithm is the SM4 algorithm, the register size is 128 bits, and the basic arithmetic unit size is 32 bits.
8. The method for decrypting multiple messages in parallel by using the packet symmetric key algorithm according to claim 7,
processing 4 encrypted data from different messages, namely 4 groups of ciphertexts; 4 groups of round keys are generated according to a key expansion algorithm, each group of round keys comprises 32 round keys with 32 bits and is marked as rkij,i=0,1,2,3,j=0,1,…,31;
During decryption, the first 32 bits in each grouped data block are taken out and connected in series and then stored in a first register variable, the second 32 bits in each component data block are taken out and connected in series and then stored in a second register variable, the third 32 bits in each component data block are taken out and connected in series and then stored in a third register variable, and the fourth 32 bits are taken out and connected in series and then stored in a fourth register variable;
performing a decryption operation on the 4 register variables using the 128-bit register;
and respectively taking out a first 32-bit serial connection of the 4 register variables as a decryption result of a first group of ciphertexts, respectively taking out a second 32-bit serial connection as a decryption result of a second group of ciphertexts, respectively taking out a third 32-bit serial connection as a decryption result of a third group of ciphertexts, and respectively taking out a fourth 32-bit serial connection as a decryption result of a fourth group of ciphertexts.
9. The method for decrypting multiple messages in parallel by using a packet symmetric key algorithm according to claim 6, wherein the operation mode of the decryption method applied to the packet symmetric key algorithm comprises: ECB, CBC, CTR, CFB or FPE.
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CN115225254B (en) * 2022-07-07 2024-04-09 山东大学 Encryption method and system based on bit slicing
CN116431217A (en) * 2023-04-06 2023-07-14 中伏能源嘉兴股份有限公司 High-speed 3DES algorithm based on 51-series singlechip special register
CN116431217B (en) * 2023-04-06 2023-10-17 中伏能源嘉兴股份有限公司 High-speed 3DES algorithm based on 51-series singlechip special register
CN116488794A (en) * 2023-06-16 2023-07-25 杭州海康威视数字技术股份有限公司 Method and device for realizing high-speed SM4 password module based on FPGA
CN116488794B (en) * 2023-06-16 2023-09-19 杭州海康威视数字技术股份有限公司 Method and device for realizing high-speed SM4 password module based on FPGA

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