CN113193090B - Micro light-emitting diode structure and micro light-emitting diode display panel using same - Google Patents
Micro light-emitting diode structure and micro light-emitting diode display panel using same Download PDFInfo
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- CN113193090B CN113193090B CN202110460472.5A CN202110460472A CN113193090B CN 113193090 B CN113193090 B CN 113193090B CN 202110460472 A CN202110460472 A CN 202110460472A CN 113193090 B CN113193090 B CN 113193090B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
Abstract
The invention provides a micro light-emitting diode structure and a micro light-emitting diode display panel using the same. The micro light emitting diode structure comprises an epitaxial layer. The micro light emitting diode structure also comprises a reflecting layer which is arranged on the epitaxial layer. The micro light emitting diode structure further comprises a patterned electrode layer, wherein the patterned electrode layer is arranged between the epitaxial layer and the reflecting layer. The patterned electrode layer is divided into a plurality of patterned electrode sections, which are separated from each other. In addition, the micro light emitting diode structure comprises a first type electrode and a second type electrode, wherein the first type electrode and the second type electrode are arranged on the reflecting layer and are electrically connected with the epitaxial layer.
Description
Technical Field
Embodiments of the present disclosure relate to a light emitting diode structure and a light emitting diode display panel using the same, and more particularly, to a micro light emitting diode structure including a patterned electrode layer and a micro light emitting diode display panel using the same.
Background
With the progress of photovoltaic technology, the volume of many photovoltaic devices is gradually reduced. Compared with organic light-emitting diode (OLED) technology, micro light-emitting diodes (mLED/μled) have advantages of high efficiency, long lifetime, less environmental impact and relatively stable materials. Accordingly, a display using micro light emitting diodes fabricated in array arrangement is increasingly gaining attention in the market.
In general, a micro light emitting diode structure often includes a group iii nitride semiconductor material (for example, gaN, alN, inN and an alloy thereof) as a light emitting material. However, in the process of emitting light from the light emitting material to the light emitting surface, the light may be blocked due to the refractive index difference of the layers. For example, light emitted by the light emitting material may be totally reflected inside the micro light emitting diode structure, resulting in a decrease in the overall light emitting efficiency of the micro light emitting diode structure.
Disclosure of Invention
The embodiment of the disclosure relates to a micro light emitting diode structure comprising a patterned electrode layer and a micro light emitting diode display panel using the same. The patterned electrode layer is divided into a plurality of patterned electrode sections, and the patterned electrode sections are separated from each other. In some embodiments, the overall luminous efficiency of the micro light emitting diode structure can be further improved by adjusting the size (height, width, etc.) of the patterned electrode sections or the distance between two adjacent patterned electrode sections.
Embodiments of the present disclosure include a micro light emitting diode structure. The micro light emitting diode structure comprises an epitaxial layer. The micro light emitting diode structure also comprises a reflecting layer which is arranged on the epitaxial layer. The micro light emitting diode structure further comprises a patterned electrode layer, wherein the patterned electrode layer is arranged between the epitaxial layer and the reflecting layer. The patterned electrode layer is divided into a plurality of patterned electrode sections, which are separated from each other. In addition, the micro light emitting diode structure comprises a first type electrode and a second type electrode, wherein the first type electrode and the second type electrode are arranged on the reflecting layer and are electrically connected with the epitaxial layer.
Embodiments of the present disclosure include a micro light emitting diode display panel. The micro light emitting diode display panel comprises a driving substrate, wherein the driving substrate is provided with a display area and a non-display area. The micro light emitting diode display panel also comprises a plurality of pixels, and the pixels are arranged in the display area and are arranged into an array. The micro light emitting diode display panel further comprises a plurality of the micro light emitting diode structures, wherein the micro light emitting diode structures are arranged in the pixels and are combined on the driving substrate.
Drawings
Embodiments of the present disclosure will be described in detail below with reference to the attached drawings. It should be noted that the various features are not drawn to scale and are merely illustrative. Indeed, the dimensions of the components may be exaggerated or reduced to clearly illustrate the technical features of the embodiments of the present disclosure.
FIG. 1 is a partial cross-sectional view illustrating a micro light emitting diode structure according to one embodiment of the present disclosure;
FIG. 2 is a partial top view illustrating a micro light emitting diode structure according to one embodiment of the present disclosure;
FIG. 3 is a partial cross-sectional view illustrating a micro light emitting diode structure according to another embodiment of the present disclosure;
FIG. 4 is a partial cross-sectional view illustrating a micro light emitting diode structure according to another embodiment of the present disclosure;
FIG. 5 is a partial cross-sectional view illustrating a micro light emitting diode structure according to another embodiment of the present disclosure;
FIG. 6 is a partial top view illustrating a micro light emitting diode display panel according to one embodiment of the present disclosure;
fig. 7 is a partial cross-sectional view illustrating a micro light emitting diode display panel according to an embodiment of the present disclosure.
Description of the reference numerals
1 micro LED display panel
3 drive substrate
3A display area
3E1,3E2 circuit connecting pad
3N non-display area
5 scanning drive circuit
7 data driving circuit
100,100B,100G,100R,102,104,106 micro LED structure
10 first semiconductor layer
10B back side
10E patterning the light-emitting surface
20,20B,20G,20R luminescent layer
30 second type semiconductor layer
30T surface
40 patterning electrode layer
41 patterning electrode segments
43 conductive film
50,50' reflective layer
50T top surface
50T' patterning a top surface
61,61': first type electrode
61H,61H': through holes
61HB bottom
63 second type electrode
63H through hole
63HB bottom part
D height of
I: arrangement distance
P: pixel
P1, P2, P3 sub-pixels
S bottom width
Detailed Description
The following disclosure provides many different embodiments, or examples, for implementing different features of the disclosure. The following disclosure describes specific examples of various components and arrangements thereof to simplify the description. Of course, these specific examples are not intended to be limiting. For example, if the embodiments of the present disclosure describe a first feature formed on or over a second feature, it may include embodiments in which the first feature is in direct contact with the second feature, or may include embodiments in which additional features are formed between the first feature and the second feature, such that the first feature and the second feature may not be in direct contact.
It is to be understood that additional operational steps may be performed before, during, or after the methods, and that in other embodiments of the methods, some of the operational steps may be replaced or omitted.
Furthermore, spatially relative terms, such as "under" …, "" below, "" lower, "" above "…," "upper," "higher," and the like, may be used herein to facilitate description of a relationship between one component(s) or feature(s) and another component(s) or feature(s) in the drawings, including different orientations of the device in use or operation, and orientations depicted in the drawings. When the device is turned to a different orientation (rotated 90 degrees or other orientations), the spatially relative descriptors used herein interpreted in terms of the turned orientation.
In the specification, the terms "about", "approximately" and "approximately" generally mean within 20%, or within 10%, or within 5%, or within 3%, or within 2%, or within 1%, or within 0.5% of a given value or range. The amounts given herein are about amounts, i.e., where "about", "about" or "approximately" is not specifically recited, the meaning of "about", "about" or "approximately" may still be implied.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be appreciated that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
The different embodiments disclosed below may reuse the same reference symbols and/or labels. These repetition are for the purpose of simplicity and clarity and do not in itself dictate a particular relationship between the various embodiments and/or configurations discussed.
Fig. 1 is a partial cross-sectional view illustrating a micro light emitting diode structure 100 according to an embodiment of the present disclosure, and fig. 2 is a partial top view illustrating the micro light emitting diode structure 100 according to an embodiment of the present disclosure. For example, fig. 1 may be a cross-sectional view taken along the section line A-A' in fig. 2, but the embodiments of the disclosure are not limited thereto. It is noted that, in order to more clearly show the technical features of the embodiments of the present disclosure, some of the components of the micro led structure 100 may be omitted in fig. 1 and 2.
Referring to fig. 1, in some embodiments, the micro light emitting diode structure 100 includes a first type semiconductor layer 10, a light emitting layer 20, and a second type semiconductor layer 30, wherein the light emitting layer 20 is disposed on the first type semiconductor layer 10, and the second type semiconductor layer 30 is disposed on the light emitting layer 20. In some embodiments, the first type semiconductor layer 10 has a first conductivity type (e.g., N-type), and the second type semiconductor layer 30 has a second conductivity type (e.g., P-type) opposite to the first conductivity type.
In some embodiments, the first-type semiconductor layer 10, the light-emitting layer 20 and the second-type semiconductor layer 30 may be regarded as an epitaxial layer of the micro light-emitting diode structure 100. That is, the first type semiconductor layer 10, the light emitting layer 20, and the second type semiconductor layer 30 may be formed on a substrate through an epitaxial growth process. For example, the epitaxial growth process may include metal organic chemical vapor deposition (metal organic chemical vapor deposition, MOCVD), hydride vapor phase epitaxy (hydride vapor phase epitaxy, HVPE), molecular beam epitaxy (molecular beam epitaxy, MBE), other suitable methods, or combinations thereof, but the embodiments of the present disclosure are not limited thereto.
The substrate may comprise a semiconductor substrate. For example, the substrate may comprise silicon, silicon germanium, gallium nitride, gallium arsenide, other suitable semiconductor materials, or combinations thereof. The substrate may also be a semiconductor over insulator substrate such as a silicon on insulator (silicon on insulator, SOI) substrate. Alternatively, the substrate may be a glass substrate or a ceramic substrate. For example, the substrate may comprise silicon carbide (SiC), aluminum nitride (AlN), glass, or sapphire (sapphire), but the embodiments of the disclosure are not limited thereto.
In some embodiments, the doping of the first type semiconductor layer 10 is N-type. For example, the first type semiconductor layer 10 may include a ii-vi material (e.g., zinc selenide (ZnSe)) or a iii-v nitride material (e.g., gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), or aluminum indium gallium nitride (AlInGaN)), and the first type semiconductor layer 10 may include a dopant such as silicon (Si) or germanium (Ge), but the embodiment of the disclosure is not limited thereto. In the embodiment of the present disclosure, the first type semiconductor layer 10 may be a single-layer or multi-layer structure.
In some embodiments, the light emitting layer 20 includes at least one undoped semiconductor layer or at least one low doped layer. For example, the light emitting layer 20 may include a quantum well (quantumum well, QW) layer, the quantum well may comprise indium gallium nitride (indium gallium nitride, in x Ga 1-x N) or gallium nitride (GaN), but the embodiments of the present disclosure are not limited thereto. In some embodiments, the light emitting layer 20 includes a plurality of quantum wells (multiple quantum well, MQW).
In some embodiments, the doping of the second type semiconductor layer 30 is P-type. For example, the second type semiconductor layer 30 may include a ii-vi material (e.g., zinc selenide (ZnSe)) or a iii-v nitride material (e.g., gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), or aluminum indium gallium nitride (AlInGaN)), and the second type semiconductor layer 30 may include dopants of magnesium (Mg), carbon (C), etc., but the embodiment of the disclosure is not limited thereto. In the embodiment of the present disclosure, the second type semiconductor layer 30 may be a single-layer or multi-layer structure.
As shown in fig. 1, the first semiconductor layer 10 has a patterned light-emitting surface 10E and a back surface 10B opposite to the patterned light-emitting surface 10E. In some embodiments, the light emitting layer 20 is disposed on the back surface 10B of the first type semiconductor layer 10. The patterned light emitting surface 10E may be formed by a surface roughening process, but the embodiment of the disclosure is not limited thereto. The patterned light-emitting surface 10E can further improve the overall light-emitting efficiency of the micro light-emitting diode structure 100.
Referring to fig. 1, in some embodiments, the micro light emitting diode structure 100 includes a patterned electrode layer 40, and the patterned electrode layer 40 is disposed on the epitaxial layer. In more detail, the patterned electrode layer 40 may be disposed on the second type semiconductor layer 30 and directly contact with the second type semiconductor layer 30. The patterned electrode layer 40 may include a transparent conductive material. For example, the transparent conductive material may include Indium Tin Oxide (ITO), tin Oxide (TO), indium zinc oxide (indium zinc oxide, IZO), indium gallium zinc oxide (indium gallium zinc oxide, IGZO), indium tin zinc oxide (indium zinc tin oxide, ITZO), antimony tin oxide (antimony tin oxide, ATO), antimony zinc oxide (antimony zinc oxide, AZO), but the embodiments of the disclosure are not limited thereto.
The patterned electrode layer 40 may be formed on the second type semiconductor layer 30 through a deposition process and a patterning process. The deposition process may include chemical vapor deposition (chemical vapor deposition, CVD), atomic layer deposition (atomic layer deposition, ALD), other suitable methods, or combinations thereof, but the embodiments of the present disclosure are not limited thereto. In addition, a shielding layer (not shown) may be disposed on the transparent conductive material, and then an etching process is performed using the shielding layer as an etching mask to complete the patterning process.
For example, the shielding layer may comprise a photoresist, such as a positive photoresist (positive photoresist) or a negative photoresist (negative photoresist). The shielding layer may comprise a hard shield and may be made of silicon oxide (SiO 2 ) Silicon nitride (SiN), silicon oxynitride (SiON), silicon carbide (SiC), silicon carbide nitride (SiCN), similar materials, or combinations thereof, although embodiments of the present disclosure are not limited thereto. The shielding layer may be a single layer or a multi-layer structure. The formation of the shielding layer may include a deposition process, a photolithography process, other suitable processes, or a combination thereof. Deposition processes include, for example, spin-on coating (spin-on coating), chemical vapor deposition, atomic layer deposition, the like, or combinations thereof. The photolithography process may include photoresist coating (e.g., spin coating), soft baking (soft baking), mask alignment (mask alignment), exposure (exposure), post-exposure baking (PEB), development (development), rinsing (rinsing), drying (e.g., hard baking), other suitable processes, or combinations of the foregoing.
The etching process may include a dry etching process, a wet etching process, or a combination thereof. For example, the dry etching process may include a reactive ion etch (reactive ion etch, RIE), an inductively-coupled plasma (ICP) etch, a neutron beam etch (neutral beam etch, NBE), an electron cyclotron resonance (electron cyclotron resonance, ERC) etch, a similar etching process, or a combination thereof. For example, wet etching processes may use, for example, hydrofluoric acid (hydrofluoric acid, HF), ammonium hydroxide (ammonium hydroxide, NH) 4 OH) or any suitable etchant.
As shown in fig. 1 and 2, in some embodiments, the patterned electrode layer 40 is divided into a plurality of patterned electrode sections 41, and the patterned electrode sections 41 are separated from each other. The plurality of patterned electrode segments 41 of the patterned electrode layer 40 may be arranged in a regular periodic (e.g., array) and formed on the epitaxial layer, but the embodiment of the disclosure is not limited thereto.
In the embodiment shown in fig. 1, the patterned electrode section 41 may be formed as a cone (in cross-section, triangular), but the embodiment of the disclosure is not limited thereto. For example, the patterned electrode section 41 may also be formed as a cylinder (rectangular in cross-section), a bar-like column, etc., which may be adjusted according to practical requirements.
As shown in fig. 1, in some embodiments, the height D of each patterned electrode section 41 is between about 0.01 μm and about 2 μm. In some embodiments, the bottom surface width S of each patterned electrode section 41 is between about 0.5 μm to about 5 μm. Furthermore, in some embodiments, as shown in fig. 1, the arrangement pitch I of the patterned electrode segments 41 is constant (i.e., the plurality of patterned electrode segments 41 exhibit a regular periodic arrangement), and the arrangement pitch I is between about 0.5 μm and about 20 μm. Here, the arrangement pitch I is defined as the distance between the central axes of two adjacent patterned electrode sections 41. In some other embodiments, the arrangement pitch I of the patterned electrode segments 41 is variable (variable).
The plurality of patterned electrode segments 41 of the patterned electrode layer 40 can reduce dispersion, so that the overall luminous efficiency of the micro light emitting diode structure 100 can be further improved by adjusting the size (e.g., the height D, the width S, etc.) of the patterned electrode segments or the arrangement interval I of the patterned electrode segments 41. In some embodiments, the size of each patterned electrode section 41 is smaller than the size of each pattern of the patterned light-emitting surface 10E.
For example, when the light emitting layer 20 emits red light, the height D of each patterned electrode segment 41 may be about 0.48 μm to about 1.2 μm, the bottom width S of each patterned electrode segment 41 may be about 0.6 μm to about 1.2 μm, and the arrangement pitch I of the patterned electrode segments 41 may be about 0.5 μm to about 20 μm; when the light emitting layer 20 emits blue light, the height D of each patterned electrode section 41 may be about 0.35 μm to about 1 μm, the bottom width S of each patterned electrode section 41 may be about 0.5 μm to about 1 μm, and the arrangement pitch I of the patterned electrode sections 41 may be about 0.5 μm to about 20 μm; when the light emitting layer 20 emits green light, the height D of each patterned electrode segment 41 may be between about 0.4 μm and about 1 μm, the bottom width S of each patterned electrode segment 41 may be between about 0.55 μm and about 1 μm, and the arrangement interval I of the patterned electrode segments 41 may be between about 0.5 μm and about 20 μm, but the embodiment of the disclosure is not limited thereto.
Referring to fig. 1, in some embodiments, the micro light emitting diode structure 100 includes a reflective layer 50, and the reflective layer 50 is disposed on the patterned electrode layer 40. In other words, the reflective layer 50 is disposed on the epitaxial layer (e.g., the second type semiconductor layer 30), and the patterned electrode layer 40 is disposed between the epitaxial layer and the reflective layer 50. In some embodiments, the reflective layer 50 comprises a distributed Bragg reflector (distributed Bragg reflector, DBR). In some embodiments, the reflective layer 50 is formed by stacking multiple layers of insulating materials having different refractive indices. As shown in fig. 1, the reflective layer 50 is formed on the light emitting layer 20 and the second type semiconductor layer 30 and covers (part of) the surfaces 30T and side surfaces of the light emitting layer 20 and the second type semiconductor layer 30. In more detail, all side surfaces of the light emitting layer 20 and the second type semiconductor layer 30 are protected by the reflective layer 50 as shown in fig. 1, so that the leakage path can be reduced and the light emitting efficiency can be improved.
For example, when the light emitted from the light emitting layer 20 passes through the films with different refractive indexes in the reflective layer 50, the light reflected from the layers performs constructive interference (constructive interference) due to the change of the phase angle, and then combines with each other to obtain strong reflected light, so that the reflected light is emitted through the patterned light emitting surface 10E of the first type semiconductor layer 10, and the light emitting efficiency of the micro light emitting diode structure 100 is further increased. The reflective layer 50 may be formed on the patterned electrode layer 40 by a deposition process, but the embodiment of the disclosure is not limited thereto. Examples of deposition and patterning processes are described above and are not repeated here.
The reflective layer 50 may have a flat top surface 50T, but the embodiments of the disclosure are not limited thereto. Here, as shown in fig. 1, the top surface 50T is located on the surface of the reflective layer 50 opposite to the contact surface of the patterned electrode layer 40 (patterned electrode section 41).
Referring to fig. 1, the micro light emitting diode structure 100 includes a first type electrode 61 and a second type electrode 63, and the first type electrode 61 and the second type electrode 63 are disposed on the reflective layer 50 and electrically connected to the epitaxial layer. Specifically, as shown in fig. 1, the second type semiconductor layer 30, the patterned electrode layer 40, at least part of the reflective layer 50, at least part of the first type electrode 61 and the second type electrode 63 are located on the same side of the light emitting layer 20, and the first type semiconductor layer 10 is located on the other side of the light emitting layer 20.
The first type electrode 61 and the second type electrode 63 may comprise conductive materials, such as metals, metal silicides, the like, or combinations thereof. For example, the metal may include gold (Au), nickel (Ni), platinum (Pt), palladium (Pd), iridium (Ir), titanium (Ti), chromium (Cr), tungsten (W), aluminum (Al), copper (Cu), similar materials, alloys of the foregoing, or combinations thereof, but the embodiments of the disclosure are not limited thereto. The first type electrode 61 and the second type electrode 63 may be formed by physical vapor deposition, chemical vapor deposition, atomic layer deposition (ald), evaporation (sputtering), similar processes, or a combination thereof, but the embodiment of the disclosure is not limited thereto.
In some embodiments, the first type electrode 61 is electrically connected to the first type semiconductor layer 10, and the second type electrode 63 is electrically connected to the second type semiconductor layer 30. Specifically, as shown in fig. 1 and 2, in some embodiments, the micro light emitting diode structure 100 has a through hole 61H, the through hole 61H penetrates through the reflective layer 50, the second type semiconductor layer 60 and the light emitting layer 20 and exposes a portion of the first type semiconductor layer 10, and the first type electrode 61 is disposed in the through hole 61H and directly contacts with the first type semiconductor layer 10, thereby electrically connecting the first type electrode 61 and the first type semiconductor layer 10. That is, the bottom 61HB of the via hole 61H may be located inside the first type semiconductor layer 20 or on the back surface 10B.
As shown in fig. 1 and 2, in some embodiments, the micro light emitting diode structure 100 also has a through hole 63H, the through hole 63H penetrates through the reflective layer 50 and exposes a portion of the patterned electrode layer 40 (i.e. some of the patterned electrode sections 41) and a portion of the second type semiconductor layer 30, and the second type electrode 63 is disposed in the through hole 63H and directly contacts with the exposed portion of the patterned electrode layer 40, thereby electrically connecting the second type electrode 63 and the second type semiconductor layer 30. That is, the bottom 63HB of the via 63H may be located at the surface 30T of the second type semiconductor layer 30 and directly contact with the partially patterned electrode section 41.
As shown in fig. 2, in a top view of the micro light emitting diode structure 100, a plurality of patterned electrode sections 41 of the patterned electrode layer 40 are formed as an array (array), and the patterned electrode sections 41 are separated from each other. That is, the patterned electrode layer 40 may be formed as a discontinuous electrode. These discontinuous electrodes may limit the current flow, thereby controlling the current density between the second type electrode 63 and the second type semiconductor layer 30.
In some embodiments, the ratio of the contact area of the portion of the patterned electrode layer 40 in the via 63H to the second type semiconductor layer 30 to the bottom area of the via 63H (i.e., the area of the bottom 63HB of the via 63H) is between about 0.5% and about 85%. In some embodiments, this ratio is between about 40% and about 60%. If the contact area between the patterned electrode layer 40 and the second type semiconductor layer 30 is too small, current crowding is caused, and the micro light emitting diode structure is also easy to overheat; if the contact area is too large, the effect of limiting current cannot be achieved, and the luminous efficiency of the micro light-emitting diode structure cannot be further improved.
Fig. 3 is a partial cross-sectional view illustrating a micro light emitting diode structure 102 according to another embodiment of the present disclosure, fig. 4 is a partial cross-sectional view illustrating a micro light emitting diode structure 104 according to another embodiment of the present disclosure, and fig. 5 is a partial cross-sectional view illustrating a micro light emitting diode structure 106 according to another embodiment of the present disclosure. Similarly, for clarity of illustrating the technical features of the embodiments of the present disclosure, some components of the micro light emitting diode structure 102, the micro light emitting diode structure 104, or the micro light emitting diode structure 106 may be omitted in fig. 3 and 5.
Referring to fig. 3, in some embodiments, the micro light emitting diode structure 102 further includes a conductive film 43, wherein the conductive film 43 is disposed between the epitaxial layer (e.g., the second type semiconductor layer 30) and the patterned electrode layer 40, and the conductive film 43 is tiled over the epitaxial layer (e.g., the first type semiconductor layer 10, the light emitting layer 20, and the second type semiconductor layer 30). Specifically, the conductive film 43 may be disposed on the second type semiconductor layer 30 and located at the bottom of the plurality of patterned electrode sections 41 of the patterned electrode layer 40, but the embodiment of the disclosure is not limited thereto.
In some embodiments, the material of conductive film 43 is the same as or similar to the material of patterned electrode layer 40. For example, the conductive film 43 may include a transparent conductive material. Examples of transparent conductive materials are described above and are not repeated here. In addition, the conductive film 43 may be formed on the second type semiconductor layer 30 through a deposition process. Examples of deposition processes are described above and are not repeated here. In some embodiments, the conductive film 43 and the patterned electrode layer 40 may be formed simultaneously by the same process (e.g., deposition process and patterning process), but the embodiments of the disclosure are not limited thereto.
In the foregoing embodiment, the reflective layer 50 has a flat top surface 50T, but the embodiment of the disclosure is not limited thereto. Referring to fig. 4, in some embodiments, the reflective layer 50 'of the micro led structure 104 has a patterned top surface 50T'. Here, as shown in fig. 4, the patterned top surface 50T 'is located at a surface of the reflective layer 50' opposite to the contact surface of the patterned electrode layer 40 (patterned electrode section 41). Similarly, the patterned top surface 50T' may be formed by a patterning process or a surface roughening process, but the embodiments of the disclosure are not limited thereto. The overall luminous efficiency of the micro led structure 104 may be further enhanced by the reflective capabilities of the patterned top surface 50T 'of the reflective layer 50'.
Referring to fig. 5, in some embodiments, the reflective layer 50' of the micro light emitting diode structure 106 extends over the first type semiconductor layer 10. In addition, the through hole 61H 'may expose a portion of the first semiconductor layer 10 only by penetrating the reflective layer 50'. In some embodiments, the first type electrode 61' is disposed on the top surface 50T ' of the reflective layer 50', and the first type electrode 61' also extends over a side surface 50S of the reflective layer 50' and extends into the through hole 61H ' to directly contact the first type semiconductor layer 10, thereby electrically connecting the first type electrode 61' and the first type semiconductor layer 10.
Fig. 6 is a partial top view showing the micro light emitting diode display panel 1 according to an embodiment of the present disclosure. Fig. 7 is a partial sectional view showing the micro light emitting diode display panel 1 according to an embodiment of the present disclosure. For example, fig. 7 may be a cross-sectional view taken along section line B-B' in fig. 6, but the embodiments of the present disclosure are not limited thereto. It is noted that, in order to more clearly show the technical features of the embodiments of the present disclosure, part of the components of the micro light emitting diode display panel 1 may be omitted in fig. 6 and 7.
Referring to fig. 6, the micro led display panel 1 includes a driving substrate 3 and a plurality of pixels P. The driving substrate 3 has a display area 3A and a non-display area 3N, and a plurality of pixels P are disposed in the display area 3A and arranged in an array. In some embodiments, as shown in fig. 6, each pixel P includes three sub-pixels (e.g., sub-pixel P1, sub-pixel P2, and sub-pixel P3), but the embodiments of the disclosure are not limited thereto. In some other embodiments, each pixel P includes more than three sub-pixels, which can be adjusted according to practical requirements.
As shown in fig. 6, the micro light emitting diode display panel 1 includes a scan driving circuit 5 and a data driving circuit 7, and the scan driving circuit 5 and the data driving circuit 7 are disposed in the non-display area 3N. Referring to fig. 6 and 7, the micro led display panel 1 includes a pixel circuit, and the pixel circuit forms a plurality of circuit pads 3E1 and 3E2 in each sub-pixel. Referring to fig. 7, the micro light emitting diode display panel 1 includes a plurality of micro light emitting diode display structures disposed in the pixels P and bonded to the driving substrate 3, so that the scan driving circuit 5 and the data driving circuit 7 can be electrically connected to the micro light emitting diode display structures through the pixel circuits (the circuit pads 3E1 and 3E 2).
In some embodiments, as shown in fig. 6 and 7, the micro light emitting diode display structure 100R is disposed in the sub-pixel P1 of the pixel P, and the micro light emitting diode display structure 100R is bonded on the driving substrate 3 by bonding the circuit pad 3E1 with the first type electrode 61 of the micro light emitting diode display structure 100R and bonding the circuit pad 3E2 with the second type electrode 62 of the micro light emitting diode display structure 100R. For example, the light emitting layer 20R of the micro light emitting diode display structure 100R may emit red light. In other words, the led display structure 100R may be a micro red led, but the embodiment of the disclosure is not limited thereto.
Similarly, in some embodiments, as shown in fig. 6 and 7, the micro light emitting diode display structure 100G is disposed in the sub-pixel P2 of the pixel P, and the micro light emitting diode display structure 100B is disposed in the sub-pixel P3 of the pixel P. The micro led display structure 100G and the micro led display structure 100B may be respectively bonded on the driving substrate 3 through the circuit pads 3E1 and the circuit pads 3E2. For example, the light emitting layer 20G of the micro light emitting diode display structure 100G may emit green light, and the light emitting layer 20B of the micro light emitting diode display structure 100B may emit blue light. In other words, the led display structure 100G may be a micro green led, and the led display structure 100B may be a micro blue led, but the embodiment of the disclosure is not limited thereto.
As shown in fig. 7, each pixel P may have a micro light emitting diode display structure 100R (corresponding to the sub-pixel P1), a micro light emitting diode display structure 100G (corresponding to the sub-pixel P2), and a micro light emitting diode display structure 100B (corresponding to the sub-pixel P3) that emit red light, green light, and blue light, respectively. The micro light emitting diode display structures are flip-chip bonded on the circuit pads 3E1 and 3E2 of the pixel circuit.
In some embodiments, the micro light emitting diode display structure 100R, the micro light emitting diode display structure 100G, and the micro light emitting diode display structure 100B have structures similar to the micro light emitting diode structure 100 shown in fig. 1, but the embodiment of the disclosure is not limited thereto. In some other embodiments, the micro light emitting diode display structure 100R, the micro light emitting diode display structure 100G, and the micro light emitting diode display structure 100B have structures similar to the micro light emitting diode structure 102 shown in fig. 3, the micro light emitting diode structure 104 shown in fig. 4, or the micro light emitting diode structure 106 shown in fig. 5.
In addition, the patterned light-emitting surface 10E of the first semiconductor layer 10 of the micro light-emitting diode display structure can be regarded as the display surface of the micro light-emitting diode display panel 1. Therefore, the micro led display panel 1 according to the embodiment of the present disclosure may have higher brightness and higher luminous efficiency compared to the conventional display panel, and is particularly suitable for being applied to an outdoor display device or a transparent display device.
In view of the above description, the patterned electrode layer of the micro light emitting diode structure of the embodiments of the present disclosure is divided into a plurality of patterned electrode sections, and the patterned electrode sections are separated from each other. In some embodiments, the overall luminous efficiency of the micro light emitting diode structure can be further improved by adjusting the size (height, width, etc.) of the patterned electrode sections or the distance between two adjacent patterned electrode sections. In addition, the micro light emitting diode display panel using the micro light emitting diode structure of the embodiment of the disclosure can have higher brightness and higher luminous efficiency.
The foregoing outlines features of several embodiments so that those skilled in the art to which this disclosure pertains may better understand the aspects of the embodiments of the present disclosure. Those skilled in the art should appreciate that they may readily use the conception and specific embodiment disclosed as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or advantages of the embodiments described herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure. Accordingly, the scope of the present disclosure is defined by the claims. In addition, while the present disclosure has been described above in terms of several preferred embodiments, it is not intended to limit the disclosure.
Reference throughout this specification to features, advantages, or similar language does not imply that all of the features and advantages that may be realized with the present disclosure should be or are in any single embodiment of the disclosure. Rather, language referring to the features and advantages is understood to mean that a specific feature, advantage, or characteristic described in connection with an embodiment is included in at least one embodiment of the present disclosure. Thus, discussion of the features and advantages, and similar language, throughout this specification may, but do not necessarily, refer to the same embodiment.
Furthermore, the described features, advantages, and characteristics of the disclosure may be combined in any suitable manner in one or more embodiments. One skilled in the relevant art will recognize, in view of the description herein, that the disclosure may be practiced without one or more of the specific features or advantages of a particular embodiment. In other instances, additional features and advantages may be recognized in certain embodiments that may not be present in all embodiments of the disclosure.
Claims (17)
1. A micro light emitting diode structure comprising:
an epitaxial layer;
a reflection layer disposed on the epitaxial layer;
a patterned electrode layer disposed between the epitaxial layer and the reflective layer, wherein the patterned electrode layer is divided into a plurality of patterned electrode sections, the plurality of patterned electrode sections being separated from each other; and
the first type electrode and the second type electrode are arranged on the reflecting layer and are electrically connected with the epitaxial layer;
wherein the epitaxial layer comprises:
a first semiconductor layer having a first conductivity type;
a light emitting layer disposed on the first semiconductor layer; a kind of electronic device with high-pressure air-conditioning system
A second type semiconductor layer disposed on the light emitting layer and having a second conductivity type opposite to the first conductivity type,
the first type electrode is electrically connected with the first type semiconductor layer, the second type electrode is electrically connected with the second type semiconductor layer, and the patterned electrode layer is arranged on the second type semiconductor layer and is in direct contact with the second type semiconductor layer.
2. The micro light emitting diode structure according to claim 1, wherein the micro light emitting diode structure has a first through hole penetrating the reflective layer and exposing a portion of the first type semiconductor layer, and the first type electrode is disposed in the first through hole and is in direct contact with the first type semiconductor layer.
3. The micro light emitting diode structure according to claim 2, wherein the second type semiconductor layer, the patterned electrode layer, at least part of the reflective layer, at least part of the first type electrode and the second type electrode are located on the same side of the light emitting layer, the first type semiconductor layer is located on the other side of the light emitting layer, and the first through hole also penetrates through the second type semiconductor layer and the light emitting layer and exposes a portion of the first type semiconductor layer.
4. The micro light emitting diode structure of claim 2, wherein the first type electrode extends and covers over a side of the reflective layer.
5. The micro light emitting diode structure of claim 1, wherein the micro light emitting diode structure has a second via penetrating the reflective layer and exposing a portion of the patterned electrode layer and a portion of the second semiconductor layer, and the second type electrode is disposed in the second via and in direct contact with the portion of the patterned electrode layer.
6. The micro light emitting diode structure according to claim 5, wherein a ratio of a contact area of the portion of the patterned electrode layer and the second type semiconductor layer to a bottom area of the second via is between 40% and 60%.
7. The micro light emitting diode structure according to claim 1, wherein the first semiconductor layer has a patterned light emitting surface and a back surface opposite to the patterned light emitting surface, and the light emitting layer is disposed on the back surface.
8. The micro led structure of claim 7, wherein the size of each patterned electrode section is smaller than the size of the pattern of the patterned light-emitting surface.
9. The micro light emitting diode structure of claim 1, wherein the first conductivity type is N-type and the second conductivity type is P-type.
10. The micro light emitting diode structure of claim 1, wherein the reflective layer has a patterned top surface and the first semiconductor layer has a patterned light emitting surface.
11. The micro light emitting diode structure of claim 1, further comprising:
the conductive film is arranged between the epitaxial layer and the patterned electrode layer and is paved on the epitaxial layer in a whole layer.
12. The micro led structure of claim 11, wherein the patterned electrode layer and the conductive film comprise indium tin oxide, indium zinc oxide, indium gallium zinc oxide, indium tin zinc oxide, antimony tin oxide, antimony zinc oxide.
13. The micro light emitting diode structure of claim 1, wherein the height of each of the patterned electrode sections is between 0.01 μm and 2 μm.
14. The micro light emitting diode structure of claim 1, wherein a bottom width of each of the patterned electrode sections is between 0.5 μm and 5 μm.
15. The micro light emitting diode structure of claim 1, wherein the arrangement pitch of the plurality of patterned electrode segments is between 0.5 μm and 20 μm.
16. The micro light emitting diode structure of claim 1, the reflective layer comprising a distributed bragg reflector.
17. A miniature light emitting diode display panel comprising:
a driving substrate having a display area and a non-display area;
a plurality of pixels arranged in the display area and arranged in an array; and
a plurality of micro light emitting diode structures disposed in the plurality of pixels and bonded on the driving substrate, wherein each micro light emitting diode structure comprises:
an epitaxial layer;
a reflection layer disposed on the epitaxial layer;
a patterned electrode layer disposed between the epitaxial layer and the reflective layer, wherein the patterned electrode layer is divided into a plurality of patterned electrode sections, the plurality of patterned electrode sections being separated from each other; a kind of electronic device with high-pressure air-conditioning system
The first type electrode and the second type electrode are arranged on the reflecting layer and are electrically connected with the epitaxial layer;
wherein the epitaxial layer comprises:
a first semiconductor layer having a first conductivity type;
a light emitting layer disposed on the first semiconductor layer; a kind of electronic device with high-pressure air-conditioning system
A second type semiconductor layer disposed on the light emitting layer and having a second conductivity type opposite to the first conductivity type,
the reflecting layer is provided with a patterned top surface, the first type semiconductor layer is provided with a patterned light emitting surface, and the patterned electrode layer is arranged on the second type semiconductor layer and is in direct contact with the second type semiconductor layer.
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