CN113191114B

CN113191114B - Method and apparatus for validating a system

Info

Publication number: CN113191114B
Application number: CN202110489067.6A
Authority: CN
Inventors: 李炎
Original assignee: Beijing Baidu Netcom Science and Technology Co Ltd
Current assignee: Beijing Baidu Netcom Science and Technology Co Ltd
Priority date: 2021-04-30
Filing date: 2021-04-30
Publication date: 2023-11-10
Anticipated expiration: 2041-04-30
Also published as: CN113191114A

Abstract

The application discloses a method and a device for verifying a system, and relates to the technical fields of system testing and chip design. The method comprises the following steps: in response to receiving a first instruction to instruct verification of a system to be verified, performing the following looping operation: acquiring a verification case; storing the verification use case into a target memory, and sending an address for storing the verification use case into the target memory to a system to be verified, wherein the address is used for enabling the system to be verified to acquire the verification use case; and stopping the circulation operation in response to the fact that the data of the verification use case executed by the system to be verified meets the preset condition, and determining the state of the system to be verified according to the result obtained after the verification use case executed by the system to be verified. By adopting the method, the accuracy of verifying the system can be improved.

Description

Method and apparatus for validating a system

Technical Field

The present disclosure relates to the field of computer technology, and in particular, to the field of system testing and chip design technology, and more particularly, to a method and apparatus for verifying a system.

Background

The hardware system or the software system needs to verify the functions after development is completed. The existing method for verifying the functions of the hardware system or the software system adopts a large number of directional verification cases (namely verification cases for verifying the specified functions) to verify each function of the system respectively.

However, the conventional method for verifying the system function has the problems of inaccurate verification and high maintenance cost of verification cases.

Disclosure of Invention

The present disclosure provides a method, apparatus, electronic device, and computer-readable storage medium for validating a system.

According to a first aspect, there is provided a method for authenticating a system, the method comprising: in response to receiving a first instruction to instruct verification of a system to be verified, performing the following looping operation: acquiring a verification case; storing the verification use cases into a target memory, and sending addresses for storing the verification use cases into the target memory to a system to be verified, wherein the addresses are used for enabling the system to be verified to acquire the verification use cases; and stopping the circulation operation in response to the fact that the data of the verification use case executed by the system to be verified meets the preset condition, and determining the state of the system to be verified according to the result obtained after the verification use case executed by the system to be verified.

According to a second aspect, there is provided a method for authenticating a system, for application to a system to be authenticated, the method comprising: in response to receiving an address of the verification case in the target memory, obtaining the verification case based on the address; and executing the verification case, and determining the state of the system to be verified according to the result obtained after executing the verification case.

According to a third aspect, there is provided an apparatus for validating a system, the apparatus comprising: a receiving unit configured to, in response to receiving a first instruction for instructing verification of a system to be verified, perform the following loop operation: a first acquisition unit configured to acquire a verification use case; the sending unit is configured to store the verification use cases into the target memory, and send the addresses for storing the verification use cases into the target memory to the system to be verified, wherein the addresses are used for enabling the system to be verified to acquire the verification use cases; and the judging unit is configured to stop the circulation operation in response to the fact that the data of the verification case executed by the system to be verified meets the preset condition, and determine the state of the system to be verified according to the result obtained after the verification case executed by the system to be verified.

According to a fourth aspect, there is provided an apparatus for authenticating a system, for application to a system to be authenticated, the apparatus comprising: a second acquisition unit configured to acquire the verification use case based on the address in response to receiving the address of the verification use case in the target memory; and the execution unit is configured to execute the verification case and determine the state of the system to be verified according to the result obtained after the verification case is executed.

According to a fifth aspect, embodiments of the present disclosure provide an electronic device, comprising: one or more processors to: a storage means for storing one or more programs which when executed by one or more processors cause the one or more processors to implement a method for authenticating a system as provided in the first aspect or to implement a method for authenticating a system as provided in the second aspect.

According to a sixth aspect, embodiments of the present disclosure provide a computer readable storage medium having stored thereon a computer program, wherein the program when executed by a processor implements the method for authenticating a system provided in the first aspect or implements the method for authenticating a system as provided in the second aspect.

The method and the device for verifying the system provided by the disclosure respond to receiving a first instruction for indicating to verify the system to be verified, and perform the following cyclic operation: acquiring a verification case; storing the verification use case into a target memory, and sending an address for storing the verification use case into the target memory to a system to be verified, wherein the address is used for enabling the system to be verified to acquire the verification use case; and stopping the circulation operation in response to the fact that the data of the verification use case executed by the system to be verified meets the preset condition, and determining the state of the system to be verified according to the result obtained after the verification use case executed by the system to be verified. The accuracy of verification of the system can be improved, and the maintenance cost of verification cases can be reduced.

It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the disclosure, nor is it intended to be used to limit the scope of the disclosure. Other features of the present disclosure will become apparent from the following specification.

Drawings

The drawings are included to provide a better understanding of the present application and are not to be construed as limiting the application. Wherein:

FIG. 1 is an exemplary system architecture diagram in which embodiments of the present application may be applied;

FIG. 2 is a flow chart of one embodiment of a method for verifying a system according to the present application;

FIG. 3 is a flow chart of another embodiment of a method for verifying a system according to the present application;

FIG. 4 is a flow chart of yet another embodiment of a method for verifying a system in accordance with the present application;

FIG. 5 is a flow chart of one embodiment of a method for verifying a system according to the present application;

FIG. 6 is a flow chart of one application scenario of the method for verifying a system according to the present application;

FIG. 7 is a schematic diagram of an embodiment of an apparatus for a verification system in accordance with the present application;

FIG. 8 is a schematic diagram of an embodiment of an apparatus for a verification system in accordance with the present application;

fig. 9 is a block diagram of an electronic device for implementing a method for authenticating a system in accordance with an embodiment of the present application.

Detailed Description

Exemplary embodiments of the present application will now be described with reference to the accompanying drawings, in which various details of the embodiments of the present application are included to facilitate understanding, and are to be considered merely exemplary. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the application. Also, descriptions of well-known functions and constructions are omitted in the following description for clarity and conciseness.

Fig. 1 shows an exemplary system architecture 100 in which embodiments of a method for a verification system or an apparatus for a verification system of the application may be applied.

As shown in fig. 1, a system architecture 100 may include devices 101, 102, 103, a network 104, and a server 105. The network 104 is the medium used to provide communication links between the devices 101, 102, 103 and the server 105. The network 104 may include various connection types, such as wired, wireless communication links, or fiber optic cables, among others.

A user may interact with the server 105 using the devices 101, 102, 103 through the network 104 to receive or send messages, etc. Various emulation-like processes or processes for testing the system may be installed on the devices 101, 102, 103. Various client applications may also be installed on the devices 101, 102, 103, such as a video-type application, a play-type application, an audio-type application, a search-type application, a shopping-type application, a financial-type application, and the like.

The devices 101, 102, 103 may be chips, processors or hardware modules etc. to be verified/emulated. The devices 101, 102, 103 may also be various electronic devices having a display screen and supporting receipt of server messages, including but not limited to smartphones, tablets, electronic book readers, electronic players, laptop and desktop computers, and the like.

The devices 101, 102, 103 may be hardware or software. When the devices 101, 102, 103 are hardware, various hardware modules to be authenticated or electronic devices are possible, and when the devices 101, 102, 103 are software, the devices may be installed in the above-listed electronic devices. Which may be implemented as multiple software or software modules (e.g., multiple software modules for providing distributed services), or as a single software or software module. The present invention is not particularly limited herein.

When the server or the verification platform receives a first instruction for indicating to verify the system to be verified, the following loop operation may be performed: acquiring a verification case, storing the verification case into a target memory, and sending an address of the verification case stored into the target memory to a system to be verified, so that the system to be verified acquires the verification case based on the address; and stopping the circulation operation after determining that the data of the verification use case executed by the system to be verified meets the preset condition, and determining the state of the system to be verified according to the result obtained after the verification use case executed by the system to be verified.

It should be noted that, the method for verifying a system provided by the embodiments of the present disclosure is generally performed by the server 105, and accordingly, the device for verifying a system is generally disposed in the server 105.

It should be understood that the number of devices, networks, and servers in fig. 1 are merely illustrative. There may be any number of devices, networks, and servers as desired for an implementation.

With continued reference to fig. 2, a flow 200 of one embodiment of a method for validating a system according to the present disclosure is shown. A method for authenticating a system, comprising the steps of:

in step 201, in response to receiving a first instruction for instructing to verify a system to be verified, the loop operation of step 2011 and step 2012 is performed.

In this embodiment, after the execution subject of the method for verifying a system (for example, the server shown in fig. 1, or the verification platform mounted on the server) receives the first instruction for instructing to start verifying the system to be verified in a wired or wireless manner, the following loop operations such as step 2011 and step 2012 may be performed.

The first instruction may be an instruction that the user verifies a certain processor/hardware system/software system by using a request sent by the used terminal device to the verification platform; the first instruction may also be an instruction sent to the verification platform to request verification of itself by the processor/hardware system/software system to be verified based on its own system update requirement or system verification requirement.

In step 2011, a verification case is obtained.

In this embodiment, the verification platform may find verification cases from a pre-established verification case set, where the verification case set may include a plurality of directional verification cases (i.e., verification cases for verifying specified functions) and identifiers corresponding to each directional verification case, and the verification platform may randomly select one identifier to achieve the purpose of randomly selecting a verification case.

In step 2012, the verification use case is stored in the target memory, and the address of the verification use case stored in the target memory is sent to the system to be verified, where the address is used to enable the system to be verified to obtain the verification use case.

In this embodiment, after the verification platform acquires the verification use case, the verification use case may be stored in the target memory, and the address where the verification use case is stored in the target memory (i.e., the location where the verification use case is located in the target memory) may be sent to the system to be verified, so that the system to be verified acquires the verification use case in the target memory based on the address, and then executes the verification use case.

The target memory can be a storage space in the system to be verified, and the system to be verified can obtain the verification use case by reading the storage space of the system to be verified, so that the system to be verified can conveniently obtain information; the target memory can also be an external memory space in communication connection with the system to be verified, and the system to be verified obtains the verification use case by reading the external memory space, so that the resources of the system to be verified can be saved.

Step 202, in response to determining that the data of the verification use case executed by the system to be verified meets the preset condition, stopping the circulation operation, and determining the state of the system to be verified according to the result obtained after the verification use case executed by the system to be verified.

In this embodiment, if it is determined that the data of the verification cases executed by the system to be verified does not meet the preset condition, the loop operation described in step 2011 and step 2012 is continuously executed, so as to repeatedly perform the steps of obtaining the verification cases, storing the verification cases, and sending the storage addresses of the verification cases to the system to be verified, and the system to be verified executes the verification cases, until the data of the multiple verification cases executed by the system to be verified meets the preset condition, the loop operation is stopped, and the state of the system to be verified is determined according to the results obtained after the system to be verified executes the multiple verification cases.

The preset condition may be that the execution time of the verification case executed by the system to be verified meets the preset time; the number of the verification cases executed by the system to be verified may be equal to a preset number, the total data amount obtained by the system to be verified executing the verification cases may be equal to a preset data amount, the length of the verification cases executed by the system to be verified may be equal to a preset length, and so on.

After the system to be verified executes a plurality of verification cases, the execution results obtained by the system to be verified can be sent to the verification platform, so that the verification platform judges the state and performance of the verification system based on the execution results. For example, the verification platform may determine whether a certain function of the system to be verified is normal, whether a certain performance index reaches a target set in a system design stage, and the like, which are indexes for characterizing a system state/performance, based on data/parameters generated by the system to be verified after the verification use case is executed, or time of generating the data/parameters, and the like.

The method for verifying a system provided in this embodiment, in response to receiving a first instruction for instructing to verify a system to be verified, performs the following loop operation: acquiring a verification case; storing the verification use case into a target memory, and sending an address for storing the verification use case into the target memory to a system to be verified, wherein the address is used for enabling the system to be verified to acquire the verification use case; and stopping the circulation operation in response to the fact that the data of the verification use case executed by the system to be verified meets the preset condition, and determining the state of the system to be verified according to the result obtained after the verification use case executed by the system to be verified. Firstly, the method verifies the system to be verified through a plurality of verification cases randomly acquired by the verification platform in a plurality of rounds of circulation, so that the cross functions of the system to be verified can be verified, and the comprehensiveness and the accuracy of the verification system are improved.

Secondly, the cross function of the system to be verified is verified through a plurality of verification cases randomly acquired by the verification platform, a new verification case is designed instead of additionally based on the verification requirement of the cross function, multiplexing of the existing verification cases can be achieved, and design/maintenance cost of the verification cases is reduced. And based on the cross functions of the verification case group verification system formed by the verification cases randomly acquired by the verification platform in the multi-round circulation, the randomness of the verified cross functions can be improved, and the accuracy of the cross functions of the verification system can be improved.

And then, the storage address of the randomly selected verification use case is sent to the system to be verified by the verification platform, so that the system to be verified acquires and executes each verification use case based on the storage address, and the problems of storage resource and communication resource waste caused by sending a large number of verification use cases to the system to be verified or storing the verification use cases in the system to be verified can be avoided.

And finally, in each cycle operation, the storage address of the target memory, which is used for storing the randomly selected verification use cases by the verification platform, is adopted to transmit the randomly selected verification use cases to the system to be verified, so that each verification use case is acquired and executed by the system to be verified each time based on the storage address, infinite use of the target memory with limited storage space can be realized, and the verification use cases which can be executed by the system to be verified are infinitely expanded.

With further reference to fig. 3, a flow 300 of another embodiment of a method for validating a system is shown. The flow 300 of the method for verifying a system comprises the steps of:

step 301, in response to receiving a first instruction for instructing to verify a system to be verified, performs loop operations of step 3011, step 3012, and step 3013.

In this embodiment, after the execution subject of the method for verifying a system (for example, the server shown in fig. 1, or the verification platform mounted on the server) receives the first instruction for instructing the start of verification of the system to be verified in a wired or wireless manner, the following loop operations such as step 3011, step 3012, and step 3013 may be performed. In this embodiment, the first instruction is defined as the first instruction in step 201, and will not be described here again.

Step 3011, obtain the verification case.

The description of step 3011 in this embodiment is identical to that of step 2011, and will not be repeated here.

Step 3012, randomizing the data in the verification case, and generating at least one verification instruction.

In this embodiment, the verification platform may randomize data in the verification use case and generate at least one verification instruction. For example, the verification platform may randomize parameters of a certain functional instruction in the verification case, or randomize the execution sequence of each instruction. The verification instruction may be an instruction instructing the system to perform an operation or complete a task, for example, the hardware system performs a timer start operation, the communication system performs a transmission operation of a preset data packet, the software system performs an operation of designating a program/process, etc., so that the verification platform may evaluate, based on the result of the execution, whether the performance parameter of the system or the system can function normally after the system performs the operation indicated by the verification instruction.

Step 3013, storing at least one verification instruction in the target memory, and sending the at least one verification instruction to a starting position of the target memory to the system to be verified, where the starting position is used to enable the system to be verified to obtain the verification use case.

In this embodiment, the verification platform may store all or part of at least one verification instruction in the target memory, and send a start position of storing the at least one verification instruction in the target memory to the system to be verified, where the start position is used to indicate a storage unit position/storage unit identifier of the first storage unit occupied when the verification instruction is stored in the target memory, and after the system to be verified obtains the position of the first storage unit storing the at least one verification instruction in the target memory, each storage unit after the first storage unit may be read one by one from the position, so as to obtain multiple verification instructions that are stored continuously one by one.

It can be understood that the storage mode of the verification instructions can be pre-agreed with the verification platform and the system to be verified, so that the system to be verified can read the verification instructions based on agreement. For example, when the predetermined verification instructions are stored in the memory cells in the target memory in succession, the system to be verified, after obtaining the above-mentioned start position, starts from the memory cell characterized by the start position, and reads the memory cells after the start position in succession to obtain each verification instruction. When the predetermined verification instructions are stored in the storage unit in the target memory discontinuously (a preset number of storage units are arranged between each verification instruction), the system to be verified starts from the storage unit represented by the starting position after obtaining the starting position, and reads the storage units after the interval to obtain each verification instruction.

Step 302, in response to determining that the data of the at least one verification instruction executed by the system to be verified meets the preset condition, stopping the loop operation, and determining the state of the system to be verified according to the result obtained after the at least one verification instruction executed by the system to be verified.

In this embodiment, if it is determined that the data of the at least one verification instruction executed by the system to be verified does not meet the preset condition, the loop operation described in step 3011, step 3012 and step 3013 is continuously executed, so as to repeatedly perform the steps of obtaining the verification use case, generating the verification instruction, sending the storage address of the verification instruction to the system to be verified, and executing the verification instruction by the system to be verified, until the data of the multiple verification instructions executed by the system to be verified meet the preset condition, stopping the loop operation, and determining the state of the system to be verified according to the result obtained after the multiple verification instructions are executed by the system to be verified.

The preset condition may be that the execution time of the verification instruction executed by the system to be verified meets the preset time; the number of the verification instructions executed by the system to be verified may be equal to a preset number, the total data amount obtained by the system to be verified executing the verification instructions may be equal to a preset data amount, the length of the verification instructions executed by the system to be verified may be equal to a preset length, and so on.

After the system to be verified executes a plurality of verification instructions, the execution results obtained by the system to be verified can be sent to the verification platform, so that the verification platform judges the state and performance of the verification system based on the execution results.

Compared with the method described in fig. 2, the method for verifying a system according to the present embodiment adds a step of randomizing a verification case after the verification platform obtains the verification case and generating at least one verification instruction, and when an address of storing the verification case in a target memory is sent to a system to be verified, sends a start position of storing the at least one verification instruction in the target memory to the system to be verified, so that the system to be verified can store multiple verification instructions in the start position of the target memory according to the multiple verification instructions, and multiple verification instructions are obtained one by one. The randomness of each verification case can be improved, so that the comprehensiveness and accuracy of the verification system to be verified are further improved. In addition, at least one verification instruction is stored in the initial position (instead of all addresses) of the target memory and is sent to the system to be verified, so that communication and information reading and writing resources can be saved, and communication efficiency is improved.

Optionally, storing at least one validation instruction in the target memory includes: acquiring the storage amount of a target memory, and acquiring the data amount of all verification instructions in at least one verification instruction; and determining a starting position for storing at least one verification instruction into the target memory according to the memory capacity of the target memory and the data quantity of all verification instructions, and storing at least one verification instruction one by one based on the starting position.

In this embodiment, the verification platform may obtain the storage amount of the target memory and the data amount of all the verification instructions in the at least one verification instruction, determine, according to the data amount of the target memory and the data amount of all the verification instructions, to store the at least one verification instruction to a starting position of the target memory, and store the at least one verification instruction one by one based on the starting position, that is, determine from which storage unit of the target memory the at least one verification instruction starts writing, so as to ensure that the last written verification instruction does not overflow the target memory.

For example, the data size of the at least one verification instruction (i.e. the storage space of the instruction memory needs to be occupied) is length, the storage space that can be provided by the target memory is size, and the determined starting position address addr of the at least one instruction stored in the target memory needs to satisfy the condition: addr+length is less than or equal to size to ensure that data does not overflow the target memory after all verification instructions are written to the target memory.

In the embodiment, before writing at least one verification instruction into the target memory, the storage space size of the target memory and the data quantity of all the verification instructions to be written into the target memory are obtained, and the initial position for storing at least one verification instruction is determined according to the storage space size and the data quantity, so that the integrity of the written data can be ensured.

Optionally, the method for verifying a system described in the embodiment of fig. 3 further includes: acquiring a second instruction for indicating to randomize the verification case, randomizing the data in the verification case, including: and according to the second instruction, randomizing the data in the verification case.

In this embodiment, the verification platform may obtain a second instruction indicating that randomization processing is performed on the verification use case, where the second instruction may be an instruction sent by the system to be verified to the verification platform, or may be an instruction sent by the user to the verification platform. When the data in the verification case is subjected to the randomization processing, the verification platform can perform the randomization processing on the data in the verification case based on the instruction of the second instruction. For example, if the second instruction indicates that the randomization is performed for a function, the verification platform performs randomization only on the instruction for testing the function in the verification case. For another example, if the second instruction indicates the degree of randomization, the verification platform performs the randomization of the corresponding level on the data in the verification case according to the degree of randomization.

In this embodiment, the verification platform performs randomization processing on the verification use case according to the requirements of the user or the system to be verified, so that the pertinence of verifying the system to be verified can be improved.

With further reference to fig. 4, a flow 400 of yet another embodiment of a method for validating a system is shown. The flow 400 of the method for verifying a system comprises the steps of:

step 401, in response to receiving a first instruction for instructing to verify a system to be verified, performing a loop operation of step 4011 and step 4012.

In this embodiment, after the execution subject of the method for verifying a system (for example, the server shown in fig. 1, or the verification platform mounted on the server) receives the first instruction for instructing to start verifying the system to be verified in a wired or wireless manner, the following loop operations such as step 4011 and step 4012 may be performed. In this embodiment, the first instruction is defined as the first instruction in step 201, and will not be described here again.

Step 4011, obtain a verification case.

The description of step 4011 in this embodiment is identical to that of step 2011, and will not be repeated here.

Step 4012, storing the verification case in the target memory, storing the verification case in an address of the target memory, and sending the address to the system to be verified through the preset transmission device, where the address is used to enable the system to be verified to obtain the verification case.

In this embodiment, after the verification platform obtains the verification use case, the verification use case may be stored in the target memory, and the address of the verification use case stored in the target memory is sent to the system to be verified through the preset transmission device, so that the system to be verified obtains the verification use case in the target memory based on the address, and executes the verification use case.

The verification platform can also store the verification instruction after randomizing the verification use case to the initial position of the target memory, and send the verification instruction to the system to be verified through the preset transmission equipment, so that the system to be verified acquires the verification instruction in the target memory based on the initial position.

The preset transmission device may be a transmission device (e.g., a virtual input output device) built into the authentication platform, the preset transmission device being used for communication between the authentication platform and the system to be authenticated.

And step 402, stopping the circulation operation in response to determining that the data of the verification use case executed by the system to be verified meets the preset condition, and determining the state of the system to be verified according to the result obtained after the verification use case executed by the system to be verified.

Compared with the method described in fig. 2, the method for verifying a system provided in this embodiment, in which the verification platform and the system to be verified perform communication interaction through a communication mechanism built in advance, can improve stability and efficiency of transmission.

Optionally, the method for verifying the system comprises: a preset data transmission address is allocated for preset transmission equipment; in response to receiving the reception information or transmitting the transmission information based on the preset data transmission address, not storing the reception information or the transmission information; or, in response to receiving the received information based on the preset data transmission address, determining that the received information is information which is sent by the system to be verified and is used for requesting verification of the system to be verified.

In this embodiment, a preset data transmission address may be allocated to a preset transmission device, and if the verification platform receives information or sends information based on the preset transmission address, the verification platform does not cache/record the received information or the sent information after processing the received information or the sent information is completed, so as to save resources.

Or if the verification platform receives the received information based on the preset data transmission address, the verification platform can determine that the received information is the information which is sent by the system to be verified and is used for requesting verification of the verification system, so that the verification platform can conveniently and rapidly call the relevant process or the resources such as the components and the like to process the information, and the information processing efficiency is improved.

In this embodiment, a preset transmission address is allocated to a preset transmission device for interaction between the verification platform and the system to be verified, so that when the verification platform receives or transmits the preset transmission address, the verification platform knows that the information is interacted with the system to be verified, so that the verification use case and/or the received information which is transmitted by the system to be verified and is requested to be verified is transmitted to the system to be verified, and the system log or the system calculation data which are not required to be archived for a long time are not required, so that the received or transmitted information is not stored, and the storage resource of the verification platform can be saved.

Optionally, the method for verifying the system comprises: triggering a preset interrupt in the preset transmission device.

In this embodiment, before, after, or while the address for storing the verification use case in the target memory is sent to the system to be verified through the preset transmission device, a preset interrupt in the preset transmission device is triggered, and the state of the interrupt is identified according to the communication state between the verification platform and the system to be verified.

Specifically, a designated interrupt source may be reserved for the preset transmission device, when the verification platform needs to send the verification use case to the system to be verified, the interrupt source is triggered, and according to the communication state between the verification platform and the system to be verified, the interrupt source is identified for the interrupt source, where the state of the interrupt source may be a state such as success/failure of randomizing data of the verification platform, success/failure of writing data of the verification platform, completion/incompletion of sending information of the verification platform, and the like.

According to the embodiment, the appointed interrupt source is reserved for the preset transmission equipment, so that the interrupt source is triggered when the verification platform and the system to be verified interact with each other, the interrupt source is identified according to the information interaction state between the verification platform and the system to be verified, the corresponding operation of the verification platform or the system to be verified can be paused or restarted at any time based on the interrupt source, and the flexibility of the system is improved.

With further reference to FIG. 5, a flow of one embodiment of a method for validating a system is illustrated, 500. The flow 500 of the method for verifying a system is applied to a system to be verified, and comprises the following steps:

in step 501, in response to receiving an address of a verification case in a target memory, the verification case is obtained based on the address.

In this embodiment, when an execution subject of the method for an authentication system (for example, the devices 101, 102, 103 shown in fig. 1, or a system to be authenticated) receives an address of an authentication use case in a target memory by a wired or wireless manner, it may jump to the address to acquire the authentication use case. The system to be verified may be embodied as a functional module to be verified in a hardware or software system, or as a verification process/test process for verifying the system.

Step 502, executing the verification case, and determining the state of the system to be verified according to the result obtained after executing the verification case.

In this embodiment, the system to be verified may execute the verification case acquired from the target memory, and determine the state of the system to be verified according to the result obtained after the verification case is executed. The system to be verified can also send the result obtained after the verification use case is executed to the verification platform so as to determine the state of the system to be verified through the verification platform. The result may be data/parameters generated by the system to be verified after the verification use case is executed, or time of generating the data/parameters, etc.

After the system to be verified executes the verification case acquired this time, the information requesting the next verification case can be sent to the verification platform, so that the verification platform continues to send the storage address of the next verification case, and the system to be verified can continuously acquire and execute the verification case.

According to the method for verifying the system, after the system to be verified receives the address of the verification use case in the target memory, the verification use case is acquired based on the address, the verification use case is executed, and the state of the system to be verified is determined according to the result obtained after the verification use case is executed, so that the waste of communication resources caused by the fact that the verification platform sends the verification use case to the system to be verified is avoided. In addition, the system to be verified can acquire different verification cases based on the addresses sent by the verification platform for many times, and can test the cross functions of the system to be verified by applying the massive verification cases while the massive verification cases are not required to be stored, so that the accuracy of the verification result can be improved while the maintenance cost of the verification cases is reduced.

Optionally, in response to receiving an address of the verification case in the target memory, obtaining the verification case based on the address includes: and responding to receiving the initial position of at least one verification instruction in the target memory, and reading the verification instructions in the at least one verification instruction one by one based on the initial position, wherein the at least one verification instruction is obtained by carrying out randomization processing on data in a verification use case.

In this embodiment, the verification platform may randomize the verification use case and generate at least one verification instruction, and then send the at least one verification instruction to the system to be verified after storing the at least one verification instruction in the starting location of the target memory. After receiving the initial position, the system to be verified can read verification instructions one by one based on the initial position, and load the verification instructions into the local or verification process of the system to be verified so as to execute the verification instructions. After the system to be verified receives the initial position, each verification instruction can be read one by one based on the initial position, and corresponding operation is executed according to the instruction of the verification instruction, and the verification instruction is not loaded into the local of the system to be verified and/or the verification process, so that the local resources of the system to be verified can be saved, and the verification efficiency can be improved.

In some application scenarios, first, a communication mechanism between an authentication platform and a system to be authenticated of a processor to be authenticated is established: a virtual input output device (virtual IO device) is created on the verification platform for communication only between the verification platform and the system to be verified. Reserved data transmission and data reception addresses are allocated to the virtual IO device (e.g., 0xABCD may be used as the data transmission and data reception address of the virtual IO device).

In the verification process, any read-write operation based on the reserved address (such as 0 xABCD) is not recorded by the memory model in the verification process, and any other input/output device state is not triggered or influenced, so that storage or operation resources are saved.

All the information sent to the reserved address is indicated in advance and is the information sent to the verification platform by the system to be verified (such as the information of the verification request starting to verify/the verification request case).

And the preset identifier (such as 0xA5A5A5A 5) is used for representing the start of the information to be verified sent to the verification platform by the system to be verified in the information sent to the reserved address in advance, namely, the information after the preset identifier is the effective request information sent to the verification platform by the system to be verified.

In the above process, the request information sent by the system to be verified to the verification platform may include at least one of the following: information type, information length, operation object, operation parameter. The information type is used for indicating that the information is information for requesting the verification platform to perform any operation on the verification case, such as requesting to perform randomization processing on data in the verification case, requesting to reload the content of the instruction memory, triggering a certain interrupt request of a certain input/output device, and the like; the information length is used for representing the length of data information transmitted to the verification platform by the system to be verified at this time; the operation object is used for representing an object verified by a verification case requested by the system to be verified at the present time, such as an object related to instruction execution, such as a register, input and output equipment, a storage space and the like; the operating parameters are used to characterize the relevant parameters of the object verified by the verification instance requested by the system to be verified at this time, such as register index values, register contents, immediate, memory addresses, memory data contents, etc.

A specific interrupt source is reserved for the virtual IO equipment in advance, and the interrupt source is triggered to send interrupt every time the verification platform needs to send information to a system to be verified. And, different states are identified for the interrupt register according to the type of information sent by the verification platform to the system to be verified, wherein the states of the interrupt register can be represented as follows: the verification platform randomizes the success/failure of data, the verification platform records the success/failure of data, and the like.

When the interrupt state of the virtual device indicates that the current verification platform requests to send data to the system to be verified, the system to be verified can acquire the information of the verification platform by reading the reserved address of the virtual IO device. The information passed by the verification platform may include the following: information type, information length, operation object, operation parameter. The information type is used for representing the information type such as an instruction starting address; the information length is used for representing the information length transmitted to the system to be verified by the verification platform at this time; the operation object is used for representing instruction operation objects related to the transferred information, such as registers, storage spaces and the like; the operating parameters are used to characterize register index values, register contents, immediate, memory space start addresses, etc.

After the communication mechanism between the verification platform and the verification process is established, as shown in fig. 6, the verification process may obtain the verification use case from the verification platform and execute the verification use case through the following steps, so as to implement a process of verifying the function of the system to be verified:

step 601, the verification platform randomly selects a verification case from the verification case set: after simulation/verification of a System to be verified (such as a System-on-a-Chip, SOC, system on a Chip) is started, the verification platform randomly selects one verification case from a pre-built verification case set. The verification case set includes each of the oriented verification cases (that is, verification cases for verifying the specific function of the SOC) and a unique identifier corresponding to the verification case.

The verification platform carries out randomization processing on the acquired data in the verification case and generates a plurality of verification instructions (for example, the verification platform can randomize parameters of the function instructions in the verification case or randomize execution sequences of the instructions);

step 602, the verification platform writes the verification use case into the target memory: after the verification platform selects the verification case, the verification case is stored in the target memory in a back door writing mode.

Specifically, the verification platform may obtain the storage amount of the target memory, obtain the data amount of the plurality of verification instructions, and determine, according to the storage amount of the target memory and the data amount of the plurality of verification instructions, to store the plurality of verification instructions to the starting position of the target memory, so as to ensure that the storage unit of the target memory stored by the last verification instruction does not overflow the target memory. Then, the verification platform stores each verification instruction one by one based on the starting position.

Step 603, loading the verification case by the system to be verified: and the verification platform sends the address of the verification use case in the target memory to the system to be verified through the virtual IO equipment, and the system to be verified takes out the verification use case from the address after reading the address. ( Wherein the target memory may be: the internal storage space and the external storage space of the system to be verified; the address of the target memory is: the authentication process needs to jump to the entry address. )

Step 604, the system to be verified executes the verification case, so as to verify the functions of the system to be verified through the data obtained after the system to be verified executes the verification case.

Step 605, after the verification system executes the current verification case, judging whether the simulation is finished: if the result of the verification case executed by the system to be verified meets the preset condition, the simulation is ended, and whether the system to be verified passes the verification or not is determined according to the data obtained after the random verification case executed by the system to be verified, or each performance index of the system to be verified is determined.

If the result of executing the verification case by the system to be verified does not meet the preset condition, sending a request for requesting to send the next verification case to the virtual IO equipment in the verification platform. The verification platform continues to request the verification platform to send the next verification use case.

The result of the verification case meeting the preset condition may be that the length or the number of the verification cases meet the user requirement, or that the duration of executing all the verification cases meets the user requirement.

With further reference to fig. 7, as an implementation of the method shown in the above figures, the present disclosure provides an embodiment of an apparatus for a verification system, which corresponds to the method embodiments shown in fig. 2, 3 and 4, and which is particularly applicable in various electronic devices.

As shown in fig. 7, an apparatus 700 for a verification system of the present embodiment includes: a receiving unit 701, a first acquiring unit 702, a transmitting unit 703, and a judging unit 704. Wherein the receiving unit is configured to perform the following loop operation in response to receiving a first instruction for instructing to verify the system to be verified: a first acquisition unit configured to acquire a verification use case; the sending unit is configured to store the verification use cases into the target memory, and send the addresses for storing the verification use cases into the target memory to the system to be verified, wherein the addresses are used for enabling the system to be verified to acquire the verification use cases; and the judging unit is configured to stop the circulation operation in response to the fact that the data of the verification case executed by the system to be verified meets the preset condition, and determine the state of the system to be verified according to the result obtained after the verification case executed by the system to be verified.

In some embodiments, a transmitting unit includes: the generation module is configured to randomize the data in the verification case and generate at least one verification instruction; a storage module configured to store at least one validation instruction into a target memory; and the sending module is configured to send the starting position of the at least one verification instruction stored in the target memory to the system to be verified.

In some embodiments, a memory module includes: the data volume acquisition module is configured to acquire the storage volume of the target memory and acquire the data volume of all verification instructions in at least one verification instruction; the storage address allocation module is configured to determine a starting position for storing at least one verification instruction to the target memory according to the storage amount of the target memory and the data amount of all the verification instructions, and store the at least one verification instruction one by one based on the starting position.

In some embodiments, the means for verifying the system further comprises: a third acquisition unit configured to acquire a second instruction for instructing to randomize the verification use case; a generation module, comprising: and the randomization processing module is configured to randomize the data in the verification case according to the second instruction.

In some embodiments, a transmitting unit includes: the communication module is configured to store the verification use case to the address of the target memory and send the verification use case to the system to be verified through the preset transmission equipment.

In some embodiments, an apparatus for validating a system includes: the address allocation module is configured to allocate a preset data transmission address for the preset transmission equipment; a first determination module configured to not store the reception information or the transmission information in response to receiving the reception information or transmitting the transmission information based on a preset data transmission address; or the second determining module is configured to determine that the received information is information which is sent by the system to be verified and is used for requesting to verify the system to be verified, in response to receiving the received information based on the preset data transmission address.

In some embodiments, the means for verifying the system further comprises: and the interrupt unit is configured to trigger a preset interrupt in the preset transmission equipment.

The elements of the apparatus 700 described above correspond to the steps in the methods described with reference to fig. 2, 3 and 4. The operations, features and technical effects achieved thereby described above with respect to the method for verifying a system are equally applicable to the apparatus 700 and the units contained therein, and are not described in detail herein.

With further reference to fig. 8, as an implementation of the method shown in the above figures, the present disclosure provides an embodiment of an apparatus for a verification system, which corresponds to the method embodiment shown in fig. 5, and which is particularly applicable in various electronic devices.

As shown in fig. 8, an apparatus 800 for verifying a system of the present embodiment is applied to a system to be verified, and includes: a second acquisition unit 801, an execution unit 802. Wherein the second acquisition unit is configured to acquire the verification case based on the address in response to receiving the address of the verification case in the target memory; and the execution unit is configured to execute the verification case and determine the state of the system to be verified according to the result obtained after the verification case is executed.

In some embodiments, the second acquisition unit comprises: and the acquisition module is configured to respond to receiving the initial position of the at least one verification instruction in the target memory, and read the verification instructions in the at least one verification instruction one by one based on the initial position, wherein the at least one verification instruction is obtained by randomizing the data in the verification case.

The elements of the apparatus 800 described above correspond to the steps of the method described with reference to fig. 5. The operations, features and technical effects achieved thereby described above with respect to the method for verifying a system are equally applicable to the apparatus 800 and the units contained therein, and are not described in detail herein.

According to embodiments of the present application, the present application also provides an electronic device, a readable storage medium and a computer program product.

FIG. 9 shows a schematic block diagram of an example electronic device 900 that may be used to implement an embodiment of the application. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device may also represent various forms of mobile devices, such as personal digital processing, cellular telephones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the applications described and/or claimed herein.

As shown in fig. 9, the apparatus 900 includes a computing unit 901 that can perform various appropriate actions and processes according to a computer program stored in a Read Only Memory (ROM) 902 or a computer program loaded from a storage unit 908 into a Random Access Memory (RAM) 903. In the RAM903, various programs and data required for the operation of the device 900 can also be stored. The computing unit 901, the ROM 902, and the RAM903 are connected to each other by a bus 904. An input/output (I/O) interface 905 is also connected to the bus 904.

Various components in device 900 are connected to I/O interface 905, including: an input unit 906 such as a keyboard, a mouse, or the like; an output unit 907 such as various types of displays, speakers, and the like; a storage unit 908 such as a magnetic disk, an optical disk, or the like; and a communication unit 905 such as a network card, modem, wireless communication transceiver, etc. The communication unit 905 allows the device 900 to exchange information/data with other devices through a computer network such as the internet and/or various telecommunication networks.

The computing unit 901 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of computing unit 901 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various computing units running machine learning model algorithms, a Digital Signal Processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 901 performs the respective methods and processes described above, for example, a method for authenticating a system. For example, in some embodiments, the method for validating a system may be implemented as a computer software program tangibly embodied on a machine-readable medium, such as storage unit 908. In some embodiments, part or all of the computer program may be loaded and/or installed onto the device 900 via the ROM 902 and/or the communication unit 905. When the computer program is loaded into RAM903 and executed by the computing unit 901, one or more steps of the method for authenticating a system described above may be performed. Alternatively, in other embodiments, the computing unit 901 may be configured to perform the method for verifying the system by any other suitable means (e.g., by means of firmware).

Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.

Program code for carrying out methods of the present application may be written in any combination of one or more programming languages. These program code may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus such that the program code, when executed by the processor or controller, causes the functions/operations specified in the flowchart and/or block diagram to be implemented. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.

In the context of the present application, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. The machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and pointing device (e.g., a mouse or trackball) by which a user can provide input to the computer. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.

The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), and the internet.

The computer system may include a client and a server. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other.

It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present application may be executed in parallel, sequentially, or in a different order, so long as the desired data of the technical solution disclosed in the present application can be achieved, and the present application is not limited herein.

The above embodiments do not limit the scope of the present application. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application should be included in the scope of the present application.

Claims

1. A method for authenticating a system, comprising:

in response to receiving a first instruction to instruct verification of a system to be verified, performing the following looping operation:

acquiring a verification case;

storing the verification use case into a target memory, and sending an address for storing the verification use case into the target memory to a system to be verified, wherein the address is used for enabling the system to be verified to acquire the verification use case;

stopping the circulation operation in response to determining that the data of the verification case executed by the system to be verified meets a preset condition, and determining the state of the system to be verified according to the result obtained after the verification case is executed by the system to be verified;

the address for storing the verification use case in the target memory is sent to a system to be verified, which comprises the following steps:

Storing the verification use case to the address of the target memory, and sending the verification use case to the system to be verified through preset transmission equipment;

the method further comprises the steps of:

a preset data transmission address is allocated for the preset transmission equipment;

in response to receiving the received information or transmitting the transmitted information based on the preset data transmission address, not storing the received information or the transmitted information; or,

and responding to the received information based on the preset data transmission address, and determining the received information as information which is sent by the system to be verified and is used for requesting verification of the system to be verified.

2. The method of claim 1, wherein the storing the verification use-case in a target memory comprises:

randomizing the data in the verification case and generating at least one verification instruction;

storing the at least one validation instruction into the target memory;

the address for storing the verification use case in the target memory is sent to a system to be verified, and the method comprises the following steps:

and storing the at least one verification instruction to the initial position of the target memory and sending the initial position to the system to be verified.

3. The method of claim 2, wherein the storing the at least one validation instruction into the target memory comprises:

acquiring the storage amount of the target memory, and acquiring the data amount of all verification instructions in the at least one verification instruction;

and determining a starting position for storing the at least one verification instruction to the target memory according to the storage amount of the target memory and the data amount of all verification instructions, and storing the at least one verification instruction one by one based on the starting position.

4. The method of claim 2, wherein the method further comprises:

a second instruction for instructing to randomize the verification use case is acquired,

the randomizing the data in the verification case includes:

and carrying out randomization processing on the data in the verification case according to the second instruction.

5. The method of claim 1, wherein the method further comprises:

triggering a preset interrupt in the preset transmission equipment.

6. The method of any of claims 1-5, further comprising:

the system to be verified responds to the received address of the verification case in the target memory, and the verification case is obtained based on the address;

And the system to be verified executes the verification case, and determines the state of the system to be verified according to the result obtained after the verification case is executed.

7. The method of claim 6, wherein the system to be authenticated obtaining the authentication use case based on the address in response to receiving the address of the authentication use case in the target memory comprises:

and the system to be verified responds to receiving the initial position of at least one verification instruction in the target memory, and reads the verification instructions in the at least one verification instruction one by one based on the initial position, wherein the at least one verification instruction is obtained by carrying out randomization processing on the data in the verification use case.

8. An apparatus for validating a system, comprising:

a receiving unit configured to, in response to receiving a first instruction for instructing verification of a system to be verified, perform the following loop operation:

a first acquisition unit configured to acquire a verification use case;

a transmitting unit configured to store the verification use case in a target memory, and transmit an address of the verification use case stored in the target memory to a system to be verified, the address being used for the system to be verified to acquire the verification use case;

The judging unit is configured to respond to the fact that the data of the verification case executed by the system to be verified meets the preset condition, stop the circulation operation and determine the state of the system to be verified according to the result obtained after the verification case is executed by the system to be verified;

wherein the transmitting unit is configured to:

the apparatus further comprises means for performing the steps of:

9. The apparatus of claim 8, further comprising:

a second acquisition unit configured to acquire an authentication use case based on an address of the authentication use case in a target memory in response to receiving the address of the authentication use case by the system to be authenticated;

The execution unit is configured to execute the verification case by the system to be verified, and determine the state of the system to be verified according to a result obtained after the verification case is executed.

10. An electronic device, comprising:

at least one processor; and

a memory communicatively coupled to the at least one processor; wherein,

the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-7.

11. A non-transitory computer readable storage medium storing computer instructions for causing the computer to perform the method of any one of claims 1-7.