CN113178493A - Thin film transistor, preparation method and display panel - Google Patents
Thin film transistor, preparation method and display panel Download PDFInfo
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- CN113178493A CN113178493A CN202110448608.0A CN202110448608A CN113178493A CN 113178493 A CN113178493 A CN 113178493A CN 202110448608 A CN202110448608 A CN 202110448608A CN 113178493 A CN113178493 A CN 113178493A
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- 239000010409 thin film Substances 0.000 title claims abstract description 83
- 238000002360 preparation method Methods 0.000 title abstract description 9
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- 239000000463 material Substances 0.000 claims abstract description 108
- 238000005530 etching Methods 0.000 claims abstract description 57
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- 229910052751 metal Inorganic materials 0.000 claims abstract description 53
- 238000000034 method Methods 0.000 claims abstract description 42
- 238000004519 manufacturing process Methods 0.000 claims abstract description 15
- 238000004380 ashing Methods 0.000 claims abstract description 7
- 238000001312 dry etching Methods 0.000 claims description 16
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 11
- 238000001039 wet etching Methods 0.000 claims description 11
- 229920005591 polysilicon Polymers 0.000 claims description 10
- 230000000694 effects Effects 0.000 abstract description 12
- 239000007789 gas Substances 0.000 description 14
- 239000000460 chlorine Substances 0.000 description 13
- 230000008569 process Effects 0.000 description 11
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 9
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 9
- 229910052801 chlorine Inorganic materials 0.000 description 9
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- 239000010949 copper Substances 0.000 description 9
- 230000003071 parasitic effect Effects 0.000 description 7
- 238000010586 diagram Methods 0.000 description 4
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- 239000012495 reaction gas Substances 0.000 description 3
- ABTOQLMXBSRXSM-UHFFFAOYSA-N silicon tetrafluoride Chemical compound F[Si](F)(F)F ABTOQLMXBSRXSM-UHFFFAOYSA-N 0.000 description 3
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- 239000004973 liquid crystal related substance Substances 0.000 description 2
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- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 229910021592 Copper(II) chloride Inorganic materials 0.000 description 1
- 229910003910 SiCl4 Inorganic materials 0.000 description 1
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- H01L27/1214—
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- H01L29/66742—
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Abstract
The invention provides a thin film transistor, a preparation method and a display panel, wherein the method for preparing the thin film transistor comprises the following steps: providing a substrate, forming an active layer material on one side of the substrate, covering a pixel area and a control area with the active layer material, forming a first metal layer on one side of the active layer material far away from the substrate, forming a first photoresist layer on one side of the first metal layer far away from the active layer material, etching the first metal layer with the orthographic projection on the substrate positioned in the pixel area to form a source drain layer in the control area, pre-ashing the first photoresist layer to form a second photoresist layer, and etching the active layer material with the orthographic projection on the substrate positioned in the pixel area to remove the active layer material in the pixel area. Therefore, the thin film transistor which has good display effect, lower manufacturing cost and longer service life can be prepared by the simple method.
Description
Technical Field
The invention relates to the field of display, in particular to a thin film transistor, a preparation method and a display panel.
Background
In the existing mainstream display device, a Thin Film Transistor (TFT) is used to drive a pixel unit on a display screen, and the TFT type display device has the advantages of high responsivity, high brightness, high contrast ratio, and the like.
At present, chlorine is generally adopted as main reaction gas for a mainstream process for etching an active layer material positioned in a pixel area on a display panel, but in the preparation process of the display panel, the chlorine is easy to leak in a vacuum pipeline, the personal safety of personnel is affected, the safety production of a factory is not facilitated, and the problems of low light transmittance of the pixel area, poor display effect and the like easily occur to the prepared display panel.
Therefore, the current thin film transistor, the manufacturing method and the display panel still need to be improved.
Disclosure of Invention
The present application is made based on the findings of the inventors on the following problems:
the inventor finds that the main reaction gas adopted by the current process for etching the active layer material of the pixel region is chlorine, has high corrosivity, seriously corrodes process equipment, and simultaneously increases the failure rate of the display panel and has higher overall preparation cost. Generally, wet etching is performed on a first metal layer in a pixel area, then etching is performed on an active layer material in the pixel area, and finally ashing treatment is performed on photoresist in a control area.
The present application is directed to solving, to some extent, one of the technical problems in the related art.
In one aspect of the present application, the present invention provides a method of manufacturing a thin film transistor, including: providing a substrate, wherein the substrate comprises a pixel area and a control area, forming an active layer material on one side of the substrate, the active layer material covers the pixel area and the control area, forming a first metal layer on one side of the active layer material, which is far away from the substrate, wherein the orthographic projection of the first metal layer on the substrate is positioned in the pixel area and the control area, forming a first photoresist layer on one side of the first metal layer, which is far away from the active layer material, the first photoresist layer is positioned in the control area, etching the first metal layer, of which the orthographic projection on the substrate is positioned in the pixel area, so as to form a source drain layer in the control area, and the orthographic projection of the source drain layer on the substrate is positioned in the orthographic projection of the first photoresist layer on the substrate, pre-ashing the first photoresist layer so as to form a second photoresist layer, and the orthographic projection of the second photoresist layer on the substrate is positioned in the orthographic projection of the source drain layer on the substrate, and the active layer material of which the orthographic projection on the substrate is positioned in the pixel area is etched to remove the active layer material in the pixel area. Therefore, the thin film transistor which has good display effect, lower manufacturing cost and longer service life can be prepared by the simple method.
According to the embodiment of the invention, the method for etching the first metal layer with the orthographic projection on the substrate positioned in the pixel area is wet etching; the method for etching the active layer material with the orthographic projection on the substrate positioned in the pixel region is dry etching. Therefore, the etching effect on the active layer material and the first metal layer can be effectively improved.
According to the embodiment of the invention, the active layer material is formed to include low temperature polysilicon, and the thickness of the active layer material is 1150-1400 angstrom. Therefore, the preparation time can be further shortened, and the manufacturing cost can be further reduced.
According to an embodiment of the invention, the etching gas of the dry etching comprises NF3And He. Therefore, the corrosion of the metal of the chlorine source drain layer can be avoided, and the service life of the device is further prolonged.
According to an embodiment of the present invention, further comprising: etching the source drain electrode layer to form a source electrode and a drain electrode; and etching the active layer material in the control area to form the active layer of the thin film transistor. Therefore, the thin film transistor with a complete structure and better performance can be obtained.
In yet another aspect of the present application, the present invention provides a thin film transistor prepared by the method as described above. Therefore, the thin film transistor has all the features and advantages of the method for preparing the thin film transistor, which are not described herein again, and in summary, the thin film transistor has better performance and longer service life of devices, and the display panel having the thin film transistor has better display effect.
According to an embodiment of the present invention, the active layer has a thickness of 1300 angstroms and includes a first sublayer, a second sublayer, and a doped sublayer. Thus, the performance of the active layer may be improved by the provision of a plurality of sublayers.
According to an embodiment of the invention, the second sublayer is located on one side of the first sublayer, the doped sublayer is located on the side of the second sublayer remote from the first sublayer, the thickness of the first sublayer is 300 angstroms, the thickness of the second sublayer is 850 angstroms, and the thickness of the doped sublayer is 150 angstroms. Thereby, the performance of the active layer may be further improved by the provision of a plurality of sublayers.
In another aspect of the present application, the present invention provides a thin film transistor on a substrate, the substrate including a pixel region and a control region, the thin film transistor being in the control region, the thin film transistor including: an active layer formed of low temperature polysilicon; and the orthographic projection of the source and the drain on the substrate is positioned in the orthographic projection range of the active layer on the substrate, and the distance between the edge of the orthographic projection of the source and the drain on the substrate and the edge of the orthographic projection of the active layer on the substrate is not more than 1.2 microns. Therefore, the thin film transistor has lower parasitic capacitance, and the display panel with the thin film transistor has better display effect and is not easy to generate the problems of signal crosstalk and the like.
In another aspect of the present application, the present invention provides a display panel, wherein the display panel includes a thin film transistor, and the thin film transistor is prepared by the method or the thin film transistor. Therefore, the display panel has all the features and advantages of the thin film transistor described above, and thus, the description thereof is omitted.
Drawings
The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
fig. 1 shows a schematic flow diagram of a method of fabricating a thin film transistor according to an embodiment of the invention;
fig. 2 shows a schematic structural view of a method of manufacturing a thin film transistor according to an embodiment of the present invention;
FIG. 3 shows a partial schematic flow diagram of a method of fabricating a thin film transistor according to an embodiment of the invention;
fig. 4 shows a schematic structural diagram of a thin film transistor according to an embodiment of the present invention;
fig. 5 is a schematic view showing a partial structure of a thin film transistor according to still another embodiment of the present invention;
FIG. 6 is a scanning electron microscope image showing a partial structure of a thin film transistor according to an embodiment of the present invention;
fig. 7 is a schematic view showing a partial structure of a thin film transistor according to an embodiment of the present invention;
fig. 8 is a diagram showing a display effect of a display panel according to an embodiment of the related art.
Description of reference numerals:
10: a pixel region; 20: a control area; 100: a substrate; 200: an active layer material; 210: a control region active layer material; 211: an active layer; 300: a first metal layer; 310: a source drain layer; 311: a source and a drain; 400: a first photoresist layer; 410: a second photoresist layer; 2111: a first sublayer; 2112: a second sublayer; 2113: and doping the sub-layer.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
The present application is directed to solving, to some extent, one of the technical problems in the related art.
In one aspect of the present application, referring to fig. 1 and 2, the present invention provides a method of manufacturing a thin film transistor, including:
s100: providing a substrate
According to some embodiments of the present invention, referring to (a) of fig. 2, a substrate 100 is provided at this step, and the structure of the substrate is not particularly limited, for example, the pixel region 10 and the control region 20 may be included on the substrate. Specifically, the substrate may be divided into a display region and a non-display region (not shown in the figure), the non-display region includes a peripheral region located at least one side of the display region, the peripheral region has a gate driving circuit, wherein the gate driving circuit includes a thin film transistor; the display area comprises a pixel area and a pixel circuit area, wherein the pixel circuit area is provided with a thin film transistor, and when the substrate comprises the pixel area and a control area, the area provided with the thin film transistor on the substrate is the control area of the substrate.
S200: forming an active layer material on one side of a substrate
According to some embodiments of the present invention, referring to (b) of fig. 2, the active layer material 200 is formed at one side of the substrate 100 at this step, and the position of the active layer material on the substrate is not particularly limited, for example, the active layer material may cover the pixel region and the control region on the substrate. When the active layer material covers the pixel region and the control region on the substrate, that is, the active layer material is formed on the substrate in a whole layer, the whole active layer material can be obtained through a simple deposition process.
According to some embodiments of the present invention, the kind of the active layer material is not particularly limited, and for example, the active layer material may include low temperature polysilicon. According to some embodiments of the present invention, the thickness of the active layer material is not particularly limited, and in particular, the thickness of the active layer material may range from 1150-1400 angstrom. When the thickness of the active layer material is less than 1150 angstrom meters, the thickness of the active layer is too thin, a relatively flat surface of the active layer material is not easy to form, and the electrical property of the active layer material is unstable; when the thickness of the active layer material is larger than 1400 angstrom, the thickness of the active layer is too thick, the time consumption and the energy consumption are long when the subsequent active layer material is etched, and the longer etching time easily causes damage to other structures on the substrate due to the fact that the etching process conditions are severe. When the thickness range of the active layer material is 1150-1400 angstrom, the thickness of the active layer material is moderate, so that the etching energy of the active layer material in the pixel region during etching can be effectively reduced, the etching process time is shortened, and the risk of substrate deformation is reduced.
S300: forming a first metal layer on the side of the active layer material far away from the substrate
According to some embodiments of the present invention, referring to fig. 2 (c), in this step, the first metal layer 300 is formed on the side of the active layer material 200 away from the substrate 100, and the position of the first metal layer on the substrate is not particularly limited, for example, the orthographic projection of the first metal layer on the substrate may be located in the pixel region and the control region, and when the first metal layer covers the pixel region and the control region on the substrate, that is, the first metal layer is formed on the substrate in a whole layer, the first metal layer may be obtained by a simpler deposition process.
According to an embodiment of the present invention, a material forming the first metal layer is not particularly limited, and for example, the material forming the first metal layer may be copper.
S400: forming a first photoresist layer on one side of the first metal layer far away from the active layer material
According to some embodiments of the present invention, referring to (d) in fig. 2, a first photoresist layer 400 is formed at this step on the side of the first metal layer 300 away from the active layer material 200, and the position of the first photoresist layer on the substrate is not particularly limited, for example, the first photoresist layer may be located in the control region.
According to some embodiments of the present invention, the method for preparing the first photoresist layer is not particularly limited, for example, the first photoresist layer may be obtained by forming an entire photoresist layer in the pixel region and the control region at the same time on the side of the first metal layer away from the active layer material, ashing the photoresist layer in the pixel region, and partially ashing the photoresist layer by disposing a half mirror at a position corresponding to the back channel in the control region.
S500: etching the first metal layer with orthographic projection on the substrate in the pixel region
According to some embodiments of the present invention, a method of etching the first metal layer whose orthographic projection on the substrate is located in the pixel region is not particularly limited, and for example, the method of etching the first metal layer whose orthographic projection on the substrate is located in the pixel region may be wet etching.
According to some embodiments of the present invention, referring to fig. 2 (e), in this step, the first metal layer 300 whose orthographic projection on the substrate 100 is located in the pixel region is etched to form the source drain layer 310 in the control region, the location of the source drain layer on the substrate is not particularly limited, for example, the orthographic projection of the source drain layer on the substrate may be located in the orthographic projection of the first photoresist layer on the substrate, because the wet etching has isotropy and the etching rate in each direction remains the same, so the source drain layer located in the control region may shrink to some extent due to the process characteristics of the wet etching, i.e., the orthographic projection of the source drain layer on the substrate may be located inside the orthographic projection of the first photoresist layer on the substrate, and thus, if the dry etching of the active layer material in the pixel region is directly performed after this step, because of the anisotropy of the dry etching, namely, the dry etching is performed only along one direction, and the inside of the structure obtained after etching is basically vertical, so that the active layer material partially blocked by the first photoresist layer cannot be completely etched and removed, and finally the active layer is trailing, so that the performance of the thin film transistor is poor.
S600: pre-ashing the first photoresist layer
According to some embodiments of the present invention, referring to fig. 2 (f), the first photoresist layer is pre-ashed to form the second photoresist layer in this step, for example, an orthogonal projection of the second photoresist layer on the substrate may be located within an orthogonal projection of the source drain layer on the substrate, i.e., an orthogonal projection of the second photoresist layer on the substrate may coincide with an orthogonal projection of the source drain layer on the substrate, or be located within an orthogonal projection of the source drain layer on the substrate.
S700: etching the active layer material with orthographic projection on the substrate in the pixel region
According to some embodiments of the present invention, referring to (f) of fig. 2, the active layer material 200 located in the pixel region in the orthographic projection on the substrate 100 is etched to remove the active layer material 200 in the pixel region, thereby obtaining the active layer material 210 located in the control region.
According to some embodiments of the present invention, a method of etching the active layer material whose orthographic projection on the substrate is located in the pixel region is not particularly limited, and the method of etching the active layer material whose orthographic projection on the substrate is located in the pixel region may be dry etching, for example.
According to some embodiments of the present invention, the kind of the etching gas for dry etching is not particularly limited, for example, NF is included in the etching gas for dry etching3And He. When the active layer material in the pixel region is etched by dry etching, the metal material forming the source/drain layer is copper, and since the metal of the source/drain layer is exposed, etching gases having strong corrosivity to the metal of the source/drain layer, such as chlorine, cannot be used to reduce the influence on the source/drain layer. Taking the active layer material as low temperature polysilicon as an example, by adopting NF3And He, etching the active layer material in the pixel region by using the mixed gas, wherein the main reaction equation is as follows: si +4F·>SiF4×) without reaction between etching gas and metal copper of source drain layer, thereby avoiding Cl·The pollution corrosion to the source drain layer is matched with the thickness reduction of the active layer material, so that the etching energy for etching the active layer material in the pixel region is reduced, the preparation time is shortened, the risk of substrate deformation is effectively reduced, and the service life of a device is greatly prolonged because strong corrosive gas is not used.
For convenience of understanding, the following first illustrates the principle that the method for manufacturing a thin film transistor can achieve the above beneficial effects:
the existing mainstream thin film transistor preparation process comprises the following steps: after depositing the active layer material, the first metal layer and the first photoresist layer only in the control area on the substrate, the first metal layer in the pixel area is etched to obtain the source drain layer, the active layer material in the pixel area is etched to obtain the active layer material in the control area, and finally the first photoresist layer is ashed to obtain the second photoresist layer to expose the source drain layer in the control area.
As shown in fig. 2 (e), the first metal layer in the pixel regionAfter the line etching is performed to obtain the source/drain layer 310, since the method for etching the first metal layer is generally wet etching, and since the wet etching has isotropy and the etching rate in each direction is kept the same, the source/drain layer 310 located in the control region may shrink to a certain extent due to the process characteristics of the wet etching, that is, the orthographic projection of the source/drain layer 310 on the substrate 100 may be located inside the orthographic projection of the first photoresist layer 400 on the substrate, in the prior art, after the etching is performed on the first metal layer of the pixel region, the dry etching is generally continued on the active layer material located in the pixel region, and since the dry etching is performed only in one direction, the inside of the structure obtained after the etching is substantially vertical, and a part of the active layer material partially blocked by the first photoresist layer may not be completely etched and removed, referring to fig. 5, finally, an active layer trailing (act tail) exists, a certain distance exists between the edge of the orthographic projection of the source and the drain on the substrate and the edge of the orthographic projection of the active layer on the substrate, and the active layer trailing has great influence on performance parameters such as the aperture opening ratio of a product; and is greatly influenced by the tailing of the active layer, referring to fig. 7, taking the case that the thin film transistor is disposed on the liquid crystal display panel as an example, when the backlight panel of the liquid crystal display panel is turned on, due to the tailing of the active layer, the active layer 211 is excited as a conductor when being illuminated, and a parasitic capacitance C is generatedpd，
ε0The value of the dielectric constant in vacuum is 8.86x10^(-12)F/m，εrThe relative dielectric constant is 4.3F, S is the overlap area between capacitors, and the unit is m2Because of the existence of the active layer tail, the area of the source-drain 311(SD) is equivalently increased, so that d is reduced, and when the rest values are kept unchanged, the parasitic capacitance C is increasedpdAnd is increased. When the parasitic capacitance of the lcd panel increases due to the above reasons, referring to fig. 8 (the arrow direction in the figure indicates that the display panel has a continuous display effect along with the time extension), the dark stripe color block gradually shifts downwards along with the time during the use of the lcd panel, which greatly affects the viewing experience.
In the present application, referring to (d), (e), and (f) in fig. 2, after the first metal layer 300 in the pixel region is etched to obtain the source/drain electrode layer 310, the first photoresist layer 400 is pre-ashed to obtain the second photoresist layer 410, and then the active layer material 200 in the pixel region is etched to obtain the active layer material in the control region, which can effectively avoid the above problems, because after the first photoresist layer is pre-ashed to obtain the second photoresist layer, the orthogonal projection of the second photoresist layer on the substrate is located in the orthogonal projection of the source/drain electrode layer on the substrate, that is, the orthogonal projection of the second photoresist layer on the substrate can be overlapped with the orthogonal projection of the source/drain electrode layer on the substrate, or located in the orthogonal projection of the source/drain electrode layer on the substrate. At this time, when the active layer material in the pixel region is dry-etched to obtain the active layer material in the control region, because the second photoresist does not block the active layer material in the pixel region, the active layer material in the pixel region can be completely etched and removed as much as possible, and the tailing of the active layer is effectively alleviated.
In addition, in the related art, currently, a mainstream dry etching process for etching an active layer material in a pixel region mainly uses highly corrosive gas chlorine as a main reaction gas, and the etching equipment is severely corroded, so that the equipment replacement period is shortened, and the cost is high, in this application, referring to (f) and (g) in fig. 2, when etching the active layer material 200 in the pixel region, because the second photoresist layer 410 is formed before this step, the source drain layer 310 located in the control region is exposed, so that the metal forming the source drain layer is copper, the active layer material is low-temperature polysilicon as an example, and if the active layer material in the pixel region is etched by using chlorine, the active layer material located in the pixel region reacts as follows:
Si+4Cl·→SiCl4↑，
Si+4F·→SiF4↑，
Si+Cl·+3F·→SiClF3↑，
but since the second photoresist layer 410 has exposed the source drain layer 310 at the control region, the sourceThe metal copper of the drain electrode layer is exposed, and the metal copper exposed by the source electrode layer reacts as follows: cu +2Cl·>CuCl2Further, the copper of the source/drain layer is corroded by chlorine, which affects the performance of the source/drain layer. In this application, the inventors have eliminated Cl from the etching of the active layer material in the pixel area2Use of (2) NF3And etching with He mixed gas, wherein the active layer material in the pixel region reacts as follows: si +4F·>SiF4×, effectively avoid Cl·The pollution corrosion to the source drain layer is greatly prolonged due to the fact that strong corrosive gas is not used, the service life of equipment is greatly prolonged, manpower requirements and spare part maintenance times are reduced, and manufacturing cost is greatly reduced.
According to some embodiments of the present invention, referring to (h) and (i) of fig. 3, the method of manufacturing a thin film transistor may further include: etching the source drain layer to form a source drain 311; the active layer material 210 in the control region is etched to form an active layer 211 of the thin film transistor. Therefore, the thin film transistor with a complete structure and better performance can be obtained. It should be noted that, for a thin film transistor, it has at least a source and a drain, i.e. when one of the two 311 is shown as the source of the thin film transistor in fig. 4, the other is the drain of the thin film transistor.
In yet another aspect of the present application, referring to fig. 4, the present invention proposes a thin film transistor prepared by the foregoing method. The thin film transistor includes: the semiconductor device includes a substrate 100, an active layer 211, and source and drain electrodes 311, wherein the source and drain electrodes 311 at least include a source electrode and a drain electrode. Therefore, the thin film transistor has all the characteristics and advantages of the method for preparing the thin film transistor, and the method is not repeated herein, in summary, the thin film transistor has better performance and longer service life of devices, and the display panel with the thin film transistor has better display effect.
According to some embodiments of the present invention, referring to fig. 5, the thickness of the active layer is not particularly limited, for example, the thickness of the active layer may be 1300 angstroms, and the structure of the active layer is not particularly limited, for example, the active layer may include a first sublayer 2111, a second sublayer 2112, and a doped sublayer 2113. Through the arrangement of the doped sub-layers, the resistance of the active layer can be effectively reduced, and the performance of the thin film transistor is further improved.
According to an embodiment of the present invention, the method of preparing the first and second sublayers is not particularly limited, and for example, the first and second sublayers may be prepared by a method of chemical vapor deposition.
According to an embodiment of the present invention, the kind of the doping element in the doping sub-layer is not particularly limited, for example, when the host material forming the active layer is low temperature polysilicon, the doping element in the doping sub-layer may be phosphorus.
According to some embodiments of the present invention, referring to fig. 5, the structure of the active layer is not particularly limited, for example, the second sublayer 2112 is located on a side of the first sublayer 2111, and the doped sublayer 2113 is located on a side of the second sublayer 2112 away from the first sublayer 2111, wherein the first sublayer 2111 is located on a side of the active layer close to the substrate, and the doped sublayer 2113 is located on a side of the active layer close to the source and drain. Therefore, the resistance of the active layer can be reduced through the arrangement of the doped sub-layer, when the doped sub-layer positioned in the back channel region is partially removed, the non-etched doped sub-layer is connected with the source/drain electrode 311, and the connection stability between the source/drain electrode and the active layer can be improved through the arrangement of the doped sub-layer.
According to some embodiments of the present invention, the thickness of each sublayer in the active layer is not particularly limited, for example, the first sublayer may have a thickness of 300 angstroms, the second sublayer may have a thickness of 850 angstroms, and the doped sublayer may have a thickness of 150 angstroms. In the process of manufacturing the thin film transistor, referring to fig. 2, the active layer material 210 in the control region needs to be etched to form the active layer 211 of the thin film transistor, where the depth of etching the active layer material 210 in the control region may be 450 angstroms, that is, the doped sub-layer and a portion of the second sub-layer located at the corresponding position of the back channel of the control region may be etched away to obtain the active layer, where the doped sub-layer and the second and first sub-layers, whose orthographic projections on the substrate coincide with that of the source and drain electrodes on the substrate, remain.
In another aspect of the present application, the present invention provides a thin film transistor on a substrate, the substrate including a pixel region and a control region, the thin film transistor being located in the control region, the thin film transistor including: an active layer formed of low temperature polysilicon; and the orthographic projection of the source and the drain on the substrate is positioned in the orthographic projection range of the active layer on the substrate, and the distance between the edge of the orthographic projection of the source and the drain on the substrate and the edge of the orthographic projection of the active layer on the substrate is not more than 1.2 microns. When the distance between the orthographic projection edge of the source and the orthographic projection edge of the drain on the substrate and the orthographic projection edge of the active layer on the substrate is not more than 1.2 microns, the thin film transistor has lower parasitic capacitance, and the display panel with the thin film transistor meets the use standard of the display panel, has better display effect, is not easy to generate the problems of signal crosstalk and the like.
In another aspect of the present application, the present invention provides a display panel, wherein the display panel includes a thin film transistor, and the thin film transistor is prepared by the foregoing method, or the foregoing thin film transistor. Therefore, the display panel has all the features and advantages of the thin film transistor, and the description thereof is omitted.
The following embodiments are provided to illustrate the present application, and should not be construed as limiting the scope of the present application. The examples, where specific techniques or conditions are not indicated, are to be construed according to the techniques or conditions described in the literature in the art or according to the product specifications. The reagents or instruments used are not indicated by the manufacturer, and are all conventional products commercially available.
Example 1:
1. providing a substrate, wherein the substrate is a glass substrate,
2. forming an active layer material on one side of the substrate, wherein the active layer material is low-temperature polycrystalline silicon and comprises a first sub-layer with the thickness of 300 angstroms, a second sub-layer with the thickness of 850 angstroms and a doped sub-layer with the thickness of 150 angstroms, and the doping element is phosphorus, the first sub-layer is positioned on one side close to the substrate, the second sub-layer is positioned on one side of the first sub-layer far away from the substrate, and the doped sub-layer is positioned on one side of the second sub-layer far away from the first sub-layer,
3. forming a first metal layer on the side of the active layer material far away from the substrate, wherein the material for forming the first metal layer is copper,
4. a first photoresist layer is formed on one side of the first metal layer far away from the active layer material,
5. wet etching is carried out on the first metal layer with the orthographic projection on the substrate positioned in the pixel area,
6. the first photoresist layer is pre-ashed to form a second photoresist layer,
7. carrying out dry etching on the active layer material with the orthographic projection on the substrate positioned in the pixel region, wherein the etching gas is NF3And a mixed gas of He and a gas of He,
8. etching the source and drain layers to form a source and a drain,
9. and etching the active layer material in the control region to form the active layer of the thin film transistor.
Comparative example 1:
1. providing a substrate, wherein the substrate is a glass substrate,
2. forming an active layer material on one side of the substrate, wherein the active layer material is low-temperature polysilicon,
3. forming a first metal layer on the side of the active layer material far away from the substrate, wherein the metal layer is made of copper,
4. a first photoresist layer is formed on one side of the first metal layer far away from the active layer material,
5. wet etching is carried out on the first metal layer with the orthographic projection on the substrate positioned in the pixel area,
6. dry etching is carried out on the active layer material with the orthographic projection on the substrate positioned in the pixel area, the etching gas is chlorine,
7. the first photoresist layer is pre-ashed to form a second photoresist layer,
8. etching the source and drain layers to form a source and a drain,
9. and etching the active layer material in the control region to form the active layer of the thin film transistor.
The results show that:
the thin film transistor in embodiment 1 has an active layer tail length of 1.0 μm, and thus has a small parasitic capacitance generated when the active layer is illuminated, and thus has a small influence on the performance of the display panel. The thin film transistor in comparative example 1 has an active layer tail length of 1.8 μm, and has a large parasitic capacitance generated when the active layer is irradiated with light, which greatly affects the performance of the display panel.
The display panel equipped with the thin film transistor in embodiment 1 has a high yield of finished products and a good display effect, and the display panel has good viewing experience because dark stripe-shaped color blocks do not gradually move downwards along with time in the use process. The display panel assembled with the thin film transistor in the comparative example 1 has poor finished product yield and poor display effect, and the display panel frequently has the phenomenon that dark color strip-shaped color blocks gradually shift downwards along with time in the use process, so that the viewing experience is good.
In the description of the present invention, the terms "upper", "lower", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of describing the present invention but do not require that the present invention must be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
In the description herein, references to the description of "one embodiment," "another embodiment," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction. In addition, it should be noted that the terms "first" and "second" in this specification are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any number of technical features indicated.
Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.
Claims (10)
1. A method of making a thin film transistor, comprising:
providing a substrate comprising a pixel region and a control region,
forming an active layer material on one side of the substrate, the active layer material covering the pixel region and the control region,
forming a first metal layer on one side of the active layer material, which is far away from the substrate, wherein the orthographic projection of the first metal layer on the substrate is positioned in the pixel region and the control region,
forming a first photoresist layer on one side of the first metal layer far away from the active layer material, wherein the first photoresist layer is positioned in the control region,
etching the first metal layer with the orthographic projection on the substrate positioned in the pixel area so as to form a source drain layer in the control area, wherein the orthographic projection of the source drain layer on the substrate is positioned in the orthographic projection of the first photoresist layer on the substrate,
pre-ashing the first photoresist layer to form a second photoresist layer, wherein the orthographic projection of the second photoresist layer on the substrate is positioned in the orthographic projection of the source drain layer on the substrate,
etching the active layer material with the orthographic projection on the substrate positioned in the pixel area so as to remove the active layer material in the pixel area.
2. The method according to claim 1, wherein the method for etching the first metal layer whose orthographic projection on the substrate is located in the pixel region is wet etching; the method for etching the active layer material with the orthographic projection on the substrate positioned in the pixel region is dry etching.
3. The method as claimed in claim 2, wherein the active layer material is formed to include low temperature polysilicon, and the thickness of the active layer material is 1150-1400 angstroms.
4. The method of claim 3, wherein the etching gas of the dry etching comprises NF3And He.
5. The method of any one of claims 1-4, further comprising:
etching the source drain electrode layer to form a source electrode and a drain electrode;
and etching the active layer material in the control area to form the active layer of the thin film transistor.
6. A thin film transistor prepared by the method of any one of claims 1 to 5.
7. The thin film transistor of claim 6, wherein the active layer has a thickness of 1300 angstroms, and wherein the active layer comprises a first sublayer, a second sublayer, and a doped sublayer.
8. The thin film transistor of claim 7, wherein the second sublayer is on a side of the first sublayer and the doped sublayer is on a side of the second sublayer away from the first sublayer,
the first sublayer has a thickness of 300 angstroms, the second sublayer has a thickness of 850 angstroms, and the doped sublayer has a thickness of 150 angstroms.
9. A thin film transistor, wherein the thin film transistor is located on a substrate, the substrate includes a pixel region and a control region, the thin film transistor is located in the control region, the thin film transistor comprising:
an active layer formed of low temperature polysilicon; and
the orthographic projection of the source and the drain on the substrate is positioned in the orthographic projection range of the active layer on the substrate,
and the distance between the orthographic projection edge of the source and the orthographic projection edge of the drain on the substrate and the orthographic projection edge of the active layer on the substrate is not more than 1.2 microns.
10. A display panel comprising a thin film transistor, the thin film transistor being prepared by the method of any one of claims 1 to 5, or the thin film transistor of any one of claims 6 to 9.
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| CN114220823A (en) * | 2021-12-17 | 2022-03-22 | 合肥鑫晟光电科技有限公司 | Display panel, display device and manufacturing method of display panel |
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Application publication date: 20210727 |