CN113163108A - Image acquisition system - Google Patents
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- CN113163108A CN113163108A CN202110218563.8A CN202110218563A CN113163108A CN 113163108 A CN113163108 A CN 113163108A CN 202110218563 A CN202110218563 A CN 202110218563A CN 113163108 A CN113163108 A CN 113163108A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/60—Control of cameras or camera modules
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/765—Interface circuits between an apparatus for recording and another apparatus
- H04N5/77—Interface circuits between an apparatus for recording and another apparatus between a recording apparatus and a television camera
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Abstract
The application discloses image acquisition system, including image acquisition PCIe card support plate and camera signal link daughter card through integrated circuit board connector interconnect, image acquisition PCIe card support plate and camera signal link daughter card are standard PCIe slot width. The image acquisition PCIe card carrier board is connected with the central computing unit through a PCIe interface, and each image acquisition device is connected with the camera signal link daughter card through a device connector. The camera signal link daughter card converts image data of signal links of different standards into matched interface data and uploads the interface data to the image acquisition PCIe card carrier board, the image acquisition PCIe card carrier board executes corresponding operation on the received image data according to an image processing instruction, and the image processing instruction is an image processing instruction or an image storage instruction or an image output instruction. The method and the system can improve the integration level of hardware equipment of the unmanned vehicle sensing system, improve the universality and the mobility of the hardware equipment, and shorten the system upgrading period.
Description
Technical Field
The application relates to the technical field of artificial intelligence, in particular to an image acquisition system.
Background
Along with the technical upgrading of the automobile industry, particularly the deepening of the artificial intelligence technology, the unmanned vehicle gradually appears in the traffic trip, and great convenience is brought to daily life. The perception system is an information basis for obtaining external environment characteristics and making vehicle decision and control by the unmanned vehicle. At present, an unmanned sensing system mainly senses the surrounding environment through signals such as positions, images, sounds and the like and fuses various sensing data.
The perception system of unmanned vehicle mainly includes two parts at high in the clouds and car end, and wherein the high in the clouds contains high-precision map drawing, deep learning model training, simulation, data storage etc.. The vehicle-end sensing system is a computer and multi-sensor based system. On the hardware level, various sensors are directly or indirectly connected to the computer system through interface equipment; on the software level, the sensors are abstracted to be peripherals under the robot operating system and are called by the application algorithm. The vehicle-mounted cameras are important units of the unmanned sensing system, particularly in the high-level automatic stages of the automatic driving classification such as L4 and L5, the number of the cameras is generally more than 8 and more than 2Mega pixels. And the image data of the multi-path camera needs preprocessing processing, such as around stitching, distortion correction and distortion removal, image time stamping and the like. In response to the above needs, there is a need to develop an on-board system camera harvester.
In view of the early stage of the unmanned technology, the hardware equipment of the sensing system has low form integration level, the sensors with different functions are connected into the discrete interface equipment, and then the data is connected into the central control computer, so that the equipment has poor universality, the platform mobility is poor, and the system has long upgrading period.
Disclosure of Invention
The application provides an image acquisition system, improves unmanned vehicle perception system's hardware equipment's integrated level, promotes hardware equipment's commonality and mobility, shortens system upgrade cycle.
In order to solve the above technical problems, embodiments of the present invention provide the following technical solutions:
the embodiment of the invention provides an image acquisition system, which comprises an image acquisition PCIe card carrier plate and a camera signal link daughter card;
the image acquisition PCIe card carrier board is connected with the central computing unit through a PCIe interface, the camera signal link daughter card is connected to the image acquisition PCIe card carrier board through a card connector, and each image acquisition device is connected with the camera signal link daughter card through a device connector which is deployed in parallel; the image acquisition PCIe card carrier board and the camera signal link daughter card are both standard PCIe slot widths;
the camera signal link daughter card is used for converting image data of signal links with different standards into matched interface data and uploading the interface data to the image acquisition PCIe card carrier board; the image acquisition PCIe card carrier plate is used for executing corresponding operation on received image data according to an image processing instruction, wherein the image processing instruction is image processing, image storage or image output.
Optionally, the image acquisition PCIe card carrier board is a circuit board which takes an FPGA based on a system on chip as a main control;
the FPGA comprises an embedded processor and a programmable logic unit, wherein the embedded processor is used for operating a kernel system and comprises a plurality of hard core peripheral interfaces; the programmable logic unit is used for supporting firmware downloading logic configuration, instantiating each function interface IP and calling an image processing algorithm to execute image processing operation.
Optionally, the image capture PCIe card carrier further includes a serializer circuit, and the programmable logic unit is further configured to send the image data to the serializer circuit through an MIPI D-PHY sending interface, so that the image data is output after being serialized.
Optionally, the embedded processor includes a memory controller and a solid-state memory;
the embedded processor is in data communication with the memory unit through the memory controller; the solid-state memory stores a system image of the system-on-chip and loading logic required by the FPGA during operation.
Optionally, the camera signal link daughter card is configured to send the image processing to the programmable logic unit, the image capture PCIe card carrier board is further configured to transmit the image data to the embedded processor through the FPGA internal bus, and the embedded processor stores the image processing in solid-state hardware through a SATA interface.
Optionally, the board card connector includes a trigger signal interface and a parameter configuration signal interface; the image acquisition PCIe card carrier plate is also used for synchronously triggering each image acquisition device to acquire images through the card connector based on the time information of the positioning signal when receiving the positioning signal of the global navigation satellite system.
Optionally, the image acquisition PCIe card carrier board has a standard PCIe single slot width, and the camera signal link board has a standard PCIe single slot width; the image acquisition PCIe card carrier plate and the camera signal link board are combined to form a standard PCIe card double-slot width.
Optionally, the board connector has an MIPI interface, the camera signal link daughter card includes a plurality of device connectors and a plurality of deserializer circuits, and each device connector corresponds to only one deserializer circuit;
the deserializer circuit is used for converting high-speed serial image signal data sent by the corresponding equipment connector into MIPI interface type data so as to send the image data to the image acquisition PCIe card carrier plate through the MIPI interface and the card connector.
Optionally, the camera signal link daughter card further includes a plurality of image processors, each image processor being connected to a corresponding deserializer circuit for performing a corresponding image processing operation on image data output by the deserializer circuit.
Optionally, the device connector is a fakra connector.
The technical scheme provided by the application has the advantages that the image acquisition PCIe card carrier plate and the camera signal link daughter card all adopt PCIe standard card forms, so that the image acquisition PCIe standard card carrier plate and the camera signal link daughter card can be adapted to central processing units in various forms, and comprise an on-vehicle industrial personal computer environment, a desktop PC (personal computer) environment for program debugging or a server cloud environment for large-scale data training and processing. The adoption board carries the form of camera link processing board, can realize the image acquisition equipment of the different signal link standards of single support plate adaptation, upgrading are more convenient, have effectively improved the integrated level of unmanned vehicle perception system's hardware equipment, promote hardware equipment's commonality and mobility, shorten system upgrade cycle. The camera signal link daughter card is carried on the image acquisition PCIe card carrier plate, and all equipment connectors in the camera signal link daughter card are deployed in parallel, so that the image acquisition device can be adapted to cameras with different serial high-speed links such as GMSL, FPD-link, Thine and other standards, the application range of the image acquisition device is widened, the image acquisition devices can be flexibly increased and decreased, the system upgrading period can be adjusted according to the application and quantity change of the cameras, and the flexibility of hardware adaptation algorithm upgrading is improved.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions of the related art, the drawings required to be used in the description of the embodiments or the related art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a structural diagram of an embodiment of an image acquisition system according to an embodiment of the present invention;
fig. 2 is a structural diagram of an embodiment of an image capture PCIe card carrier according to an embodiment of the present invention;
fig. 3 is a block diagram of an embodiment of a camera signal link daughter card according to an embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the disclosure, the invention will be described in further detail with reference to the accompanying drawings and specific embodiments. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terms "first," "second," "third," "fourth," and the like in the description and claims of this application and in the above-described drawings are used for distinguishing between different objects and not for describing a particular order. Furthermore, the terms "comprising" and "having," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements but may include other steps or elements not expressly listed.
Having described the technical solutions of the embodiments of the present invention, various non-limiting embodiments of the present application are described in detail below.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an image acquisition system according to an embodiment of the present invention, where the embodiment of the present invention includes the following:
an image capture system may include an image capture PCIe card carrier board 11 and a camera signal link daughter card 12. The camera signal link daughter card 12 is connected to the image acquisition PCIe card carrier plate 11 through the board connector 13, the board connector 13 can be a high-density connector, and the high-density connector includes a large height density of the product, a large number of connector pins and a large number of supportable signal links; the high-density connector is high in data transmission efficiency, capable of guaranteeing integrity of high-speed signal transmission and capable of processing differential signals, and the high-density connector can be an FMC (FPGA Mezzanine Card) connector. In addition, the interface of the high-density connector may be an mipi (mobile Industry Processor interface) interface, and the internal interface of the system may be standardized, thereby reducing the complexity of the system design and increasing the design flexibility. The interface device also has certain data integration and processing functions, has data calculation functions and performance, and even a plurality of interface units or interface boxes are a set of complete embedded systems or domain controllers and have the characteristics of integration and integration into a central calculation unit. A plurality of device connectors 121 are disposed in parallel on the camera signal link daughter card 12, each device connector may be connected to an image capturing device such as a camera, signal link standards corresponding to the image capturing devices may all be different, and the number of device connectors may be increased or decreased flexibly according to actual application scenarios. The equipment connector can be a fakra connector, and the installation stability of the image acquisition equipment and the board card is improved. The camera signal link daughter card 12 can be adapted to different serial high-speed links, such as GMSL mainly manufactured by mein corporation, FPD-link manufactured by texas instruments, Rohm manufactured by lomm corporation, and then line manufactured by english corporation, thereby improving the application range of the image collector. The PCIe card carrier board 11 for image acquisition can be adapted to different camera signal link daughter cards 12 according to the requirement of a serial link, so that the flexibility of the system is ensured. The serialized link refers to a signal between a device and a deserialized link, the fakra connector is externally connected with a camera, and the signal links have different standards and comprise FPD-link, Rohm, Thine and the like.
The image acquisition PCIe card carrier plate 11 is connected with the central computing unit 0 through a PCIe (peripheral component interconnect express) interface, the image acquisition PCIe card carrier plate 11 uploads processed image data to a system host through the PCIe interface, and the image acquisition system and the central computing unit are integrated into an image perception and calculation integrated system of the unmanned vehicle. The central computing unit 0 may include a vehicle-mounted industrial personal computer environment, a desktop PC environment for program debugging, a server cloud environment for large-scale data training processing, and the like, which do not affect the implementation of the present application.
In order to improve the hardware integration of the image acquisition system, the image acquisition PCIe card carrier board 11 and the camera signal link daughter card 12 are both standard PCIe slot widths, for example, the image acquisition PCIe card carrier board may be a standard PCIe single slot width, and the camera signal link board may be a standard PCIe single slot width; the image acquisition PCIe card carrier board and the camera signal link board are combined to form the standard PCIe card double-slot width. In addition, the board width, the board thickness, and the like of the image capture PCIe card carrier board 11 and the camera signal link daughter card 12 all need to meet the requirements of the standard PCIe.
In this embodiment, the camera signal link daughter card 12 is configured to convert image data of signal links of different standards into matched interface data, and upload the interface data to the PCIe card carrier board 11 for image acquisition, for example, if the interface is MIPI, the camera signal link daughter card 12 converts high-speed serial signal data into data of MIPI standard. The image capture PCIe card carrier board 11 is configured to execute corresponding operations on the received image data according to an image processing instruction, where the image processing instruction may be any one or any combination of the following: image processing or image storage or image output.
In the technical scheme provided by the embodiment of the invention, the image acquisition PCIe card carrier board and the camera signal link daughter card both adopt PCIe standard card forms, so that the image acquisition PCIe standard card carrier board and the camera signal link daughter card can be adapted to central processing units in various forms, including a vehicle-mounted industrial personal computer environment, a desktop PC (personal computer) environment for program debugging or a server cloud environment for large-scale data training processing. The adoption board carries the form of camera link processing board, can realize the image acquisition equipment of the different signal link standards of single carrier plate adaptation, upgrading convenience, effectively improve unmanned vehicle perception system's hardware equipment's integrated level, promote hardware equipment's commonality and mobility, shorten system upgrade cycle. The camera signal link daughter card is carried on the image acquisition PCIe card carrier plate, and all equipment connectors in the camera signal link daughter card are deployed in parallel, so that the image acquisition PCIe card carrier plate can be adapted to cameras with different serialization high-speed links such as GMSL, FPD-link, Thine and other standards, the application range of the image acquisition device is widened, the image acquisition equipment can be flexibly increased and decreased, the system upgrading period can be adjusted according to the application and quantity change of the cameras, and the flexibility of hardware adaptation algorithm upgrading is improved.
In the above embodiment, the structure of the image capturing PCIe card carrier board 11 is not limited, but in this embodiment, a schematic internal structure diagram of the image capturing PCIe card carrier board 11 in an implementation manner is given, please refer to fig. 2, which may include the following contents:
the image capture PCIe card carrier 11 may be a circuit board that takes an FPGA (Field-Programmable Gate Array) based on an SOC (System on Chip) as a main control. Certainly, the image acquisition PCIe card carrier board 11 also includes an FPGA and an ARM processor, and the FPGA only includes a programmable logic unit, which does not affect the implementation of the present application.
Because the FPGA has the characteristics of rich interface resources, good configuration flexibility, and the like, the image acquisition system also needs to manage and monitor each functional module or adjust each parameter in real time, and the programmable logic unit and the embedded processor can be integrated in an FPGA chip, that is, the FPGA can include the embedded processor and the programmable logic unit, for example, an UltraScale + series product of a chip model Xilinx is an architecture of the SOC-FPGA, and includes a processor unit of an ARM core and a programmable logic part. The embedded processor is used for running a kernel system, such as a linux kernel system, and comprises a plurality of hard core peripheral interfaces, such as a memory controller, a network controller, a storage controller and the like which are communicated with the memory unit. The programmable logic unit can be used for supporting firmware downloading logic configuration, instantiating various function interfaces IP and calling an image processing algorithm to execute image processing operation. For example, the solid-state memory shown in fig. 2 includes an IP (Internet Protocol), a USB (Universal Serial Bus) IP, and a MAC (Media Access Control) IP.
The embedded processor may include one or more processing cores, such as a 4-core processor, an 8-core processor, and so forth. The hardware may also be implemented in the form of DSP (Digital Signal Processing) hardware. The processor may also include a main processor and a coprocessor, where the main processor is a processor for Processing data in an awake state, and is also called a Central Processing Unit (CPU); a coprocessor is a low power processor for processing data in a standby state. In some embodiments, the processor may be integrated with a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content that the display screen needs to display. In some embodiments, the processor may further include an AI (Artificial Intelligence) processor for processing computing operations related to machine learning.
In order to facilitate timely detection of whether the acquired image is the required data or to perform some image processing operations on the image data, as an implementation manner of this embodiment, the image acquisition PCIe card carrier board 11 may further include a serializer circuit, the serializer circuit may perform serialization processing on the image data, and the programmable logic unit is further configured to send the image data to the serializer circuit through the MIPI D-PHY sending interface, so that the image data is output after being serialized. In addition, the image data is sent out in a serialized mode through an MIPI D-PHY sending interface in the programmable logic unit, the function of original image output can be used as vehicle-mounted system software to carry out hardware-in-loop test, and the debugging and testing efficiency of the vehicle-mounted system software is improved.
As shown in fig. 2, the embedded processor may further include a memory controller, a solid-state memory, a network interface, a debugging interface, and other functional interfaces including loading and external communication. The embedded processor is in data communication with the memory unit through the memory controller; the solid-state memory stores system images of the system level chip and loading logic needed by the FPGA during running. The memory unit is a main memory on the embedded processor side, and a main storage space for running programs of an operating system and applications. The solid-state memory may be, for example, an e.mmc, which stores the system image of the SOC and contains the loading logic needed for the FPGA to run.
The memory unit may include one or more computer-readable storage media, which may be non-transitory. The memory units may also include high-speed random access memory, as well as non-volatile memory, such as one or more magnetic disk storage devices, flash memory storage devices. In this embodiment, the memory unit is at least used for storing the following computer program, where after the computer program is loaded and executed, the relevant steps of the image processing method in the image acquisition system, the function module management method, and the FPGA operation logic disclosed in any of the foregoing embodiments can be implemented. In addition, the resources stored in the memory unit may also include an operating system, data, and the like, and the storage manner may be a transient storage manner or a permanent storage manner. The operating system may include Windows, Unix, Linux, and the like. The data may include, but is not limited to, data generated during calculations involved with the image acquisition system, and the like.
As another implementation manner of this embodiment, the camera signal link daughter card 12 may be configured to send image processing to the programmable logic unit, and the image capture PCIe card carrier board 11 is further configured to transmit image data to the embedded processor via an FPGA internal bus, such as an AXB bus, and the embedded processor stores the image processing in solid-state hardware, such as an m.2 streaming disk shown in fig. 2, through a Serial Advanced Technology Attachment (SATA) interface, so as to implement functional applications such as data backup, data test, and data capture.
It can be understood that the image processing performed by the PCIe card carrier board 11 may include two modes, one is to perform image processing all the time, and the other is to perform a custom trigger, where the custom trigger is to preset when to perform data acquisition and perform corresponding data processing, for example, in a peak period and an accident frequently occurring period, the camera may be triggered to acquire surrounding environment data by 360 °. As an alternative embodiment, in order to support the custom trigger mode, the board connector 13 may include a trigger signal interface and a parameter configuration signal interface such as GPIO; the image acquisition PCIe card carrier board 11 may also be configured to synchronously trigger each image acquisition device to perform image acquisition through the board connector based on the time information of the positioning signal when receiving the positioning signal of the global navigation satellite system. In this embodiment, the image trigger control signal of the image capture PCIe card carrier 11 may include: receiving PPS (Precise Positioning Service) and GPRMC (recommended Positioning information) information of a GNSS (Global Navigation Satellite System), and synchronously triggering camera exposure through time information of the GNSS.
The present application further provides a schematic structural framework of the camera signal link daughter card 12 in an embodiment, please refer to fig. 3, which may include:
the camera signal link daughter card 12 may include a plurality of device connectors and a plurality of deserializer circuits, one for each device connector; the deserializer link may convert the high-speed serial signal of the camera serialization link into matching interface data. If the interface of the board connector is an MIPI interface, the deserializer circuit may be configured to convert high-speed serial image signal data sent through the corresponding device connector into MIPI interface type data, so as to send the image data to the image-capturing PCIe card carrier board 11 through the MIPI interface via the board connector.
It can be understood that the image processor may be disposed in the FPGA of the PCIe card carrier board 11 for image capture, or may be disposed in the image capture device in front of the PCIe card carrier board, and if the image capture device is disposed in front of the image capture device, the power consumption of the image capture device is large and the cost of the image capture device is high, which may increase the cost of the entire unmanned vehicle. If the post-positioned FPGA is arranged, the structure of the FPGA is more complicated. As an alternative embodiment, the camera signal link daughter card 12 may further include a plurality of image processors, each of which is connected to a corresponding deserializer circuit for performing a corresponding image processing operation on the image data output from the deserializer circuit, such as image de-distortion, ring stitching, and the like.
In this embodiment, the signal data stream of the image capturing system is:
if the camera signal link daughter card 12 includes an image processor, the image data acquired by the image acquisition device, such as a camera, is transmitted to the deserializer of the camera signal link daughter card 12, the deserializer processes the image data and then inputs the processed image data to the image processor, and the image processor is transmitted to the programmable logic unit of the FPGA of the image acquisition PCIe card carrier 11 through the instantiated MIPI D-PHY of the high-density connector. If the camera signal link daughter card 12 does not include an image processor, the image data acquired by the image acquisition device, such as a camera, is transmitted to the deserializer of the camera signal link daughter card 12, the deserializer processes the image data and then directly uploads the processed image data to the programmable logic unit of the FPGA of the image acquisition PCIe card carrier board 11 through the MIPI interface, and the interface unit of the FPGA can distribute the image data to the storage unit, such as memory granules of a programmable logic portion), or perform image processing, such as time stamping, denoising, distortion removal, around-the-eye splicing, and the like, or perform operations.
Of course, the image capture PCIe card carrier board 11 and the camera signal link daughter card 12 may further include a clock module for performing clock frequency detection and a power module for supplying power, and those skilled in the art may add a required functional module according to actual needs, or delete the above mentioned functional modules, which does not affect the implementation of the present application.
The image acquisition system can be applied to the technical field of high-precision map acquisition, unmanned vehicle-mounted image acquisition domain controllers and unmanned algorithm simulation platforms. The method is applied to high-precision map acquisition: the system is matched with a camera and a calculation host, and is used as an image data acquisition hardware platform of the high-precision map to undertake the image acquisition task of the high-precision map. The method is applied to the unmanned vehicle-mounted image acquisition domain controller: the method is mainly applied to the image acquisition and control functions of the hardware platform. And transmitting the image data stream to the host side according to the algorithm requirement. The method is applied to an unmanned algorithm simulation platform: the input information of the simulation algorithm may be a standard test data set, or actually collected road data stored by a flow chart. The system image is processed and output to a host computer through a PCIe interface for system test, simulation and training, or hardware-in-the-loop test of software is directly performed through an image output interface.
Finally, it should be noted that the shortage of the actual road testing mileage of the existing unmanned vehicle is one of the obstacles for the unmanned vehicle to land on the ground, and the road testing mileage of the testing vehicle factory is far from the shortage. And (3) the road data is migrated to the cloud, and the whole vehicle-mounted test environment needs to be migrated to the cloud to perform virtual test and simulation test on the road environment on the cloud. The method is a scheme for solving unmanned training and drive test. The form of the image acquisition system is developed and designed based on the environment on the cloud.
The embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same or similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
An image capturing system provided by the present application is described in detail above. The principles and embodiments of the present invention are explained herein using specific examples, which are presented only to assist in understanding the method and its core concepts. It should be noted that, for those skilled in the art, it is possible to make various improvements and modifications to the present invention without departing from the principle of the present invention, and those improvements and modifications also fall within the scope of the claims of the present application.
Claims (10)
1. An image acquisition system is characterized by comprising an image acquisition PCIe card carrier plate and a camera signal link daughter card;
the image acquisition PCIe card carrier board is connected with the central computing unit through a PCIe interface, the camera signal link daughter card is connected to the image acquisition PCIe card carrier board through a card connector, and each image acquisition device is connected with the camera signal link daughter card through a device connector which is deployed in parallel; the image acquisition PCIe card carrier board and the camera signal link daughter card are both standard PCIe slot widths;
the camera signal link daughter card is used for converting image data of signal links with different standards into matched interface data and uploading the interface data to the image acquisition PCIe card carrier board; the image acquisition PCIe card carrier plate is used for executing corresponding operation on received image data according to an image processing instruction, wherein the image processing instruction is an image processing instruction or an image storage instruction or an image output instruction.
2. The image acquisition system of claim 1, wherein the image acquisition PCIe card carrier board is a circuit board with a system-on-chip FPGA as a master control;
the FPGA comprises an embedded processor and a programmable logic unit, wherein the embedded processor is used for operating a kernel system and comprises a plurality of hard core peripheral interfaces; the programmable logic unit is used for supporting firmware downloading logic configuration, instantiating each function interface IP and calling an image processing algorithm to execute image processing operation.
3. The image capture system of claim 2, wherein the image capture PCIe card carrier further comprises a serializer circuit, and the programmable logic unit is further configured to send the image data to the serializer circuit through an MIPID-PHY sending interface, so that the image data is output after being serialized.
4. The image acquisition system of claim 2, wherein the embedded processor comprises a memory controller and a solid state memory;
the embedded processor is in data communication with the memory unit through the memory controller; the solid-state memory stores a system image of the system-on-chip and loading logic required by the FPGA during operation.
5. The image acquisition system of claim 3, wherein the camera signal link daughter card is configured to send the image processing to the programmable logic unit, and the image acquisition PCIe card carrier board is further configured to transmit the image data to the embedded processor via the FPGA internal bus, and the embedded processor stores the image processing into solid state hardware via a SATA interface.
6. The image acquisition system of claim 1 wherein the board connector comprises a trigger signal interface and a parameter configuration signal interface; the image acquisition PCIe card carrier plate is also used for synchronously triggering each image acquisition device to acquire images through the card connector based on the time information of the positioning signal when receiving the positioning signal of the global navigation satellite system.
7. The image capture system of claim 6, wherein the image capture PCIe card carrier is standard PCIe single slot width and the camera signal link board is standard PCIe single slot width; the image acquisition PCIe card carrier plate and the camera signal link board are combined to form a standard PCIe card double-slot width.
8. The image acquisition system according to any one of claims 1 to 7, wherein the board connector has a MIPI interface, and the camera signal link daughter card comprises a plurality of device connectors and a plurality of deserializer circuits, each device connector corresponding to only one deserializer circuit;
the deserializer circuit is used for converting high-speed serial image signal data sent by the corresponding equipment connector into MIPI interface type data so as to send the image data to the image acquisition PCIe card carrier plate through the MIPI interface and the card connector.
9. The image acquisition system of claim 8 wherein the camera signal link daughter card further comprises a plurality of image processors, each image processor connected to a respective deserializer circuit for performing a respective image processing operation on image data output by the deserializer circuit.
10. The image acquisition system of claim 9, wherein the device connector is a fakra connector.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
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| CN115866173A (en) * | 2023-02-20 | 2023-03-28 | 上海芯浦科技有限公司 | Video transmission chip |
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