CN113161429A - Photoelectric package and manufacturing method thereof - Google Patents

Photoelectric package and manufacturing method thereof Download PDF

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Publication number
CN113161429A
CN113161429A CN202011566646.8A CN202011566646A CN113161429A CN 113161429 A CN113161429 A CN 113161429A CN 202011566646 A CN202011566646 A CN 202011566646A CN 113161429 A CN113161429 A CN 113161429A
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China
Prior art keywords
encapsulant
optoelectronic
substrate
photoelectric
package
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CN202011566646.8A
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Chinese (zh)
Inventor
黄健修
陈柏智
邱国铭
周孟松
郑伟德
梁凯杰
陈运达
黄仕冲
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Lite On Opto Technology Changzhou Co Ltd
Lite On Technology Corp
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Lite On Opto Technology Changzhou Co Ltd
Lite On Technology Corp
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Application filed by Lite On Opto Technology Changzhou Co Ltd, Lite On Technology Corp filed Critical Lite On Opto Technology Changzhou Co Ltd
Priority to US17/326,356 priority Critical patent/US11916155B2/en
Publication of CN113161429A publication Critical patent/CN113161429A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0203—Containers; Encapsulations, e.g. encapsulation of photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/12—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto
    • H01L31/125—Composite devices with photosensitive elements and electroluminescent elements within one single body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Composite Materials (AREA)
  • Manufacturing & Machinery (AREA)
  • Led Device Packages (AREA)

Abstract

The application discloses a photoelectric package and a manufacturing method thereof. The photoelectric package comprises a substrate, a photoelectric component, a first packaging colloid and a second packaging colloid. The photoelectric component is arranged on the substrate. The first encapsulant covers the substrate and is disposed around the optoelectronic device. The second packaging colloid covers the first packaging colloid and the photoelectric component. The first encapsulant has a highest point position and a lowest point position, and the highest point position is not higher than the surface of the optoelectronic device.

Description

Photoelectric package and manufacturing method thereof
Technical Field
The present disclosure relates to the field of optoelectronics, and more particularly, to an optoelectronics package with a molding compound and a method for fabricating the same.
Background
The heart rate sensor is built in the intelligent mobile phone or the intelligent bracelet. In the heart rate sensor, light (e.g., infrared light or red light) is actually irradiated to a human body through a Light Emitting Diode (LED), light reflected by the human body is measured by a photoelectric sensor (photo sensor), and a change in blood flow is estimated by a light source reduced in reflection, so that the heart rate or pulse of the human body is known. At present, the design of the photo sensor not only improves the light emitting power (brightness), but also develops towards the trend of light, thin, small and power saving. However, in the prior art, the photoelectric sensor is limited by the defects of the packaging structure and the process, and it is still difficult to achieve the above requirements. Therefore, how to overcome the above-mentioned drawbacks by improving the structural design to meet the requirements of power saving and size reduction of products has become one of the important issues to be solved in this field.
Disclosure of Invention
The present application is directed to a photoelectric package, which is provided to overcome the shortcomings of the prior art.
In order to solve the above technical problem, one of the technical solutions adopted in the present application is to provide an optoelectronic package, which includes a substrate, an optoelectronic device, a first encapsulant, and a second encapsulant. The photoelectric component is arranged on the substrate. The first packaging colloid covers the substrate and is arranged around the photoelectric component. The second packaging colloid covers the first packaging colloid and the photoelectric component. The first encapsulant has a highest point position and a lowest point position, and the highest point position is not higher than the surface of the optoelectronic device.
In order to solve the above technical problem, another technical solution adopted by the present application is to provide an optoelectronic package, which includes a substrate, a plurality of optoelectronic elements, a plurality of wires, a first encapsulant, a second encapsulant, and a wall. The substrate has an upper surface and a lower surface. The substrate comprises a first metal pad and a plurality of second metal pads, and the first metal pad and the plurality of second metal pads are arranged on the upper surface. A plurality of optoelectronic components are disposed on the first metal pad. One end of each lead is welded on each photoelectric component, and the other end is welded on the corresponding second metal pad. The first encapsulant covers the substrate and is disposed around the plurality of optoelectronic devices. The second packaging colloid covers the first packaging colloid and the plurality of photoelectric components. The wall body is arranged on the substrate and surrounds the plurality of photoelectric assemblies, the first packaging colloid, the second packaging colloid, the first metal pad and the plurality of second metal pads. The first encapsulant has a highest point position and a lowest point position, and the highest point position is not higher than the surface of the optoelectronic device.
In order to solve the above technical problem, another technical solution adopted by the present application is to provide a method for manufacturing an optoelectronic package, including: providing a continuous substrate, and providing a plurality of optoelectronic components disposed on the continuous substrate; providing a first packaging colloid to fill between any two photoelectric components; providing a second packaging colloid to completely cover the plurality of photoelectric components and the first packaging colloid; grouping a plurality of photoelectric components, wherein the number of each group of photoelectric components is two, three or four, and performing a first cutting step between any two groups of photoelectric components to form a gap; providing a third encapsulant to fill each gap; and performing a second cutting step on the third packaging colloid filling each gap to cut the continuous substrate into a plurality of substrates and separate each group of photoelectric components, wherein each group of photoelectric components is arranged on each substrate, and the cut third packaging colloid forms a wall body surrounding each group of photoelectric components.
In order to solve the above technical problem, another technical solution adopted by the present application is to provide an optoelectronic package, including a substrate, a plurality of optoelectronic components, a wall, a first encapsulant, and a second encapsulant. The substrate includes a plurality of metal pads. The plurality of photoelectric components are respectively arranged on the plurality of metal pads. The wall is disposed on the substrate and surrounds the plurality of photovoltaic modules. The first packaging colloid covers the upper surface and the side surface of each photoelectric component, and covers the space between the first packaging colloid and any two photoelectric components and the space between the wall body and the adjacent photoelectric components, and the first packaging colloid forms a cavity between any two photoelectric components and between the wall body and the adjacent photoelectric components. The cavity is filled with the second encapsulant, and the second encapsulant is not in contact with the optoelectronic device.
One of the benefits of the present application is that the method for manufacturing a photovoltaic package and the photovoltaic package provided by the present application can improve the brightness and meet the requirements of light, thin, small and small size and power saving of the product by using the technical schemes of "the first encapsulant covers the substrate and is disposed around the photovoltaic device" and "the first encapsulant has a highest point position and a lowest point position, and the highest point position is not higher than the surface of the photovoltaic device".
Another advantage of the present disclosure is that the optoelectronic package provided herein can improve the brightness and meet the requirements of light, thin, small, and power saving of the product by the technical scheme that the first encapsulant covers the upper surface and the side surface of each optoelectronic device and covers the space between the first encapsulant and any two optoelectronic devices and the space between the wall and the adjacent optoelectronic device.
For a better understanding of the nature and technical content of the present application, reference should be made to the following detailed description and accompanying drawings, which are provided for purposes of illustration and description only and are not intended to limit the present application.
Drawings
Fig. 1 is a schematic diagram of a first embodiment of an optoelectronic package according to a first embodiment of the present application.
Fig. 2 is a schematic diagram of a fourth embodiment of the optoelectronic package according to the first embodiment of the present application.
Fig. 3 is a schematic diagram of a first embodiment of an optoelectronic package according to a second embodiment of the present application.
Fig. 4 is a schematic diagram of a second embodiment of an optoelectronic package according to a second embodiment of the present application.
Fig. 5 is a perspective view of a photoelectric package according to a second embodiment of the present application.
Fig. 6 is another perspective view of a photovoltaic package according to a second embodiment of the present application.
Fig. 7 is a schematic diagram of a first embodiment of a circuit structure of an optoelectronic package according to a second embodiment of the present application.
Fig. 8 is a schematic diagram of a second embodiment of a circuit structure of an optoelectronic package according to a second embodiment of the present application.
Fig. 9 to 15 are schematic flow charts illustrating a method for fabricating an optoelectronic package according to a second embodiment of the present application.
Fig. 16 is a schematic diagram of steps S11 to S17 of a method for fabricating an optoelectronic package according to a second embodiment of the present application.
Fig. 17 is a schematic view of a first embodiment of a photovoltaic package according to a third embodiment of the present application.
Fig. 18 is a schematic diagram of a second embodiment of a photovoltaic package according to a third embodiment of the present application.
Fig. 19 is a schematic diagram of a third embodiment of a photovoltaic package according to a third embodiment of the present application.
Fig. 20 is a schematic view of a fourth embodiment of a photovoltaic package according to a third embodiment of the present application.
Detailed Description
The following description is provided for the embodiments of the present disclosure relating to an optoelectronic package and a method for fabricating the optoelectronic package, and those skilled in the art can understand the advantages and effects of the present disclosure from the disclosure of the present disclosure. The present application is capable of other and different embodiments and its several details are capable of modifications and variations in various respects, all without departing from the present application. The drawings in the present application are for illustrative purposes only and are not intended to be drawn to scale. The following embodiments will further explain the related art of the present application in detail, but the disclosure is not intended to limit the scope of the present application.
It will be understood that, although the terms first, second, third, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used primarily to distinguish one element from another. In addition, the term "or" as used herein should be taken to include any one or combination of more of the associated listed items as the case may be.
First embodiment
First, referring to fig. 1 and fig. 2, a first embodiment of the present application provides an optoelectronic package M1, which includes a substrate 1, an optoelectronic device 2, a first encapsulant 3, and a second encapsulant 4. The optoelectronic component 2 is arranged on the substrate 1. Specifically, the substrate 1 may be, for example, but not limited to, a ceramic substrate, which includes a plurality of metal pads 12, and the optoelectronic device 2 is disposed on the metal pads 12, the metal pads are located on one side of the substrate 1 and electrically connected to the external electrodes X located on the other side of the metal pads 12 through the conductive vias. The first encapsulant 3 covers the substrate 1 and is disposed around the optoelectronic device 2. The second encapsulant 4 covers the first encapsulant 3 and the optoelectronic device 2. The first encapsulant 3 has a highest point T1 and a lowest point T2, and the highest point T1 is not higher than the surface 20 of the optoelectronic device 2. The distance between the highest point position T1 and the lowest point position T2 is between 25% of the height H of the photovoltaic device 2 and 90% of the height H of the photovoltaic device 2. Further, the distance between the highest point position T1 and the lowest point position T2 is between 60% of the height H of the optoelectronic device 2 and 80% of the height H of the optoelectronic device 2. The included angle θ between the surface of the optoelectronic device 2 and the surface of the first encapsulant 3 is between 20 degrees and 60 degrees. The first encapsulant 3 is preferably a reflective material, and may be silica gel containing high refractive powder, such as polydimethylsiloxane with the high refractive powder added, where the high refractive powder may be zirconium oxide (ZrO2), titanium oxide (TiO2), teflon, or the like, depending on the light band emitted by the optoelectronic component 2. The second encapsulant 4 is a transparent encapsulant.
The optoelectronic package M1 further includes a conductive trace 5, one end of the conductive trace 5 is soldered to the optoelectronic device 2, and the other end of the conductive trace 5 is soldered to the substrate 1. The invention performs wire bonding in a reverse wire bonding manner, wherein the height of the turning point of the wire 5 is higher than the height of the optoelectronic component 2 by 50um, so as to prevent the first encapsulant 3 from climbing to the light-emitting surface of the optoelectronic component 2 through the wire 5. It should be noted that, when the optoelectronic package M1 is formed, the side surface 31 of the first encapsulant 3 is flush with the side surface 41 of the second encapsulant 4, and further, as shown in fig. 2, a distance between the side surfaces 41 of the first encapsulant 3 and the second encapsulant 4 and the side surface 11 of the substrate 1 is greater than 50 μ M, that is, the widths of the first encapsulant 3 and the second encapsulant 4 are smaller than the width of the substrate 1. Compared with fig. 1, the amount of the first encapsulant 3 and the second encapsulant 4 in the optoelectronic package M1 is smaller, so that the light emitted by the optoelectronic device 2 passes through the first encapsulant 3 and the second encapsulant 4 and is absorbed by the encapsulant less, and the light output amount, i.e., the light output brightness, can be increased. In addition, a roughened release film is formed on the surface of the second encapsulant 4 during formation, so as to increase the brightness of the light emitted from the optoelectronic device 2 to the external environment through the second encapsulant 4. In particular, the surface roughness of the second encapsulant 4 is greater than 1.4 microns.
Second embodiment
Referring to fig. 3 to 6, fig. 3 and 4 are side cross-sectional views of an optical electrical package M2 according to a second embodiment of the present application, and fig. 5 and 6 are exploded perspective views of an optical electrical package M2 according to the second embodiment of the present application. A second embodiment of the present application provides an optoelectronic package M2, which includes a substrate 1, a plurality of optoelectronic devices 2, a first encapsulant 3, a second encapsulant 4, a plurality of wires 5, and a wall 6. The substrate 1 has an upper surface 101 and a lower surface 102, the substrate 1 includes a first metal pad 121 and a plurality of second metal pads 122, and the first metal pad 121 and the plurality of second metal pads 122 are disposed on the upper surface 101 of the substrate 1. A plurality of photovoltaic modules 2 are disposed on the first metal pad 121. One end of each conductive wire 5 is soldered to each optoelectronic device 2, and the other end is soldered to the corresponding second metal pad 122. The first encapsulant 3 covers the substrate 1 and is disposed around the plurality of optoelectronic devices 2. The second encapsulant 4 covers the first encapsulant 3 and the plurality of optoelectronic devices 2. The wall 6 is disposed on the substrate 1, and the wall 6 surrounds the plurality of optoelectronic devices 2, the first encapsulant 3, the second encapsulant 4, the first metal pads 121, and the plurality of second metal pads 122, and the first encapsulant 3 is recessed.
Further, the first encapsulant 3 has a highest point T1 and a lowest point T2, and the highest point T1 is not higher than the surface 20 of the optoelectronic device 2. The curvature of the first encapsulant 3 between any two optoelectronic devices 2 is greater than 0.075 mm, and the curvature of the first encapsulant 3 between any one of the optoelectronic devices 2 and the wall 6 is greater than 0.16 mm. For example, when the number of the optoelectronic devices is four, the curvature of the first encapsulant 3 between any two optoelectronic devices 2 is greater than 0.09 mm, and the curvature of the first encapsulant 3 between any one optoelectronic device 2 and the wall 6 is greater than 0.16 mm. The material of the wall 6 comprises silicone or epoxy.
As shown in fig. 3, the upper surface 42 of the second encapsulant 4 may be a flat surface, wherein the height of the upper surface 42 of the second encapsulant 4 may be flush with the wall 6 or higher than the bending position of the conductive wires or higher than the height of any of the optoelectronic devices 2 by more than 50um, so as to protect the conductive wires, the surface roughness of the upper surface 42 is less than 30 nm, and the wire bonding direction of any of the conductive wires 5 is from the second metal pad 122 toward any of the optoelectronic devices 2. In addition, the upper surface of the second encapsulant 4 may include a lens-shaped surface corresponding to any of the optoelectronic devices 2, and the surface roughness of the upper surface 42 is between 1.4 micrometers and 1.6 micrometers, wherein different wire bonding forms are matched according to the type of the lens shape, as shown in fig. 4, the upper surface of the second encapsulant 4 includes a surface having a fresnel lens shape, and the wire bonding direction of any of the wires 5 is from the second metal pad 122 toward any of the optoelectronic devices 2. In another embodiment, the top surface 42 of the second encapsulant 4 includes a spherical surface (not shown), and the bonding direction of any conductive line 5 is from any optoelectronic device 2 to the second metal pad 122. In addition, the position of the bottom of the wall body 6 can be adjusted according to requirements. As shown in fig. 3, the bottom of the wall 6 may be located below the upper surface of the first encapsulant 3. Alternatively, as shown in fig. 4, the bottom of the wall 6 may be located below the upper surface of the substrate 1, i.e., directly connected to the substrate 1. In addition, as shown in fig. 5, the inner wall 60 of the wall body 6 has four corners 60A, and each corner 60A has a curvature of less than 0.08 mm. When the bottom of the wall 6 is located above the upper surface of the first encapsulant 3, the overall structural strength of the optoelectronic package M2 is increased. When the bottom of the wall 6 is located below the upper surface of the substrate 1, light emitted from the optoelectronic device 2 can be reduced from being emitted from the first encapsulant 3, thereby reducing light leakage.
Referring to fig. 7 and 8, fig. 7 and 8 are circuit structures of an optoelectronic package M2 according to a second embodiment of the present application. Specifically, the first metal pad 121 is an anode, and the second metal pad 122 is a cathode. The number of the second metal pads 122 is at least two, wherein one second metal pad 122 is disposed on the left upper side of the first metal pad 121, and the other second metal pad 122 is disposed on the right lower side of the first metal pad 121. Further, the first metal pad 121 is cloverleaf-like and is divided into four regions, the four regions include an upper left region 121A, an upper right region 121B, a lower left region 121C and a lower right region 121D, an area of any one of the upper right region 121B and the lower left region 121C is larger than an area of any one of the upper left region 121A and the lower right region 121D, and at least two second metal pads 122 are respectively disposed around the upper left region 121A and the lower right region 121D. The upper right area 121B is symmetrical to the lower left area 121C, and the upper left area 121A is symmetrical to the lower right area 121D.
For example, when the number of the optoelectronic devices 2 is four, four optoelectronic devices 2 are respectively located in four regions. As shown in fig. 7 and 8, the two optoelectronic devices 2 located in the left upper region 121A and the right upper region 121B are electrically connected to the two second metal pads 122 located on the left upper side of the first metal pad 121 in a wire bonding manner. The two optoelectronic devices 2 located in the left lower area 121C and the right lower area 121D are electrically connected to two second metal pads 122 (cathodes) located on the lower right side of the first metal pad 121 by wire bonding. In addition, since the two optoelectronic devices 2 located in the upper right region 121B and the lower left region 121C in fig. 7 are in the form of horizontal chips, the upper right region 121B and the lower left region 121C of the first metal pad 121 extend outward to form a protrusion, and the two optoelectronic devices 2 disposed on the die attach region are further electrically connected to the corresponding protrusions (anodes) of the first metal pad 121 in a wire bonding manner. In the above, the optoelectronic device 2 can emit light with the same or different wavelengths, for example, the optoelectronic device 2 can include a first light emitting element and a second light emitting element, the first wavelength of the first light emitting element can be 500nm to 550nm, and the second wavelength of the second light emitting element can be 660nm to 940 nm. Wherein, when the second light emitting element is a red light emitting diode, the second wavelength may preferably be 660nm, and when the second light emitting element is an infrared light emitting element, the second wavelength may preferably be 940 nm. Therefore, the first wavelength is smaller than the second wavelength, and the second light emitting element can also comprise a red light emitting diode and an infrared light emitting body. Further, a first light emitting device is disposed in the upper right area 121B and the lower left area 121C, and a second light emitting device is disposed in the upper left area 121A and the lower right area 121D. Since the two optoelectronic devices 2 in the upper right region 121B and the lower left region 121C in fig. 8 are in a vertical chip type, the two optoelectronic devices 2 in the upper right region 121B and the lower left region 121C are not electrically connected to the first metal pad 121 by wire bonding, but directly electrically contact the first metal pad 121 by an anode pad (not shown) at the bottom of the optoelectronic device 2.
The optoelectronic package M2 further includes a plurality of third metal pads 123 disposed on the lower surface of the substrate 1. The number of the third metal pads 123 is at least 3, and the number of the third metal pads 123 is equal to the sum of the numbers of the first metal pads 121 and the second metal pads 122 if the light source partition control is considered. That is, when the number of the optoelectronic devices 2 is four, the sum of the number of the first metal pads 121 and the second metal pads 122 and the number of the third metal pads 123 are both 5, and the third metal pads 123 are electrically connected to the first metal pads 121 and the second metal pads 122 respectively through the conductive vias penetrating through the substrate 1.
Referring to fig. 9 to 15, fig. 9 to 15 are schematic flow charts illustrating a method for manufacturing an optoelectronic package according to a second embodiment of the present application. A second embodiment of the present application provides a method for manufacturing an optoelectronic package M2, which at least includes the following steps (please refer to fig. 16):
in step S11, a continuous substrate Z is provided, and a plurality of optoelectronic devices 2 are provided on the continuous substrate Z.
Specifically, the continuous substrate Z is composed of a plurality of substrates, each of which includes a first metal pad 121 and a plurality of second metal pads (not shown), and the first metal pads and the second metal pads 122 are disposed on the upper surface of the substrate. A surrounding wall W is positioned on the continuous substrate Z, and the surrounding wall W provides a receiving space for accommodating the plurality of optoelectronic components 2 disposed on the first metal pad 121 and defines a plurality of gaps distributed in an array. Then, each photoelectric component 2 is wire-bonded, one end of a conducting wire 5 is welded on each photoelectric component 2, and the other end of the conducting wire 5 is welded on the corresponding second metal pad. And the wire bonding direction of the conductive wire 5 is from the second metal pad 122 toward any of the optoelectronic devices 2 or from any of the optoelectronic devices 2 toward the second metal pad 122. Generally, in order to avoid the influence of the light emission caused by the glue-climbing in the subsequent process, the turning point of the conductive wire 5 in the reverse-strike process is higher than the height of the optoelectronic device 2 by about 50 um. Besides, the surrounding wall W can be integrally formed with the continuous substrate Z, and can also be defined by removable temporary glue. In step S12, a first encapsulant 3 is provided to fill between any two optoelectronic devices 2.
In step S12, the first encapsulant 3 is filled around each of the optoelectronic devices 2 by dispensing adhesive in a dot-like manner. Furthermore, the adhesive is continuously dispensed around each of the optoelectronic devices 2 in a dot-like manner in an array manner on the continuous substrate Z, and then a baking process is performed to make the adhesive flow in gaps distributed in an array manner between the surrounding retaining wall W and the optoelectronic devices 2. The first encapsulant 3 is concave, and the first encapsulant 3 has a highest point T1 and a lowest point T2, and the highest point T1 is not higher than the surface 20 of the optoelectronic device 2. Specifically, the curvature of the first encapsulant 3 between any two optoelectronic components 2 is greater than 0.075 mm, and the curvature of the first encapsulant 3 between any one optoelectronic component 2 and the wall 6 is greater than 0.16 mm. The first encapsulant 3 is an opaque material, for example, a highly reflective material with a reflectivity of more than 95%, such as white or a highly absorptive adhesive material, such as black.
In step S13, a second encapsulant 4 is provided to completely cover the plurality of optoelectronic devices 2 and the first encapsulant 3.
Specifically, the second encapsulant 4 completely covers the plurality of optoelectronic elements 2 and the first encapsulant 3 by molding. For example, the upper surface 42 of the second encapsulant 4 may form a flat surface, a spherical surface or a fresnel lens shape, and the second encapsulant 4 is a transparent encapsulant.
In step S14, a plurality of optoelectronic devices 2 are grouped into at least two groups, and a first cutting step is performed between any two groups of optoelectronic devices 2 to form a notch V.
Specifically, the depth of the notch V may reach below the upper surface of the first encapsulant 3 (i.e., stop when the first encapsulant 3 is cut), or may reach below the upper surface of the substrate 1, i.e., stop when the substrate 1 is cut.
In step S15, a third encapsulant 6' is provided to fill each gap V. Specifically, the third encapsulant 6' is molded to be opaque, i.e. may be the same material as or different from the first encapsulant 3, such as a highly reflective white or highly absorptive black encapsulant.
Step S16, removing the third encapsulant 6 'on the top surface of the second encapsulant 4 to expose the third encapsulant 6' filling each gap V.
In step S17, a second cutting step is performed on the third encapsulant 6' filling each gap V to cut the continuous substrate Z into a plurality of substrates 1 and separate each group of optoelectronic devices 2. Each group of optoelectronic devices 2 is disposed on each substrate 1, and the third encapsulant 6' after cutting forms a wall 6 surrounding each group of optoelectronic devices 2.
The number of each group of optoelectronic devices 2 may be 2, 3 or 4, but the application is not limited thereto. The position of the bottom of the wall 6 is formed according to the depth of the notch V. When the depth of the notch V reaches below the upper surface of the first encapsulant 3, the bottom of the wall 6 is located below the upper surface of the first encapsulant 3. If the depth of the notch V reaches below the upper surface of the substrate 1, the bottom of the wall 6 may be located below the upper surface of the substrate 1, i.e. directly connected to the substrate 1.
The first cutting step includes cutting the first encapsulant 3 between any two sets of optoelectronic devices 2 with a hard knife, and the second cutting step includes cutting the continuous substrate Z with a soft knife, wherein the cutting width formed in the first cutting step is greater than the cutting width in the second cutting step.
Third embodiment
Referring to fig. 17 to 20, a third embodiment of the present application provides an optoelectronic package M3, which includes a substrate 1, a plurality of optoelectronic devices 2, a first encapsulant 3 ', a second encapsulant 4', a wall 6, and a fourth encapsulant 7. The substrate 1 includes a plurality of metal pads 12. The plurality of photovoltaic modules 2 are respectively disposed on the plurality of metal pads 12. A wall 6 is provided on the substrate and surrounds the plurality of optoelectronic components 2. The first encapsulant 3 ' covers a surface 20 (including an upper surface and a side surface) of each of the optoelectronic devices 2, and covers a space between the first encapsulant 3 ' and any two of the optoelectronic devices 2 and between the wall 6 and the adjacent optoelectronic device 2, and the first encapsulant 3 ' forms a cavity 30 between any two of the optoelectronic devices 2 and between the wall 6 and the adjacent optoelectronic device 2. The cavity 30 is filled with the second encapsulant 4 ', and the second encapsulant 4' is not in contact with the optoelectronic device 2. Then, the fourth encapsulant 7 completely covers the plurality of optoelectronic devices 2, the first encapsulant 3, and the second encapsulant 4'. The first encapsulant 3 ' and the fourth encapsulant 7 of the present embodiment are transparent encapsulants, the refractive index of the first encapsulant 3 ' is greater than that of the fourth encapsulant 7, and the second encapsulant 4 ' is a light reflective adhesive.
Specifically, as shown in fig. 17 and 18, the first encapsulant 3 'in fig. 17 is dispensed to cover the surface 20 (top surface and side surface) of each of the optoelectronic devices 2, and to cover the space between the first encapsulant 3' and any two of the optoelectronic devices 2 and between the wall 6 and the adjacent optoelectronic devices 2. The first encapsulant 3 'in fig. 18 is sprayed to cover the surface 20 (top surface and side surface) of each of the optoelectronic devices 2, and to cover the space between the first encapsulant 3' and any two of the optoelectronic devices 2 and between the wall 6 and the adjacent optoelectronic devices 2.
As shown in fig. 19 and 20, the optoelectronic package M3 further includes a barrier material 8. In fig. 19, the blocking material 8 is first coated on the side surface of each photovoltaic device 2. Then, the fourth encapsulant 7 completely covers the plurality of optoelectronic devices 2 and the first encapsulant 3'. In fig. 20, the first encapsulant 3 ' forms a spherical body above each optoelectronic device 2, and then overflows to both sides of the optoelectronic device 2 to form the cavity 30, the second encapsulant 4 ' fills the cavity 30, and the second encapsulant 4 ' does not contact the optoelectronic device 2. The photovoltaic package M3 shown in fig. 20 does not include the fourth encapsulant 7.
The barrier material 8 is a highly thermally conductive material. For example, the barrier material 8 includes one or more from the group of: silicon carbide (SiC), aluminum nitride (AlN), titanium dioxide (TiO2), zinc oxide (ZnO), aluminum oxynitride (AlON), and magnesium oxide (MgO).
Advantageous effects of the embodiments
One of the advantages of the present disclosure is that the photoelectric package and the method for manufacturing the photoelectric package provided by the present disclosure can improve the brightness and meet the requirements of light, thin, small, and power saving products by using the technical schemes that the first encapsulant 3, 3' covers the substrate 1 and is disposed around the photoelectric device 2, and the first encapsulant 3 has a highest point position T1 and a lowest point position T2, and the highest point position T1 is not higher than the surface of the photoelectric device 2.
Another advantage of the present disclosure is that the optoelectronic package provided herein can improve the brightness and meet the requirements of light, thin, small, and power-saving products by the technical scheme that the first encapsulant 3 covers the upper surface and the side surface of each optoelectronic device 2 and covers the space between the first encapsulant 3 and any two optoelectronic devices 2 and the space between the wall 6 and the adjacent optoelectronic device 2.
The disclosure is only a preferred embodiment of the present application and is not intended to limit the scope of the claims of the present application, so that all technical equivalents and modifications made by the disclosure of the present application and the drawings are included in the scope of the claims of the present application.

Claims (24)

1. An optoelectronic package, comprising:
a substrate;
the photoelectric component is arranged on the substrate;
the first packaging colloid covers the substrate and is arranged around the photoelectric component; the second packaging colloid covers the first packaging colloid and the photoelectric component;
the first encapsulant has a highest point position and a lowest point position, and the highest point position is not higher than the surface of the optoelectronic component.
2. An optoelectronic package, comprising:
a substrate having an upper surface and a lower surface, the substrate comprising a first metal pad and a plurality of second metal pads, the first metal pad and the plurality of second metal pads being disposed on the upper surface;
a plurality of optoelectronic components disposed on the first metal pad;
one end of each wire is welded to each photoelectric component, and the other end of each wire is welded to the corresponding second metal pad;
the first packaging colloid covers the substrate and is arranged around the photoelectric components;
a second encapsulant covering the first encapsulant and the plurality of optoelectronic devices; the wall body is arranged on the substrate and surrounds the photoelectric assemblies, the first packaging colloid, the second packaging colloid, the first metal pad and the second metal pads;
the first encapsulant has a highest point position and a lowest point position, and the highest point position is not higher than the surface of the optoelectronic component.
3. The optoelectronic package of claim 1, further comprising: and one end of the lead is welded on the photoelectric component, and the other end of the lead is welded on the substrate.
4. The optoelectronic package of claim 1, wherein a distance between the highest point location and the lowest point location is between 25% of the height of the optoelectronic component and 90% of the height of the optoelectronic component.
5. The optoelectronic package of claim 1, wherein an angle between a surface of the optoelectronic device and a surface of the first encapsulant is between 20 degrees and 60 degrees.
6. The optoelectronic package of claim 1, wherein the first encapsulant is a reflective encapsulant and the second encapsulant is a light transmissive encapsulant.
7. The optoelectronic package of claim 2, wherein the curvature of the first encapsulant between any two optoelectronic components is greater than 0.075 mm, and the curvature of the first encapsulant between any one of the optoelectronic components and the wall is greater than 0.16 mm.
8. The optoelectronic package of claim 2, wherein the top surface of the second encapsulant is a planar surface and the surface roughness of the top surface is less than 30 nm.
9. The optoelectronic package of claim 2, wherein the upper surface of the second encapsulant comprises a spherical surface or a fresnel lens shaped surface, and the surface roughness of the upper surface is between 1.4 microns and 1.6 microns.
10. The optoelectronic package of claim 2, wherein the bottom of the wall is located below an upper surface of the first encapsulant or below an upper surface of the substrate.
11. The optoelectronic package of claim 2, wherein the inner sidewalls of the walls have four corners, each corner having a curvature of less than 0.08 mm.
12. The optoelectronic package of claim 2, wherein the number of the second metal pads is at least two, one of the second metal pads is disposed on the upper left side of the first metal pad, and the other one of the second metal pads is disposed on the lower right side of the first metal pad.
13. The optoelectronic package of claim 12, wherein the first metal pads are divided into four regions, the four regions include an upper left region, an upper right region, a lower left region and a lower right region, an area of any one of the upper right region and the lower left region is larger than an area of any one of the upper left region and the lower right region, and at least two of the second metal pads are respectively distributed around the upper left region and the lower right region.
14. A method for manufacturing an optoelectronic package, the method comprising:
providing a continuous substrate and providing a plurality of optoelectronic components disposed on the continuous substrate;
providing a first packaging colloid to be filled between any two photoelectric components;
providing a second encapsulant to completely cover the plurality of optoelectronic devices and the first encapsulant;
grouping a plurality of the photoelectric components, wherein the number of each group of the photoelectric components is at least two, and performing a first cutting step between any two groups of the photoelectric components to form a gap;
providing a third packaging colloid to fill each gap; and performing a second cutting step on the third encapsulant filling each of the gaps to cut the continuous substrate into a plurality of substrates and separate each group of the optoelectronic devices, wherein each group of the optoelectronic devices is disposed on each of the substrates, and the cut third encapsulant forms a wall surrounding each group of the optoelectronic devices.
15. The method of claim 14, wherein the third encapsulant is removed from the top surface of the second encapsulant before the second dicing step is performed on the third encapsulant filling each of the gaps to expose the third encapsulant filling each of the gaps.
16. The method of claim 14, wherein the step of providing the first encapsulant between any two of the optoelectronic devices further comprises: and filling the first packaging colloid around each photoelectric component in a dot glue discharging mode.
17. The method of claim 14, wherein the first encapsulant is recessed, and the first encapsulant has a highest point position and a lowest point position, the highest point position being not higher than the surface of the optoelectronic device.
18. The method of claim 14, wherein the first dicing step comprises dicing the first encapsulant between any two sets of optoelectronic devices with a hard knife, and the second dicing step comprises dicing the continuous substrate with a soft knife, wherein the first dicing step forms a dicing width that is greater than the dicing width of the second dicing step.
19. An optoelectronic package, comprising:
a substrate including a plurality of metal pads;
a plurality of photoelectric components respectively arranged on the plurality of metal pads;
a wall disposed on the substrate and surrounding the plurality of optoelectronic components;
a first encapsulant covering the top and side surfaces of each of the optoelectronic devices and covering spaces between the first encapsulant and any two of the optoelectronic devices and between the wall and the adjacent optoelectronic device, the first encapsulant forming a cavity between any two of the optoelectronic devices and between the wall and the adjacent optoelectronic device; and the second packaging colloid is filled in the concave cavity and is not contacted with the photoelectric component.
20. The optoelectronic package of claim 19, further comprising: and the fourth packaging colloid completely covers the plurality of photoelectric components and the first packaging colloid.
21. The optoelectronic package of claim 20, wherein the first encapsulant forms a sphere over each of the optoelectronic elements.
22. The optoelectronic package of claim 20, wherein the first encapsulant and the fourth encapsulant are transparent encapsulant, and the refractive index of the first encapsulant is greater than that of the fourth encapsulant, and the second encapsulant is highly reflective encapsulant.
23. The optoelectronic package of claim 19, further comprising: and the high-thermal-conductivity material is coated on the side surface of each photoelectric component.
24. The optoelectronic package of claim 23, wherein the high thermal conductivity material comprises one or more from the group of: silicon carbide, aluminum nitride, titanium dioxide, zinc oxide, aluminum oxynitride, and magnesium oxide.
CN202011566646.8A 2020-01-20 2020-12-25 Photoelectric package and manufacturing method thereof Pending CN113161429A (en)

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US202062963195P 2020-01-20 2020-01-20
US62/963,195 2020-01-20
US202063028617P 2020-05-22 2020-05-22
US63/028,617 2020-05-22
US202063065547P 2020-08-14 2020-08-14
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Publication number Priority date Publication date Assignee Title
EP0269522A1 (en) * 1986-11-26 1988-06-01 Jaeger Electrical connection device, particularly for liquid-crystal displays
US20070210702A1 (en) * 2006-03-08 2007-09-13 Akio Nakamura Organic electroluminescence panel and manufacturing method of the same
US20110170269A1 (en) * 2007-12-20 2011-07-14 Mike Blossfeld Electronic assembly and method of manufacturing same
US20140111992A1 (en) * 2012-10-18 2014-04-24 Avago Technologies General IP (Singapore) Pte. Ltd . Leadframe-based surface mount technology segmented display design and method of manufacture
CN107871789A (en) * 2017-12-13 2018-04-03 刘向宁 Transmitting-receiving integrated optical-electrical converter

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0269522A1 (en) * 1986-11-26 1988-06-01 Jaeger Electrical connection device, particularly for liquid-crystal displays
US20070210702A1 (en) * 2006-03-08 2007-09-13 Akio Nakamura Organic electroluminescence panel and manufacturing method of the same
US20110170269A1 (en) * 2007-12-20 2011-07-14 Mike Blossfeld Electronic assembly and method of manufacturing same
US20140111992A1 (en) * 2012-10-18 2014-04-24 Avago Technologies General IP (Singapore) Pte. Ltd . Leadframe-based surface mount technology segmented display design and method of manufacture
CN107871789A (en) * 2017-12-13 2018-04-03 刘向宁 Transmitting-receiving integrated optical-electrical converter

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